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52a65ff5 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
a34db9b2 IM |
3 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
4 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
5 | * |
6 | * This file contains driver APIs to the irq subsystem. | |
7 | */ | |
8 | ||
97fd75b7 AM |
9 | #define pr_fmt(fmt) "genirq: " fmt |
10 | ||
1da177e4 | 11 | #include <linux/irq.h> |
3aa551c9 | 12 | #include <linux/kthread.h> |
1da177e4 LT |
13 | #include <linux/module.h> |
14 | #include <linux/random.h> | |
15 | #include <linux/interrupt.h> | |
1aeb272c | 16 | #include <linux/slab.h> |
3aa551c9 | 17 | #include <linux/sched.h> |
8bd75c77 | 18 | #include <linux/sched/rt.h> |
0881e7bd | 19 | #include <linux/sched/task.h> |
ae7e81c0 | 20 | #include <uapi/linux/sched/types.h> |
4d1d61a6 | 21 | #include <linux/task_work.h> |
1da177e4 LT |
22 | |
23 | #include "internals.h" | |
24 | ||
8d32a307 TG |
25 | #ifdef CONFIG_IRQ_FORCED_THREADING |
26 | __read_mostly bool force_irqthreads; | |
47b82e88 | 27 | EXPORT_SYMBOL_GPL(force_irqthreads); |
8d32a307 TG |
28 | |
29 | static int __init setup_forced_irqthreads(char *arg) | |
30 | { | |
31 | force_irqthreads = true; | |
32 | return 0; | |
33 | } | |
34 | early_param("threadirqs", setup_forced_irqthreads); | |
35 | #endif | |
36 | ||
18258f72 | 37 | static void __synchronize_hardirq(struct irq_desc *desc) |
1da177e4 | 38 | { |
32f4125e | 39 | bool inprogress; |
1da177e4 | 40 | |
a98ce5c6 HX |
41 | do { |
42 | unsigned long flags; | |
43 | ||
44 | /* | |
45 | * Wait until we're out of the critical section. This might | |
46 | * give the wrong answer due to the lack of memory barriers. | |
47 | */ | |
32f4125e | 48 | while (irqd_irq_inprogress(&desc->irq_data)) |
a98ce5c6 HX |
49 | cpu_relax(); |
50 | ||
51 | /* Ok, that indicated we're done: double-check carefully. */ | |
239007b8 | 52 | raw_spin_lock_irqsave(&desc->lock, flags); |
32f4125e | 53 | inprogress = irqd_irq_inprogress(&desc->irq_data); |
239007b8 | 54 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
a98ce5c6 HX |
55 | |
56 | /* Oops, that failed? */ | |
32f4125e | 57 | } while (inprogress); |
18258f72 TG |
58 | } |
59 | ||
60 | /** | |
61 | * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs) | |
62 | * @irq: interrupt number to wait for | |
63 | * | |
64 | * This function waits for any pending hard IRQ handlers for this | |
65 | * interrupt to complete before returning. If you use this | |
66 | * function while holding a resource the IRQ handler may need you | |
67 | * will deadlock. It does not take associated threaded handlers | |
68 | * into account. | |
69 | * | |
70 | * Do not use this for shutdown scenarios where you must be sure | |
71 | * that all parts (hardirq and threaded handler) have completed. | |
72 | * | |
02cea395 PZ |
73 | * Returns: false if a threaded handler is active. |
74 | * | |
18258f72 TG |
75 | * This function may be called - with care - from IRQ context. |
76 | */ | |
02cea395 | 77 | bool synchronize_hardirq(unsigned int irq) |
18258f72 TG |
78 | { |
79 | struct irq_desc *desc = irq_to_desc(irq); | |
3aa551c9 | 80 | |
02cea395 | 81 | if (desc) { |
18258f72 | 82 | __synchronize_hardirq(desc); |
02cea395 PZ |
83 | return !atomic_read(&desc->threads_active); |
84 | } | |
85 | ||
86 | return true; | |
18258f72 TG |
87 | } |
88 | EXPORT_SYMBOL(synchronize_hardirq); | |
89 | ||
90 | /** | |
91 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
92 | * @irq: interrupt number to wait for | |
93 | * | |
94 | * This function waits for any pending IRQ handlers for this interrupt | |
95 | * to complete before returning. If you use this function while | |
96 | * holding a resource the IRQ handler may need you will deadlock. | |
97 | * | |
98 | * This function may be called - with care - from IRQ context. | |
99 | */ | |
100 | void synchronize_irq(unsigned int irq) | |
101 | { | |
102 | struct irq_desc *desc = irq_to_desc(irq); | |
103 | ||
104 | if (desc) { | |
105 | __synchronize_hardirq(desc); | |
106 | /* | |
107 | * We made sure that no hardirq handler is | |
108 | * running. Now verify that no threaded handlers are | |
109 | * active. | |
110 | */ | |
111 | wait_event(desc->wait_for_threads, | |
112 | !atomic_read(&desc->threads_active)); | |
113 | } | |
1da177e4 | 114 | } |
1da177e4 LT |
115 | EXPORT_SYMBOL(synchronize_irq); |
116 | ||
3aa551c9 TG |
117 | #ifdef CONFIG_SMP |
118 | cpumask_var_t irq_default_affinity; | |
119 | ||
9c255583 | 120 | static bool __irq_can_set_affinity(struct irq_desc *desc) |
e019c249 JL |
121 | { |
122 | if (!desc || !irqd_can_balance(&desc->irq_data) || | |
123 | !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity) | |
9c255583 TG |
124 | return false; |
125 | return true; | |
e019c249 JL |
126 | } |
127 | ||
771ee3b0 TG |
128 | /** |
129 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
130 | * @irq: Interrupt to check | |
131 | * | |
132 | */ | |
133 | int irq_can_set_affinity(unsigned int irq) | |
134 | { | |
e019c249 | 135 | return __irq_can_set_affinity(irq_to_desc(irq)); |
771ee3b0 TG |
136 | } |
137 | ||
9c255583 TG |
138 | /** |
139 | * irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space | |
140 | * @irq: Interrupt to check | |
141 | * | |
142 | * Like irq_can_set_affinity() above, but additionally checks for the | |
143 | * AFFINITY_MANAGED flag. | |
144 | */ | |
145 | bool irq_can_set_affinity_usr(unsigned int irq) | |
146 | { | |
147 | struct irq_desc *desc = irq_to_desc(irq); | |
148 | ||
149 | return __irq_can_set_affinity(desc) && | |
150 | !irqd_affinity_is_managed(&desc->irq_data); | |
151 | } | |
152 | ||
591d2fb0 TG |
153 | /** |
154 | * irq_set_thread_affinity - Notify irq threads to adjust affinity | |
155 | * @desc: irq descriptor which has affitnity changed | |
156 | * | |
157 | * We just set IRQTF_AFFINITY and delegate the affinity setting | |
158 | * to the interrupt thread itself. We can not call | |
159 | * set_cpus_allowed_ptr() here as we hold desc->lock and this | |
160 | * code can be called from hard interrupt context. | |
161 | */ | |
162 | void irq_set_thread_affinity(struct irq_desc *desc) | |
3aa551c9 | 163 | { |
f944b5a7 | 164 | struct irqaction *action; |
3aa551c9 | 165 | |
f944b5a7 | 166 | for_each_action_of_desc(desc, action) |
3aa551c9 | 167 | if (action->thread) |
591d2fb0 | 168 | set_bit(IRQTF_AFFINITY, &action->thread_flags); |
3aa551c9 TG |
169 | } |
170 | ||
19e1d4e9 TG |
171 | static void irq_validate_effective_affinity(struct irq_data *data) |
172 | { | |
173 | #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK | |
174 | const struct cpumask *m = irq_data_get_effective_affinity_mask(data); | |
175 | struct irq_chip *chip = irq_data_get_irq_chip(data); | |
176 | ||
177 | if (!cpumask_empty(m)) | |
178 | return; | |
179 | pr_warn_once("irq_chip %s did not update eff. affinity mask of irq %u\n", | |
180 | chip->name, data->irq); | |
181 | #endif | |
182 | } | |
183 | ||
818b0f3b JL |
184 | int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask, |
185 | bool force) | |
186 | { | |
187 | struct irq_desc *desc = irq_data_to_desc(data); | |
188 | struct irq_chip *chip = irq_data_get_irq_chip(data); | |
189 | int ret; | |
190 | ||
e43b3b58 TG |
191 | if (!chip || !chip->irq_set_affinity) |
192 | return -EINVAL; | |
193 | ||
01f8fa4f | 194 | ret = chip->irq_set_affinity(data, mask, force); |
818b0f3b JL |
195 | switch (ret) { |
196 | case IRQ_SET_MASK_OK: | |
2cb62547 | 197 | case IRQ_SET_MASK_OK_DONE: |
9df872fa | 198 | cpumask_copy(desc->irq_common_data.affinity, mask); |
818b0f3b | 199 | case IRQ_SET_MASK_OK_NOCOPY: |
19e1d4e9 | 200 | irq_validate_effective_affinity(data); |
818b0f3b JL |
201 | irq_set_thread_affinity(desc); |
202 | ret = 0; | |
203 | } | |
204 | ||
205 | return ret; | |
206 | } | |
207 | ||
12f47073 TG |
208 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
209 | static inline int irq_set_affinity_pending(struct irq_data *data, | |
210 | const struct cpumask *dest) | |
211 | { | |
212 | struct irq_desc *desc = irq_data_to_desc(data); | |
213 | ||
214 | irqd_set_move_pending(data); | |
215 | irq_copy_pending(desc, dest); | |
216 | return 0; | |
217 | } | |
218 | #else | |
219 | static inline int irq_set_affinity_pending(struct irq_data *data, | |
220 | const struct cpumask *dest) | |
221 | { | |
222 | return -EBUSY; | |
223 | } | |
224 | #endif | |
225 | ||
226 | static int irq_try_set_affinity(struct irq_data *data, | |
227 | const struct cpumask *dest, bool force) | |
228 | { | |
229 | int ret = irq_do_set_affinity(data, dest, force); | |
230 | ||
231 | /* | |
232 | * In case that the underlying vector management is busy and the | |
233 | * architecture supports the generic pending mechanism then utilize | |
234 | * this to avoid returning an error to user space. | |
235 | */ | |
236 | if (ret == -EBUSY && !force) | |
237 | ret = irq_set_affinity_pending(data, dest); | |
238 | return ret; | |
239 | } | |
240 | ||
01f8fa4f TG |
241 | int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask, |
242 | bool force) | |
771ee3b0 | 243 | { |
c2d0c555 DD |
244 | struct irq_chip *chip = irq_data_get_irq_chip(data); |
245 | struct irq_desc *desc = irq_data_to_desc(data); | |
1fa46f1f | 246 | int ret = 0; |
771ee3b0 | 247 | |
c2d0c555 | 248 | if (!chip || !chip->irq_set_affinity) |
771ee3b0 TG |
249 | return -EINVAL; |
250 | ||
12f47073 TG |
251 | if (irq_can_move_pcntxt(data) && !irqd_is_setaffinity_pending(data)) { |
252 | ret = irq_try_set_affinity(data, mask, force); | |
1fa46f1f | 253 | } else { |
c2d0c555 | 254 | irqd_set_move_pending(data); |
1fa46f1f | 255 | irq_copy_pending(desc, mask); |
57b150cc | 256 | } |
1fa46f1f | 257 | |
cd7eab44 BH |
258 | if (desc->affinity_notify) { |
259 | kref_get(&desc->affinity_notify->kref); | |
260 | schedule_work(&desc->affinity_notify->work); | |
261 | } | |
c2d0c555 DD |
262 | irqd_set(data, IRQD_AFFINITY_SET); |
263 | ||
264 | return ret; | |
265 | } | |
266 | ||
01f8fa4f | 267 | int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force) |
c2d0c555 DD |
268 | { |
269 | struct irq_desc *desc = irq_to_desc(irq); | |
270 | unsigned long flags; | |
271 | int ret; | |
272 | ||
273 | if (!desc) | |
274 | return -EINVAL; | |
275 | ||
276 | raw_spin_lock_irqsave(&desc->lock, flags); | |
01f8fa4f | 277 | ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force); |
239007b8 | 278 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1fa46f1f | 279 | return ret; |
771ee3b0 TG |
280 | } |
281 | ||
e7a297b0 PWJ |
282 | int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m) |
283 | { | |
e7a297b0 | 284 | unsigned long flags; |
31d9d9b6 | 285 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); |
e7a297b0 PWJ |
286 | |
287 | if (!desc) | |
288 | return -EINVAL; | |
e7a297b0 | 289 | desc->affinity_hint = m; |
02725e74 | 290 | irq_put_desc_unlock(desc, flags); |
e2e64a93 | 291 | /* set the initial affinity to prevent every interrupt being on CPU0 */ |
4fe7ffb7 JB |
292 | if (m) |
293 | __irq_set_affinity(irq, m, false); | |
e7a297b0 PWJ |
294 | return 0; |
295 | } | |
296 | EXPORT_SYMBOL_GPL(irq_set_affinity_hint); | |
297 | ||
cd7eab44 BH |
298 | static void irq_affinity_notify(struct work_struct *work) |
299 | { | |
300 | struct irq_affinity_notify *notify = | |
301 | container_of(work, struct irq_affinity_notify, work); | |
302 | struct irq_desc *desc = irq_to_desc(notify->irq); | |
303 | cpumask_var_t cpumask; | |
304 | unsigned long flags; | |
305 | ||
1fa46f1f | 306 | if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL)) |
cd7eab44 BH |
307 | goto out; |
308 | ||
309 | raw_spin_lock_irqsave(&desc->lock, flags); | |
0ef5ca1e | 310 | if (irq_move_pending(&desc->irq_data)) |
1fa46f1f | 311 | irq_get_pending(cpumask, desc); |
cd7eab44 | 312 | else |
9df872fa | 313 | cpumask_copy(cpumask, desc->irq_common_data.affinity); |
cd7eab44 BH |
314 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
315 | ||
316 | notify->notify(notify, cpumask); | |
317 | ||
318 | free_cpumask_var(cpumask); | |
319 | out: | |
320 | kref_put(¬ify->kref, notify->release); | |
321 | } | |
322 | ||
323 | /** | |
324 | * irq_set_affinity_notifier - control notification of IRQ affinity changes | |
325 | * @irq: Interrupt for which to enable/disable notification | |
326 | * @notify: Context for notification, or %NULL to disable | |
327 | * notification. Function pointers must be initialised; | |
328 | * the other fields will be initialised by this function. | |
329 | * | |
330 | * Must be called in process context. Notification may only be enabled | |
331 | * after the IRQ is allocated and must be disabled before the IRQ is | |
332 | * freed using free_irq(). | |
333 | */ | |
334 | int | |
335 | irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) | |
336 | { | |
337 | struct irq_desc *desc = irq_to_desc(irq); | |
338 | struct irq_affinity_notify *old_notify; | |
339 | unsigned long flags; | |
340 | ||
341 | /* The release function is promised process context */ | |
342 | might_sleep(); | |
343 | ||
344 | if (!desc) | |
345 | return -EINVAL; | |
346 | ||
347 | /* Complete initialisation of *notify */ | |
348 | if (notify) { | |
349 | notify->irq = irq; | |
350 | kref_init(¬ify->kref); | |
351 | INIT_WORK(¬ify->work, irq_affinity_notify); | |
352 | } | |
353 | ||
354 | raw_spin_lock_irqsave(&desc->lock, flags); | |
355 | old_notify = desc->affinity_notify; | |
356 | desc->affinity_notify = notify; | |
357 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
358 | ||
359 | if (old_notify) | |
360 | kref_put(&old_notify->kref, old_notify->release); | |
361 | ||
362 | return 0; | |
363 | } | |
364 | EXPORT_SYMBOL_GPL(irq_set_affinity_notifier); | |
365 | ||
18404756 MK |
366 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
367 | /* | |
368 | * Generic version of the affinity autoselector. | |
369 | */ | |
43564bd9 | 370 | int irq_setup_affinity(struct irq_desc *desc) |
18404756 | 371 | { |
569bda8d | 372 | struct cpumask *set = irq_default_affinity; |
cba4235e TG |
373 | int ret, node = irq_desc_get_node(desc); |
374 | static DEFINE_RAW_SPINLOCK(mask_lock); | |
375 | static struct cpumask mask; | |
569bda8d | 376 | |
b008207c | 377 | /* Excludes PER_CPU and NO_BALANCE interrupts */ |
e019c249 | 378 | if (!__irq_can_set_affinity(desc)) |
18404756 MK |
379 | return 0; |
380 | ||
cba4235e | 381 | raw_spin_lock(&mask_lock); |
f6d87f4b | 382 | /* |
9332ef9d | 383 | * Preserve the managed affinity setting and a userspace affinity |
06ee6d57 | 384 | * setup, but make sure that one of the targets is online. |
f6d87f4b | 385 | */ |
06ee6d57 TG |
386 | if (irqd_affinity_is_managed(&desc->irq_data) || |
387 | irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) { | |
9df872fa | 388 | if (cpumask_intersects(desc->irq_common_data.affinity, |
569bda8d | 389 | cpu_online_mask)) |
9df872fa | 390 | set = desc->irq_common_data.affinity; |
0c6f8a8b | 391 | else |
2bdd1055 | 392 | irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET); |
f6d87f4b | 393 | } |
18404756 | 394 | |
cba4235e | 395 | cpumask_and(&mask, cpu_online_mask, set); |
241fc640 PB |
396 | if (node != NUMA_NO_NODE) { |
397 | const struct cpumask *nodemask = cpumask_of_node(node); | |
398 | ||
399 | /* make sure at least one of the cpus in nodemask is online */ | |
cba4235e TG |
400 | if (cpumask_intersects(&mask, nodemask)) |
401 | cpumask_and(&mask, &mask, nodemask); | |
241fc640 | 402 | } |
cba4235e TG |
403 | ret = irq_do_set_affinity(&desc->irq_data, &mask, false); |
404 | raw_spin_unlock(&mask_lock); | |
405 | return ret; | |
18404756 | 406 | } |
f6d87f4b | 407 | #else |
a8a98eac | 408 | /* Wrapper for ALPHA specific affinity selector magic */ |
cba4235e | 409 | int irq_setup_affinity(struct irq_desc *desc) |
f6d87f4b | 410 | { |
cba4235e | 411 | return irq_select_affinity(irq_desc_get_irq(desc)); |
f6d87f4b | 412 | } |
18404756 MK |
413 | #endif |
414 | ||
f6d87f4b | 415 | /* |
cba4235e | 416 | * Called when a bogus affinity is set via /proc/irq |
f6d87f4b | 417 | */ |
cba4235e | 418 | int irq_select_affinity_usr(unsigned int irq) |
f6d87f4b TG |
419 | { |
420 | struct irq_desc *desc = irq_to_desc(irq); | |
421 | unsigned long flags; | |
422 | int ret; | |
423 | ||
239007b8 | 424 | raw_spin_lock_irqsave(&desc->lock, flags); |
cba4235e | 425 | ret = irq_setup_affinity(desc); |
239007b8 | 426 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
f6d87f4b TG |
427 | return ret; |
428 | } | |
1da177e4 LT |
429 | #endif |
430 | ||
fcf1ae2f FW |
431 | /** |
432 | * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt | |
433 | * @irq: interrupt number to set affinity | |
250a53d6 CD |
434 | * @vcpu_info: vCPU specific data or pointer to a percpu array of vCPU |
435 | * specific data for percpu_devid interrupts | |
fcf1ae2f FW |
436 | * |
437 | * This function uses the vCPU specific data to set the vCPU | |
438 | * affinity for an irq. The vCPU specific data is passed from | |
439 | * outside, such as KVM. One example code path is as below: | |
440 | * KVM -> IOMMU -> irq_set_vcpu_affinity(). | |
441 | */ | |
442 | int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info) | |
443 | { | |
444 | unsigned long flags; | |
445 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); | |
446 | struct irq_data *data; | |
447 | struct irq_chip *chip; | |
448 | int ret = -ENOSYS; | |
449 | ||
450 | if (!desc) | |
451 | return -EINVAL; | |
452 | ||
453 | data = irq_desc_get_irq_data(desc); | |
0abce64a MZ |
454 | do { |
455 | chip = irq_data_get_irq_chip(data); | |
456 | if (chip && chip->irq_set_vcpu_affinity) | |
457 | break; | |
458 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
459 | data = data->parent_data; | |
460 | #else | |
461 | data = NULL; | |
462 | #endif | |
463 | } while (data); | |
464 | ||
465 | if (data) | |
fcf1ae2f FW |
466 | ret = chip->irq_set_vcpu_affinity(data, vcpu_info); |
467 | irq_put_desc_unlock(desc, flags); | |
468 | ||
469 | return ret; | |
470 | } | |
471 | EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity); | |
472 | ||
79ff1cda | 473 | void __disable_irq(struct irq_desc *desc) |
0a0c5168 | 474 | { |
3aae994f | 475 | if (!desc->depth++) |
87923470 | 476 | irq_disable(desc); |
0a0c5168 RW |
477 | } |
478 | ||
02725e74 TG |
479 | static int __disable_irq_nosync(unsigned int irq) |
480 | { | |
481 | unsigned long flags; | |
31d9d9b6 | 482 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); |
02725e74 TG |
483 | |
484 | if (!desc) | |
485 | return -EINVAL; | |
79ff1cda | 486 | __disable_irq(desc); |
02725e74 TG |
487 | irq_put_desc_busunlock(desc, flags); |
488 | return 0; | |
489 | } | |
490 | ||
1da177e4 LT |
491 | /** |
492 | * disable_irq_nosync - disable an irq without waiting | |
493 | * @irq: Interrupt to disable | |
494 | * | |
495 | * Disable the selected interrupt line. Disables and Enables are | |
496 | * nested. | |
497 | * Unlike disable_irq(), this function does not ensure existing | |
498 | * instances of the IRQ handler have completed before returning. | |
499 | * | |
500 | * This function may be called from IRQ context. | |
501 | */ | |
502 | void disable_irq_nosync(unsigned int irq) | |
503 | { | |
02725e74 | 504 | __disable_irq_nosync(irq); |
1da177e4 | 505 | } |
1da177e4 LT |
506 | EXPORT_SYMBOL(disable_irq_nosync); |
507 | ||
508 | /** | |
509 | * disable_irq - disable an irq and wait for completion | |
510 | * @irq: Interrupt to disable | |
511 | * | |
512 | * Disable the selected interrupt line. Enables and Disables are | |
513 | * nested. | |
514 | * This function waits for any pending IRQ handlers for this interrupt | |
515 | * to complete before returning. If you use this function while | |
516 | * holding a resource the IRQ handler may need you will deadlock. | |
517 | * | |
518 | * This function may be called - with care - from IRQ context. | |
519 | */ | |
520 | void disable_irq(unsigned int irq) | |
521 | { | |
02725e74 | 522 | if (!__disable_irq_nosync(irq)) |
1da177e4 LT |
523 | synchronize_irq(irq); |
524 | } | |
1da177e4 LT |
525 | EXPORT_SYMBOL(disable_irq); |
526 | ||
02cea395 PZ |
527 | /** |
528 | * disable_hardirq - disables an irq and waits for hardirq completion | |
529 | * @irq: Interrupt to disable | |
530 | * | |
531 | * Disable the selected interrupt line. Enables and Disables are | |
532 | * nested. | |
533 | * This function waits for any pending hard IRQ handlers for this | |
534 | * interrupt to complete before returning. If you use this function while | |
535 | * holding a resource the hard IRQ handler may need you will deadlock. | |
536 | * | |
537 | * When used to optimistically disable an interrupt from atomic context | |
538 | * the return value must be checked. | |
539 | * | |
540 | * Returns: false if a threaded handler is active. | |
541 | * | |
542 | * This function may be called - with care - from IRQ context. | |
543 | */ | |
544 | bool disable_hardirq(unsigned int irq) | |
545 | { | |
546 | if (!__disable_irq_nosync(irq)) | |
547 | return synchronize_hardirq(irq); | |
548 | ||
549 | return false; | |
550 | } | |
551 | EXPORT_SYMBOL_GPL(disable_hardirq); | |
552 | ||
79ff1cda | 553 | void __enable_irq(struct irq_desc *desc) |
1adb0850 TG |
554 | { |
555 | switch (desc->depth) { | |
556 | case 0: | |
0a0c5168 | 557 | err_out: |
79ff1cda JL |
558 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", |
559 | irq_desc_get_irq(desc)); | |
1adb0850 TG |
560 | break; |
561 | case 1: { | |
c531e836 | 562 | if (desc->istate & IRQS_SUSPENDED) |
0a0c5168 | 563 | goto err_out; |
1adb0850 | 564 | /* Prevent probing on this irq: */ |
1ccb4e61 | 565 | irq_settings_set_noprobe(desc); |
201d7f47 TG |
566 | /* |
567 | * Call irq_startup() not irq_enable() here because the | |
568 | * interrupt might be marked NOAUTOEN. So irq_startup() | |
569 | * needs to be invoked when it gets enabled the first | |
570 | * time. If it was already started up, then irq_startup() | |
571 | * will invoke irq_enable() under the hood. | |
572 | */ | |
c942cee4 | 573 | irq_startup(desc, IRQ_RESEND, IRQ_START_FORCE); |
201d7f47 | 574 | break; |
1adb0850 TG |
575 | } |
576 | default: | |
577 | desc->depth--; | |
578 | } | |
579 | } | |
580 | ||
1da177e4 LT |
581 | /** |
582 | * enable_irq - enable handling of an irq | |
583 | * @irq: Interrupt to enable | |
584 | * | |
585 | * Undoes the effect of one call to disable_irq(). If this | |
586 | * matches the last disable, processing of interrupts on this | |
587 | * IRQ line is re-enabled. | |
588 | * | |
70aedd24 | 589 | * This function may be called from IRQ context only when |
6b8ff312 | 590 | * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL ! |
1da177e4 LT |
591 | */ |
592 | void enable_irq(unsigned int irq) | |
593 | { | |
1da177e4 | 594 | unsigned long flags; |
31d9d9b6 | 595 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); |
1da177e4 | 596 | |
7d94f7ca | 597 | if (!desc) |
c2b5a251 | 598 | return; |
50f7c032 TG |
599 | if (WARN(!desc->irq_data.chip, |
600 | KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq)) | |
02725e74 | 601 | goto out; |
2656c366 | 602 | |
79ff1cda | 603 | __enable_irq(desc); |
02725e74 TG |
604 | out: |
605 | irq_put_desc_busunlock(desc, flags); | |
1da177e4 | 606 | } |
1da177e4 LT |
607 | EXPORT_SYMBOL(enable_irq); |
608 | ||
0c5d1eb7 | 609 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 610 | { |
08678b08 | 611 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
612 | int ret = -ENXIO; |
613 | ||
60f96b41 SS |
614 | if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE) |
615 | return 0; | |
616 | ||
2f7e99bb TG |
617 | if (desc->irq_data.chip->irq_set_wake) |
618 | ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on); | |
2db87321 UKK |
619 | |
620 | return ret; | |
621 | } | |
622 | ||
ba9a2331 | 623 | /** |
a0cd9ca2 | 624 | * irq_set_irq_wake - control irq power management wakeup |
ba9a2331 TG |
625 | * @irq: interrupt to control |
626 | * @on: enable/disable power management wakeup | |
627 | * | |
15a647eb DB |
628 | * Enable/disable power management wakeup mode, which is |
629 | * disabled by default. Enables and disables must match, | |
630 | * just as they match for non-wakeup mode support. | |
631 | * | |
632 | * Wakeup mode lets this IRQ wake the system from sleep | |
633 | * states like "suspend to RAM". | |
ba9a2331 | 634 | */ |
a0cd9ca2 | 635 | int irq_set_irq_wake(unsigned int irq, unsigned int on) |
ba9a2331 | 636 | { |
ba9a2331 | 637 | unsigned long flags; |
31d9d9b6 | 638 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); |
2db87321 | 639 | int ret = 0; |
ba9a2331 | 640 | |
13863a66 JJ |
641 | if (!desc) |
642 | return -EINVAL; | |
643 | ||
15a647eb DB |
644 | /* wakeup-capable irqs can be shared between drivers that |
645 | * don't need to have the same sleep mode behaviors. | |
646 | */ | |
15a647eb | 647 | if (on) { |
2db87321 UKK |
648 | if (desc->wake_depth++ == 0) { |
649 | ret = set_irq_wake_real(irq, on); | |
650 | if (ret) | |
651 | desc->wake_depth = 0; | |
652 | else | |
7f94226f | 653 | irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE); |
2db87321 | 654 | } |
15a647eb DB |
655 | } else { |
656 | if (desc->wake_depth == 0) { | |
7a2c4770 | 657 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
658 | } else if (--desc->wake_depth == 0) { |
659 | ret = set_irq_wake_real(irq, on); | |
660 | if (ret) | |
661 | desc->wake_depth = 1; | |
662 | else | |
7f94226f | 663 | irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE); |
2db87321 | 664 | } |
15a647eb | 665 | } |
02725e74 | 666 | irq_put_desc_busunlock(desc, flags); |
ba9a2331 TG |
667 | return ret; |
668 | } | |
a0cd9ca2 | 669 | EXPORT_SYMBOL(irq_set_irq_wake); |
ba9a2331 | 670 | |
1da177e4 LT |
671 | /* |
672 | * Internal function that tells the architecture code whether a | |
673 | * particular irq has been exclusively allocated or is available | |
674 | * for driver use. | |
675 | */ | |
676 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
677 | { | |
cc8c3b78 | 678 | unsigned long flags; |
31d9d9b6 | 679 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); |
02725e74 | 680 | int canrequest = 0; |
1da177e4 | 681 | |
7d94f7ca YL |
682 | if (!desc) |
683 | return 0; | |
684 | ||
02725e74 | 685 | if (irq_settings_can_request(desc)) { |
2779db8d BH |
686 | if (!desc->action || |
687 | irqflags & desc->action->flags & IRQF_SHARED) | |
688 | canrequest = 1; | |
02725e74 TG |
689 | } |
690 | irq_put_desc_unlock(desc, flags); | |
691 | return canrequest; | |
1da177e4 LT |
692 | } |
693 | ||
a1ff541a | 694 | int __irq_set_trigger(struct irq_desc *desc, unsigned long flags) |
82736f4d | 695 | { |
6b8ff312 | 696 | struct irq_chip *chip = desc->irq_data.chip; |
d4d5e089 | 697 | int ret, unmask = 0; |
82736f4d | 698 | |
b2ba2c30 | 699 | if (!chip || !chip->irq_set_type) { |
82736f4d UKK |
700 | /* |
701 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
702 | * flow-types? | |
703 | */ | |
a1ff541a JL |
704 | pr_debug("No set_type function for IRQ %d (%s)\n", |
705 | irq_desc_get_irq(desc), | |
f5d89470 | 706 | chip ? (chip->name ? : "unknown") : "unknown"); |
82736f4d UKK |
707 | return 0; |
708 | } | |
709 | ||
d4d5e089 | 710 | if (chip->flags & IRQCHIP_SET_TYPE_MASKED) { |
32f4125e | 711 | if (!irqd_irq_masked(&desc->irq_data)) |
d4d5e089 | 712 | mask_irq(desc); |
32f4125e | 713 | if (!irqd_irq_disabled(&desc->irq_data)) |
d4d5e089 TG |
714 | unmask = 1; |
715 | } | |
716 | ||
00b992de AK |
717 | /* Mask all flags except trigger mode */ |
718 | flags &= IRQ_TYPE_SENSE_MASK; | |
b2ba2c30 | 719 | ret = chip->irq_set_type(&desc->irq_data, flags); |
82736f4d | 720 | |
876dbd4c TG |
721 | switch (ret) { |
722 | case IRQ_SET_MASK_OK: | |
2cb62547 | 723 | case IRQ_SET_MASK_OK_DONE: |
876dbd4c TG |
724 | irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK); |
725 | irqd_set(&desc->irq_data, flags); | |
726 | ||
727 | case IRQ_SET_MASK_OK_NOCOPY: | |
728 | flags = irqd_get_trigger_type(&desc->irq_data); | |
729 | irq_settings_set_trigger_mask(desc, flags); | |
730 | irqd_clear(&desc->irq_data, IRQD_LEVEL); | |
731 | irq_settings_clr_level(desc); | |
732 | if (flags & IRQ_TYPE_LEVEL_MASK) { | |
733 | irq_settings_set_level(desc); | |
734 | irqd_set(&desc->irq_data, IRQD_LEVEL); | |
735 | } | |
46732475 | 736 | |
d4d5e089 | 737 | ret = 0; |
8fff39e0 | 738 | break; |
876dbd4c | 739 | default: |
97fd75b7 | 740 | pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n", |
a1ff541a | 741 | flags, irq_desc_get_irq(desc), chip->irq_set_type); |
0c5d1eb7 | 742 | } |
d4d5e089 TG |
743 | if (unmask) |
744 | unmask_irq(desc); | |
82736f4d UKK |
745 | return ret; |
746 | } | |
747 | ||
293a7a0a TG |
748 | #ifdef CONFIG_HARDIRQS_SW_RESEND |
749 | int irq_set_parent(int irq, int parent_irq) | |
750 | { | |
751 | unsigned long flags; | |
752 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); | |
753 | ||
754 | if (!desc) | |
755 | return -EINVAL; | |
756 | ||
757 | desc->parent_irq = parent_irq; | |
758 | ||
759 | irq_put_desc_unlock(desc, flags); | |
760 | return 0; | |
761 | } | |
3118dac5 | 762 | EXPORT_SYMBOL_GPL(irq_set_parent); |
293a7a0a TG |
763 | #endif |
764 | ||
b25c340c TG |
765 | /* |
766 | * Default primary interrupt handler for threaded interrupts. Is | |
767 | * assigned as primary handler when request_threaded_irq is called | |
768 | * with handler == NULL. Useful for oneshot interrupts. | |
769 | */ | |
770 | static irqreturn_t irq_default_primary_handler(int irq, void *dev_id) | |
771 | { | |
772 | return IRQ_WAKE_THREAD; | |
773 | } | |
774 | ||
399b5da2 TG |
775 | /* |
776 | * Primary handler for nested threaded interrupts. Should never be | |
777 | * called. | |
778 | */ | |
779 | static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id) | |
780 | { | |
781 | WARN(1, "Primary handler called for nested irq %d\n", irq); | |
782 | return IRQ_NONE; | |
783 | } | |
784 | ||
2a1d3ab8 TG |
785 | static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id) |
786 | { | |
787 | WARN(1, "Secondary action handler called for irq %d\n", irq); | |
788 | return IRQ_NONE; | |
789 | } | |
790 | ||
3aa551c9 TG |
791 | static int irq_wait_for_interrupt(struct irqaction *action) |
792 | { | |
519cc865 LW |
793 | for (;;) { |
794 | set_current_state(TASK_INTERRUPTIBLE); | |
550acb19 | 795 | |
519cc865 LW |
796 | if (kthread_should_stop()) { |
797 | /* may need to run one last time */ | |
798 | if (test_and_clear_bit(IRQTF_RUNTHREAD, | |
799 | &action->thread_flags)) { | |
800 | __set_current_state(TASK_RUNNING); | |
801 | return 0; | |
802 | } | |
803 | __set_current_state(TASK_RUNNING); | |
804 | return -1; | |
805 | } | |
f48fe81e TG |
806 | |
807 | if (test_and_clear_bit(IRQTF_RUNTHREAD, | |
808 | &action->thread_flags)) { | |
3aa551c9 TG |
809 | __set_current_state(TASK_RUNNING); |
810 | return 0; | |
f48fe81e TG |
811 | } |
812 | schedule(); | |
3aa551c9 | 813 | } |
3aa551c9 TG |
814 | } |
815 | ||
b25c340c TG |
816 | /* |
817 | * Oneshot interrupts keep the irq line masked until the threaded | |
818 | * handler finished. unmask if the interrupt has not been disabled and | |
819 | * is marked MASKED. | |
820 | */ | |
b5faba21 | 821 | static void irq_finalize_oneshot(struct irq_desc *desc, |
f3f79e38 | 822 | struct irqaction *action) |
b25c340c | 823 | { |
2a1d3ab8 TG |
824 | if (!(desc->istate & IRQS_ONESHOT) || |
825 | action->handler == irq_forced_secondary_handler) | |
b5faba21 | 826 | return; |
0b1adaa0 | 827 | again: |
3876ec9e | 828 | chip_bus_lock(desc); |
239007b8 | 829 | raw_spin_lock_irq(&desc->lock); |
0b1adaa0 TG |
830 | |
831 | /* | |
832 | * Implausible though it may be we need to protect us against | |
833 | * the following scenario: | |
834 | * | |
835 | * The thread is faster done than the hard interrupt handler | |
836 | * on the other CPU. If we unmask the irq line then the | |
837 | * interrupt can come in again and masks the line, leaves due | |
009b4c3b | 838 | * to IRQS_INPROGRESS and the irq line is masked forever. |
b5faba21 TG |
839 | * |
840 | * This also serializes the state of shared oneshot handlers | |
841 | * versus "desc->threads_onehsot |= action->thread_mask;" in | |
842 | * irq_wake_thread(). See the comment there which explains the | |
843 | * serialization. | |
0b1adaa0 | 844 | */ |
32f4125e | 845 | if (unlikely(irqd_irq_inprogress(&desc->irq_data))) { |
0b1adaa0 | 846 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 847 | chip_bus_sync_unlock(desc); |
0b1adaa0 TG |
848 | cpu_relax(); |
849 | goto again; | |
850 | } | |
851 | ||
b5faba21 TG |
852 | /* |
853 | * Now check again, whether the thread should run. Otherwise | |
854 | * we would clear the threads_oneshot bit of this thread which | |
855 | * was just set. | |
856 | */ | |
f3f79e38 | 857 | if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags)) |
b5faba21 TG |
858 | goto out_unlock; |
859 | ||
860 | desc->threads_oneshot &= ~action->thread_mask; | |
861 | ||
32f4125e TG |
862 | if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) && |
863 | irqd_irq_masked(&desc->irq_data)) | |
328a4978 | 864 | unmask_threaded_irq(desc); |
32f4125e | 865 | |
b5faba21 | 866 | out_unlock: |
239007b8 | 867 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 868 | chip_bus_sync_unlock(desc); |
b25c340c TG |
869 | } |
870 | ||
61f38261 | 871 | #ifdef CONFIG_SMP |
591d2fb0 | 872 | /* |
b04c644e | 873 | * Check whether we need to change the affinity of the interrupt thread. |
591d2fb0 TG |
874 | */ |
875 | static void | |
876 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) | |
877 | { | |
878 | cpumask_var_t mask; | |
04aa530e | 879 | bool valid = true; |
591d2fb0 TG |
880 | |
881 | if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags)) | |
882 | return; | |
883 | ||
884 | /* | |
885 | * In case we are out of memory we set IRQTF_AFFINITY again and | |
886 | * try again next time | |
887 | */ | |
888 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { | |
889 | set_bit(IRQTF_AFFINITY, &action->thread_flags); | |
890 | return; | |
891 | } | |
892 | ||
239007b8 | 893 | raw_spin_lock_irq(&desc->lock); |
04aa530e TG |
894 | /* |
895 | * This code is triggered unconditionally. Check the affinity | |
896 | * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out. | |
897 | */ | |
cbf86999 TG |
898 | if (cpumask_available(desc->irq_common_data.affinity)) { |
899 | const struct cpumask *m; | |
900 | ||
901 | m = irq_data_get_effective_affinity_mask(&desc->irq_data); | |
902 | cpumask_copy(mask, m); | |
903 | } else { | |
04aa530e | 904 | valid = false; |
cbf86999 | 905 | } |
239007b8 | 906 | raw_spin_unlock_irq(&desc->lock); |
591d2fb0 | 907 | |
04aa530e TG |
908 | if (valid) |
909 | set_cpus_allowed_ptr(current, mask); | |
591d2fb0 TG |
910 | free_cpumask_var(mask); |
911 | } | |
61f38261 BP |
912 | #else |
913 | static inline void | |
914 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { } | |
915 | #endif | |
591d2fb0 | 916 | |
8d32a307 TG |
917 | /* |
918 | * Interrupts which are not explicitely requested as threaded | |
919 | * interrupts rely on the implicit bh/preempt disable of the hard irq | |
920 | * context. So we need to disable bh here to avoid deadlocks and other | |
921 | * side effects. | |
922 | */ | |
3a43e05f | 923 | static irqreturn_t |
8d32a307 TG |
924 | irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action) |
925 | { | |
3a43e05f SAS |
926 | irqreturn_t ret; |
927 | ||
8d32a307 | 928 | local_bh_disable(); |
3a43e05f | 929 | ret = action->thread_fn(action->irq, action->dev_id); |
746a923b LW |
930 | if (ret == IRQ_HANDLED) |
931 | atomic_inc(&desc->threads_handled); | |
932 | ||
f3f79e38 | 933 | irq_finalize_oneshot(desc, action); |
8d32a307 | 934 | local_bh_enable(); |
3a43e05f | 935 | return ret; |
8d32a307 TG |
936 | } |
937 | ||
938 | /* | |
f788e7bf | 939 | * Interrupts explicitly requested as threaded interrupts want to be |
8d32a307 TG |
940 | * preemtible - many of them need to sleep and wait for slow busses to |
941 | * complete. | |
942 | */ | |
3a43e05f SAS |
943 | static irqreturn_t irq_thread_fn(struct irq_desc *desc, |
944 | struct irqaction *action) | |
8d32a307 | 945 | { |
3a43e05f SAS |
946 | irqreturn_t ret; |
947 | ||
948 | ret = action->thread_fn(action->irq, action->dev_id); | |
746a923b LW |
949 | if (ret == IRQ_HANDLED) |
950 | atomic_inc(&desc->threads_handled); | |
951 | ||
f3f79e38 | 952 | irq_finalize_oneshot(desc, action); |
3a43e05f | 953 | return ret; |
8d32a307 TG |
954 | } |
955 | ||
7140ea19 IY |
956 | static void wake_threads_waitq(struct irq_desc *desc) |
957 | { | |
c685689f | 958 | if (atomic_dec_and_test(&desc->threads_active)) |
7140ea19 IY |
959 | wake_up(&desc->wait_for_threads); |
960 | } | |
961 | ||
67d12145 | 962 | static void irq_thread_dtor(struct callback_head *unused) |
4d1d61a6 ON |
963 | { |
964 | struct task_struct *tsk = current; | |
965 | struct irq_desc *desc; | |
966 | struct irqaction *action; | |
967 | ||
968 | if (WARN_ON_ONCE(!(current->flags & PF_EXITING))) | |
969 | return; | |
970 | ||
971 | action = kthread_data(tsk); | |
972 | ||
fb21affa | 973 | pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n", |
19af395d | 974 | tsk->comm, tsk->pid, action->irq); |
4d1d61a6 ON |
975 | |
976 | ||
977 | desc = irq_to_desc(action->irq); | |
978 | /* | |
979 | * If IRQTF_RUNTHREAD is set, we need to decrement | |
980 | * desc->threads_active and wake possible waiters. | |
981 | */ | |
982 | if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags)) | |
983 | wake_threads_waitq(desc); | |
984 | ||
985 | /* Prevent a stale desc->threads_oneshot */ | |
986 | irq_finalize_oneshot(desc, action); | |
987 | } | |
988 | ||
2a1d3ab8 TG |
989 | static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action) |
990 | { | |
991 | struct irqaction *secondary = action->secondary; | |
992 | ||
993 | if (WARN_ON_ONCE(!secondary)) | |
994 | return; | |
995 | ||
996 | raw_spin_lock_irq(&desc->lock); | |
997 | __irq_wake_thread(desc, secondary); | |
998 | raw_spin_unlock_irq(&desc->lock); | |
999 | } | |
1000 | ||
3aa551c9 TG |
1001 | /* |
1002 | * Interrupt handler thread | |
1003 | */ | |
1004 | static int irq_thread(void *data) | |
1005 | { | |
67d12145 | 1006 | struct callback_head on_exit_work; |
3aa551c9 TG |
1007 | struct irqaction *action = data; |
1008 | struct irq_desc *desc = irq_to_desc(action->irq); | |
3a43e05f SAS |
1009 | irqreturn_t (*handler_fn)(struct irq_desc *desc, |
1010 | struct irqaction *action); | |
3aa551c9 | 1011 | |
540b60e2 | 1012 | if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD, |
8d32a307 TG |
1013 | &action->thread_flags)) |
1014 | handler_fn = irq_forced_thread_fn; | |
1015 | else | |
1016 | handler_fn = irq_thread_fn; | |
1017 | ||
41f9d29f | 1018 | init_task_work(&on_exit_work, irq_thread_dtor); |
4d1d61a6 | 1019 | task_work_add(current, &on_exit_work, false); |
3aa551c9 | 1020 | |
f3de44ed SM |
1021 | irq_thread_check_affinity(desc, action); |
1022 | ||
3aa551c9 | 1023 | while (!irq_wait_for_interrupt(action)) { |
7140ea19 | 1024 | irqreturn_t action_ret; |
3aa551c9 | 1025 | |
591d2fb0 TG |
1026 | irq_thread_check_affinity(desc, action); |
1027 | ||
7140ea19 | 1028 | action_ret = handler_fn(desc, action); |
2a1d3ab8 TG |
1029 | if (action_ret == IRQ_WAKE_THREAD) |
1030 | irq_wake_secondary(desc, action); | |
3aa551c9 | 1031 | |
7140ea19 | 1032 | wake_threads_waitq(desc); |
3aa551c9 TG |
1033 | } |
1034 | ||
7140ea19 IY |
1035 | /* |
1036 | * This is the regular exit path. __free_irq() is stopping the | |
1037 | * thread via kthread_stop() after calling | |
519cc865 | 1038 | * synchronize_hardirq(). So neither IRQTF_RUNTHREAD nor the |
836557bd | 1039 | * oneshot mask bit can be set. |
3aa551c9 | 1040 | */ |
4d1d61a6 | 1041 | task_work_cancel(current, irq_thread_dtor); |
3aa551c9 TG |
1042 | return 0; |
1043 | } | |
1044 | ||
a92444c6 TG |
1045 | /** |
1046 | * irq_wake_thread - wake the irq thread for the action identified by dev_id | |
1047 | * @irq: Interrupt line | |
1048 | * @dev_id: Device identity for which the thread should be woken | |
1049 | * | |
1050 | */ | |
1051 | void irq_wake_thread(unsigned int irq, void *dev_id) | |
1052 | { | |
1053 | struct irq_desc *desc = irq_to_desc(irq); | |
1054 | struct irqaction *action; | |
1055 | unsigned long flags; | |
1056 | ||
1057 | if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc))) | |
1058 | return; | |
1059 | ||
1060 | raw_spin_lock_irqsave(&desc->lock, flags); | |
f944b5a7 | 1061 | for_each_action_of_desc(desc, action) { |
a92444c6 TG |
1062 | if (action->dev_id == dev_id) { |
1063 | if (action->thread) | |
1064 | __irq_wake_thread(desc, action); | |
1065 | break; | |
1066 | } | |
1067 | } | |
1068 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
1069 | } | |
1070 | EXPORT_SYMBOL_GPL(irq_wake_thread); | |
1071 | ||
2a1d3ab8 | 1072 | static int irq_setup_forced_threading(struct irqaction *new) |
8d32a307 TG |
1073 | { |
1074 | if (!force_irqthreads) | |
2a1d3ab8 | 1075 | return 0; |
8d32a307 | 1076 | if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT)) |
2a1d3ab8 | 1077 | return 0; |
8d32a307 | 1078 | |
d1f0301b TG |
1079 | /* |
1080 | * No further action required for interrupts which are requested as | |
1081 | * threaded interrupts already | |
1082 | */ | |
1083 | if (new->handler == irq_default_primary_handler) | |
1084 | return 0; | |
1085 | ||
8d32a307 TG |
1086 | new->flags |= IRQF_ONESHOT; |
1087 | ||
2a1d3ab8 TG |
1088 | /* |
1089 | * Handle the case where we have a real primary handler and a | |
1090 | * thread handler. We force thread them as well by creating a | |
1091 | * secondary action. | |
1092 | */ | |
d1f0301b | 1093 | if (new->handler && new->thread_fn) { |
2a1d3ab8 TG |
1094 | /* Allocate the secondary action */ |
1095 | new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL); | |
1096 | if (!new->secondary) | |
1097 | return -ENOMEM; | |
1098 | new->secondary->handler = irq_forced_secondary_handler; | |
1099 | new->secondary->thread_fn = new->thread_fn; | |
1100 | new->secondary->dev_id = new->dev_id; | |
1101 | new->secondary->irq = new->irq; | |
1102 | new->secondary->name = new->name; | |
8d32a307 | 1103 | } |
2a1d3ab8 TG |
1104 | /* Deal with the primary handler */ |
1105 | set_bit(IRQTF_FORCED_THREAD, &new->thread_flags); | |
1106 | new->thread_fn = new->handler; | |
1107 | new->handler = irq_default_primary_handler; | |
1108 | return 0; | |
8d32a307 TG |
1109 | } |
1110 | ||
c1bacbae TG |
1111 | static int irq_request_resources(struct irq_desc *desc) |
1112 | { | |
1113 | struct irq_data *d = &desc->irq_data; | |
1114 | struct irq_chip *c = d->chip; | |
1115 | ||
1116 | return c->irq_request_resources ? c->irq_request_resources(d) : 0; | |
1117 | } | |
1118 | ||
1119 | static void irq_release_resources(struct irq_desc *desc) | |
1120 | { | |
1121 | struct irq_data *d = &desc->irq_data; | |
1122 | struct irq_chip *c = d->chip; | |
1123 | ||
1124 | if (c->irq_release_resources) | |
1125 | c->irq_release_resources(d); | |
1126 | } | |
1127 | ||
2a1d3ab8 TG |
1128 | static int |
1129 | setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary) | |
1130 | { | |
1131 | struct task_struct *t; | |
1132 | struct sched_param param = { | |
1133 | .sched_priority = MAX_USER_RT_PRIO/2, | |
1134 | }; | |
1135 | ||
1136 | if (!secondary) { | |
1137 | t = kthread_create(irq_thread, new, "irq/%d-%s", irq, | |
1138 | new->name); | |
1139 | } else { | |
1140 | t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq, | |
1141 | new->name); | |
1142 | param.sched_priority -= 1; | |
1143 | } | |
1144 | ||
1145 | if (IS_ERR(t)) | |
1146 | return PTR_ERR(t); | |
1147 | ||
1148 | sched_setscheduler_nocheck(t, SCHED_FIFO, ¶m); | |
1149 | ||
1150 | /* | |
1151 | * We keep the reference to the task struct even if | |
1152 | * the thread dies to avoid that the interrupt code | |
1153 | * references an already freed task_struct. | |
1154 | */ | |
1155 | get_task_struct(t); | |
1156 | new->thread = t; | |
1157 | /* | |
1158 | * Tell the thread to set its affinity. This is | |
1159 | * important for shared interrupt handlers as we do | |
1160 | * not invoke setup_affinity() for the secondary | |
1161 | * handlers as everything is already set up. Even for | |
1162 | * interrupts marked with IRQF_NO_BALANCE this is | |
1163 | * correct as we want the thread to move to the cpu(s) | |
1164 | * on which the requesting code placed the interrupt. | |
1165 | */ | |
1166 | set_bit(IRQTF_AFFINITY, &new->thread_flags); | |
1167 | return 0; | |
1168 | } | |
1169 | ||
1da177e4 LT |
1170 | /* |
1171 | * Internal function to register an irqaction - typically used to | |
1172 | * allocate special interrupts that are part of the architecture. | |
19d39a38 TG |
1173 | * |
1174 | * Locking rules: | |
1175 | * | |
1176 | * desc->request_mutex Provides serialization against a concurrent free_irq() | |
1177 | * chip_bus_lock Provides serialization for slow bus operations | |
1178 | * desc->lock Provides serialization against hard interrupts | |
1179 | * | |
1180 | * chip_bus_lock and desc->lock are sufficient for all other management and | |
1181 | * interrupt related functions. desc->request_mutex solely serializes | |
1182 | * request/free_irq(). | |
1da177e4 | 1183 | */ |
d3c60047 | 1184 | static int |
327ec569 | 1185 | __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) |
1da177e4 | 1186 | { |
f17c7545 | 1187 | struct irqaction *old, **old_ptr; |
b5faba21 | 1188 | unsigned long flags, thread_mask = 0; |
3b8249e7 | 1189 | int ret, nested, shared = 0; |
1da177e4 | 1190 | |
7d94f7ca | 1191 | if (!desc) |
c2b5a251 MW |
1192 | return -EINVAL; |
1193 | ||
6b8ff312 | 1194 | if (desc->irq_data.chip == &no_irq_chip) |
1da177e4 | 1195 | return -ENOSYS; |
b6873807 SAS |
1196 | if (!try_module_get(desc->owner)) |
1197 | return -ENODEV; | |
1da177e4 | 1198 | |
2a1d3ab8 TG |
1199 | new->irq = irq; |
1200 | ||
4b357dae JH |
1201 | /* |
1202 | * If the trigger type is not specified by the caller, | |
1203 | * then use the default for this interrupt. | |
1204 | */ | |
1205 | if (!(new->flags & IRQF_TRIGGER_MASK)) | |
1206 | new->flags |= irqd_get_trigger_type(&desc->irq_data); | |
1207 | ||
3aa551c9 | 1208 | /* |
399b5da2 TG |
1209 | * Check whether the interrupt nests into another interrupt |
1210 | * thread. | |
1211 | */ | |
1ccb4e61 | 1212 | nested = irq_settings_is_nested_thread(desc); |
399b5da2 | 1213 | if (nested) { |
b6873807 SAS |
1214 | if (!new->thread_fn) { |
1215 | ret = -EINVAL; | |
1216 | goto out_mput; | |
1217 | } | |
399b5da2 TG |
1218 | /* |
1219 | * Replace the primary handler which was provided from | |
1220 | * the driver for non nested interrupt handling by the | |
1221 | * dummy function which warns when called. | |
1222 | */ | |
1223 | new->handler = irq_nested_primary_handler; | |
8d32a307 | 1224 | } else { |
2a1d3ab8 TG |
1225 | if (irq_settings_can_thread(desc)) { |
1226 | ret = irq_setup_forced_threading(new); | |
1227 | if (ret) | |
1228 | goto out_mput; | |
1229 | } | |
399b5da2 TG |
1230 | } |
1231 | ||
3aa551c9 | 1232 | /* |
399b5da2 TG |
1233 | * Create a handler thread when a thread function is supplied |
1234 | * and the interrupt does not nest into another interrupt | |
1235 | * thread. | |
3aa551c9 | 1236 | */ |
399b5da2 | 1237 | if (new->thread_fn && !nested) { |
2a1d3ab8 TG |
1238 | ret = setup_irq_thread(new, irq, false); |
1239 | if (ret) | |
b6873807 | 1240 | goto out_mput; |
2a1d3ab8 TG |
1241 | if (new->secondary) { |
1242 | ret = setup_irq_thread(new->secondary, irq, true); | |
1243 | if (ret) | |
1244 | goto out_thread; | |
b6873807 | 1245 | } |
3aa551c9 TG |
1246 | } |
1247 | ||
dc9b229a TG |
1248 | /* |
1249 | * Drivers are often written to work w/o knowledge about the | |
1250 | * underlying irq chip implementation, so a request for a | |
1251 | * threaded irq without a primary hard irq context handler | |
1252 | * requires the ONESHOT flag to be set. Some irq chips like | |
1253 | * MSI based interrupts are per se one shot safe. Check the | |
1254 | * chip flags, so we can avoid the unmask dance at the end of | |
1255 | * the threaded handler for those. | |
1256 | */ | |
1257 | if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE) | |
1258 | new->flags &= ~IRQF_ONESHOT; | |
1259 | ||
19d39a38 TG |
1260 | /* |
1261 | * Protects against a concurrent __free_irq() call which might wait | |
519cc865 | 1262 | * for synchronize_hardirq() to complete without holding the optional |
836557bd LW |
1263 | * chip bus lock and desc->lock. Also protects against handing out |
1264 | * a recycled oneshot thread_mask bit while it's still in use by | |
1265 | * its previous owner. | |
19d39a38 | 1266 | */ |
9114014c | 1267 | mutex_lock(&desc->request_mutex); |
19d39a38 TG |
1268 | |
1269 | /* | |
1270 | * Acquire bus lock as the irq_request_resources() callback below | |
1271 | * might rely on the serialization or the magic power management | |
1272 | * functions which are abusing the irq_bus_lock() callback, | |
1273 | */ | |
1274 | chip_bus_lock(desc); | |
1275 | ||
1276 | /* First installed action requests resources. */ | |
46e48e25 TG |
1277 | if (!desc->action) { |
1278 | ret = irq_request_resources(desc); | |
1279 | if (ret) { | |
1280 | pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n", | |
1281 | new->name, irq, desc->irq_data.chip->name); | |
19d39a38 | 1282 | goto out_bus_unlock; |
46e48e25 TG |
1283 | } |
1284 | } | |
9114014c | 1285 | |
1da177e4 LT |
1286 | /* |
1287 | * The following block of code has to be executed atomically | |
19d39a38 TG |
1288 | * protected against a concurrent interrupt and any of the other |
1289 | * management calls which are not serialized via | |
1290 | * desc->request_mutex or the optional bus lock. | |
1da177e4 | 1291 | */ |
239007b8 | 1292 | raw_spin_lock_irqsave(&desc->lock, flags); |
f17c7545 IM |
1293 | old_ptr = &desc->action; |
1294 | old = *old_ptr; | |
06fcb0c6 | 1295 | if (old) { |
e76de9f8 TG |
1296 | /* |
1297 | * Can't share interrupts unless both agree to and are | |
1298 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 1299 | * fields must have IRQF_SHARED set and the bits which |
9d591edd TG |
1300 | * set the trigger type must match. Also all must |
1301 | * agree on ONESHOT. | |
e76de9f8 | 1302 | */ |
4f8413a3 MZ |
1303 | unsigned int oldtype; |
1304 | ||
1305 | /* | |
1306 | * If nobody did set the configuration before, inherit | |
1307 | * the one provided by the requester. | |
1308 | */ | |
1309 | if (irqd_trigger_type_was_set(&desc->irq_data)) { | |
1310 | oldtype = irqd_get_trigger_type(&desc->irq_data); | |
1311 | } else { | |
1312 | oldtype = new->flags & IRQF_TRIGGER_MASK; | |
1313 | irqd_set_trigger_type(&desc->irq_data, oldtype); | |
1314 | } | |
382bd4de | 1315 | |
3cca53b0 | 1316 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
382bd4de | 1317 | (oldtype != (new->flags & IRQF_TRIGGER_MASK)) || |
f5d89470 | 1318 | ((old->flags ^ new->flags) & IRQF_ONESHOT)) |
f5163427 DS |
1319 | goto mismatch; |
1320 | ||
f5163427 | 1321 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
1322 | if ((old->flags & IRQF_PERCPU) != |
1323 | (new->flags & IRQF_PERCPU)) | |
f5163427 | 1324 | goto mismatch; |
1da177e4 LT |
1325 | |
1326 | /* add new interrupt at end of irq queue */ | |
1327 | do { | |
52abb700 TG |
1328 | /* |
1329 | * Or all existing action->thread_mask bits, | |
1330 | * so we can find the next zero bit for this | |
1331 | * new action. | |
1332 | */ | |
b5faba21 | 1333 | thread_mask |= old->thread_mask; |
f17c7545 IM |
1334 | old_ptr = &old->next; |
1335 | old = *old_ptr; | |
1da177e4 LT |
1336 | } while (old); |
1337 | shared = 1; | |
1338 | } | |
1339 | ||
b5faba21 | 1340 | /* |
52abb700 TG |
1341 | * Setup the thread mask for this irqaction for ONESHOT. For |
1342 | * !ONESHOT irqs the thread mask is 0 so we can avoid a | |
1343 | * conditional in irq_wake_thread(). | |
b5faba21 | 1344 | */ |
52abb700 TG |
1345 | if (new->flags & IRQF_ONESHOT) { |
1346 | /* | |
1347 | * Unlikely to have 32 resp 64 irqs sharing one line, | |
1348 | * but who knows. | |
1349 | */ | |
1350 | if (thread_mask == ~0UL) { | |
1351 | ret = -EBUSY; | |
cba4235e | 1352 | goto out_unlock; |
52abb700 TG |
1353 | } |
1354 | /* | |
1355 | * The thread_mask for the action is or'ed to | |
1356 | * desc->thread_active to indicate that the | |
1357 | * IRQF_ONESHOT thread handler has been woken, but not | |
1358 | * yet finished. The bit is cleared when a thread | |
1359 | * completes. When all threads of a shared interrupt | |
1360 | * line have completed desc->threads_active becomes | |
1361 | * zero and the interrupt line is unmasked. See | |
1362 | * handle.c:irq_wake_thread() for further information. | |
1363 | * | |
1364 | * If no thread is woken by primary (hard irq context) | |
1365 | * interrupt handlers, then desc->threads_active is | |
1366 | * also checked for zero to unmask the irq line in the | |
1367 | * affected hard irq flow handlers | |
1368 | * (handle_[fasteoi|level]_irq). | |
1369 | * | |
1370 | * The new action gets the first zero bit of | |
1371 | * thread_mask assigned. See the loop above which or's | |
1372 | * all existing action->thread_mask bits. | |
1373 | */ | |
ffc661c9 | 1374 | new->thread_mask = 1UL << ffz(thread_mask); |
1c6c6952 | 1375 | |
dc9b229a TG |
1376 | } else if (new->handler == irq_default_primary_handler && |
1377 | !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) { | |
1c6c6952 TG |
1378 | /* |
1379 | * The interrupt was requested with handler = NULL, so | |
1380 | * we use the default primary handler for it. But it | |
1381 | * does not have the oneshot flag set. In combination | |
1382 | * with level interrupts this is deadly, because the | |
1383 | * default primary handler just wakes the thread, then | |
1384 | * the irq lines is reenabled, but the device still | |
1385 | * has the level irq asserted. Rinse and repeat.... | |
1386 | * | |
1387 | * While this works for edge type interrupts, we play | |
1388 | * it safe and reject unconditionally because we can't | |
1389 | * say for sure which type this interrupt really | |
1390 | * has. The type flags are unreliable as the | |
1391 | * underlying chip implementation can override them. | |
1392 | */ | |
97fd75b7 | 1393 | pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n", |
1c6c6952 TG |
1394 | irq); |
1395 | ret = -EINVAL; | |
cba4235e | 1396 | goto out_unlock; |
b5faba21 | 1397 | } |
b5faba21 | 1398 | |
1da177e4 | 1399 | if (!shared) { |
3aa551c9 TG |
1400 | init_waitqueue_head(&desc->wait_for_threads); |
1401 | ||
e76de9f8 | 1402 | /* Setup the type (level, edge polarity) if configured: */ |
3cca53b0 | 1403 | if (new->flags & IRQF_TRIGGER_MASK) { |
a1ff541a JL |
1404 | ret = __irq_set_trigger(desc, |
1405 | new->flags & IRQF_TRIGGER_MASK); | |
82736f4d | 1406 | |
19d39a38 | 1407 | if (ret) |
cba4235e | 1408 | goto out_unlock; |
091738a2 | 1409 | } |
6a6de9ef | 1410 | |
c942cee4 TG |
1411 | /* |
1412 | * Activate the interrupt. That activation must happen | |
1413 | * independently of IRQ_NOAUTOEN. request_irq() can fail | |
1414 | * and the callers are supposed to handle | |
1415 | * that. enable_irq() of an interrupt requested with | |
1416 | * IRQ_NOAUTOEN is not supposed to fail. The activation | |
1417 | * keeps it in shutdown mode, it merily associates | |
1418 | * resources if necessary and if that's not possible it | |
1419 | * fails. Interrupts which are in managed shutdown mode | |
1420 | * will simply ignore that activation request. | |
1421 | */ | |
1422 | ret = irq_activate(desc); | |
1423 | if (ret) | |
1424 | goto out_unlock; | |
1425 | ||
009b4c3b | 1426 | desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \ |
32f4125e TG |
1427 | IRQS_ONESHOT | IRQS_WAITING); |
1428 | irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS); | |
94d39e1f | 1429 | |
a005677b TG |
1430 | if (new->flags & IRQF_PERCPU) { |
1431 | irqd_set(&desc->irq_data, IRQD_PER_CPU); | |
1432 | irq_settings_set_per_cpu(desc); | |
1433 | } | |
6a58fb3b | 1434 | |
b25c340c | 1435 | if (new->flags & IRQF_ONESHOT) |
3d67baec | 1436 | desc->istate |= IRQS_ONESHOT; |
b25c340c | 1437 | |
2e051552 TG |
1438 | /* Exclude IRQ from balancing if requested */ |
1439 | if (new->flags & IRQF_NOBALANCING) { | |
1440 | irq_settings_set_no_balancing(desc); | |
1441 | irqd_set(&desc->irq_data, IRQD_NO_BALANCING); | |
1442 | } | |
1443 | ||
04c848d3 | 1444 | if (irq_settings_can_autoenable(desc)) { |
4cde9c6b | 1445 | irq_startup(desc, IRQ_RESEND, IRQ_START_COND); |
04c848d3 TG |
1446 | } else { |
1447 | /* | |
1448 | * Shared interrupts do not go well with disabling | |
1449 | * auto enable. The sharing interrupt might request | |
1450 | * it while it's still disabled and then wait for | |
1451 | * interrupts forever. | |
1452 | */ | |
1453 | WARN_ON_ONCE(new->flags & IRQF_SHARED); | |
e76de9f8 TG |
1454 | /* Undo nested disables: */ |
1455 | desc->depth = 1; | |
04c848d3 | 1456 | } |
18404756 | 1457 | |
876dbd4c TG |
1458 | } else if (new->flags & IRQF_TRIGGER_MASK) { |
1459 | unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK; | |
7ee7e87d | 1460 | unsigned int omsk = irqd_get_trigger_type(&desc->irq_data); |
876dbd4c TG |
1461 | |
1462 | if (nmsk != omsk) | |
1463 | /* hope the handler works with current trigger mode */ | |
a395d6a7 | 1464 | pr_warn("irq %d uses trigger mode %u; requested %u\n", |
7ee7e87d | 1465 | irq, omsk, nmsk); |
1da177e4 | 1466 | } |
82736f4d | 1467 | |
f17c7545 | 1468 | *old_ptr = new; |
82736f4d | 1469 | |
cab303be TG |
1470 | irq_pm_install_action(desc, new); |
1471 | ||
8528b0f1 LT |
1472 | /* Reset broken irq detection when installing new handler */ |
1473 | desc->irq_count = 0; | |
1474 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
1475 | |
1476 | /* | |
1477 | * Check whether we disabled the irq via the spurious handler | |
1478 | * before. Reenable it and give it another chance. | |
1479 | */ | |
7acdd53e TG |
1480 | if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) { |
1481 | desc->istate &= ~IRQS_SPURIOUS_DISABLED; | |
79ff1cda | 1482 | __enable_irq(desc); |
1adb0850 TG |
1483 | } |
1484 | ||
239007b8 | 1485 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3a90795e | 1486 | chip_bus_sync_unlock(desc); |
9114014c | 1487 | mutex_unlock(&desc->request_mutex); |
1da177e4 | 1488 | |
b2d3d61a DL |
1489 | irq_setup_timings(desc, new); |
1490 | ||
69ab8494 TG |
1491 | /* |
1492 | * Strictly no need to wake it up, but hung_task complains | |
1493 | * when no hard interrupt wakes the thread up. | |
1494 | */ | |
1495 | if (new->thread) | |
1496 | wake_up_process(new->thread); | |
2a1d3ab8 TG |
1497 | if (new->secondary) |
1498 | wake_up_process(new->secondary->thread); | |
69ab8494 | 1499 | |
2c6927a3 | 1500 | register_irq_proc(irq, desc); |
1da177e4 LT |
1501 | new->dir = NULL; |
1502 | register_handler_proc(irq, new); | |
1da177e4 | 1503 | return 0; |
f5163427 DS |
1504 | |
1505 | mismatch: | |
3cca53b0 | 1506 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
97fd75b7 | 1507 | pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n", |
f5d89470 TG |
1508 | irq, new->flags, new->name, old->flags, old->name); |
1509 | #ifdef CONFIG_DEBUG_SHIRQ | |
13e87ec6 | 1510 | dump_stack(); |
3f050447 | 1511 | #endif |
f5d89470 | 1512 | } |
3aa551c9 TG |
1513 | ret = -EBUSY; |
1514 | ||
cba4235e | 1515 | out_unlock: |
1c389795 | 1516 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3b8249e7 | 1517 | |
46e48e25 TG |
1518 | if (!desc->action) |
1519 | irq_release_resources(desc); | |
19d39a38 TG |
1520 | out_bus_unlock: |
1521 | chip_bus_sync_unlock(desc); | |
9114014c TG |
1522 | mutex_unlock(&desc->request_mutex); |
1523 | ||
3aa551c9 | 1524 | out_thread: |
3aa551c9 TG |
1525 | if (new->thread) { |
1526 | struct task_struct *t = new->thread; | |
1527 | ||
1528 | new->thread = NULL; | |
05d74efa | 1529 | kthread_stop(t); |
3aa551c9 TG |
1530 | put_task_struct(t); |
1531 | } | |
2a1d3ab8 TG |
1532 | if (new->secondary && new->secondary->thread) { |
1533 | struct task_struct *t = new->secondary->thread; | |
1534 | ||
1535 | new->secondary->thread = NULL; | |
1536 | kthread_stop(t); | |
1537 | put_task_struct(t); | |
1538 | } | |
b6873807 SAS |
1539 | out_mput: |
1540 | module_put(desc->owner); | |
3aa551c9 | 1541 | return ret; |
1da177e4 LT |
1542 | } |
1543 | ||
d3c60047 TG |
1544 | /** |
1545 | * setup_irq - setup an interrupt | |
1546 | * @irq: Interrupt line to setup | |
1547 | * @act: irqaction for the interrupt | |
1548 | * | |
1549 | * Used to statically setup interrupts in the early boot process. | |
1550 | */ | |
1551 | int setup_irq(unsigned int irq, struct irqaction *act) | |
1552 | { | |
986c011d | 1553 | int retval; |
d3c60047 TG |
1554 | struct irq_desc *desc = irq_to_desc(irq); |
1555 | ||
9b5d585d | 1556 | if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc))) |
31d9d9b6 | 1557 | return -EINVAL; |
be45beb2 JH |
1558 | |
1559 | retval = irq_chip_pm_get(&desc->irq_data); | |
1560 | if (retval < 0) | |
1561 | return retval; | |
1562 | ||
986c011d | 1563 | retval = __setup_irq(irq, desc, act); |
986c011d | 1564 | |
be45beb2 JH |
1565 | if (retval) |
1566 | irq_chip_pm_put(&desc->irq_data); | |
1567 | ||
986c011d | 1568 | return retval; |
d3c60047 | 1569 | } |
eb53b4e8 | 1570 | EXPORT_SYMBOL_GPL(setup_irq); |
d3c60047 | 1571 | |
31d9d9b6 | 1572 | /* |
cbf94f06 MD |
1573 | * Internal function to unregister an irqaction - used to free |
1574 | * regular and special interrupts that are part of the architecture. | |
1da177e4 | 1575 | */ |
83ac4ca9 | 1576 | static struct irqaction *__free_irq(struct irq_desc *desc, void *dev_id) |
1da177e4 | 1577 | { |
83ac4ca9 | 1578 | unsigned irq = desc->irq_data.irq; |
f17c7545 | 1579 | struct irqaction *action, **action_ptr; |
1da177e4 LT |
1580 | unsigned long flags; |
1581 | ||
ae88a23b | 1582 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); |
7d94f7ca | 1583 | |
9114014c | 1584 | mutex_lock(&desc->request_mutex); |
abc7e40c | 1585 | chip_bus_lock(desc); |
239007b8 | 1586 | raw_spin_lock_irqsave(&desc->lock, flags); |
ae88a23b IM |
1587 | |
1588 | /* | |
1589 | * There can be multiple actions per IRQ descriptor, find the right | |
1590 | * one based on the dev_id: | |
1591 | */ | |
f17c7545 | 1592 | action_ptr = &desc->action; |
1da177e4 | 1593 | for (;;) { |
f17c7545 | 1594 | action = *action_ptr; |
1da177e4 | 1595 | |
ae88a23b IM |
1596 | if (!action) { |
1597 | WARN(1, "Trying to free already-free IRQ %d\n", irq); | |
239007b8 | 1598 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
abc7e40c | 1599 | chip_bus_sync_unlock(desc); |
19d39a38 | 1600 | mutex_unlock(&desc->request_mutex); |
f21cfb25 | 1601 | return NULL; |
ae88a23b | 1602 | } |
1da177e4 | 1603 | |
8316e381 IM |
1604 | if (action->dev_id == dev_id) |
1605 | break; | |
f17c7545 | 1606 | action_ptr = &action->next; |
ae88a23b | 1607 | } |
dbce706e | 1608 | |
ae88a23b | 1609 | /* Found it - now remove it from the list of entries: */ |
f17c7545 | 1610 | *action_ptr = action->next; |
ae88a23b | 1611 | |
cab303be TG |
1612 | irq_pm_remove_action(desc, action); |
1613 | ||
ae88a23b | 1614 | /* If this was the last handler, shut down the IRQ line: */ |
c1bacbae | 1615 | if (!desc->action) { |
e9849777 | 1616 | irq_settings_clr_disable_unlazy(desc); |
46999238 | 1617 | irq_shutdown(desc); |
c1bacbae | 1618 | } |
3aa551c9 | 1619 | |
e7a297b0 PWJ |
1620 | #ifdef CONFIG_SMP |
1621 | /* make sure affinity_hint is cleaned up */ | |
1622 | if (WARN_ON_ONCE(desc->affinity_hint)) | |
1623 | desc->affinity_hint = NULL; | |
1624 | #endif | |
1625 | ||
239007b8 | 1626 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
19d39a38 TG |
1627 | /* |
1628 | * Drop bus_lock here so the changes which were done in the chip | |
1629 | * callbacks above are synced out to the irq chips which hang | |
519cc865 | 1630 | * behind a slow bus (I2C, SPI) before calling synchronize_hardirq(). |
19d39a38 TG |
1631 | * |
1632 | * Aside of that the bus_lock can also be taken from the threaded | |
1633 | * handler in irq_finalize_oneshot() which results in a deadlock | |
519cc865 | 1634 | * because kthread_stop() would wait forever for the thread to |
19d39a38 TG |
1635 | * complete, which is blocked on the bus lock. |
1636 | * | |
1637 | * The still held desc->request_mutex() protects against a | |
1638 | * concurrent request_irq() of this irq so the release of resources | |
1639 | * and timing data is properly serialized. | |
1640 | */ | |
abc7e40c | 1641 | chip_bus_sync_unlock(desc); |
ae88a23b IM |
1642 | |
1643 | unregister_handler_proc(irq, action); | |
1644 | ||
1645 | /* Make sure it's not being used on another CPU: */ | |
519cc865 | 1646 | synchronize_hardirq(irq); |
1da177e4 | 1647 | |
70edcd77 | 1648 | #ifdef CONFIG_DEBUG_SHIRQ |
ae88a23b IM |
1649 | /* |
1650 | * It's a shared IRQ -- the driver ought to be prepared for an IRQ | |
1651 | * event to happen even now it's being freed, so let's make sure that | |
1652 | * is so by doing an extra call to the handler .... | |
1653 | * | |
1654 | * ( We do this after actually deregistering it, to make sure that a | |
0a13ec0b | 1655 | * 'real' IRQ doesn't run in parallel with our fake. ) |
ae88a23b IM |
1656 | */ |
1657 | if (action->flags & IRQF_SHARED) { | |
1658 | local_irq_save(flags); | |
1659 | action->handler(irq, dev_id); | |
1660 | local_irq_restore(flags); | |
1da177e4 | 1661 | } |
ae88a23b | 1662 | #endif |
2d860ad7 | 1663 | |
519cc865 LW |
1664 | /* |
1665 | * The action has already been removed above, but the thread writes | |
1666 | * its oneshot mask bit when it completes. Though request_mutex is | |
1667 | * held across this which prevents __setup_irq() from handing out | |
1668 | * the same bit to a newly requested action. | |
1669 | */ | |
2d860ad7 | 1670 | if (action->thread) { |
05d74efa | 1671 | kthread_stop(action->thread); |
2d860ad7 | 1672 | put_task_struct(action->thread); |
2a1d3ab8 TG |
1673 | if (action->secondary && action->secondary->thread) { |
1674 | kthread_stop(action->secondary->thread); | |
1675 | put_task_struct(action->secondary->thread); | |
1676 | } | |
2d860ad7 LT |
1677 | } |
1678 | ||
19d39a38 | 1679 | /* Last action releases resources */ |
2343877f | 1680 | if (!desc->action) { |
19d39a38 TG |
1681 | /* |
1682 | * Reaquire bus lock as irq_release_resources() might | |
1683 | * require it to deallocate resources over the slow bus. | |
1684 | */ | |
1685 | chip_bus_lock(desc); | |
46e48e25 | 1686 | irq_release_resources(desc); |
19d39a38 | 1687 | chip_bus_sync_unlock(desc); |
2343877f TG |
1688 | irq_remove_timings(desc); |
1689 | } | |
46e48e25 | 1690 | |
9114014c TG |
1691 | mutex_unlock(&desc->request_mutex); |
1692 | ||
be45beb2 | 1693 | irq_chip_pm_put(&desc->irq_data); |
b6873807 | 1694 | module_put(desc->owner); |
2a1d3ab8 | 1695 | kfree(action->secondary); |
f21cfb25 MD |
1696 | return action; |
1697 | } | |
1698 | ||
cbf94f06 MD |
1699 | /** |
1700 | * remove_irq - free an interrupt | |
1701 | * @irq: Interrupt line to free | |
1702 | * @act: irqaction for the interrupt | |
1703 | * | |
1704 | * Used to remove interrupts statically setup by the early boot process. | |
1705 | */ | |
1706 | void remove_irq(unsigned int irq, struct irqaction *act) | |
1707 | { | |
31d9d9b6 MZ |
1708 | struct irq_desc *desc = irq_to_desc(irq); |
1709 | ||
1710 | if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc))) | |
83ac4ca9 | 1711 | __free_irq(desc, act->dev_id); |
cbf94f06 | 1712 | } |
eb53b4e8 | 1713 | EXPORT_SYMBOL_GPL(remove_irq); |
cbf94f06 | 1714 | |
f21cfb25 MD |
1715 | /** |
1716 | * free_irq - free an interrupt allocated with request_irq | |
1717 | * @irq: Interrupt line to free | |
1718 | * @dev_id: Device identity to free | |
1719 | * | |
1720 | * Remove an interrupt handler. The handler is removed and if the | |
1721 | * interrupt line is no longer in use by any driver it is disabled. | |
1722 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
1723 | * on the card it drives before calling this function. The function | |
1724 | * does not return until any executing interrupts for this IRQ | |
1725 | * have completed. | |
1726 | * | |
1727 | * This function must not be called from interrupt context. | |
25ce4be7 CH |
1728 | * |
1729 | * Returns the devname argument passed to request_irq. | |
f21cfb25 | 1730 | */ |
25ce4be7 | 1731 | const void *free_irq(unsigned int irq, void *dev_id) |
f21cfb25 | 1732 | { |
70aedd24 | 1733 | struct irq_desc *desc = irq_to_desc(irq); |
25ce4be7 CH |
1734 | struct irqaction *action; |
1735 | const char *devname; | |
70aedd24 | 1736 | |
31d9d9b6 | 1737 | if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc))) |
25ce4be7 | 1738 | return NULL; |
70aedd24 | 1739 | |
cd7eab44 BH |
1740 | #ifdef CONFIG_SMP |
1741 | if (WARN_ON(desc->affinity_notify)) | |
1742 | desc->affinity_notify = NULL; | |
1743 | #endif | |
1744 | ||
83ac4ca9 | 1745 | action = __free_irq(desc, dev_id); |
2827a418 AM |
1746 | |
1747 | if (!action) | |
1748 | return NULL; | |
1749 | ||
25ce4be7 CH |
1750 | devname = action->name; |
1751 | kfree(action); | |
1752 | return devname; | |
1da177e4 | 1753 | } |
1da177e4 LT |
1754 | EXPORT_SYMBOL(free_irq); |
1755 | ||
1756 | /** | |
3aa551c9 | 1757 | * request_threaded_irq - allocate an interrupt line |
1da177e4 | 1758 | * @irq: Interrupt line to allocate |
3aa551c9 TG |
1759 | * @handler: Function to be called when the IRQ occurs. |
1760 | * Primary handler for threaded interrupts | |
b25c340c TG |
1761 | * If NULL and thread_fn != NULL the default |
1762 | * primary handler is installed | |
f48fe81e TG |
1763 | * @thread_fn: Function called from the irq handler thread |
1764 | * If NULL, no irq thread is created | |
1da177e4 LT |
1765 | * @irqflags: Interrupt type flags |
1766 | * @devname: An ascii name for the claiming device | |
1767 | * @dev_id: A cookie passed back to the handler function | |
1768 | * | |
1769 | * This call allocates interrupt resources and enables the | |
1770 | * interrupt line and IRQ handling. From the point this | |
1771 | * call is made your handler function may be invoked. Since | |
1772 | * your handler function must clear any interrupt the board | |
1773 | * raises, you must take care both to initialise your hardware | |
1774 | * and to set up the interrupt handler in the right order. | |
1775 | * | |
3aa551c9 | 1776 | * If you want to set up a threaded irq handler for your device |
6d21af4f | 1777 | * then you need to supply @handler and @thread_fn. @handler is |
3aa551c9 TG |
1778 | * still called in hard interrupt context and has to check |
1779 | * whether the interrupt originates from the device. If yes it | |
1780 | * needs to disable the interrupt on the device and return | |
39a2eddb | 1781 | * IRQ_WAKE_THREAD which will wake up the handler thread and run |
3aa551c9 TG |
1782 | * @thread_fn. This split handler design is necessary to support |
1783 | * shared interrupts. | |
1784 | * | |
1da177e4 LT |
1785 | * Dev_id must be globally unique. Normally the address of the |
1786 | * device data structure is used as the cookie. Since the handler | |
1787 | * receives this value it makes sense to use it. | |
1788 | * | |
1789 | * If your interrupt is shared you must pass a non NULL dev_id | |
1790 | * as this is required when freeing the interrupt. | |
1791 | * | |
1792 | * Flags: | |
1793 | * | |
3cca53b0 | 1794 | * IRQF_SHARED Interrupt is shared |
0c5d1eb7 | 1795 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
1796 | * |
1797 | */ | |
3aa551c9 TG |
1798 | int request_threaded_irq(unsigned int irq, irq_handler_t handler, |
1799 | irq_handler_t thread_fn, unsigned long irqflags, | |
1800 | const char *devname, void *dev_id) | |
1da177e4 | 1801 | { |
06fcb0c6 | 1802 | struct irqaction *action; |
08678b08 | 1803 | struct irq_desc *desc; |
d3c60047 | 1804 | int retval; |
1da177e4 | 1805 | |
e237a551 CF |
1806 | if (irq == IRQ_NOTCONNECTED) |
1807 | return -ENOTCONN; | |
1808 | ||
1da177e4 LT |
1809 | /* |
1810 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
1811 | * otherwise we'll have trouble later trying to figure out | |
1812 | * which interrupt is which (messes up the interrupt freeing | |
1813 | * logic etc). | |
17f48034 RW |
1814 | * |
1815 | * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and | |
1816 | * it cannot be set along with IRQF_NO_SUSPEND. | |
1da177e4 | 1817 | */ |
17f48034 RW |
1818 | if (((irqflags & IRQF_SHARED) && !dev_id) || |
1819 | (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) || | |
1820 | ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND))) | |
1da177e4 | 1821 | return -EINVAL; |
7d94f7ca | 1822 | |
cb5bc832 | 1823 | desc = irq_to_desc(irq); |
7d94f7ca | 1824 | if (!desc) |
1da177e4 | 1825 | return -EINVAL; |
7d94f7ca | 1826 | |
31d9d9b6 MZ |
1827 | if (!irq_settings_can_request(desc) || |
1828 | WARN_ON(irq_settings_is_per_cpu_devid(desc))) | |
6550c775 | 1829 | return -EINVAL; |
b25c340c TG |
1830 | |
1831 | if (!handler) { | |
1832 | if (!thread_fn) | |
1833 | return -EINVAL; | |
1834 | handler = irq_default_primary_handler; | |
1835 | } | |
1da177e4 | 1836 | |
45535732 | 1837 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
1da177e4 LT |
1838 | if (!action) |
1839 | return -ENOMEM; | |
1840 | ||
1841 | action->handler = handler; | |
3aa551c9 | 1842 | action->thread_fn = thread_fn; |
1da177e4 | 1843 | action->flags = irqflags; |
1da177e4 | 1844 | action->name = devname; |
1da177e4 LT |
1845 | action->dev_id = dev_id; |
1846 | ||
be45beb2 | 1847 | retval = irq_chip_pm_get(&desc->irq_data); |
4396f46c SL |
1848 | if (retval < 0) { |
1849 | kfree(action); | |
be45beb2 | 1850 | return retval; |
4396f46c | 1851 | } |
be45beb2 | 1852 | |
d3c60047 | 1853 | retval = __setup_irq(irq, desc, action); |
70aedd24 | 1854 | |
2a1d3ab8 | 1855 | if (retval) { |
be45beb2 | 1856 | irq_chip_pm_put(&desc->irq_data); |
2a1d3ab8 | 1857 | kfree(action->secondary); |
377bf1e4 | 1858 | kfree(action); |
2a1d3ab8 | 1859 | } |
377bf1e4 | 1860 | |
6d83f94d | 1861 | #ifdef CONFIG_DEBUG_SHIRQ_FIXME |
6ce51c43 | 1862 | if (!retval && (irqflags & IRQF_SHARED)) { |
a304e1b8 DW |
1863 | /* |
1864 | * It's a shared IRQ -- the driver ought to be prepared for it | |
1865 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
1866 | * We disable the irq to make sure that a 'real' IRQ doesn't |
1867 | * run in parallel with our fake. | |
a304e1b8 | 1868 | */ |
59845b1f | 1869 | unsigned long flags; |
a304e1b8 | 1870 | |
377bf1e4 | 1871 | disable_irq(irq); |
59845b1f | 1872 | local_irq_save(flags); |
377bf1e4 | 1873 | |
59845b1f | 1874 | handler(irq, dev_id); |
377bf1e4 | 1875 | |
59845b1f | 1876 | local_irq_restore(flags); |
377bf1e4 | 1877 | enable_irq(irq); |
a304e1b8 DW |
1878 | } |
1879 | #endif | |
1da177e4 LT |
1880 | return retval; |
1881 | } | |
3aa551c9 | 1882 | EXPORT_SYMBOL(request_threaded_irq); |
ae731f8d MZ |
1883 | |
1884 | /** | |
1885 | * request_any_context_irq - allocate an interrupt line | |
1886 | * @irq: Interrupt line to allocate | |
1887 | * @handler: Function to be called when the IRQ occurs. | |
1888 | * Threaded handler for threaded interrupts. | |
1889 | * @flags: Interrupt type flags | |
1890 | * @name: An ascii name for the claiming device | |
1891 | * @dev_id: A cookie passed back to the handler function | |
1892 | * | |
1893 | * This call allocates interrupt resources and enables the | |
1894 | * interrupt line and IRQ handling. It selects either a | |
1895 | * hardirq or threaded handling method depending on the | |
1896 | * context. | |
1897 | * | |
1898 | * On failure, it returns a negative value. On success, | |
1899 | * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED. | |
1900 | */ | |
1901 | int request_any_context_irq(unsigned int irq, irq_handler_t handler, | |
1902 | unsigned long flags, const char *name, void *dev_id) | |
1903 | { | |
e237a551 | 1904 | struct irq_desc *desc; |
ae731f8d MZ |
1905 | int ret; |
1906 | ||
e237a551 CF |
1907 | if (irq == IRQ_NOTCONNECTED) |
1908 | return -ENOTCONN; | |
1909 | ||
1910 | desc = irq_to_desc(irq); | |
ae731f8d MZ |
1911 | if (!desc) |
1912 | return -EINVAL; | |
1913 | ||
1ccb4e61 | 1914 | if (irq_settings_is_nested_thread(desc)) { |
ae731f8d MZ |
1915 | ret = request_threaded_irq(irq, NULL, handler, |
1916 | flags, name, dev_id); | |
1917 | return !ret ? IRQC_IS_NESTED : ret; | |
1918 | } | |
1919 | ||
1920 | ret = request_irq(irq, handler, flags, name, dev_id); | |
1921 | return !ret ? IRQC_IS_HARDIRQ : ret; | |
1922 | } | |
1923 | EXPORT_SYMBOL_GPL(request_any_context_irq); | |
31d9d9b6 | 1924 | |
1e7c5fd2 | 1925 | void enable_percpu_irq(unsigned int irq, unsigned int type) |
31d9d9b6 MZ |
1926 | { |
1927 | unsigned int cpu = smp_processor_id(); | |
1928 | unsigned long flags; | |
1929 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU); | |
1930 | ||
1931 | if (!desc) | |
1932 | return; | |
1933 | ||
f35ad083 MZ |
1934 | /* |
1935 | * If the trigger type is not specified by the caller, then | |
1936 | * use the default for this interrupt. | |
1937 | */ | |
1e7c5fd2 | 1938 | type &= IRQ_TYPE_SENSE_MASK; |
f35ad083 MZ |
1939 | if (type == IRQ_TYPE_NONE) |
1940 | type = irqd_get_trigger_type(&desc->irq_data); | |
1941 | ||
1e7c5fd2 MZ |
1942 | if (type != IRQ_TYPE_NONE) { |
1943 | int ret; | |
1944 | ||
a1ff541a | 1945 | ret = __irq_set_trigger(desc, type); |
1e7c5fd2 MZ |
1946 | |
1947 | if (ret) { | |
32cffdde | 1948 | WARN(1, "failed to set type for IRQ%d\n", irq); |
1e7c5fd2 MZ |
1949 | goto out; |
1950 | } | |
1951 | } | |
1952 | ||
31d9d9b6 | 1953 | irq_percpu_enable(desc, cpu); |
1e7c5fd2 | 1954 | out: |
31d9d9b6 MZ |
1955 | irq_put_desc_unlock(desc, flags); |
1956 | } | |
36a5df85 | 1957 | EXPORT_SYMBOL_GPL(enable_percpu_irq); |
31d9d9b6 | 1958 | |
f0cb3220 TP |
1959 | /** |
1960 | * irq_percpu_is_enabled - Check whether the per cpu irq is enabled | |
1961 | * @irq: Linux irq number to check for | |
1962 | * | |
1963 | * Must be called from a non migratable context. Returns the enable | |
1964 | * state of a per cpu interrupt on the current cpu. | |
1965 | */ | |
1966 | bool irq_percpu_is_enabled(unsigned int irq) | |
1967 | { | |
1968 | unsigned int cpu = smp_processor_id(); | |
1969 | struct irq_desc *desc; | |
1970 | unsigned long flags; | |
1971 | bool is_enabled; | |
1972 | ||
1973 | desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU); | |
1974 | if (!desc) | |
1975 | return false; | |
1976 | ||
1977 | is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled); | |
1978 | irq_put_desc_unlock(desc, flags); | |
1979 | ||
1980 | return is_enabled; | |
1981 | } | |
1982 | EXPORT_SYMBOL_GPL(irq_percpu_is_enabled); | |
1983 | ||
31d9d9b6 MZ |
1984 | void disable_percpu_irq(unsigned int irq) |
1985 | { | |
1986 | unsigned int cpu = smp_processor_id(); | |
1987 | unsigned long flags; | |
1988 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU); | |
1989 | ||
1990 | if (!desc) | |
1991 | return; | |
1992 | ||
1993 | irq_percpu_disable(desc, cpu); | |
1994 | irq_put_desc_unlock(desc, flags); | |
1995 | } | |
36a5df85 | 1996 | EXPORT_SYMBOL_GPL(disable_percpu_irq); |
31d9d9b6 MZ |
1997 | |
1998 | /* | |
1999 | * Internal function to unregister a percpu irqaction. | |
2000 | */ | |
2001 | static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id) | |
2002 | { | |
2003 | struct irq_desc *desc = irq_to_desc(irq); | |
2004 | struct irqaction *action; | |
2005 | unsigned long flags; | |
2006 | ||
2007 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); | |
2008 | ||
2009 | if (!desc) | |
2010 | return NULL; | |
2011 | ||
2012 | raw_spin_lock_irqsave(&desc->lock, flags); | |
2013 | ||
2014 | action = desc->action; | |
2015 | if (!action || action->percpu_dev_id != dev_id) { | |
2016 | WARN(1, "Trying to free already-free IRQ %d\n", irq); | |
2017 | goto bad; | |
2018 | } | |
2019 | ||
2020 | if (!cpumask_empty(desc->percpu_enabled)) { | |
2021 | WARN(1, "percpu IRQ %d still enabled on CPU%d!\n", | |
2022 | irq, cpumask_first(desc->percpu_enabled)); | |
2023 | goto bad; | |
2024 | } | |
2025 | ||
2026 | /* Found it - now remove it from the list of entries: */ | |
2027 | desc->action = NULL; | |
2028 | ||
2029 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
2030 | ||
2031 | unregister_handler_proc(irq, action); | |
2032 | ||
be45beb2 | 2033 | irq_chip_pm_put(&desc->irq_data); |
31d9d9b6 MZ |
2034 | module_put(desc->owner); |
2035 | return action; | |
2036 | ||
2037 | bad: | |
2038 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
2039 | return NULL; | |
2040 | } | |
2041 | ||
2042 | /** | |
2043 | * remove_percpu_irq - free a per-cpu interrupt | |
2044 | * @irq: Interrupt line to free | |
2045 | * @act: irqaction for the interrupt | |
2046 | * | |
2047 | * Used to remove interrupts statically setup by the early boot process. | |
2048 | */ | |
2049 | void remove_percpu_irq(unsigned int irq, struct irqaction *act) | |
2050 | { | |
2051 | struct irq_desc *desc = irq_to_desc(irq); | |
2052 | ||
2053 | if (desc && irq_settings_is_per_cpu_devid(desc)) | |
2054 | __free_percpu_irq(irq, act->percpu_dev_id); | |
2055 | } | |
2056 | ||
2057 | /** | |
2058 | * free_percpu_irq - free an interrupt allocated with request_percpu_irq | |
2059 | * @irq: Interrupt line to free | |
2060 | * @dev_id: Device identity to free | |
2061 | * | |
2062 | * Remove a percpu interrupt handler. The handler is removed, but | |
2063 | * the interrupt line is not disabled. This must be done on each | |
2064 | * CPU before calling this function. The function does not return | |
2065 | * until any executing interrupts for this IRQ have completed. | |
2066 | * | |
2067 | * This function must not be called from interrupt context. | |
2068 | */ | |
2069 | void free_percpu_irq(unsigned int irq, void __percpu *dev_id) | |
2070 | { | |
2071 | struct irq_desc *desc = irq_to_desc(irq); | |
2072 | ||
2073 | if (!desc || !irq_settings_is_per_cpu_devid(desc)) | |
2074 | return; | |
2075 | ||
2076 | chip_bus_lock(desc); | |
2077 | kfree(__free_percpu_irq(irq, dev_id)); | |
2078 | chip_bus_sync_unlock(desc); | |
2079 | } | |
aec2e2ad | 2080 | EXPORT_SYMBOL_GPL(free_percpu_irq); |
31d9d9b6 MZ |
2081 | |
2082 | /** | |
2083 | * setup_percpu_irq - setup a per-cpu interrupt | |
2084 | * @irq: Interrupt line to setup | |
2085 | * @act: irqaction for the interrupt | |
2086 | * | |
2087 | * Used to statically setup per-cpu interrupts in the early boot process. | |
2088 | */ | |
2089 | int setup_percpu_irq(unsigned int irq, struct irqaction *act) | |
2090 | { | |
2091 | struct irq_desc *desc = irq_to_desc(irq); | |
2092 | int retval; | |
2093 | ||
2094 | if (!desc || !irq_settings_is_per_cpu_devid(desc)) | |
2095 | return -EINVAL; | |
be45beb2 JH |
2096 | |
2097 | retval = irq_chip_pm_get(&desc->irq_data); | |
2098 | if (retval < 0) | |
2099 | return retval; | |
2100 | ||
31d9d9b6 | 2101 | retval = __setup_irq(irq, desc, act); |
31d9d9b6 | 2102 | |
be45beb2 JH |
2103 | if (retval) |
2104 | irq_chip_pm_put(&desc->irq_data); | |
2105 | ||
31d9d9b6 MZ |
2106 | return retval; |
2107 | } | |
2108 | ||
2109 | /** | |
c80081b9 | 2110 | * __request_percpu_irq - allocate a percpu interrupt line |
31d9d9b6 MZ |
2111 | * @irq: Interrupt line to allocate |
2112 | * @handler: Function to be called when the IRQ occurs. | |
c80081b9 | 2113 | * @flags: Interrupt type flags (IRQF_TIMER only) |
31d9d9b6 MZ |
2114 | * @devname: An ascii name for the claiming device |
2115 | * @dev_id: A percpu cookie passed back to the handler function | |
2116 | * | |
a1b7febd MR |
2117 | * This call allocates interrupt resources and enables the |
2118 | * interrupt on the local CPU. If the interrupt is supposed to be | |
2119 | * enabled on other CPUs, it has to be done on each CPU using | |
2120 | * enable_percpu_irq(). | |
31d9d9b6 MZ |
2121 | * |
2122 | * Dev_id must be globally unique. It is a per-cpu variable, and | |
2123 | * the handler gets called with the interrupted CPU's instance of | |
2124 | * that variable. | |
2125 | */ | |
c80081b9 DL |
2126 | int __request_percpu_irq(unsigned int irq, irq_handler_t handler, |
2127 | unsigned long flags, const char *devname, | |
2128 | void __percpu *dev_id) | |
31d9d9b6 MZ |
2129 | { |
2130 | struct irqaction *action; | |
2131 | struct irq_desc *desc; | |
2132 | int retval; | |
2133 | ||
2134 | if (!dev_id) | |
2135 | return -EINVAL; | |
2136 | ||
2137 | desc = irq_to_desc(irq); | |
2138 | if (!desc || !irq_settings_can_request(desc) || | |
2139 | !irq_settings_is_per_cpu_devid(desc)) | |
2140 | return -EINVAL; | |
2141 | ||
c80081b9 DL |
2142 | if (flags && flags != IRQF_TIMER) |
2143 | return -EINVAL; | |
2144 | ||
31d9d9b6 MZ |
2145 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
2146 | if (!action) | |
2147 | return -ENOMEM; | |
2148 | ||
2149 | action->handler = handler; | |
c80081b9 | 2150 | action->flags = flags | IRQF_PERCPU | IRQF_NO_SUSPEND; |
31d9d9b6 MZ |
2151 | action->name = devname; |
2152 | action->percpu_dev_id = dev_id; | |
2153 | ||
be45beb2 | 2154 | retval = irq_chip_pm_get(&desc->irq_data); |
4396f46c SL |
2155 | if (retval < 0) { |
2156 | kfree(action); | |
be45beb2 | 2157 | return retval; |
4396f46c | 2158 | } |
be45beb2 | 2159 | |
31d9d9b6 | 2160 | retval = __setup_irq(irq, desc, action); |
31d9d9b6 | 2161 | |
be45beb2 JH |
2162 | if (retval) { |
2163 | irq_chip_pm_put(&desc->irq_data); | |
31d9d9b6 | 2164 | kfree(action); |
be45beb2 | 2165 | } |
31d9d9b6 MZ |
2166 | |
2167 | return retval; | |
2168 | } | |
c80081b9 | 2169 | EXPORT_SYMBOL_GPL(__request_percpu_irq); |
1b7047ed MZ |
2170 | |
2171 | /** | |
2172 | * irq_get_irqchip_state - returns the irqchip state of a interrupt. | |
2173 | * @irq: Interrupt line that is forwarded to a VM | |
2174 | * @which: One of IRQCHIP_STATE_* the caller wants to know about | |
2175 | * @state: a pointer to a boolean where the state is to be storeed | |
2176 | * | |
2177 | * This call snapshots the internal irqchip state of an | |
2178 | * interrupt, returning into @state the bit corresponding to | |
2179 | * stage @which | |
2180 | * | |
2181 | * This function should be called with preemption disabled if the | |
2182 | * interrupt controller has per-cpu registers. | |
2183 | */ | |
2184 | int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which, | |
2185 | bool *state) | |
2186 | { | |
2187 | struct irq_desc *desc; | |
2188 | struct irq_data *data; | |
2189 | struct irq_chip *chip; | |
2190 | unsigned long flags; | |
2191 | int err = -EINVAL; | |
2192 | ||
2193 | desc = irq_get_desc_buslock(irq, &flags, 0); | |
2194 | if (!desc) | |
2195 | return err; | |
2196 | ||
2197 | data = irq_desc_get_irq_data(desc); | |
2198 | ||
2199 | do { | |
2200 | chip = irq_data_get_irq_chip(data); | |
2201 | if (chip->irq_get_irqchip_state) | |
2202 | break; | |
2203 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
2204 | data = data->parent_data; | |
2205 | #else | |
2206 | data = NULL; | |
2207 | #endif | |
2208 | } while (data); | |
2209 | ||
2210 | if (data) | |
2211 | err = chip->irq_get_irqchip_state(data, which, state); | |
2212 | ||
2213 | irq_put_desc_busunlock(desc, flags); | |
2214 | return err; | |
2215 | } | |
1ee4fb3e | 2216 | EXPORT_SYMBOL_GPL(irq_get_irqchip_state); |
1b7047ed MZ |
2217 | |
2218 | /** | |
2219 | * irq_set_irqchip_state - set the state of a forwarded interrupt. | |
2220 | * @irq: Interrupt line that is forwarded to a VM | |
2221 | * @which: State to be restored (one of IRQCHIP_STATE_*) | |
2222 | * @val: Value corresponding to @which | |
2223 | * | |
2224 | * This call sets the internal irqchip state of an interrupt, | |
2225 | * depending on the value of @which. | |
2226 | * | |
2227 | * This function should be called with preemption disabled if the | |
2228 | * interrupt controller has per-cpu registers. | |
2229 | */ | |
2230 | int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which, | |
2231 | bool val) | |
2232 | { | |
2233 | struct irq_desc *desc; | |
2234 | struct irq_data *data; | |
2235 | struct irq_chip *chip; | |
2236 | unsigned long flags; | |
2237 | int err = -EINVAL; | |
2238 | ||
2239 | desc = irq_get_desc_buslock(irq, &flags, 0); | |
2240 | if (!desc) | |
2241 | return err; | |
2242 | ||
2243 | data = irq_desc_get_irq_data(desc); | |
2244 | ||
2245 | do { | |
2246 | chip = irq_data_get_irq_chip(data); | |
2247 | if (chip->irq_set_irqchip_state) | |
2248 | break; | |
2249 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
2250 | data = data->parent_data; | |
2251 | #else | |
2252 | data = NULL; | |
2253 | #endif | |
2254 | } while (data); | |
2255 | ||
2256 | if (data) | |
2257 | err = chip->irq_set_irqchip_state(data, which, val); | |
2258 | ||
2259 | irq_put_desc_busunlock(desc, flags); | |
2260 | return err; | |
2261 | } | |
1ee4fb3e | 2262 | EXPORT_SYMBOL_GPL(irq_set_irqchip_state); |