]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/random.h> | |
13 | #include <linux/interrupt.h> | |
1aeb272c | 14 | #include <linux/slab.h> |
1da177e4 LT |
15 | |
16 | #include "internals.h" | |
17 | ||
18 | #ifdef CONFIG_SMP | |
d036e67b | 19 | cpumask_var_t irq_default_affinity; |
1da177e4 | 20 | |
d036e67b RR |
21 | static int init_irq_default_affinity(void) |
22 | { | |
23 | alloc_cpumask_var(&irq_default_affinity, GFP_KERNEL); | |
24 | cpumask_setall(irq_default_affinity); | |
25 | return 0; | |
26 | } | |
27 | core_initcall(init_irq_default_affinity); | |
18404756 | 28 | |
1da177e4 LT |
29 | /** |
30 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 31 | * @irq: interrupt number to wait for |
1da177e4 LT |
32 | * |
33 | * This function waits for any pending IRQ handlers for this interrupt | |
34 | * to complete before returning. If you use this function while | |
35 | * holding a resource the IRQ handler may need you will deadlock. | |
36 | * | |
37 | * This function may be called - with care - from IRQ context. | |
38 | */ | |
39 | void synchronize_irq(unsigned int irq) | |
40 | { | |
cb5bc832 | 41 | struct irq_desc *desc = irq_to_desc(irq); |
a98ce5c6 | 42 | unsigned int status; |
1da177e4 | 43 | |
7d94f7ca | 44 | if (!desc) |
c2b5a251 MW |
45 | return; |
46 | ||
a98ce5c6 HX |
47 | do { |
48 | unsigned long flags; | |
49 | ||
50 | /* | |
51 | * Wait until we're out of the critical section. This might | |
52 | * give the wrong answer due to the lack of memory barriers. | |
53 | */ | |
54 | while (desc->status & IRQ_INPROGRESS) | |
55 | cpu_relax(); | |
56 | ||
57 | /* Ok, that indicated we're done: double-check carefully. */ | |
58 | spin_lock_irqsave(&desc->lock, flags); | |
59 | status = desc->status; | |
60 | spin_unlock_irqrestore(&desc->lock, flags); | |
61 | ||
62 | /* Oops, that failed? */ | |
63 | } while (status & IRQ_INPROGRESS); | |
1da177e4 | 64 | } |
1da177e4 LT |
65 | EXPORT_SYMBOL(synchronize_irq); |
66 | ||
771ee3b0 TG |
67 | /** |
68 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
69 | * @irq: Interrupt to check | |
70 | * | |
71 | */ | |
72 | int irq_can_set_affinity(unsigned int irq) | |
73 | { | |
08678b08 | 74 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 TG |
75 | |
76 | if (CHECK_IRQ_PER_CPU(desc->status) || !desc->chip || | |
77 | !desc->chip->set_affinity) | |
78 | return 0; | |
79 | ||
80 | return 1; | |
81 | } | |
82 | ||
83 | /** | |
84 | * irq_set_affinity - Set the irq affinity of a given irq | |
85 | * @irq: Interrupt to set affinity | |
86 | * @cpumask: cpumask | |
87 | * | |
88 | */ | |
0de26520 | 89 | int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask) |
771ee3b0 | 90 | { |
08678b08 | 91 | struct irq_desc *desc = irq_to_desc(irq); |
f6d87f4b | 92 | unsigned long flags; |
771ee3b0 TG |
93 | |
94 | if (!desc->chip->set_affinity) | |
95 | return -EINVAL; | |
96 | ||
f6d87f4b TG |
97 | spin_lock_irqsave(&desc->lock, flags); |
98 | ||
771ee3b0 | 99 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
932775a4 | 100 | if (desc->status & IRQ_MOVE_PCNTXT || desc->status & IRQ_DISABLED) { |
0de26520 | 101 | cpumask_copy(&desc->affinity, cpumask); |
72b1e22d | 102 | desc->chip->set_affinity(irq, cpumask); |
f6d87f4b TG |
103 | } else { |
104 | desc->status |= IRQ_MOVE_PENDING; | |
0de26520 | 105 | cpumask_copy(&desc->pending_mask, cpumask); |
f6d87f4b | 106 | } |
771ee3b0 | 107 | #else |
0de26520 | 108 | cpumask_copy(&desc->affinity, cpumask); |
771ee3b0 TG |
109 | desc->chip->set_affinity(irq, cpumask); |
110 | #endif | |
f6d87f4b TG |
111 | desc->status |= IRQ_AFFINITY_SET; |
112 | spin_unlock_irqrestore(&desc->lock, flags); | |
771ee3b0 TG |
113 | return 0; |
114 | } | |
115 | ||
18404756 MK |
116 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
117 | /* | |
118 | * Generic version of the affinity autoselector. | |
119 | */ | |
f6d87f4b | 120 | int do_irq_select_affinity(unsigned int irq, struct irq_desc *desc) |
18404756 | 121 | { |
18404756 MK |
122 | if (!irq_can_set_affinity(irq)) |
123 | return 0; | |
124 | ||
f6d87f4b TG |
125 | /* |
126 | * Preserve an userspace affinity setup, but make sure that | |
127 | * one of the targets is online. | |
128 | */ | |
612e3684 | 129 | if (desc->status & (IRQ_AFFINITY_SET | IRQ_NO_BALANCING)) { |
0de26520 RR |
130 | if (cpumask_any_and(&desc->affinity, cpu_online_mask) |
131 | < nr_cpu_ids) | |
132 | goto set_affinity; | |
f6d87f4b TG |
133 | else |
134 | desc->status &= ~IRQ_AFFINITY_SET; | |
135 | } | |
136 | ||
d036e67b | 137 | cpumask_and(&desc->affinity, cpu_online_mask, irq_default_affinity); |
0de26520 RR |
138 | set_affinity: |
139 | desc->chip->set_affinity(irq, &desc->affinity); | |
18404756 | 140 | |
18404756 MK |
141 | return 0; |
142 | } | |
f6d87f4b TG |
143 | #else |
144 | static inline int do_irq_select_affinity(unsigned int irq, struct irq_desc *d) | |
145 | { | |
146 | return irq_select_affinity(irq); | |
147 | } | |
18404756 MK |
148 | #endif |
149 | ||
f6d87f4b TG |
150 | /* |
151 | * Called when affinity is set via /proc/irq | |
152 | */ | |
153 | int irq_select_affinity_usr(unsigned int irq) | |
154 | { | |
155 | struct irq_desc *desc = irq_to_desc(irq); | |
156 | unsigned long flags; | |
157 | int ret; | |
158 | ||
159 | spin_lock_irqsave(&desc->lock, flags); | |
160 | ret = do_irq_select_affinity(irq, desc); | |
161 | spin_unlock_irqrestore(&desc->lock, flags); | |
162 | ||
163 | return ret; | |
164 | } | |
165 | ||
166 | #else | |
f131e243 | 167 | static inline int do_irq_select_affinity(int irq, struct irq_desc *desc) |
f6d87f4b TG |
168 | { |
169 | return 0; | |
170 | } | |
1da177e4 LT |
171 | #endif |
172 | ||
173 | /** | |
174 | * disable_irq_nosync - disable an irq without waiting | |
175 | * @irq: Interrupt to disable | |
176 | * | |
177 | * Disable the selected interrupt line. Disables and Enables are | |
178 | * nested. | |
179 | * Unlike disable_irq(), this function does not ensure existing | |
180 | * instances of the IRQ handler have completed before returning. | |
181 | * | |
182 | * This function may be called from IRQ context. | |
183 | */ | |
184 | void disable_irq_nosync(unsigned int irq) | |
185 | { | |
d3c60047 | 186 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
187 | unsigned long flags; |
188 | ||
7d94f7ca | 189 | if (!desc) |
c2b5a251 MW |
190 | return; |
191 | ||
1da177e4 LT |
192 | spin_lock_irqsave(&desc->lock, flags); |
193 | if (!desc->depth++) { | |
194 | desc->status |= IRQ_DISABLED; | |
d1bef4ed | 195 | desc->chip->disable(irq); |
1da177e4 LT |
196 | } |
197 | spin_unlock_irqrestore(&desc->lock, flags); | |
198 | } | |
1da177e4 LT |
199 | EXPORT_SYMBOL(disable_irq_nosync); |
200 | ||
201 | /** | |
202 | * disable_irq - disable an irq and wait for completion | |
203 | * @irq: Interrupt to disable | |
204 | * | |
205 | * Disable the selected interrupt line. Enables and Disables are | |
206 | * nested. | |
207 | * This function waits for any pending IRQ handlers for this interrupt | |
208 | * to complete before returning. If you use this function while | |
209 | * holding a resource the IRQ handler may need you will deadlock. | |
210 | * | |
211 | * This function may be called - with care - from IRQ context. | |
212 | */ | |
213 | void disable_irq(unsigned int irq) | |
214 | { | |
d3c60047 | 215 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 | 216 | |
7d94f7ca | 217 | if (!desc) |
c2b5a251 MW |
218 | return; |
219 | ||
1da177e4 LT |
220 | disable_irq_nosync(irq); |
221 | if (desc->action) | |
222 | synchronize_irq(irq); | |
223 | } | |
1da177e4 LT |
224 | EXPORT_SYMBOL(disable_irq); |
225 | ||
1adb0850 TG |
226 | static void __enable_irq(struct irq_desc *desc, unsigned int irq) |
227 | { | |
228 | switch (desc->depth) { | |
229 | case 0: | |
b8c512f6 | 230 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); |
1adb0850 TG |
231 | break; |
232 | case 1: { | |
233 | unsigned int status = desc->status & ~IRQ_DISABLED; | |
234 | ||
235 | /* Prevent probing on this irq: */ | |
236 | desc->status = status | IRQ_NOPROBE; | |
237 | check_irq_resend(desc, irq); | |
238 | /* fall-through */ | |
239 | } | |
240 | default: | |
241 | desc->depth--; | |
242 | } | |
243 | } | |
244 | ||
1da177e4 LT |
245 | /** |
246 | * enable_irq - enable handling of an irq | |
247 | * @irq: Interrupt to enable | |
248 | * | |
249 | * Undoes the effect of one call to disable_irq(). If this | |
250 | * matches the last disable, processing of interrupts on this | |
251 | * IRQ line is re-enabled. | |
252 | * | |
253 | * This function may be called from IRQ context. | |
254 | */ | |
255 | void enable_irq(unsigned int irq) | |
256 | { | |
d3c60047 | 257 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
258 | unsigned long flags; |
259 | ||
7d94f7ca | 260 | if (!desc) |
c2b5a251 MW |
261 | return; |
262 | ||
1da177e4 | 263 | spin_lock_irqsave(&desc->lock, flags); |
1adb0850 | 264 | __enable_irq(desc, irq); |
1da177e4 LT |
265 | spin_unlock_irqrestore(&desc->lock, flags); |
266 | } | |
1da177e4 LT |
267 | EXPORT_SYMBOL(enable_irq); |
268 | ||
0c5d1eb7 | 269 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 270 | { |
08678b08 | 271 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
272 | int ret = -ENXIO; |
273 | ||
274 | if (desc->chip->set_wake) | |
275 | ret = desc->chip->set_wake(irq, on); | |
276 | ||
277 | return ret; | |
278 | } | |
279 | ||
ba9a2331 TG |
280 | /** |
281 | * set_irq_wake - control irq power management wakeup | |
282 | * @irq: interrupt to control | |
283 | * @on: enable/disable power management wakeup | |
284 | * | |
15a647eb DB |
285 | * Enable/disable power management wakeup mode, which is |
286 | * disabled by default. Enables and disables must match, | |
287 | * just as they match for non-wakeup mode support. | |
288 | * | |
289 | * Wakeup mode lets this IRQ wake the system from sleep | |
290 | * states like "suspend to RAM". | |
ba9a2331 TG |
291 | */ |
292 | int set_irq_wake(unsigned int irq, unsigned int on) | |
293 | { | |
08678b08 | 294 | struct irq_desc *desc = irq_to_desc(irq); |
ba9a2331 | 295 | unsigned long flags; |
2db87321 | 296 | int ret = 0; |
ba9a2331 | 297 | |
15a647eb DB |
298 | /* wakeup-capable irqs can be shared between drivers that |
299 | * don't need to have the same sleep mode behaviors. | |
300 | */ | |
ba9a2331 | 301 | spin_lock_irqsave(&desc->lock, flags); |
15a647eb | 302 | if (on) { |
2db87321 UKK |
303 | if (desc->wake_depth++ == 0) { |
304 | ret = set_irq_wake_real(irq, on); | |
305 | if (ret) | |
306 | desc->wake_depth = 0; | |
307 | else | |
308 | desc->status |= IRQ_WAKEUP; | |
309 | } | |
15a647eb DB |
310 | } else { |
311 | if (desc->wake_depth == 0) { | |
7a2c4770 | 312 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
313 | } else if (--desc->wake_depth == 0) { |
314 | ret = set_irq_wake_real(irq, on); | |
315 | if (ret) | |
316 | desc->wake_depth = 1; | |
317 | else | |
318 | desc->status &= ~IRQ_WAKEUP; | |
319 | } | |
15a647eb | 320 | } |
2db87321 | 321 | |
ba9a2331 TG |
322 | spin_unlock_irqrestore(&desc->lock, flags); |
323 | return ret; | |
324 | } | |
325 | EXPORT_SYMBOL(set_irq_wake); | |
326 | ||
1da177e4 LT |
327 | /* |
328 | * Internal function that tells the architecture code whether a | |
329 | * particular irq has been exclusively allocated or is available | |
330 | * for driver use. | |
331 | */ | |
332 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
333 | { | |
d3c60047 | 334 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
335 | struct irqaction *action; |
336 | ||
7d94f7ca YL |
337 | if (!desc) |
338 | return 0; | |
339 | ||
340 | if (desc->status & IRQ_NOREQUEST) | |
1da177e4 LT |
341 | return 0; |
342 | ||
08678b08 | 343 | action = desc->action; |
1da177e4 | 344 | if (action) |
3cca53b0 | 345 | if (irqflags & action->flags & IRQF_SHARED) |
1da177e4 LT |
346 | action = NULL; |
347 | ||
348 | return !action; | |
349 | } | |
350 | ||
6a6de9ef TG |
351 | void compat_irq_chip_set_default_handler(struct irq_desc *desc) |
352 | { | |
353 | /* | |
354 | * If the architecture still has not overriden | |
355 | * the flow handler then zap the default. This | |
356 | * should catch incorrect flow-type setting. | |
357 | */ | |
358 | if (desc->handle_irq == &handle_bad_irq) | |
359 | desc->handle_irq = NULL; | |
360 | } | |
361 | ||
0c5d1eb7 | 362 | int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
82736f4d UKK |
363 | unsigned long flags) |
364 | { | |
365 | int ret; | |
0c5d1eb7 | 366 | struct irq_chip *chip = desc->chip; |
82736f4d UKK |
367 | |
368 | if (!chip || !chip->set_type) { | |
369 | /* | |
370 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
371 | * flow-types? | |
372 | */ | |
3ff68a6a | 373 | pr_debug("No set_type function for IRQ %d (%s)\n", irq, |
82736f4d UKK |
374 | chip ? (chip->name ? : "unknown") : "unknown"); |
375 | return 0; | |
376 | } | |
377 | ||
f2b662da DB |
378 | /* caller masked out all except trigger mode flags */ |
379 | ret = chip->set_type(irq, flags); | |
82736f4d UKK |
380 | |
381 | if (ret) | |
c69ad71b | 382 | pr_err("setting trigger mode %d for irq %u failed (%pF)\n", |
f2b662da | 383 | (int)flags, irq, chip->set_type); |
0c5d1eb7 | 384 | else { |
f2b662da DB |
385 | if (flags & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
386 | flags |= IRQ_LEVEL; | |
0c5d1eb7 | 387 | /* note that IRQF_TRIGGER_MASK == IRQ_TYPE_SENSE_MASK */ |
f2b662da DB |
388 | desc->status &= ~(IRQ_LEVEL | IRQ_TYPE_SENSE_MASK); |
389 | desc->status |= flags; | |
0c5d1eb7 | 390 | } |
82736f4d UKK |
391 | |
392 | return ret; | |
393 | } | |
394 | ||
1da177e4 LT |
395 | /* |
396 | * Internal function to register an irqaction - typically used to | |
397 | * allocate special interrupts that are part of the architecture. | |
398 | */ | |
d3c60047 | 399 | static int |
327ec569 | 400 | __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) |
1da177e4 | 401 | { |
1da177e4 | 402 | struct irqaction *old, **p; |
8b126b77 | 403 | const char *old_name = NULL; |
1da177e4 LT |
404 | unsigned long flags; |
405 | int shared = 0; | |
82736f4d | 406 | int ret; |
1da177e4 | 407 | |
7d94f7ca | 408 | if (!desc) |
c2b5a251 MW |
409 | return -EINVAL; |
410 | ||
f1c2662c | 411 | if (desc->chip == &no_irq_chip) |
1da177e4 LT |
412 | return -ENOSYS; |
413 | /* | |
414 | * Some drivers like serial.c use request_irq() heavily, | |
415 | * so we have to be careful not to interfere with a | |
416 | * running system. | |
417 | */ | |
3cca53b0 | 418 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
419 | /* |
420 | * This function might sleep, we want to call it first, | |
421 | * outside of the atomic block. | |
422 | * Yes, this might clear the entropy pool if the wrong | |
423 | * driver is attempted to be loaded, without actually | |
424 | * installing a new handler, but is this really a problem, | |
425 | * only the sysadmin is able to do this. | |
426 | */ | |
427 | rand_initialize_irq(irq); | |
428 | } | |
429 | ||
430 | /* | |
431 | * The following block of code has to be executed atomically | |
432 | */ | |
06fcb0c6 | 433 | spin_lock_irqsave(&desc->lock, flags); |
1da177e4 | 434 | p = &desc->action; |
06fcb0c6 IM |
435 | old = *p; |
436 | if (old) { | |
e76de9f8 TG |
437 | /* |
438 | * Can't share interrupts unless both agree to and are | |
439 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 440 | * fields must have IRQF_SHARED set and the bits which |
e76de9f8 TG |
441 | * set the trigger type must match. |
442 | */ | |
3cca53b0 | 443 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
8b126b77 AM |
444 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) { |
445 | old_name = old->name; | |
f5163427 | 446 | goto mismatch; |
8b126b77 | 447 | } |
f5163427 | 448 | |
284c6680 | 449 | #if defined(CONFIG_IRQ_PER_CPU) |
f5163427 | 450 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
451 | if ((old->flags & IRQF_PERCPU) != |
452 | (new->flags & IRQF_PERCPU)) | |
f5163427 DS |
453 | goto mismatch; |
454 | #endif | |
1da177e4 LT |
455 | |
456 | /* add new interrupt at end of irq queue */ | |
457 | do { | |
458 | p = &old->next; | |
459 | old = *p; | |
460 | } while (old); | |
461 | shared = 1; | |
462 | } | |
463 | ||
1da177e4 | 464 | if (!shared) { |
6a6de9ef | 465 | irq_chip_set_defaults(desc->chip); |
e76de9f8 TG |
466 | |
467 | /* Setup the type (level, edge polarity) if configured: */ | |
3cca53b0 | 468 | if (new->flags & IRQF_TRIGGER_MASK) { |
f2b662da DB |
469 | ret = __irq_set_trigger(desc, irq, |
470 | new->flags & IRQF_TRIGGER_MASK); | |
82736f4d UKK |
471 | |
472 | if (ret) { | |
473 | spin_unlock_irqrestore(&desc->lock, flags); | |
474 | return ret; | |
475 | } | |
e76de9f8 TG |
476 | } else |
477 | compat_irq_chip_set_default_handler(desc); | |
82736f4d UKK |
478 | #if defined(CONFIG_IRQ_PER_CPU) |
479 | if (new->flags & IRQF_PERCPU) | |
480 | desc->status |= IRQ_PER_CPU; | |
481 | #endif | |
6a6de9ef | 482 | |
94d39e1f | 483 | desc->status &= ~(IRQ_AUTODETECT | IRQ_WAITING | |
1adb0850 | 484 | IRQ_INPROGRESS | IRQ_SPURIOUS_DISABLED); |
94d39e1f TG |
485 | |
486 | if (!(desc->status & IRQ_NOAUTOEN)) { | |
487 | desc->depth = 0; | |
488 | desc->status &= ~IRQ_DISABLED; | |
7e6e178a | 489 | desc->chip->startup(irq); |
e76de9f8 TG |
490 | } else |
491 | /* Undo nested disables: */ | |
492 | desc->depth = 1; | |
18404756 | 493 | |
612e3684 TG |
494 | /* Exclude IRQ from balancing if requested */ |
495 | if (new->flags & IRQF_NOBALANCING) | |
496 | desc->status |= IRQ_NO_BALANCING; | |
497 | ||
18404756 | 498 | /* Set default affinity mask once everything is setup */ |
f6d87f4b | 499 | do_irq_select_affinity(irq, desc); |
0c5d1eb7 DB |
500 | |
501 | } else if ((new->flags & IRQF_TRIGGER_MASK) | |
502 | && (new->flags & IRQF_TRIGGER_MASK) | |
503 | != (desc->status & IRQ_TYPE_SENSE_MASK)) { | |
504 | /* hope the handler works with the actual trigger mode... */ | |
505 | pr_warning("IRQ %d uses trigger mode %d; requested %d\n", | |
506 | irq, (int)(desc->status & IRQ_TYPE_SENSE_MASK), | |
507 | (int)(new->flags & IRQF_TRIGGER_MASK)); | |
1da177e4 | 508 | } |
82736f4d UKK |
509 | |
510 | *p = new; | |
511 | ||
8528b0f1 LT |
512 | /* Reset broken irq detection when installing new handler */ |
513 | desc->irq_count = 0; | |
514 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
515 | |
516 | /* | |
517 | * Check whether we disabled the irq via the spurious handler | |
518 | * before. Reenable it and give it another chance. | |
519 | */ | |
520 | if (shared && (desc->status & IRQ_SPURIOUS_DISABLED)) { | |
521 | desc->status &= ~IRQ_SPURIOUS_DISABLED; | |
522 | __enable_irq(desc, irq); | |
523 | } | |
524 | ||
06fcb0c6 | 525 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
526 | |
527 | new->irq = irq; | |
2c6927a3 | 528 | register_irq_proc(irq, desc); |
1da177e4 LT |
529 | new->dir = NULL; |
530 | register_handler_proc(irq, new); | |
531 | ||
532 | return 0; | |
f5163427 DS |
533 | |
534 | mismatch: | |
3f050447 | 535 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 536 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 537 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
538 | if (old_name) |
539 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
540 | dump_stack(); |
541 | } | |
3f050447 | 542 | #endif |
8b126b77 | 543 | spin_unlock_irqrestore(&desc->lock, flags); |
f5163427 | 544 | return -EBUSY; |
1da177e4 LT |
545 | } |
546 | ||
d3c60047 TG |
547 | /** |
548 | * setup_irq - setup an interrupt | |
549 | * @irq: Interrupt line to setup | |
550 | * @act: irqaction for the interrupt | |
551 | * | |
552 | * Used to statically setup interrupts in the early boot process. | |
553 | */ | |
554 | int setup_irq(unsigned int irq, struct irqaction *act) | |
555 | { | |
556 | struct irq_desc *desc = irq_to_desc(irq); | |
557 | ||
558 | return __setup_irq(irq, desc, act); | |
559 | } | |
560 | ||
1da177e4 LT |
561 | /** |
562 | * free_irq - free an interrupt | |
563 | * @irq: Interrupt line to free | |
564 | * @dev_id: Device identity to free | |
565 | * | |
566 | * Remove an interrupt handler. The handler is removed and if the | |
567 | * interrupt line is no longer in use by any driver it is disabled. | |
568 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
569 | * on the card it drives before calling this function. The function | |
570 | * does not return until any executing interrupts for this IRQ | |
571 | * have completed. | |
572 | * | |
573 | * This function must not be called from interrupt context. | |
574 | */ | |
575 | void free_irq(unsigned int irq, void *dev_id) | |
576 | { | |
d3c60047 | 577 | struct irq_desc *desc = irq_to_desc(irq); |
ae88a23b | 578 | struct irqaction *action, **p, **pp; |
1da177e4 LT |
579 | unsigned long flags; |
580 | ||
ae88a23b | 581 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); |
7d94f7ca | 582 | |
7d94f7ca | 583 | if (!desc) |
1da177e4 LT |
584 | return; |
585 | ||
06fcb0c6 | 586 | spin_lock_irqsave(&desc->lock, flags); |
ae88a23b IM |
587 | |
588 | /* | |
589 | * There can be multiple actions per IRQ descriptor, find the right | |
590 | * one based on the dev_id: | |
591 | */ | |
1da177e4 LT |
592 | p = &desc->action; |
593 | for (;;) { | |
ae88a23b IM |
594 | action = *p; |
595 | pp = p; | |
1da177e4 | 596 | |
ae88a23b IM |
597 | if (!action) { |
598 | WARN(1, "Trying to free already-free IRQ %d\n", irq); | |
599 | spin_unlock_irqrestore(&desc->lock, flags); | |
1da177e4 | 600 | |
ae88a23b IM |
601 | return; |
602 | } | |
1da177e4 | 603 | |
ae88a23b IM |
604 | p = &action->next; |
605 | if (action->dev_id != dev_id) | |
606 | continue; | |
dbce706e | 607 | |
ae88a23b IM |
608 | break; |
609 | } | |
610 | ||
611 | /* Found it - now remove it from the list of entries: */ | |
612 | *pp = action->next; | |
613 | ||
614 | /* Currently used only by UML, might disappear one day: */ | |
b77d6adc | 615 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
ae88a23b IM |
616 | if (desc->chip->release) |
617 | desc->chip->release(irq, dev_id); | |
b77d6adc | 618 | #endif |
dbce706e | 619 | |
ae88a23b IM |
620 | /* If this was the last handler, shut down the IRQ line: */ |
621 | if (!desc->action) { | |
622 | desc->status |= IRQ_DISABLED; | |
623 | if (desc->chip->shutdown) | |
624 | desc->chip->shutdown(irq); | |
625 | else | |
626 | desc->chip->disable(irq); | |
627 | } | |
628 | spin_unlock_irqrestore(&desc->lock, flags); | |
629 | ||
630 | unregister_handler_proc(irq, action); | |
631 | ||
632 | /* Make sure it's not being used on another CPU: */ | |
633 | synchronize_irq(irq); | |
1da177e4 | 634 | |
70edcd77 | 635 | #ifdef CONFIG_DEBUG_SHIRQ |
ae88a23b IM |
636 | /* |
637 | * It's a shared IRQ -- the driver ought to be prepared for an IRQ | |
638 | * event to happen even now it's being freed, so let's make sure that | |
639 | * is so by doing an extra call to the handler .... | |
640 | * | |
641 | * ( We do this after actually deregistering it, to make sure that a | |
642 | * 'real' IRQ doesn't run in * parallel with our fake. ) | |
643 | */ | |
644 | if (action->flags & IRQF_SHARED) { | |
645 | local_irq_save(flags); | |
646 | action->handler(irq, dev_id); | |
647 | local_irq_restore(flags); | |
1da177e4 | 648 | } |
ae88a23b IM |
649 | #endif |
650 | kfree(action); | |
1da177e4 | 651 | } |
1da177e4 LT |
652 | EXPORT_SYMBOL(free_irq); |
653 | ||
654 | /** | |
655 | * request_irq - allocate an interrupt line | |
656 | * @irq: Interrupt line to allocate | |
657 | * @handler: Function to be called when the IRQ occurs | |
658 | * @irqflags: Interrupt type flags | |
659 | * @devname: An ascii name for the claiming device | |
660 | * @dev_id: A cookie passed back to the handler function | |
661 | * | |
662 | * This call allocates interrupt resources and enables the | |
663 | * interrupt line and IRQ handling. From the point this | |
664 | * call is made your handler function may be invoked. Since | |
665 | * your handler function must clear any interrupt the board | |
666 | * raises, you must take care both to initialise your hardware | |
667 | * and to set up the interrupt handler in the right order. | |
668 | * | |
669 | * Dev_id must be globally unique. Normally the address of the | |
670 | * device data structure is used as the cookie. Since the handler | |
671 | * receives this value it makes sense to use it. | |
672 | * | |
673 | * If your interrupt is shared you must pass a non NULL dev_id | |
674 | * as this is required when freeing the interrupt. | |
675 | * | |
676 | * Flags: | |
677 | * | |
3cca53b0 TG |
678 | * IRQF_SHARED Interrupt is shared |
679 | * IRQF_DISABLED Disable local interrupts while processing | |
680 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy | |
0c5d1eb7 | 681 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
682 | * |
683 | */ | |
da482792 | 684 | int request_irq(unsigned int irq, irq_handler_t handler, |
06fcb0c6 | 685 | unsigned long irqflags, const char *devname, void *dev_id) |
1da177e4 | 686 | { |
06fcb0c6 | 687 | struct irqaction *action; |
08678b08 | 688 | struct irq_desc *desc; |
d3c60047 | 689 | int retval; |
1da177e4 | 690 | |
470c6623 DB |
691 | /* |
692 | * handle_IRQ_event() always ignores IRQF_DISABLED except for | |
693 | * the _first_ irqaction (sigh). That can cause oopsing, but | |
694 | * the behavior is classified as "will not fix" so we need to | |
695 | * start nudging drivers away from using that idiom. | |
696 | */ | |
327ec569 IM |
697 | if ((irqflags & (IRQF_SHARED|IRQF_DISABLED)) == |
698 | (IRQF_SHARED|IRQF_DISABLED)) { | |
699 | pr_warning( | |
700 | "IRQ %d/%s: IRQF_DISABLED is not guaranteed on shared IRQs\n", | |
701 | irq, devname); | |
702 | } | |
470c6623 | 703 | |
fbb9ce95 IM |
704 | #ifdef CONFIG_LOCKDEP |
705 | /* | |
706 | * Lockdep wants atomic interrupt handlers: | |
707 | */ | |
38515e90 | 708 | irqflags |= IRQF_DISABLED; |
fbb9ce95 | 709 | #endif |
1da177e4 LT |
710 | /* |
711 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
712 | * otherwise we'll have trouble later trying to figure out | |
713 | * which interrupt is which (messes up the interrupt freeing | |
714 | * logic etc). | |
715 | */ | |
3cca53b0 | 716 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 | 717 | return -EINVAL; |
7d94f7ca | 718 | |
cb5bc832 | 719 | desc = irq_to_desc(irq); |
7d94f7ca | 720 | if (!desc) |
1da177e4 | 721 | return -EINVAL; |
7d94f7ca | 722 | |
08678b08 | 723 | if (desc->status & IRQ_NOREQUEST) |
6550c775 | 724 | return -EINVAL; |
1da177e4 LT |
725 | if (!handler) |
726 | return -EINVAL; | |
727 | ||
0e43785c | 728 | action = kmalloc(sizeof(struct irqaction), GFP_KERNEL); |
1da177e4 LT |
729 | if (!action) |
730 | return -ENOMEM; | |
731 | ||
732 | action->handler = handler; | |
733 | action->flags = irqflags; | |
734 | cpus_clear(action->mask); | |
735 | action->name = devname; | |
736 | action->next = NULL; | |
737 | action->dev_id = dev_id; | |
738 | ||
d3c60047 | 739 | retval = __setup_irq(irq, desc, action); |
377bf1e4 AV |
740 | if (retval) |
741 | kfree(action); | |
742 | ||
a304e1b8 DW |
743 | #ifdef CONFIG_DEBUG_SHIRQ |
744 | if (irqflags & IRQF_SHARED) { | |
745 | /* | |
746 | * It's a shared IRQ -- the driver ought to be prepared for it | |
747 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
748 | * We disable the irq to make sure that a 'real' IRQ doesn't |
749 | * run in parallel with our fake. | |
a304e1b8 | 750 | */ |
59845b1f | 751 | unsigned long flags; |
a304e1b8 | 752 | |
377bf1e4 | 753 | disable_irq(irq); |
59845b1f | 754 | local_irq_save(flags); |
377bf1e4 | 755 | |
59845b1f | 756 | handler(irq, dev_id); |
377bf1e4 | 757 | |
59845b1f | 758 | local_irq_restore(flags); |
377bf1e4 | 759 | enable_irq(irq); |
a304e1b8 DW |
760 | } |
761 | #endif | |
1da177e4 LT |
762 | return retval; |
763 | } | |
1da177e4 | 764 | EXPORT_SYMBOL(request_irq); |