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1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
3aa551c9 | 11 | #include <linux/kthread.h> |
1da177e4 LT |
12 | #include <linux/module.h> |
13 | #include <linux/random.h> | |
14 | #include <linux/interrupt.h> | |
1aeb272c | 15 | #include <linux/slab.h> |
3aa551c9 | 16 | #include <linux/sched.h> |
1da177e4 LT |
17 | |
18 | #include "internals.h" | |
19 | ||
1da177e4 LT |
20 | /** |
21 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 22 | * @irq: interrupt number to wait for |
1da177e4 LT |
23 | * |
24 | * This function waits for any pending IRQ handlers for this interrupt | |
25 | * to complete before returning. If you use this function while | |
26 | * holding a resource the IRQ handler may need you will deadlock. | |
27 | * | |
28 | * This function may be called - with care - from IRQ context. | |
29 | */ | |
30 | void synchronize_irq(unsigned int irq) | |
31 | { | |
cb5bc832 | 32 | struct irq_desc *desc = irq_to_desc(irq); |
009b4c3b | 33 | unsigned int state; |
1da177e4 | 34 | |
7d94f7ca | 35 | if (!desc) |
c2b5a251 MW |
36 | return; |
37 | ||
a98ce5c6 HX |
38 | do { |
39 | unsigned long flags; | |
40 | ||
41 | /* | |
42 | * Wait until we're out of the critical section. This might | |
43 | * give the wrong answer due to the lack of memory barriers. | |
44 | */ | |
009b4c3b | 45 | while (desc->istate & IRQS_INPROGRESS) |
a98ce5c6 HX |
46 | cpu_relax(); |
47 | ||
48 | /* Ok, that indicated we're done: double-check carefully. */ | |
239007b8 | 49 | raw_spin_lock_irqsave(&desc->lock, flags); |
009b4c3b | 50 | state = desc->istate; |
239007b8 | 51 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
a98ce5c6 HX |
52 | |
53 | /* Oops, that failed? */ | |
009b4c3b | 54 | } while (state & IRQS_INPROGRESS); |
3aa551c9 TG |
55 | |
56 | /* | |
57 | * We made sure that no hardirq handler is running. Now verify | |
58 | * that no threaded handlers are active. | |
59 | */ | |
60 | wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active)); | |
1da177e4 | 61 | } |
1da177e4 LT |
62 | EXPORT_SYMBOL(synchronize_irq); |
63 | ||
3aa551c9 TG |
64 | #ifdef CONFIG_SMP |
65 | cpumask_var_t irq_default_affinity; | |
66 | ||
771ee3b0 TG |
67 | /** |
68 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
69 | * @irq: Interrupt to check | |
70 | * | |
71 | */ | |
72 | int irq_can_set_affinity(unsigned int irq) | |
73 | { | |
08678b08 | 74 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 | 75 | |
bce43032 TG |
76 | if (!desc || !irqd_can_balance(&desc->irq_data) || |
77 | !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity) | |
771ee3b0 TG |
78 | return 0; |
79 | ||
80 | return 1; | |
81 | } | |
82 | ||
591d2fb0 TG |
83 | /** |
84 | * irq_set_thread_affinity - Notify irq threads to adjust affinity | |
85 | * @desc: irq descriptor which has affitnity changed | |
86 | * | |
87 | * We just set IRQTF_AFFINITY and delegate the affinity setting | |
88 | * to the interrupt thread itself. We can not call | |
89 | * set_cpus_allowed_ptr() here as we hold desc->lock and this | |
90 | * code can be called from hard interrupt context. | |
91 | */ | |
92 | void irq_set_thread_affinity(struct irq_desc *desc) | |
3aa551c9 TG |
93 | { |
94 | struct irqaction *action = desc->action; | |
95 | ||
96 | while (action) { | |
97 | if (action->thread) | |
591d2fb0 | 98 | set_bit(IRQTF_AFFINITY, &action->thread_flags); |
3aa551c9 TG |
99 | action = action->next; |
100 | } | |
101 | } | |
102 | ||
1fa46f1f TG |
103 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
104 | static inline bool irq_can_move_pcntxt(struct irq_desc *desc) | |
105 | { | |
106 | return desc->status & IRQ_MOVE_PCNTXT; | |
107 | } | |
108 | static inline bool irq_move_pending(struct irq_desc *desc) | |
109 | { | |
f230b6d5 | 110 | return irqd_is_setaffinity_pending(&desc->irq_data); |
1fa46f1f TG |
111 | } |
112 | static inline void | |
113 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) | |
114 | { | |
115 | cpumask_copy(desc->pending_mask, mask); | |
116 | } | |
117 | static inline void | |
118 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) | |
119 | { | |
120 | cpumask_copy(mask, desc->pending_mask); | |
121 | } | |
122 | #else | |
123 | static inline bool irq_can_move_pcntxt(struct irq_desc *desc) { return true; } | |
124 | static inline bool irq_move_pending(struct irq_desc *desc) { return false; } | |
125 | static inline void | |
126 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { } | |
127 | static inline void | |
128 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { } | |
129 | #endif | |
130 | ||
771ee3b0 TG |
131 | /** |
132 | * irq_set_affinity - Set the irq affinity of a given irq | |
133 | * @irq: Interrupt to set affinity | |
134 | * @cpumask: cpumask | |
135 | * | |
136 | */ | |
1fa46f1f | 137 | int irq_set_affinity(unsigned int irq, const struct cpumask *mask) |
771ee3b0 | 138 | { |
08678b08 | 139 | struct irq_desc *desc = irq_to_desc(irq); |
c96b3b3c | 140 | struct irq_chip *chip = desc->irq_data.chip; |
f6d87f4b | 141 | unsigned long flags; |
1fa46f1f | 142 | int ret = 0; |
771ee3b0 | 143 | |
c96b3b3c | 144 | if (!chip->irq_set_affinity) |
771ee3b0 TG |
145 | return -EINVAL; |
146 | ||
239007b8 | 147 | raw_spin_lock_irqsave(&desc->lock, flags); |
f6d87f4b | 148 | |
1fa46f1f TG |
149 | if (irq_can_move_pcntxt(desc)) { |
150 | ret = chip->irq_set_affinity(&desc->irq_data, mask, false); | |
3b8249e7 TG |
151 | switch (ret) { |
152 | case IRQ_SET_MASK_OK: | |
1fa46f1f | 153 | cpumask_copy(desc->irq_data.affinity, mask); |
3b8249e7 | 154 | case IRQ_SET_MASK_OK_NOCOPY: |
591d2fb0 | 155 | irq_set_thread_affinity(desc); |
3b8249e7 | 156 | ret = 0; |
57b150cc | 157 | } |
1fa46f1f | 158 | } else { |
f230b6d5 | 159 | irqd_set_move_pending(&desc->irq_data); |
1fa46f1f | 160 | irq_copy_pending(desc, mask); |
57b150cc | 161 | } |
1fa46f1f | 162 | |
cd7eab44 BH |
163 | if (desc->affinity_notify) { |
164 | kref_get(&desc->affinity_notify->kref); | |
165 | schedule_work(&desc->affinity_notify->work); | |
166 | } | |
f6d87f4b | 167 | desc->status |= IRQ_AFFINITY_SET; |
239007b8 | 168 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1fa46f1f | 169 | return ret; |
771ee3b0 TG |
170 | } |
171 | ||
e7a297b0 PWJ |
172 | int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m) |
173 | { | |
174 | struct irq_desc *desc = irq_to_desc(irq); | |
175 | unsigned long flags; | |
176 | ||
177 | if (!desc) | |
178 | return -EINVAL; | |
179 | ||
180 | raw_spin_lock_irqsave(&desc->lock, flags); | |
181 | desc->affinity_hint = m; | |
182 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
183 | ||
184 | return 0; | |
185 | } | |
186 | EXPORT_SYMBOL_GPL(irq_set_affinity_hint); | |
187 | ||
cd7eab44 BH |
188 | static void irq_affinity_notify(struct work_struct *work) |
189 | { | |
190 | struct irq_affinity_notify *notify = | |
191 | container_of(work, struct irq_affinity_notify, work); | |
192 | struct irq_desc *desc = irq_to_desc(notify->irq); | |
193 | cpumask_var_t cpumask; | |
194 | unsigned long flags; | |
195 | ||
1fa46f1f | 196 | if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL)) |
cd7eab44 BH |
197 | goto out; |
198 | ||
199 | raw_spin_lock_irqsave(&desc->lock, flags); | |
1fa46f1f TG |
200 | if (irq_move_pending(desc)) |
201 | irq_get_pending(cpumask, desc); | |
cd7eab44 | 202 | else |
1fb0ef31 | 203 | cpumask_copy(cpumask, desc->irq_data.affinity); |
cd7eab44 BH |
204 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
205 | ||
206 | notify->notify(notify, cpumask); | |
207 | ||
208 | free_cpumask_var(cpumask); | |
209 | out: | |
210 | kref_put(¬ify->kref, notify->release); | |
211 | } | |
212 | ||
213 | /** | |
214 | * irq_set_affinity_notifier - control notification of IRQ affinity changes | |
215 | * @irq: Interrupt for which to enable/disable notification | |
216 | * @notify: Context for notification, or %NULL to disable | |
217 | * notification. Function pointers must be initialised; | |
218 | * the other fields will be initialised by this function. | |
219 | * | |
220 | * Must be called in process context. Notification may only be enabled | |
221 | * after the IRQ is allocated and must be disabled before the IRQ is | |
222 | * freed using free_irq(). | |
223 | */ | |
224 | int | |
225 | irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) | |
226 | { | |
227 | struct irq_desc *desc = irq_to_desc(irq); | |
228 | struct irq_affinity_notify *old_notify; | |
229 | unsigned long flags; | |
230 | ||
231 | /* The release function is promised process context */ | |
232 | might_sleep(); | |
233 | ||
234 | if (!desc) | |
235 | return -EINVAL; | |
236 | ||
237 | /* Complete initialisation of *notify */ | |
238 | if (notify) { | |
239 | notify->irq = irq; | |
240 | kref_init(¬ify->kref); | |
241 | INIT_WORK(¬ify->work, irq_affinity_notify); | |
242 | } | |
243 | ||
244 | raw_spin_lock_irqsave(&desc->lock, flags); | |
245 | old_notify = desc->affinity_notify; | |
246 | desc->affinity_notify = notify; | |
247 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
248 | ||
249 | if (old_notify) | |
250 | kref_put(&old_notify->kref, old_notify->release); | |
251 | ||
252 | return 0; | |
253 | } | |
254 | EXPORT_SYMBOL_GPL(irq_set_affinity_notifier); | |
255 | ||
18404756 MK |
256 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
257 | /* | |
258 | * Generic version of the affinity autoselector. | |
259 | */ | |
3b8249e7 TG |
260 | static int |
261 | setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask) | |
18404756 | 262 | { |
35e857cb | 263 | struct irq_chip *chip = irq_desc_get_chip(desc); |
569bda8d | 264 | struct cpumask *set = irq_default_affinity; |
3b8249e7 | 265 | int ret; |
569bda8d | 266 | |
b008207c | 267 | /* Excludes PER_CPU and NO_BALANCE interrupts */ |
18404756 MK |
268 | if (!irq_can_set_affinity(irq)) |
269 | return 0; | |
270 | ||
f6d87f4b TG |
271 | /* |
272 | * Preserve an userspace affinity setup, but make sure that | |
273 | * one of the targets is online. | |
274 | */ | |
b008207c | 275 | if (desc->status & (IRQ_AFFINITY_SET)) { |
569bda8d TG |
276 | if (cpumask_intersects(desc->irq_data.affinity, |
277 | cpu_online_mask)) | |
278 | set = desc->irq_data.affinity; | |
f6d87f4b TG |
279 | else |
280 | desc->status &= ~IRQ_AFFINITY_SET; | |
281 | } | |
18404756 | 282 | |
3b8249e7 TG |
283 | cpumask_and(mask, cpu_online_mask, set); |
284 | ret = chip->irq_set_affinity(&desc->irq_data, mask, false); | |
285 | switch (ret) { | |
286 | case IRQ_SET_MASK_OK: | |
287 | cpumask_copy(desc->irq_data.affinity, mask); | |
288 | case IRQ_SET_MASK_OK_NOCOPY: | |
289 | irq_set_thread_affinity(desc); | |
290 | } | |
18404756 MK |
291 | return 0; |
292 | } | |
f6d87f4b | 293 | #else |
3b8249e7 TG |
294 | static inline int |
295 | setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask) | |
f6d87f4b TG |
296 | { |
297 | return irq_select_affinity(irq); | |
298 | } | |
18404756 MK |
299 | #endif |
300 | ||
f6d87f4b TG |
301 | /* |
302 | * Called when affinity is set via /proc/irq | |
303 | */ | |
3b8249e7 | 304 | int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask) |
f6d87f4b TG |
305 | { |
306 | struct irq_desc *desc = irq_to_desc(irq); | |
307 | unsigned long flags; | |
308 | int ret; | |
309 | ||
239007b8 | 310 | raw_spin_lock_irqsave(&desc->lock, flags); |
3b8249e7 | 311 | ret = setup_affinity(irq, desc, mask); |
239007b8 | 312 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
f6d87f4b TG |
313 | return ret; |
314 | } | |
315 | ||
316 | #else | |
3b8249e7 TG |
317 | static inline int |
318 | setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask) | |
f6d87f4b TG |
319 | { |
320 | return 0; | |
321 | } | |
1da177e4 LT |
322 | #endif |
323 | ||
0a0c5168 RW |
324 | void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend) |
325 | { | |
326 | if (suspend) { | |
685fd0b4 | 327 | if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND)) |
0a0c5168 | 328 | return; |
c531e836 | 329 | desc->istate |= IRQS_SUSPENDED; |
0a0c5168 RW |
330 | } |
331 | ||
3aae994f | 332 | if (!desc->depth++) |
87923470 | 333 | irq_disable(desc); |
0a0c5168 RW |
334 | } |
335 | ||
1da177e4 LT |
336 | /** |
337 | * disable_irq_nosync - disable an irq without waiting | |
338 | * @irq: Interrupt to disable | |
339 | * | |
340 | * Disable the selected interrupt line. Disables and Enables are | |
341 | * nested. | |
342 | * Unlike disable_irq(), this function does not ensure existing | |
343 | * instances of the IRQ handler have completed before returning. | |
344 | * | |
345 | * This function may be called from IRQ context. | |
346 | */ | |
347 | void disable_irq_nosync(unsigned int irq) | |
348 | { | |
d3c60047 | 349 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
350 | unsigned long flags; |
351 | ||
7d94f7ca | 352 | if (!desc) |
c2b5a251 MW |
353 | return; |
354 | ||
3876ec9e | 355 | chip_bus_lock(desc); |
239007b8 | 356 | raw_spin_lock_irqsave(&desc->lock, flags); |
0a0c5168 | 357 | __disable_irq(desc, irq, false); |
239007b8 | 358 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3876ec9e | 359 | chip_bus_sync_unlock(desc); |
1da177e4 | 360 | } |
1da177e4 LT |
361 | EXPORT_SYMBOL(disable_irq_nosync); |
362 | ||
363 | /** | |
364 | * disable_irq - disable an irq and wait for completion | |
365 | * @irq: Interrupt to disable | |
366 | * | |
367 | * Disable the selected interrupt line. Enables and Disables are | |
368 | * nested. | |
369 | * This function waits for any pending IRQ handlers for this interrupt | |
370 | * to complete before returning. If you use this function while | |
371 | * holding a resource the IRQ handler may need you will deadlock. | |
372 | * | |
373 | * This function may be called - with care - from IRQ context. | |
374 | */ | |
375 | void disable_irq(unsigned int irq) | |
376 | { | |
d3c60047 | 377 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 | 378 | |
7d94f7ca | 379 | if (!desc) |
c2b5a251 MW |
380 | return; |
381 | ||
1da177e4 LT |
382 | disable_irq_nosync(irq); |
383 | if (desc->action) | |
384 | synchronize_irq(irq); | |
385 | } | |
1da177e4 LT |
386 | EXPORT_SYMBOL(disable_irq); |
387 | ||
0a0c5168 | 388 | void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume) |
1adb0850 | 389 | { |
dc5f219e | 390 | if (resume) { |
c531e836 | 391 | if (!(desc->istate & IRQS_SUSPENDED)) { |
dc5f219e TG |
392 | if (!desc->action) |
393 | return; | |
394 | if (!(desc->action->flags & IRQF_FORCE_RESUME)) | |
395 | return; | |
396 | /* Pretend that it got disabled ! */ | |
397 | desc->depth++; | |
398 | } | |
c531e836 | 399 | desc->istate &= ~IRQS_SUSPENDED; |
dc5f219e | 400 | } |
0a0c5168 | 401 | |
1adb0850 TG |
402 | switch (desc->depth) { |
403 | case 0: | |
0a0c5168 | 404 | err_out: |
b8c512f6 | 405 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); |
1adb0850 TG |
406 | break; |
407 | case 1: { | |
c531e836 | 408 | if (desc->istate & IRQS_SUSPENDED) |
0a0c5168 | 409 | goto err_out; |
1adb0850 | 410 | /* Prevent probing on this irq: */ |
3aae994f TG |
411 | desc->status |= IRQ_NOPROBE; |
412 | irq_enable(desc); | |
1adb0850 TG |
413 | check_irq_resend(desc, irq); |
414 | /* fall-through */ | |
415 | } | |
416 | default: | |
417 | desc->depth--; | |
418 | } | |
419 | } | |
420 | ||
1da177e4 LT |
421 | /** |
422 | * enable_irq - enable handling of an irq | |
423 | * @irq: Interrupt to enable | |
424 | * | |
425 | * Undoes the effect of one call to disable_irq(). If this | |
426 | * matches the last disable, processing of interrupts on this | |
427 | * IRQ line is re-enabled. | |
428 | * | |
70aedd24 | 429 | * This function may be called from IRQ context only when |
6b8ff312 | 430 | * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL ! |
1da177e4 LT |
431 | */ |
432 | void enable_irq(unsigned int irq) | |
433 | { | |
d3c60047 | 434 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
435 | unsigned long flags; |
436 | ||
7d94f7ca | 437 | if (!desc) |
c2b5a251 MW |
438 | return; |
439 | ||
50f7c032 TG |
440 | if (WARN(!desc->irq_data.chip, |
441 | KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq)) | |
2656c366 TG |
442 | return; |
443 | ||
3876ec9e | 444 | chip_bus_lock(desc); |
239007b8 | 445 | raw_spin_lock_irqsave(&desc->lock, flags); |
0a0c5168 | 446 | __enable_irq(desc, irq, false); |
239007b8 | 447 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3876ec9e | 448 | chip_bus_sync_unlock(desc); |
1da177e4 | 449 | } |
1da177e4 LT |
450 | EXPORT_SYMBOL(enable_irq); |
451 | ||
0c5d1eb7 | 452 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 453 | { |
08678b08 | 454 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
455 | int ret = -ENXIO; |
456 | ||
2f7e99bb TG |
457 | if (desc->irq_data.chip->irq_set_wake) |
458 | ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on); | |
2db87321 UKK |
459 | |
460 | return ret; | |
461 | } | |
462 | ||
ba9a2331 | 463 | /** |
a0cd9ca2 | 464 | * irq_set_irq_wake - control irq power management wakeup |
ba9a2331 TG |
465 | * @irq: interrupt to control |
466 | * @on: enable/disable power management wakeup | |
467 | * | |
15a647eb DB |
468 | * Enable/disable power management wakeup mode, which is |
469 | * disabled by default. Enables and disables must match, | |
470 | * just as they match for non-wakeup mode support. | |
471 | * | |
472 | * Wakeup mode lets this IRQ wake the system from sleep | |
473 | * states like "suspend to RAM". | |
ba9a2331 | 474 | */ |
a0cd9ca2 | 475 | int irq_set_irq_wake(unsigned int irq, unsigned int on) |
ba9a2331 | 476 | { |
08678b08 | 477 | struct irq_desc *desc = irq_to_desc(irq); |
ba9a2331 | 478 | unsigned long flags; |
2db87321 | 479 | int ret = 0; |
ba9a2331 | 480 | |
15a647eb DB |
481 | /* wakeup-capable irqs can be shared between drivers that |
482 | * don't need to have the same sleep mode behaviors. | |
483 | */ | |
43abe43c | 484 | chip_bus_lock(desc); |
239007b8 | 485 | raw_spin_lock_irqsave(&desc->lock, flags); |
15a647eb | 486 | if (on) { |
2db87321 UKK |
487 | if (desc->wake_depth++ == 0) { |
488 | ret = set_irq_wake_real(irq, on); | |
489 | if (ret) | |
490 | desc->wake_depth = 0; | |
491 | else | |
6d2cd17f | 492 | desc->istate |= IRQS_WAKEUP; |
2db87321 | 493 | } |
15a647eb DB |
494 | } else { |
495 | if (desc->wake_depth == 0) { | |
7a2c4770 | 496 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
497 | } else if (--desc->wake_depth == 0) { |
498 | ret = set_irq_wake_real(irq, on); | |
499 | if (ret) | |
500 | desc->wake_depth = 1; | |
501 | else | |
6d2cd17f | 502 | desc->istate &= ~IRQS_WAKEUP; |
2db87321 | 503 | } |
15a647eb | 504 | } |
2db87321 | 505 | |
239007b8 | 506 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
43abe43c | 507 | chip_bus_sync_unlock(desc); |
ba9a2331 TG |
508 | return ret; |
509 | } | |
a0cd9ca2 | 510 | EXPORT_SYMBOL(irq_set_irq_wake); |
ba9a2331 | 511 | |
1da177e4 LT |
512 | /* |
513 | * Internal function that tells the architecture code whether a | |
514 | * particular irq has been exclusively allocated or is available | |
515 | * for driver use. | |
516 | */ | |
517 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
518 | { | |
d3c60047 | 519 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 | 520 | struct irqaction *action; |
cc8c3b78 | 521 | unsigned long flags; |
1da177e4 | 522 | |
7d94f7ca YL |
523 | if (!desc) |
524 | return 0; | |
525 | ||
526 | if (desc->status & IRQ_NOREQUEST) | |
1da177e4 LT |
527 | return 0; |
528 | ||
cc8c3b78 | 529 | raw_spin_lock_irqsave(&desc->lock, flags); |
08678b08 | 530 | action = desc->action; |
1da177e4 | 531 | if (action) |
3cca53b0 | 532 | if (irqflags & action->flags & IRQF_SHARED) |
1da177e4 LT |
533 | action = NULL; |
534 | ||
cc8c3b78 TG |
535 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
536 | ||
1da177e4 LT |
537 | return !action; |
538 | } | |
539 | ||
6a6de9ef TG |
540 | void compat_irq_chip_set_default_handler(struct irq_desc *desc) |
541 | { | |
542 | /* | |
543 | * If the architecture still has not overriden | |
544 | * the flow handler then zap the default. This | |
545 | * should catch incorrect flow-type setting. | |
546 | */ | |
547 | if (desc->handle_irq == &handle_bad_irq) | |
548 | desc->handle_irq = NULL; | |
549 | } | |
550 | ||
0c5d1eb7 | 551 | int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
b2ba2c30 | 552 | unsigned long flags) |
82736f4d UKK |
553 | { |
554 | int ret; | |
6b8ff312 | 555 | struct irq_chip *chip = desc->irq_data.chip; |
82736f4d | 556 | |
b2ba2c30 | 557 | if (!chip || !chip->irq_set_type) { |
82736f4d UKK |
558 | /* |
559 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
560 | * flow-types? | |
561 | */ | |
3ff68a6a | 562 | pr_debug("No set_type function for IRQ %d (%s)\n", irq, |
82736f4d UKK |
563 | chip ? (chip->name ? : "unknown") : "unknown"); |
564 | return 0; | |
565 | } | |
566 | ||
f2b662da | 567 | /* caller masked out all except trigger mode flags */ |
b2ba2c30 | 568 | ret = chip->irq_set_type(&desc->irq_data, flags); |
82736f4d UKK |
569 | |
570 | if (ret) | |
b2ba2c30 TG |
571 | pr_err("setting trigger mode %lu for irq %u failed (%pF)\n", |
572 | flags, irq, chip->irq_set_type); | |
0c5d1eb7 | 573 | else { |
f2b662da DB |
574 | if (flags & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
575 | flags |= IRQ_LEVEL; | |
0c5d1eb7 | 576 | /* note that IRQF_TRIGGER_MASK == IRQ_TYPE_SENSE_MASK */ |
f2b662da DB |
577 | desc->status &= ~(IRQ_LEVEL | IRQ_TYPE_SENSE_MASK); |
578 | desc->status |= flags; | |
46732475 | 579 | |
6b8ff312 TG |
580 | if (chip != desc->irq_data.chip) |
581 | irq_chip_set_defaults(desc->irq_data.chip); | |
0c5d1eb7 | 582 | } |
82736f4d UKK |
583 | |
584 | return ret; | |
585 | } | |
586 | ||
b25c340c TG |
587 | /* |
588 | * Default primary interrupt handler for threaded interrupts. Is | |
589 | * assigned as primary handler when request_threaded_irq is called | |
590 | * with handler == NULL. Useful for oneshot interrupts. | |
591 | */ | |
592 | static irqreturn_t irq_default_primary_handler(int irq, void *dev_id) | |
593 | { | |
594 | return IRQ_WAKE_THREAD; | |
595 | } | |
596 | ||
399b5da2 TG |
597 | /* |
598 | * Primary handler for nested threaded interrupts. Should never be | |
599 | * called. | |
600 | */ | |
601 | static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id) | |
602 | { | |
603 | WARN(1, "Primary handler called for nested irq %d\n", irq); | |
604 | return IRQ_NONE; | |
605 | } | |
606 | ||
3aa551c9 TG |
607 | static int irq_wait_for_interrupt(struct irqaction *action) |
608 | { | |
609 | while (!kthread_should_stop()) { | |
610 | set_current_state(TASK_INTERRUPTIBLE); | |
f48fe81e TG |
611 | |
612 | if (test_and_clear_bit(IRQTF_RUNTHREAD, | |
613 | &action->thread_flags)) { | |
3aa551c9 TG |
614 | __set_current_state(TASK_RUNNING); |
615 | return 0; | |
f48fe81e TG |
616 | } |
617 | schedule(); | |
3aa551c9 TG |
618 | } |
619 | return -1; | |
620 | } | |
621 | ||
b25c340c TG |
622 | /* |
623 | * Oneshot interrupts keep the irq line masked until the threaded | |
624 | * handler finished. unmask if the interrupt has not been disabled and | |
625 | * is marked MASKED. | |
626 | */ | |
627 | static void irq_finalize_oneshot(unsigned int irq, struct irq_desc *desc) | |
628 | { | |
0b1adaa0 | 629 | again: |
3876ec9e | 630 | chip_bus_lock(desc); |
239007b8 | 631 | raw_spin_lock_irq(&desc->lock); |
0b1adaa0 TG |
632 | |
633 | /* | |
634 | * Implausible though it may be we need to protect us against | |
635 | * the following scenario: | |
636 | * | |
637 | * The thread is faster done than the hard interrupt handler | |
638 | * on the other CPU. If we unmask the irq line then the | |
639 | * interrupt can come in again and masks the line, leaves due | |
009b4c3b | 640 | * to IRQS_INPROGRESS and the irq line is masked forever. |
0b1adaa0 | 641 | */ |
009b4c3b | 642 | if (unlikely(desc->istate & IRQS_INPROGRESS)) { |
0b1adaa0 | 643 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 644 | chip_bus_sync_unlock(desc); |
0b1adaa0 TG |
645 | cpu_relax(); |
646 | goto again; | |
647 | } | |
648 | ||
6e40262e TG |
649 | if (!(desc->istate & IRQS_DISABLED) && (desc->istate & IRQS_MASKED)) { |
650 | irq_compat_clr_masked(desc); | |
651 | desc->istate &= ~IRQS_MASKED; | |
0eda58b7 | 652 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
b25c340c | 653 | } |
239007b8 | 654 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 655 | chip_bus_sync_unlock(desc); |
b25c340c TG |
656 | } |
657 | ||
61f38261 | 658 | #ifdef CONFIG_SMP |
591d2fb0 TG |
659 | /* |
660 | * Check whether we need to change the affinity of the interrupt thread. | |
661 | */ | |
662 | static void | |
663 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) | |
664 | { | |
665 | cpumask_var_t mask; | |
666 | ||
667 | if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags)) | |
668 | return; | |
669 | ||
670 | /* | |
671 | * In case we are out of memory we set IRQTF_AFFINITY again and | |
672 | * try again next time | |
673 | */ | |
674 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { | |
675 | set_bit(IRQTF_AFFINITY, &action->thread_flags); | |
676 | return; | |
677 | } | |
678 | ||
239007b8 | 679 | raw_spin_lock_irq(&desc->lock); |
6b8ff312 | 680 | cpumask_copy(mask, desc->irq_data.affinity); |
239007b8 | 681 | raw_spin_unlock_irq(&desc->lock); |
591d2fb0 TG |
682 | |
683 | set_cpus_allowed_ptr(current, mask); | |
684 | free_cpumask_var(mask); | |
685 | } | |
61f38261 BP |
686 | #else |
687 | static inline void | |
688 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { } | |
689 | #endif | |
591d2fb0 | 690 | |
3aa551c9 TG |
691 | /* |
692 | * Interrupt handler thread | |
693 | */ | |
694 | static int irq_thread(void *data) | |
695 | { | |
c9b5f501 | 696 | static const struct sched_param param = { |
fe7de49f KM |
697 | .sched_priority = MAX_USER_RT_PRIO/2, |
698 | }; | |
3aa551c9 TG |
699 | struct irqaction *action = data; |
700 | struct irq_desc *desc = irq_to_desc(action->irq); | |
3d67baec | 701 | int wake, oneshot = desc->istate & IRQS_ONESHOT; |
3aa551c9 TG |
702 | |
703 | sched_setscheduler(current, SCHED_FIFO, ¶m); | |
704 | current->irqaction = action; | |
705 | ||
706 | while (!irq_wait_for_interrupt(action)) { | |
707 | ||
591d2fb0 TG |
708 | irq_thread_check_affinity(desc, action); |
709 | ||
3aa551c9 TG |
710 | atomic_inc(&desc->threads_active); |
711 | ||
239007b8 | 712 | raw_spin_lock_irq(&desc->lock); |
c1594b77 | 713 | if (unlikely(desc->istate & IRQS_DISABLED)) { |
3aa551c9 TG |
714 | /* |
715 | * CHECKME: We might need a dedicated | |
716 | * IRQ_THREAD_PENDING flag here, which | |
717 | * retriggers the thread in check_irq_resend() | |
2a0d6fb3 | 718 | * but AFAICT IRQS_PENDING should be fine as it |
3aa551c9 TG |
719 | * retriggers the interrupt itself --- tglx |
720 | */ | |
2a0d6fb3 TG |
721 | irq_compat_set_pending(desc); |
722 | desc->istate |= IRQS_PENDING; | |
239007b8 | 723 | raw_spin_unlock_irq(&desc->lock); |
3aa551c9 | 724 | } else { |
239007b8 | 725 | raw_spin_unlock_irq(&desc->lock); |
3aa551c9 TG |
726 | |
727 | action->thread_fn(action->irq, action->dev_id); | |
b25c340c TG |
728 | |
729 | if (oneshot) | |
730 | irq_finalize_oneshot(action->irq, desc); | |
3aa551c9 TG |
731 | } |
732 | ||
733 | wake = atomic_dec_and_test(&desc->threads_active); | |
734 | ||
735 | if (wake && waitqueue_active(&desc->wait_for_threads)) | |
736 | wake_up(&desc->wait_for_threads); | |
737 | } | |
738 | ||
739 | /* | |
740 | * Clear irqaction. Otherwise exit_irq_thread() would make | |
741 | * fuzz about an active irq thread going into nirvana. | |
742 | */ | |
743 | current->irqaction = NULL; | |
744 | return 0; | |
745 | } | |
746 | ||
747 | /* | |
748 | * Called from do_exit() | |
749 | */ | |
750 | void exit_irq_thread(void) | |
751 | { | |
752 | struct task_struct *tsk = current; | |
753 | ||
754 | if (!tsk->irqaction) | |
755 | return; | |
756 | ||
757 | printk(KERN_ERR | |
758 | "exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n", | |
759 | tsk->comm ? tsk->comm : "", tsk->pid, tsk->irqaction->irq); | |
760 | ||
761 | /* | |
762 | * Set the THREAD DIED flag to prevent further wakeups of the | |
763 | * soon to be gone threaded handler. | |
764 | */ | |
765 | set_bit(IRQTF_DIED, &tsk->irqaction->flags); | |
766 | } | |
767 | ||
1da177e4 LT |
768 | /* |
769 | * Internal function to register an irqaction - typically used to | |
770 | * allocate special interrupts that are part of the architecture. | |
771 | */ | |
d3c60047 | 772 | static int |
327ec569 | 773 | __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) |
1da177e4 | 774 | { |
f17c7545 | 775 | struct irqaction *old, **old_ptr; |
8b126b77 | 776 | const char *old_name = NULL; |
1da177e4 | 777 | unsigned long flags; |
3b8249e7 TG |
778 | int ret, nested, shared = 0; |
779 | cpumask_var_t mask; | |
1da177e4 | 780 | |
7d94f7ca | 781 | if (!desc) |
c2b5a251 MW |
782 | return -EINVAL; |
783 | ||
6b8ff312 | 784 | if (desc->irq_data.chip == &no_irq_chip) |
1da177e4 LT |
785 | return -ENOSYS; |
786 | /* | |
787 | * Some drivers like serial.c use request_irq() heavily, | |
788 | * so we have to be careful not to interfere with a | |
789 | * running system. | |
790 | */ | |
3cca53b0 | 791 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
792 | /* |
793 | * This function might sleep, we want to call it first, | |
794 | * outside of the atomic block. | |
795 | * Yes, this might clear the entropy pool if the wrong | |
796 | * driver is attempted to be loaded, without actually | |
797 | * installing a new handler, but is this really a problem, | |
798 | * only the sysadmin is able to do this. | |
799 | */ | |
800 | rand_initialize_irq(irq); | |
801 | } | |
802 | ||
b25c340c TG |
803 | /* Oneshot interrupts are not allowed with shared */ |
804 | if ((new->flags & IRQF_ONESHOT) && (new->flags & IRQF_SHARED)) | |
805 | return -EINVAL; | |
806 | ||
3aa551c9 | 807 | /* |
399b5da2 TG |
808 | * Check whether the interrupt nests into another interrupt |
809 | * thread. | |
810 | */ | |
811 | nested = desc->status & IRQ_NESTED_THREAD; | |
812 | if (nested) { | |
813 | if (!new->thread_fn) | |
814 | return -EINVAL; | |
815 | /* | |
816 | * Replace the primary handler which was provided from | |
817 | * the driver for non nested interrupt handling by the | |
818 | * dummy function which warns when called. | |
819 | */ | |
820 | new->handler = irq_nested_primary_handler; | |
821 | } | |
822 | ||
3aa551c9 | 823 | /* |
399b5da2 TG |
824 | * Create a handler thread when a thread function is supplied |
825 | * and the interrupt does not nest into another interrupt | |
826 | * thread. | |
3aa551c9 | 827 | */ |
399b5da2 | 828 | if (new->thread_fn && !nested) { |
3aa551c9 TG |
829 | struct task_struct *t; |
830 | ||
831 | t = kthread_create(irq_thread, new, "irq/%d-%s", irq, | |
832 | new->name); | |
833 | if (IS_ERR(t)) | |
834 | return PTR_ERR(t); | |
835 | /* | |
836 | * We keep the reference to the task struct even if | |
837 | * the thread dies to avoid that the interrupt code | |
838 | * references an already freed task_struct. | |
839 | */ | |
840 | get_task_struct(t); | |
841 | new->thread = t; | |
3aa551c9 TG |
842 | } |
843 | ||
3b8249e7 TG |
844 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { |
845 | ret = -ENOMEM; | |
846 | goto out_thread; | |
847 | } | |
848 | ||
1da177e4 LT |
849 | /* |
850 | * The following block of code has to be executed atomically | |
851 | */ | |
239007b8 | 852 | raw_spin_lock_irqsave(&desc->lock, flags); |
f17c7545 IM |
853 | old_ptr = &desc->action; |
854 | old = *old_ptr; | |
06fcb0c6 | 855 | if (old) { |
e76de9f8 TG |
856 | /* |
857 | * Can't share interrupts unless both agree to and are | |
858 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 859 | * fields must have IRQF_SHARED set and the bits which |
e76de9f8 TG |
860 | * set the trigger type must match. |
861 | */ | |
3cca53b0 | 862 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
8b126b77 AM |
863 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) { |
864 | old_name = old->name; | |
f5163427 | 865 | goto mismatch; |
8b126b77 | 866 | } |
f5163427 | 867 | |
f5163427 | 868 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
869 | if ((old->flags & IRQF_PERCPU) != |
870 | (new->flags & IRQF_PERCPU)) | |
f5163427 | 871 | goto mismatch; |
1da177e4 LT |
872 | |
873 | /* add new interrupt at end of irq queue */ | |
874 | do { | |
f17c7545 IM |
875 | old_ptr = &old->next; |
876 | old = *old_ptr; | |
1da177e4 LT |
877 | } while (old); |
878 | shared = 1; | |
879 | } | |
880 | ||
1da177e4 | 881 | if (!shared) { |
6b8ff312 | 882 | irq_chip_set_defaults(desc->irq_data.chip); |
e76de9f8 | 883 | |
3aa551c9 TG |
884 | init_waitqueue_head(&desc->wait_for_threads); |
885 | ||
e76de9f8 | 886 | /* Setup the type (level, edge polarity) if configured: */ |
3cca53b0 | 887 | if (new->flags & IRQF_TRIGGER_MASK) { |
f2b662da DB |
888 | ret = __irq_set_trigger(desc, irq, |
889 | new->flags & IRQF_TRIGGER_MASK); | |
82736f4d | 890 | |
3aa551c9 | 891 | if (ret) |
3b8249e7 | 892 | goto out_mask; |
e76de9f8 TG |
893 | } else |
894 | compat_irq_chip_set_default_handler(desc); | |
6a6de9ef | 895 | |
009b4c3b | 896 | desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \ |
163ef309 TG |
897 | IRQS_INPROGRESS | IRQS_ONESHOT | \ |
898 | IRQS_WAITING); | |
94d39e1f | 899 | |
a005677b TG |
900 | if (new->flags & IRQF_PERCPU) { |
901 | irqd_set(&desc->irq_data, IRQD_PER_CPU); | |
902 | irq_settings_set_per_cpu(desc); | |
903 | } | |
6a58fb3b | 904 | |
b25c340c | 905 | if (new->flags & IRQF_ONESHOT) |
3d67baec | 906 | desc->istate |= IRQS_ONESHOT; |
b25c340c | 907 | |
46999238 TG |
908 | if (!(desc->status & IRQ_NOAUTOEN)) |
909 | irq_startup(desc); | |
910 | else | |
e76de9f8 TG |
911 | /* Undo nested disables: */ |
912 | desc->depth = 1; | |
18404756 | 913 | |
612e3684 | 914 | /* Exclude IRQ from balancing if requested */ |
a005677b TG |
915 | if (new->flags & IRQF_NOBALANCING) { |
916 | irq_settings_set_no_balancing(desc); | |
917 | irqd_set(&desc->irq_data, IRQD_NO_BALANCING); | |
918 | } | |
612e3684 | 919 | |
18404756 | 920 | /* Set default affinity mask once everything is setup */ |
3b8249e7 | 921 | setup_affinity(irq, desc, mask); |
0c5d1eb7 DB |
922 | |
923 | } else if ((new->flags & IRQF_TRIGGER_MASK) | |
924 | && (new->flags & IRQF_TRIGGER_MASK) | |
925 | != (desc->status & IRQ_TYPE_SENSE_MASK)) { | |
926 | /* hope the handler works with the actual trigger mode... */ | |
927 | pr_warning("IRQ %d uses trigger mode %d; requested %d\n", | |
928 | irq, (int)(desc->status & IRQ_TYPE_SENSE_MASK), | |
929 | (int)(new->flags & IRQF_TRIGGER_MASK)); | |
1da177e4 | 930 | } |
82736f4d | 931 | |
69ab8494 | 932 | new->irq = irq; |
f17c7545 | 933 | *old_ptr = new; |
82736f4d | 934 | |
8528b0f1 LT |
935 | /* Reset broken irq detection when installing new handler */ |
936 | desc->irq_count = 0; | |
937 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
938 | |
939 | /* | |
940 | * Check whether we disabled the irq via the spurious handler | |
941 | * before. Reenable it and give it another chance. | |
942 | */ | |
7acdd53e TG |
943 | if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) { |
944 | desc->istate &= ~IRQS_SPURIOUS_DISABLED; | |
0a0c5168 | 945 | __enable_irq(desc, irq, false); |
1adb0850 TG |
946 | } |
947 | ||
239007b8 | 948 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 949 | |
69ab8494 TG |
950 | /* |
951 | * Strictly no need to wake it up, but hung_task complains | |
952 | * when no hard interrupt wakes the thread up. | |
953 | */ | |
954 | if (new->thread) | |
955 | wake_up_process(new->thread); | |
956 | ||
2c6927a3 | 957 | register_irq_proc(irq, desc); |
1da177e4 LT |
958 | new->dir = NULL; |
959 | register_handler_proc(irq, new); | |
960 | ||
961 | return 0; | |
f5163427 DS |
962 | |
963 | mismatch: | |
3f050447 | 964 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 965 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 966 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
967 | if (old_name) |
968 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
969 | dump_stack(); |
970 | } | |
3f050447 | 971 | #endif |
3aa551c9 TG |
972 | ret = -EBUSY; |
973 | ||
3b8249e7 TG |
974 | out_mask: |
975 | free_cpumask_var(mask); | |
976 | ||
3aa551c9 | 977 | out_thread: |
239007b8 | 978 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3aa551c9 TG |
979 | if (new->thread) { |
980 | struct task_struct *t = new->thread; | |
981 | ||
982 | new->thread = NULL; | |
983 | if (likely(!test_bit(IRQTF_DIED, &new->thread_flags))) | |
984 | kthread_stop(t); | |
985 | put_task_struct(t); | |
986 | } | |
987 | return ret; | |
1da177e4 LT |
988 | } |
989 | ||
d3c60047 TG |
990 | /** |
991 | * setup_irq - setup an interrupt | |
992 | * @irq: Interrupt line to setup | |
993 | * @act: irqaction for the interrupt | |
994 | * | |
995 | * Used to statically setup interrupts in the early boot process. | |
996 | */ | |
997 | int setup_irq(unsigned int irq, struct irqaction *act) | |
998 | { | |
986c011d | 999 | int retval; |
d3c60047 TG |
1000 | struct irq_desc *desc = irq_to_desc(irq); |
1001 | ||
986c011d DD |
1002 | chip_bus_lock(desc); |
1003 | retval = __setup_irq(irq, desc, act); | |
1004 | chip_bus_sync_unlock(desc); | |
1005 | ||
1006 | return retval; | |
d3c60047 | 1007 | } |
eb53b4e8 | 1008 | EXPORT_SYMBOL_GPL(setup_irq); |
d3c60047 | 1009 | |
cbf94f06 MD |
1010 | /* |
1011 | * Internal function to unregister an irqaction - used to free | |
1012 | * regular and special interrupts that are part of the architecture. | |
1da177e4 | 1013 | */ |
cbf94f06 | 1014 | static struct irqaction *__free_irq(unsigned int irq, void *dev_id) |
1da177e4 | 1015 | { |
d3c60047 | 1016 | struct irq_desc *desc = irq_to_desc(irq); |
f17c7545 | 1017 | struct irqaction *action, **action_ptr; |
1da177e4 LT |
1018 | unsigned long flags; |
1019 | ||
ae88a23b | 1020 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); |
7d94f7ca | 1021 | |
7d94f7ca | 1022 | if (!desc) |
f21cfb25 | 1023 | return NULL; |
1da177e4 | 1024 | |
239007b8 | 1025 | raw_spin_lock_irqsave(&desc->lock, flags); |
ae88a23b IM |
1026 | |
1027 | /* | |
1028 | * There can be multiple actions per IRQ descriptor, find the right | |
1029 | * one based on the dev_id: | |
1030 | */ | |
f17c7545 | 1031 | action_ptr = &desc->action; |
1da177e4 | 1032 | for (;;) { |
f17c7545 | 1033 | action = *action_ptr; |
1da177e4 | 1034 | |
ae88a23b IM |
1035 | if (!action) { |
1036 | WARN(1, "Trying to free already-free IRQ %d\n", irq); | |
239007b8 | 1037 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 1038 | |
f21cfb25 | 1039 | return NULL; |
ae88a23b | 1040 | } |
1da177e4 | 1041 | |
8316e381 IM |
1042 | if (action->dev_id == dev_id) |
1043 | break; | |
f17c7545 | 1044 | action_ptr = &action->next; |
ae88a23b | 1045 | } |
dbce706e | 1046 | |
ae88a23b | 1047 | /* Found it - now remove it from the list of entries: */ |
f17c7545 | 1048 | *action_ptr = action->next; |
ae88a23b IM |
1049 | |
1050 | /* Currently used only by UML, might disappear one day: */ | |
b77d6adc | 1051 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
6b8ff312 TG |
1052 | if (desc->irq_data.chip->release) |
1053 | desc->irq_data.chip->release(irq, dev_id); | |
b77d6adc | 1054 | #endif |
dbce706e | 1055 | |
ae88a23b | 1056 | /* If this was the last handler, shut down the IRQ line: */ |
46999238 TG |
1057 | if (!desc->action) |
1058 | irq_shutdown(desc); | |
3aa551c9 | 1059 | |
e7a297b0 PWJ |
1060 | #ifdef CONFIG_SMP |
1061 | /* make sure affinity_hint is cleaned up */ | |
1062 | if (WARN_ON_ONCE(desc->affinity_hint)) | |
1063 | desc->affinity_hint = NULL; | |
1064 | #endif | |
1065 | ||
239007b8 | 1066 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
ae88a23b IM |
1067 | |
1068 | unregister_handler_proc(irq, action); | |
1069 | ||
1070 | /* Make sure it's not being used on another CPU: */ | |
1071 | synchronize_irq(irq); | |
1da177e4 | 1072 | |
70edcd77 | 1073 | #ifdef CONFIG_DEBUG_SHIRQ |
ae88a23b IM |
1074 | /* |
1075 | * It's a shared IRQ -- the driver ought to be prepared for an IRQ | |
1076 | * event to happen even now it's being freed, so let's make sure that | |
1077 | * is so by doing an extra call to the handler .... | |
1078 | * | |
1079 | * ( We do this after actually deregistering it, to make sure that a | |
1080 | * 'real' IRQ doesn't run in * parallel with our fake. ) | |
1081 | */ | |
1082 | if (action->flags & IRQF_SHARED) { | |
1083 | local_irq_save(flags); | |
1084 | action->handler(irq, dev_id); | |
1085 | local_irq_restore(flags); | |
1da177e4 | 1086 | } |
ae88a23b | 1087 | #endif |
2d860ad7 LT |
1088 | |
1089 | if (action->thread) { | |
1090 | if (!test_bit(IRQTF_DIED, &action->thread_flags)) | |
1091 | kthread_stop(action->thread); | |
1092 | put_task_struct(action->thread); | |
1093 | } | |
1094 | ||
f21cfb25 MD |
1095 | return action; |
1096 | } | |
1097 | ||
cbf94f06 MD |
1098 | /** |
1099 | * remove_irq - free an interrupt | |
1100 | * @irq: Interrupt line to free | |
1101 | * @act: irqaction for the interrupt | |
1102 | * | |
1103 | * Used to remove interrupts statically setup by the early boot process. | |
1104 | */ | |
1105 | void remove_irq(unsigned int irq, struct irqaction *act) | |
1106 | { | |
1107 | __free_irq(irq, act->dev_id); | |
1108 | } | |
eb53b4e8 | 1109 | EXPORT_SYMBOL_GPL(remove_irq); |
cbf94f06 | 1110 | |
f21cfb25 MD |
1111 | /** |
1112 | * free_irq - free an interrupt allocated with request_irq | |
1113 | * @irq: Interrupt line to free | |
1114 | * @dev_id: Device identity to free | |
1115 | * | |
1116 | * Remove an interrupt handler. The handler is removed and if the | |
1117 | * interrupt line is no longer in use by any driver it is disabled. | |
1118 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
1119 | * on the card it drives before calling this function. The function | |
1120 | * does not return until any executing interrupts for this IRQ | |
1121 | * have completed. | |
1122 | * | |
1123 | * This function must not be called from interrupt context. | |
1124 | */ | |
1125 | void free_irq(unsigned int irq, void *dev_id) | |
1126 | { | |
70aedd24 TG |
1127 | struct irq_desc *desc = irq_to_desc(irq); |
1128 | ||
1129 | if (!desc) | |
1130 | return; | |
1131 | ||
cd7eab44 BH |
1132 | #ifdef CONFIG_SMP |
1133 | if (WARN_ON(desc->affinity_notify)) | |
1134 | desc->affinity_notify = NULL; | |
1135 | #endif | |
1136 | ||
3876ec9e | 1137 | chip_bus_lock(desc); |
cbf94f06 | 1138 | kfree(__free_irq(irq, dev_id)); |
3876ec9e | 1139 | chip_bus_sync_unlock(desc); |
1da177e4 | 1140 | } |
1da177e4 LT |
1141 | EXPORT_SYMBOL(free_irq); |
1142 | ||
1143 | /** | |
3aa551c9 | 1144 | * request_threaded_irq - allocate an interrupt line |
1da177e4 | 1145 | * @irq: Interrupt line to allocate |
3aa551c9 TG |
1146 | * @handler: Function to be called when the IRQ occurs. |
1147 | * Primary handler for threaded interrupts | |
b25c340c TG |
1148 | * If NULL and thread_fn != NULL the default |
1149 | * primary handler is installed | |
f48fe81e TG |
1150 | * @thread_fn: Function called from the irq handler thread |
1151 | * If NULL, no irq thread is created | |
1da177e4 LT |
1152 | * @irqflags: Interrupt type flags |
1153 | * @devname: An ascii name for the claiming device | |
1154 | * @dev_id: A cookie passed back to the handler function | |
1155 | * | |
1156 | * This call allocates interrupt resources and enables the | |
1157 | * interrupt line and IRQ handling. From the point this | |
1158 | * call is made your handler function may be invoked. Since | |
1159 | * your handler function must clear any interrupt the board | |
1160 | * raises, you must take care both to initialise your hardware | |
1161 | * and to set up the interrupt handler in the right order. | |
1162 | * | |
3aa551c9 TG |
1163 | * If you want to set up a threaded irq handler for your device |
1164 | * then you need to supply @handler and @thread_fn. @handler ist | |
1165 | * still called in hard interrupt context and has to check | |
1166 | * whether the interrupt originates from the device. If yes it | |
1167 | * needs to disable the interrupt on the device and return | |
39a2eddb | 1168 | * IRQ_WAKE_THREAD which will wake up the handler thread and run |
3aa551c9 TG |
1169 | * @thread_fn. This split handler design is necessary to support |
1170 | * shared interrupts. | |
1171 | * | |
1da177e4 LT |
1172 | * Dev_id must be globally unique. Normally the address of the |
1173 | * device data structure is used as the cookie. Since the handler | |
1174 | * receives this value it makes sense to use it. | |
1175 | * | |
1176 | * If your interrupt is shared you must pass a non NULL dev_id | |
1177 | * as this is required when freeing the interrupt. | |
1178 | * | |
1179 | * Flags: | |
1180 | * | |
3cca53b0 | 1181 | * IRQF_SHARED Interrupt is shared |
3cca53b0 | 1182 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy |
0c5d1eb7 | 1183 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
1184 | * |
1185 | */ | |
3aa551c9 TG |
1186 | int request_threaded_irq(unsigned int irq, irq_handler_t handler, |
1187 | irq_handler_t thread_fn, unsigned long irqflags, | |
1188 | const char *devname, void *dev_id) | |
1da177e4 | 1189 | { |
06fcb0c6 | 1190 | struct irqaction *action; |
08678b08 | 1191 | struct irq_desc *desc; |
d3c60047 | 1192 | int retval; |
1da177e4 LT |
1193 | |
1194 | /* | |
1195 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
1196 | * otherwise we'll have trouble later trying to figure out | |
1197 | * which interrupt is which (messes up the interrupt freeing | |
1198 | * logic etc). | |
1199 | */ | |
3cca53b0 | 1200 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 | 1201 | return -EINVAL; |
7d94f7ca | 1202 | |
cb5bc832 | 1203 | desc = irq_to_desc(irq); |
7d94f7ca | 1204 | if (!desc) |
1da177e4 | 1205 | return -EINVAL; |
7d94f7ca | 1206 | |
08678b08 | 1207 | if (desc->status & IRQ_NOREQUEST) |
6550c775 | 1208 | return -EINVAL; |
b25c340c TG |
1209 | |
1210 | if (!handler) { | |
1211 | if (!thread_fn) | |
1212 | return -EINVAL; | |
1213 | handler = irq_default_primary_handler; | |
1214 | } | |
1da177e4 | 1215 | |
45535732 | 1216 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
1da177e4 LT |
1217 | if (!action) |
1218 | return -ENOMEM; | |
1219 | ||
1220 | action->handler = handler; | |
3aa551c9 | 1221 | action->thread_fn = thread_fn; |
1da177e4 | 1222 | action->flags = irqflags; |
1da177e4 | 1223 | action->name = devname; |
1da177e4 LT |
1224 | action->dev_id = dev_id; |
1225 | ||
3876ec9e | 1226 | chip_bus_lock(desc); |
d3c60047 | 1227 | retval = __setup_irq(irq, desc, action); |
3876ec9e | 1228 | chip_bus_sync_unlock(desc); |
70aedd24 | 1229 | |
377bf1e4 AV |
1230 | if (retval) |
1231 | kfree(action); | |
1232 | ||
6d83f94d | 1233 | #ifdef CONFIG_DEBUG_SHIRQ_FIXME |
6ce51c43 | 1234 | if (!retval && (irqflags & IRQF_SHARED)) { |
a304e1b8 DW |
1235 | /* |
1236 | * It's a shared IRQ -- the driver ought to be prepared for it | |
1237 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
1238 | * We disable the irq to make sure that a 'real' IRQ doesn't |
1239 | * run in parallel with our fake. | |
a304e1b8 | 1240 | */ |
59845b1f | 1241 | unsigned long flags; |
a304e1b8 | 1242 | |
377bf1e4 | 1243 | disable_irq(irq); |
59845b1f | 1244 | local_irq_save(flags); |
377bf1e4 | 1245 | |
59845b1f | 1246 | handler(irq, dev_id); |
377bf1e4 | 1247 | |
59845b1f | 1248 | local_irq_restore(flags); |
377bf1e4 | 1249 | enable_irq(irq); |
a304e1b8 DW |
1250 | } |
1251 | #endif | |
1da177e4 LT |
1252 | return retval; |
1253 | } | |
3aa551c9 | 1254 | EXPORT_SYMBOL(request_threaded_irq); |
ae731f8d MZ |
1255 | |
1256 | /** | |
1257 | * request_any_context_irq - allocate an interrupt line | |
1258 | * @irq: Interrupt line to allocate | |
1259 | * @handler: Function to be called when the IRQ occurs. | |
1260 | * Threaded handler for threaded interrupts. | |
1261 | * @flags: Interrupt type flags | |
1262 | * @name: An ascii name for the claiming device | |
1263 | * @dev_id: A cookie passed back to the handler function | |
1264 | * | |
1265 | * This call allocates interrupt resources and enables the | |
1266 | * interrupt line and IRQ handling. It selects either a | |
1267 | * hardirq or threaded handling method depending on the | |
1268 | * context. | |
1269 | * | |
1270 | * On failure, it returns a negative value. On success, | |
1271 | * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED. | |
1272 | */ | |
1273 | int request_any_context_irq(unsigned int irq, irq_handler_t handler, | |
1274 | unsigned long flags, const char *name, void *dev_id) | |
1275 | { | |
1276 | struct irq_desc *desc = irq_to_desc(irq); | |
1277 | int ret; | |
1278 | ||
1279 | if (!desc) | |
1280 | return -EINVAL; | |
1281 | ||
1282 | if (desc->status & IRQ_NESTED_THREAD) { | |
1283 | ret = request_threaded_irq(irq, NULL, handler, | |
1284 | flags, name, dev_id); | |
1285 | return !ret ? IRQC_IS_NESTED : ret; | |
1286 | } | |
1287 | ||
1288 | ret = request_irq(irq, handler, flags, name, dev_id); | |
1289 | return !ret ? IRQC_IS_HARDIRQ : ret; | |
1290 | } | |
1291 | EXPORT_SYMBOL_GPL(request_any_context_irq); |