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genirq: Provide and use __irq_can_set_affinity()
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CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
4d1d61a6 20#include <linux/task_work.h>
1da177e4
LT
21
22#include "internals.h"
23
8d32a307
TG
24#ifdef CONFIG_IRQ_FORCED_THREADING
25__read_mostly bool force_irqthreads;
26
27static int __init setup_forced_irqthreads(char *arg)
28{
29 force_irqthreads = true;
30 return 0;
31}
32early_param("threadirqs", setup_forced_irqthreads);
33#endif
34
18258f72 35static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 36{
32f4125e 37 bool inprogress;
1da177e4 38
a98ce5c6
HX
39 do {
40 unsigned long flags;
41
42 /*
43 * Wait until we're out of the critical section. This might
44 * give the wrong answer due to the lack of memory barriers.
45 */
32f4125e 46 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
47 cpu_relax();
48
49 /* Ok, that indicated we're done: double-check carefully. */
239007b8 50 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 51 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 52 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
53
54 /* Oops, that failed? */
32f4125e 55 } while (inprogress);
18258f72
TG
56}
57
58/**
59 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
60 * @irq: interrupt number to wait for
61 *
62 * This function waits for any pending hard IRQ handlers for this
63 * interrupt to complete before returning. If you use this
64 * function while holding a resource the IRQ handler may need you
65 * will deadlock. It does not take associated threaded handlers
66 * into account.
67 *
68 * Do not use this for shutdown scenarios where you must be sure
69 * that all parts (hardirq and threaded handler) have completed.
70 *
02cea395
PZ
71 * Returns: false if a threaded handler is active.
72 *
18258f72
TG
73 * This function may be called - with care - from IRQ context.
74 */
02cea395 75bool synchronize_hardirq(unsigned int irq)
18258f72
TG
76{
77 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 78
02cea395 79 if (desc) {
18258f72 80 __synchronize_hardirq(desc);
02cea395
PZ
81 return !atomic_read(&desc->threads_active);
82 }
83
84 return true;
18258f72
TG
85}
86EXPORT_SYMBOL(synchronize_hardirq);
87
88/**
89 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
90 * @irq: interrupt number to wait for
91 *
92 * This function waits for any pending IRQ handlers for this interrupt
93 * to complete before returning. If you use this function while
94 * holding a resource the IRQ handler may need you will deadlock.
95 *
96 * This function may be called - with care - from IRQ context.
97 */
98void synchronize_irq(unsigned int irq)
99{
100 struct irq_desc *desc = irq_to_desc(irq);
101
102 if (desc) {
103 __synchronize_hardirq(desc);
104 /*
105 * We made sure that no hardirq handler is
106 * running. Now verify that no threaded handlers are
107 * active.
108 */
109 wait_event(desc->wait_for_threads,
110 !atomic_read(&desc->threads_active));
111 }
1da177e4 112}
1da177e4
LT
113EXPORT_SYMBOL(synchronize_irq);
114
3aa551c9
TG
115#ifdef CONFIG_SMP
116cpumask_var_t irq_default_affinity;
117
e019c249
JL
118static int __irq_can_set_affinity(struct irq_desc *desc)
119{
120 if (!desc || !irqd_can_balance(&desc->irq_data) ||
121 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
122 return 0;
123 return 1;
124}
125
771ee3b0
TG
126/**
127 * irq_can_set_affinity - Check if the affinity of a given irq can be set
128 * @irq: Interrupt to check
129 *
130 */
131int irq_can_set_affinity(unsigned int irq)
132{
e019c249 133 return __irq_can_set_affinity(irq_to_desc(irq));
771ee3b0
TG
134}
135
591d2fb0
TG
136/**
137 * irq_set_thread_affinity - Notify irq threads to adjust affinity
138 * @desc: irq descriptor which has affitnity changed
139 *
140 * We just set IRQTF_AFFINITY and delegate the affinity setting
141 * to the interrupt thread itself. We can not call
142 * set_cpus_allowed_ptr() here as we hold desc->lock and this
143 * code can be called from hard interrupt context.
144 */
145void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9
TG
146{
147 struct irqaction *action = desc->action;
148
149 while (action) {
150 if (action->thread)
591d2fb0 151 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
152 action = action->next;
153 }
154}
155
1fa46f1f 156#ifdef CONFIG_GENERIC_PENDING_IRQ
0ef5ca1e 157static inline bool irq_can_move_pcntxt(struct irq_data *data)
1fa46f1f 158{
0ef5ca1e 159 return irqd_can_move_in_process_context(data);
1fa46f1f 160}
0ef5ca1e 161static inline bool irq_move_pending(struct irq_data *data)
1fa46f1f 162{
0ef5ca1e 163 return irqd_is_setaffinity_pending(data);
1fa46f1f
TG
164}
165static inline void
166irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
167{
168 cpumask_copy(desc->pending_mask, mask);
169}
170static inline void
171irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
172{
173 cpumask_copy(mask, desc->pending_mask);
174}
175#else
0ef5ca1e 176static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; }
cd22c0e4 177static inline bool irq_move_pending(struct irq_data *data) { return false; }
1fa46f1f
TG
178static inline void
179irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
180static inline void
181irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
182#endif
183
818b0f3b
JL
184int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
185 bool force)
186{
187 struct irq_desc *desc = irq_data_to_desc(data);
188 struct irq_chip *chip = irq_data_get_irq_chip(data);
189 int ret;
190
01f8fa4f 191 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
192 switch (ret) {
193 case IRQ_SET_MASK_OK:
2cb62547 194 case IRQ_SET_MASK_OK_DONE:
818b0f3b
JL
195 cpumask_copy(data->affinity, mask);
196 case IRQ_SET_MASK_OK_NOCOPY:
197 irq_set_thread_affinity(desc);
198 ret = 0;
199 }
200
201 return ret;
202}
203
01f8fa4f
TG
204int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
205 bool force)
771ee3b0 206{
c2d0c555
DD
207 struct irq_chip *chip = irq_data_get_irq_chip(data);
208 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 209 int ret = 0;
771ee3b0 210
c2d0c555 211 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
212 return -EINVAL;
213
0ef5ca1e 214 if (irq_can_move_pcntxt(data)) {
01f8fa4f 215 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 216 } else {
c2d0c555 217 irqd_set_move_pending(data);
1fa46f1f 218 irq_copy_pending(desc, mask);
57b150cc 219 }
1fa46f1f 220
cd7eab44
BH
221 if (desc->affinity_notify) {
222 kref_get(&desc->affinity_notify->kref);
223 schedule_work(&desc->affinity_notify->work);
224 }
c2d0c555
DD
225 irqd_set(data, IRQD_AFFINITY_SET);
226
227 return ret;
228}
229
01f8fa4f 230int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
231{
232 struct irq_desc *desc = irq_to_desc(irq);
233 unsigned long flags;
234 int ret;
235
236 if (!desc)
237 return -EINVAL;
238
239 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 240 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 241 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 242 return ret;
771ee3b0
TG
243}
244
e7a297b0
PWJ
245int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
246{
e7a297b0 247 unsigned long flags;
31d9d9b6 248 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
249
250 if (!desc)
251 return -EINVAL;
e7a297b0 252 desc->affinity_hint = m;
02725e74 253 irq_put_desc_unlock(desc, flags);
e2e64a93 254 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
255 if (m)
256 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
257 return 0;
258}
259EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
260
0a4377de
JL
261/**
262 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
263 * @irq: interrupt number to set affinity
264 * @vcpu_info: vCPU specific data
265 *
266 * This function uses the vCPU specific data to set the vCPU
267 * affinity for an irq. The vCPU specific data is passed from
268 * outside, such as KVM. One example code path is as below:
269 * KVM -> IOMMU -> irq_set_vcpu_affinity().
270 */
271int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
272{
273 unsigned long flags;
274 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
275 struct irq_data *data;
276 struct irq_chip *chip;
277 int ret = -ENOSYS;
278
279 if (!desc)
280 return -EINVAL;
281
282 data = irq_desc_get_irq_data(desc);
283 chip = irq_data_get_irq_chip(data);
284 if (chip && chip->irq_set_vcpu_affinity)
285 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
286 irq_put_desc_unlock(desc, flags);
287
288 return ret;
289}
290EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
291
cd7eab44
BH
292static void irq_affinity_notify(struct work_struct *work)
293{
294 struct irq_affinity_notify *notify =
295 container_of(work, struct irq_affinity_notify, work);
296 struct irq_desc *desc = irq_to_desc(notify->irq);
297 cpumask_var_t cpumask;
298 unsigned long flags;
299
1fa46f1f 300 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
301 goto out;
302
303 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 304 if (irq_move_pending(&desc->irq_data))
1fa46f1f 305 irq_get_pending(cpumask, desc);
cd7eab44 306 else
1fb0ef31 307 cpumask_copy(cpumask, desc->irq_data.affinity);
cd7eab44
BH
308 raw_spin_unlock_irqrestore(&desc->lock, flags);
309
310 notify->notify(notify, cpumask);
311
312 free_cpumask_var(cpumask);
313out:
314 kref_put(&notify->kref, notify->release);
315}
316
317/**
318 * irq_set_affinity_notifier - control notification of IRQ affinity changes
319 * @irq: Interrupt for which to enable/disable notification
320 * @notify: Context for notification, or %NULL to disable
321 * notification. Function pointers must be initialised;
322 * the other fields will be initialised by this function.
323 *
324 * Must be called in process context. Notification may only be enabled
325 * after the IRQ is allocated and must be disabled before the IRQ is
326 * freed using free_irq().
327 */
328int
329irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
330{
331 struct irq_desc *desc = irq_to_desc(irq);
332 struct irq_affinity_notify *old_notify;
333 unsigned long flags;
334
335 /* The release function is promised process context */
336 might_sleep();
337
338 if (!desc)
339 return -EINVAL;
340
341 /* Complete initialisation of *notify */
342 if (notify) {
343 notify->irq = irq;
344 kref_init(&notify->kref);
345 INIT_WORK(&notify->work, irq_affinity_notify);
346 }
347
348 raw_spin_lock_irqsave(&desc->lock, flags);
349 old_notify = desc->affinity_notify;
350 desc->affinity_notify = notify;
351 raw_spin_unlock_irqrestore(&desc->lock, flags);
352
353 if (old_notify)
354 kref_put(&old_notify->kref, old_notify->release);
355
356 return 0;
357}
358EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
359
18404756
MK
360#ifndef CONFIG_AUTO_IRQ_AFFINITY
361/*
362 * Generic version of the affinity autoselector.
363 */
3b8249e7
TG
364static int
365setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
18404756 366{
569bda8d 367 struct cpumask *set = irq_default_affinity;
6783011b 368 int node = irq_desc_get_node(desc);
569bda8d 369
b008207c 370 /* Excludes PER_CPU and NO_BALANCE interrupts */
e019c249 371 if (!__irq_can_set_affinity(desc))
18404756
MK
372 return 0;
373
f6d87f4b
TG
374 /*
375 * Preserve an userspace affinity setup, but make sure that
376 * one of the targets is online.
377 */
2bdd1055 378 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
569bda8d
TG
379 if (cpumask_intersects(desc->irq_data.affinity,
380 cpu_online_mask))
381 set = desc->irq_data.affinity;
0c6f8a8b 382 else
2bdd1055 383 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 384 }
18404756 385
3b8249e7 386 cpumask_and(mask, cpu_online_mask, set);
241fc640
PB
387 if (node != NUMA_NO_NODE) {
388 const struct cpumask *nodemask = cpumask_of_node(node);
389
390 /* make sure at least one of the cpus in nodemask is online */
391 if (cpumask_intersects(mask, nodemask))
392 cpumask_and(mask, mask, nodemask);
393 }
818b0f3b 394 irq_do_set_affinity(&desc->irq_data, mask, false);
18404756
MK
395 return 0;
396}
f6d87f4b 397#else
3b8249e7
TG
398static inline int
399setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask)
f6d87f4b
TG
400{
401 return irq_select_affinity(irq);
402}
18404756
MK
403#endif
404
f6d87f4b
TG
405/*
406 * Called when affinity is set via /proc/irq
407 */
3b8249e7 408int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
409{
410 struct irq_desc *desc = irq_to_desc(irq);
411 unsigned long flags;
412 int ret;
413
239007b8 414 raw_spin_lock_irqsave(&desc->lock, flags);
3b8249e7 415 ret = setup_affinity(irq, desc, mask);
239007b8 416 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
417 return ret;
418}
419
420#else
3b8249e7
TG
421static inline int
422setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
423{
424 return 0;
425}
1da177e4
LT
426#endif
427
79ff1cda 428void __disable_irq(struct irq_desc *desc)
0a0c5168 429{
3aae994f 430 if (!desc->depth++)
87923470 431 irq_disable(desc);
0a0c5168
RW
432}
433
02725e74
TG
434static int __disable_irq_nosync(unsigned int irq)
435{
436 unsigned long flags;
31d9d9b6 437 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
438
439 if (!desc)
440 return -EINVAL;
79ff1cda 441 __disable_irq(desc);
02725e74
TG
442 irq_put_desc_busunlock(desc, flags);
443 return 0;
444}
445
1da177e4
LT
446/**
447 * disable_irq_nosync - disable an irq without waiting
448 * @irq: Interrupt to disable
449 *
450 * Disable the selected interrupt line. Disables and Enables are
451 * nested.
452 * Unlike disable_irq(), this function does not ensure existing
453 * instances of the IRQ handler have completed before returning.
454 *
455 * This function may be called from IRQ context.
456 */
457void disable_irq_nosync(unsigned int irq)
458{
02725e74 459 __disable_irq_nosync(irq);
1da177e4 460}
1da177e4
LT
461EXPORT_SYMBOL(disable_irq_nosync);
462
463/**
464 * disable_irq - disable an irq and wait for completion
465 * @irq: Interrupt to disable
466 *
467 * Disable the selected interrupt line. Enables and Disables are
468 * nested.
469 * This function waits for any pending IRQ handlers for this interrupt
470 * to complete before returning. If you use this function while
471 * holding a resource the IRQ handler may need you will deadlock.
472 *
473 * This function may be called - with care - from IRQ context.
474 */
475void disable_irq(unsigned int irq)
476{
02725e74 477 if (!__disable_irq_nosync(irq))
1da177e4
LT
478 synchronize_irq(irq);
479}
1da177e4
LT
480EXPORT_SYMBOL(disable_irq);
481
02cea395
PZ
482/**
483 * disable_hardirq - disables an irq and waits for hardirq completion
484 * @irq: Interrupt to disable
485 *
486 * Disable the selected interrupt line. Enables and Disables are
487 * nested.
488 * This function waits for any pending hard IRQ handlers for this
489 * interrupt to complete before returning. If you use this function while
490 * holding a resource the hard IRQ handler may need you will deadlock.
491 *
492 * When used to optimistically disable an interrupt from atomic context
493 * the return value must be checked.
494 *
495 * Returns: false if a threaded handler is active.
496 *
497 * This function may be called - with care - from IRQ context.
498 */
499bool disable_hardirq(unsigned int irq)
500{
501 if (!__disable_irq_nosync(irq))
502 return synchronize_hardirq(irq);
503
504 return false;
505}
506EXPORT_SYMBOL_GPL(disable_hardirq);
507
79ff1cda 508void __enable_irq(struct irq_desc *desc)
1adb0850
TG
509{
510 switch (desc->depth) {
511 case 0:
0a0c5168 512 err_out:
79ff1cda
JL
513 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
514 irq_desc_get_irq(desc));
1adb0850
TG
515 break;
516 case 1: {
c531e836 517 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 518 goto err_out;
1adb0850 519 /* Prevent probing on this irq: */
1ccb4e61 520 irq_settings_set_noprobe(desc);
3aae994f 521 irq_enable(desc);
0798abeb 522 check_irq_resend(desc);
1adb0850
TG
523 /* fall-through */
524 }
525 default:
526 desc->depth--;
527 }
528}
529
1da177e4
LT
530/**
531 * enable_irq - enable handling of an irq
532 * @irq: Interrupt to enable
533 *
534 * Undoes the effect of one call to disable_irq(). If this
535 * matches the last disable, processing of interrupts on this
536 * IRQ line is re-enabled.
537 *
70aedd24 538 * This function may be called from IRQ context only when
6b8ff312 539 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
540 */
541void enable_irq(unsigned int irq)
542{
1da177e4 543 unsigned long flags;
31d9d9b6 544 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 545
7d94f7ca 546 if (!desc)
c2b5a251 547 return;
50f7c032
TG
548 if (WARN(!desc->irq_data.chip,
549 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 550 goto out;
2656c366 551
79ff1cda 552 __enable_irq(desc);
02725e74
TG
553out:
554 irq_put_desc_busunlock(desc, flags);
1da177e4 555}
1da177e4
LT
556EXPORT_SYMBOL(enable_irq);
557
0c5d1eb7 558static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 559{
08678b08 560 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
561 int ret = -ENXIO;
562
60f96b41
SS
563 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
564 return 0;
565
2f7e99bb
TG
566 if (desc->irq_data.chip->irq_set_wake)
567 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
568
569 return ret;
570}
571
ba9a2331 572/**
a0cd9ca2 573 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
574 * @irq: interrupt to control
575 * @on: enable/disable power management wakeup
576 *
15a647eb
DB
577 * Enable/disable power management wakeup mode, which is
578 * disabled by default. Enables and disables must match,
579 * just as they match for non-wakeup mode support.
580 *
581 * Wakeup mode lets this IRQ wake the system from sleep
582 * states like "suspend to RAM".
ba9a2331 583 */
a0cd9ca2 584int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 585{
ba9a2331 586 unsigned long flags;
31d9d9b6 587 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 588 int ret = 0;
ba9a2331 589
13863a66
JJ
590 if (!desc)
591 return -EINVAL;
592
15a647eb
DB
593 /* wakeup-capable irqs can be shared between drivers that
594 * don't need to have the same sleep mode behaviors.
595 */
15a647eb 596 if (on) {
2db87321
UKK
597 if (desc->wake_depth++ == 0) {
598 ret = set_irq_wake_real(irq, on);
599 if (ret)
600 desc->wake_depth = 0;
601 else
7f94226f 602 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 603 }
15a647eb
DB
604 } else {
605 if (desc->wake_depth == 0) {
7a2c4770 606 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
607 } else if (--desc->wake_depth == 0) {
608 ret = set_irq_wake_real(irq, on);
609 if (ret)
610 desc->wake_depth = 1;
611 else
7f94226f 612 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 613 }
15a647eb 614 }
02725e74 615 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
616 return ret;
617}
a0cd9ca2 618EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 619
1da177e4
LT
620/*
621 * Internal function that tells the architecture code whether a
622 * particular irq has been exclusively allocated or is available
623 * for driver use.
624 */
625int can_request_irq(unsigned int irq, unsigned long irqflags)
626{
cc8c3b78 627 unsigned long flags;
31d9d9b6 628 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 629 int canrequest = 0;
1da177e4 630
7d94f7ca
YL
631 if (!desc)
632 return 0;
633
02725e74 634 if (irq_settings_can_request(desc)) {
2779db8d
BH
635 if (!desc->action ||
636 irqflags & desc->action->flags & IRQF_SHARED)
637 canrequest = 1;
02725e74
TG
638 }
639 irq_put_desc_unlock(desc, flags);
640 return canrequest;
1da177e4
LT
641}
642
a1ff541a 643int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 644{
6b8ff312 645 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 646 int ret, unmask = 0;
82736f4d 647
b2ba2c30 648 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
649 /*
650 * IRQF_TRIGGER_* but the PIC does not support multiple
651 * flow-types?
652 */
a1ff541a
JL
653 pr_debug("No set_type function for IRQ %d (%s)\n",
654 irq_desc_get_irq(desc),
f5d89470 655 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
656 return 0;
657 }
658
876dbd4c 659 flags &= IRQ_TYPE_SENSE_MASK;
d4d5e089
TG
660
661 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 662 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 663 mask_irq(desc);
32f4125e 664 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
665 unmask = 1;
666 }
667
f2b662da 668 /* caller masked out all except trigger mode flags */
b2ba2c30 669 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 670
876dbd4c
TG
671 switch (ret) {
672 case IRQ_SET_MASK_OK:
2cb62547 673 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
674 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
675 irqd_set(&desc->irq_data, flags);
676
677 case IRQ_SET_MASK_OK_NOCOPY:
678 flags = irqd_get_trigger_type(&desc->irq_data);
679 irq_settings_set_trigger_mask(desc, flags);
680 irqd_clear(&desc->irq_data, IRQD_LEVEL);
681 irq_settings_clr_level(desc);
682 if (flags & IRQ_TYPE_LEVEL_MASK) {
683 irq_settings_set_level(desc);
684 irqd_set(&desc->irq_data, IRQD_LEVEL);
685 }
46732475 686
d4d5e089 687 ret = 0;
8fff39e0 688 break;
876dbd4c 689 default:
97fd75b7 690 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
a1ff541a 691 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 692 }
d4d5e089
TG
693 if (unmask)
694 unmask_irq(desc);
82736f4d
UKK
695 return ret;
696}
697
293a7a0a
TG
698#ifdef CONFIG_HARDIRQS_SW_RESEND
699int irq_set_parent(int irq, int parent_irq)
700{
701 unsigned long flags;
702 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
703
704 if (!desc)
705 return -EINVAL;
706
707 desc->parent_irq = parent_irq;
708
709 irq_put_desc_unlock(desc, flags);
710 return 0;
711}
712#endif
713
b25c340c
TG
714/*
715 * Default primary interrupt handler for threaded interrupts. Is
716 * assigned as primary handler when request_threaded_irq is called
717 * with handler == NULL. Useful for oneshot interrupts.
718 */
719static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
720{
721 return IRQ_WAKE_THREAD;
722}
723
399b5da2
TG
724/*
725 * Primary handler for nested threaded interrupts. Should never be
726 * called.
727 */
728static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
729{
730 WARN(1, "Primary handler called for nested irq %d\n", irq);
731 return IRQ_NONE;
732}
733
3aa551c9
TG
734static int irq_wait_for_interrupt(struct irqaction *action)
735{
550acb19
IY
736 set_current_state(TASK_INTERRUPTIBLE);
737
3aa551c9 738 while (!kthread_should_stop()) {
f48fe81e
TG
739
740 if (test_and_clear_bit(IRQTF_RUNTHREAD,
741 &action->thread_flags)) {
3aa551c9
TG
742 __set_current_state(TASK_RUNNING);
743 return 0;
f48fe81e
TG
744 }
745 schedule();
550acb19 746 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 747 }
550acb19 748 __set_current_state(TASK_RUNNING);
3aa551c9
TG
749 return -1;
750}
751
b25c340c
TG
752/*
753 * Oneshot interrupts keep the irq line masked until the threaded
754 * handler finished. unmask if the interrupt has not been disabled and
755 * is marked MASKED.
756 */
b5faba21 757static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 758 struct irqaction *action)
b25c340c 759{
b5faba21
TG
760 if (!(desc->istate & IRQS_ONESHOT))
761 return;
0b1adaa0 762again:
3876ec9e 763 chip_bus_lock(desc);
239007b8 764 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
765
766 /*
767 * Implausible though it may be we need to protect us against
768 * the following scenario:
769 *
770 * The thread is faster done than the hard interrupt handler
771 * on the other CPU. If we unmask the irq line then the
772 * interrupt can come in again and masks the line, leaves due
009b4c3b 773 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
774 *
775 * This also serializes the state of shared oneshot handlers
776 * versus "desc->threads_onehsot |= action->thread_mask;" in
777 * irq_wake_thread(). See the comment there which explains the
778 * serialization.
0b1adaa0 779 */
32f4125e 780 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 781 raw_spin_unlock_irq(&desc->lock);
3876ec9e 782 chip_bus_sync_unlock(desc);
0b1adaa0
TG
783 cpu_relax();
784 goto again;
785 }
786
b5faba21
TG
787 /*
788 * Now check again, whether the thread should run. Otherwise
789 * we would clear the threads_oneshot bit of this thread which
790 * was just set.
791 */
f3f79e38 792 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
793 goto out_unlock;
794
795 desc->threads_oneshot &= ~action->thread_mask;
796
32f4125e
TG
797 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
798 irqd_irq_masked(&desc->irq_data))
328a4978 799 unmask_threaded_irq(desc);
32f4125e 800
b5faba21 801out_unlock:
239007b8 802 raw_spin_unlock_irq(&desc->lock);
3876ec9e 803 chip_bus_sync_unlock(desc);
b25c340c
TG
804}
805
61f38261 806#ifdef CONFIG_SMP
591d2fb0 807/*
b04c644e 808 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
809 */
810static void
811irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
812{
813 cpumask_var_t mask;
04aa530e 814 bool valid = true;
591d2fb0
TG
815
816 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
817 return;
818
819 /*
820 * In case we are out of memory we set IRQTF_AFFINITY again and
821 * try again next time
822 */
823 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
824 set_bit(IRQTF_AFFINITY, &action->thread_flags);
825 return;
826 }
827
239007b8 828 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
829 /*
830 * This code is triggered unconditionally. Check the affinity
831 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
832 */
833 if (desc->irq_data.affinity)
834 cpumask_copy(mask, desc->irq_data.affinity);
835 else
836 valid = false;
239007b8 837 raw_spin_unlock_irq(&desc->lock);
591d2fb0 838
04aa530e
TG
839 if (valid)
840 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
841 free_cpumask_var(mask);
842}
61f38261
BP
843#else
844static inline void
845irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
846#endif
591d2fb0 847
8d32a307
TG
848/*
849 * Interrupts which are not explicitely requested as threaded
850 * interrupts rely on the implicit bh/preempt disable of the hard irq
851 * context. So we need to disable bh here to avoid deadlocks and other
852 * side effects.
853 */
3a43e05f 854static irqreturn_t
8d32a307
TG
855irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
856{
3a43e05f
SAS
857 irqreturn_t ret;
858
8d32a307 859 local_bh_disable();
3a43e05f 860 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 861 irq_finalize_oneshot(desc, action);
8d32a307 862 local_bh_enable();
3a43e05f 863 return ret;
8d32a307
TG
864}
865
866/*
f788e7bf 867 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
868 * preemtible - many of them need to sleep and wait for slow busses to
869 * complete.
870 */
3a43e05f
SAS
871static irqreturn_t irq_thread_fn(struct irq_desc *desc,
872 struct irqaction *action)
8d32a307 873{
3a43e05f
SAS
874 irqreturn_t ret;
875
876 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 877 irq_finalize_oneshot(desc, action);
3a43e05f 878 return ret;
8d32a307
TG
879}
880
7140ea19
IY
881static void wake_threads_waitq(struct irq_desc *desc)
882{
c685689f 883 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
884 wake_up(&desc->wait_for_threads);
885}
886
67d12145 887static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
888{
889 struct task_struct *tsk = current;
890 struct irq_desc *desc;
891 struct irqaction *action;
892
893 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
894 return;
895
896 action = kthread_data(tsk);
897
fb21affa 898 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 899 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
900
901
902 desc = irq_to_desc(action->irq);
903 /*
904 * If IRQTF_RUNTHREAD is set, we need to decrement
905 * desc->threads_active and wake possible waiters.
906 */
907 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
908 wake_threads_waitq(desc);
909
910 /* Prevent a stale desc->threads_oneshot */
911 irq_finalize_oneshot(desc, action);
912}
913
3aa551c9
TG
914/*
915 * Interrupt handler thread
916 */
917static int irq_thread(void *data)
918{
67d12145 919 struct callback_head on_exit_work;
3aa551c9
TG
920 struct irqaction *action = data;
921 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
922 irqreturn_t (*handler_fn)(struct irq_desc *desc,
923 struct irqaction *action);
3aa551c9 924
540b60e2 925 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
926 &action->thread_flags))
927 handler_fn = irq_forced_thread_fn;
928 else
929 handler_fn = irq_thread_fn;
930
41f9d29f 931 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 932 task_work_add(current, &on_exit_work, false);
3aa551c9 933
f3de44ed
SM
934 irq_thread_check_affinity(desc, action);
935
3aa551c9 936 while (!irq_wait_for_interrupt(action)) {
7140ea19 937 irqreturn_t action_ret;
3aa551c9 938
591d2fb0
TG
939 irq_thread_check_affinity(desc, action);
940
7140ea19 941 action_ret = handler_fn(desc, action);
1e77d0a1
TG
942 if (action_ret == IRQ_HANDLED)
943 atomic_inc(&desc->threads_handled);
3aa551c9 944
7140ea19 945 wake_threads_waitq(desc);
3aa551c9
TG
946 }
947
7140ea19
IY
948 /*
949 * This is the regular exit path. __free_irq() is stopping the
950 * thread via kthread_stop() after calling
951 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
952 * oneshot mask bit can be set. We cannot verify that as we
953 * cannot touch the oneshot mask at this point anymore as
954 * __setup_irq() might have given out currents thread_mask
955 * again.
3aa551c9 956 */
4d1d61a6 957 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
958 return 0;
959}
960
a92444c6
TG
961/**
962 * irq_wake_thread - wake the irq thread for the action identified by dev_id
963 * @irq: Interrupt line
964 * @dev_id: Device identity for which the thread should be woken
965 *
966 */
967void irq_wake_thread(unsigned int irq, void *dev_id)
968{
969 struct irq_desc *desc = irq_to_desc(irq);
970 struct irqaction *action;
971 unsigned long flags;
972
973 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
974 return;
975
976 raw_spin_lock_irqsave(&desc->lock, flags);
977 for (action = desc->action; action; action = action->next) {
978 if (action->dev_id == dev_id) {
979 if (action->thread)
980 __irq_wake_thread(desc, action);
981 break;
982 }
983 }
984 raw_spin_unlock_irqrestore(&desc->lock, flags);
985}
986EXPORT_SYMBOL_GPL(irq_wake_thread);
987
8d32a307
TG
988static void irq_setup_forced_threading(struct irqaction *new)
989{
990 if (!force_irqthreads)
991 return;
992 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
993 return;
994
995 new->flags |= IRQF_ONESHOT;
996
997 if (!new->thread_fn) {
998 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
999 new->thread_fn = new->handler;
1000 new->handler = irq_default_primary_handler;
1001 }
1002}
1003
c1bacbae
TG
1004static int irq_request_resources(struct irq_desc *desc)
1005{
1006 struct irq_data *d = &desc->irq_data;
1007 struct irq_chip *c = d->chip;
1008
1009 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1010}
1011
1012static void irq_release_resources(struct irq_desc *desc)
1013{
1014 struct irq_data *d = &desc->irq_data;
1015 struct irq_chip *c = d->chip;
1016
1017 if (c->irq_release_resources)
1018 c->irq_release_resources(d);
1019}
1020
1da177e4
LT
1021/*
1022 * Internal function to register an irqaction - typically used to
1023 * allocate special interrupts that are part of the architecture.
1024 */
d3c60047 1025static int
327ec569 1026__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1027{
f17c7545 1028 struct irqaction *old, **old_ptr;
b5faba21 1029 unsigned long flags, thread_mask = 0;
3b8249e7
TG
1030 int ret, nested, shared = 0;
1031 cpumask_var_t mask;
1da177e4 1032
7d94f7ca 1033 if (!desc)
c2b5a251
MW
1034 return -EINVAL;
1035
6b8ff312 1036 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1037 return -ENOSYS;
b6873807
SAS
1038 if (!try_module_get(desc->owner))
1039 return -ENODEV;
1da177e4 1040
3aa551c9 1041 /*
399b5da2
TG
1042 * Check whether the interrupt nests into another interrupt
1043 * thread.
1044 */
1ccb4e61 1045 nested = irq_settings_is_nested_thread(desc);
399b5da2 1046 if (nested) {
b6873807
SAS
1047 if (!new->thread_fn) {
1048 ret = -EINVAL;
1049 goto out_mput;
1050 }
399b5da2
TG
1051 /*
1052 * Replace the primary handler which was provided from
1053 * the driver for non nested interrupt handling by the
1054 * dummy function which warns when called.
1055 */
1056 new->handler = irq_nested_primary_handler;
8d32a307 1057 } else {
7f1b1244
PM
1058 if (irq_settings_can_thread(desc))
1059 irq_setup_forced_threading(new);
399b5da2
TG
1060 }
1061
3aa551c9 1062 /*
399b5da2
TG
1063 * Create a handler thread when a thread function is supplied
1064 * and the interrupt does not nest into another interrupt
1065 * thread.
3aa551c9 1066 */
399b5da2 1067 if (new->thread_fn && !nested) {
3aa551c9 1068 struct task_struct *t;
ee238713
IS
1069 static const struct sched_param param = {
1070 .sched_priority = MAX_USER_RT_PRIO/2,
1071 };
3aa551c9
TG
1072
1073 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1074 new->name);
b6873807
SAS
1075 if (IS_ERR(t)) {
1076 ret = PTR_ERR(t);
1077 goto out_mput;
1078 }
ee238713 1079
bbfe65c2 1080 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
ee238713 1081
3aa551c9
TG
1082 /*
1083 * We keep the reference to the task struct even if
1084 * the thread dies to avoid that the interrupt code
1085 * references an already freed task_struct.
1086 */
1087 get_task_struct(t);
1088 new->thread = t;
04aa530e
TG
1089 /*
1090 * Tell the thread to set its affinity. This is
1091 * important for shared interrupt handlers as we do
1092 * not invoke setup_affinity() for the secondary
1093 * handlers as everything is already set up. Even for
1094 * interrupts marked with IRQF_NO_BALANCE this is
1095 * correct as we want the thread to move to the cpu(s)
1096 * on which the requesting code placed the interrupt.
1097 */
1098 set_bit(IRQTF_AFFINITY, &new->thread_flags);
3aa551c9
TG
1099 }
1100
3b8249e7
TG
1101 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
1102 ret = -ENOMEM;
1103 goto out_thread;
1104 }
1105
dc9b229a
TG
1106 /*
1107 * Drivers are often written to work w/o knowledge about the
1108 * underlying irq chip implementation, so a request for a
1109 * threaded irq without a primary hard irq context handler
1110 * requires the ONESHOT flag to be set. Some irq chips like
1111 * MSI based interrupts are per se one shot safe. Check the
1112 * chip flags, so we can avoid the unmask dance at the end of
1113 * the threaded handler for those.
1114 */
1115 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1116 new->flags &= ~IRQF_ONESHOT;
1117
1da177e4
LT
1118 /*
1119 * The following block of code has to be executed atomically
1120 */
239007b8 1121 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1122 old_ptr = &desc->action;
1123 old = *old_ptr;
06fcb0c6 1124 if (old) {
e76de9f8
TG
1125 /*
1126 * Can't share interrupts unless both agree to and are
1127 * the same type (level, edge, polarity). So both flag
3cca53b0 1128 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1129 * set the trigger type must match. Also all must
1130 * agree on ONESHOT.
e76de9f8 1131 */
3cca53b0 1132 if (!((old->flags & new->flags) & IRQF_SHARED) ||
9d591edd 1133 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) ||
f5d89470 1134 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1135 goto mismatch;
1136
f5163427 1137 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1138 if ((old->flags & IRQF_PERCPU) !=
1139 (new->flags & IRQF_PERCPU))
f5163427 1140 goto mismatch;
1da177e4
LT
1141
1142 /* add new interrupt at end of irq queue */
1143 do {
52abb700
TG
1144 /*
1145 * Or all existing action->thread_mask bits,
1146 * so we can find the next zero bit for this
1147 * new action.
1148 */
b5faba21 1149 thread_mask |= old->thread_mask;
f17c7545
IM
1150 old_ptr = &old->next;
1151 old = *old_ptr;
1da177e4
LT
1152 } while (old);
1153 shared = 1;
1154 }
1155
b5faba21 1156 /*
52abb700
TG
1157 * Setup the thread mask for this irqaction for ONESHOT. For
1158 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1159 * conditional in irq_wake_thread().
b5faba21 1160 */
52abb700
TG
1161 if (new->flags & IRQF_ONESHOT) {
1162 /*
1163 * Unlikely to have 32 resp 64 irqs sharing one line,
1164 * but who knows.
1165 */
1166 if (thread_mask == ~0UL) {
1167 ret = -EBUSY;
1168 goto out_mask;
1169 }
1170 /*
1171 * The thread_mask for the action is or'ed to
1172 * desc->thread_active to indicate that the
1173 * IRQF_ONESHOT thread handler has been woken, but not
1174 * yet finished. The bit is cleared when a thread
1175 * completes. When all threads of a shared interrupt
1176 * line have completed desc->threads_active becomes
1177 * zero and the interrupt line is unmasked. See
1178 * handle.c:irq_wake_thread() for further information.
1179 *
1180 * If no thread is woken by primary (hard irq context)
1181 * interrupt handlers, then desc->threads_active is
1182 * also checked for zero to unmask the irq line in the
1183 * affected hard irq flow handlers
1184 * (handle_[fasteoi|level]_irq).
1185 *
1186 * The new action gets the first zero bit of
1187 * thread_mask assigned. See the loop above which or's
1188 * all existing action->thread_mask bits.
1189 */
1190 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1191
dc9b229a
TG
1192 } else if (new->handler == irq_default_primary_handler &&
1193 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1194 /*
1195 * The interrupt was requested with handler = NULL, so
1196 * we use the default primary handler for it. But it
1197 * does not have the oneshot flag set. In combination
1198 * with level interrupts this is deadly, because the
1199 * default primary handler just wakes the thread, then
1200 * the irq lines is reenabled, but the device still
1201 * has the level irq asserted. Rinse and repeat....
1202 *
1203 * While this works for edge type interrupts, we play
1204 * it safe and reject unconditionally because we can't
1205 * say for sure which type this interrupt really
1206 * has. The type flags are unreliable as the
1207 * underlying chip implementation can override them.
1208 */
97fd75b7 1209 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1210 irq);
1211 ret = -EINVAL;
1212 goto out_mask;
b5faba21 1213 }
b5faba21 1214
1da177e4 1215 if (!shared) {
c1bacbae
TG
1216 ret = irq_request_resources(desc);
1217 if (ret) {
1218 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1219 new->name, irq, desc->irq_data.chip->name);
1220 goto out_mask;
1221 }
1222
3aa551c9
TG
1223 init_waitqueue_head(&desc->wait_for_threads);
1224
e76de9f8 1225 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1226 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1227 ret = __irq_set_trigger(desc,
1228 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1229
3aa551c9 1230 if (ret)
3b8249e7 1231 goto out_mask;
091738a2 1232 }
6a6de9ef 1233
009b4c3b 1234 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1235 IRQS_ONESHOT | IRQS_WAITING);
1236 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1237
a005677b
TG
1238 if (new->flags & IRQF_PERCPU) {
1239 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1240 irq_settings_set_per_cpu(desc);
1241 }
6a58fb3b 1242
b25c340c 1243 if (new->flags & IRQF_ONESHOT)
3d67baec 1244 desc->istate |= IRQS_ONESHOT;
b25c340c 1245
1ccb4e61 1246 if (irq_settings_can_autoenable(desc))
b4bc724e 1247 irq_startup(desc, true);
46999238 1248 else
e76de9f8
TG
1249 /* Undo nested disables: */
1250 desc->depth = 1;
18404756 1251
612e3684 1252 /* Exclude IRQ from balancing if requested */
a005677b
TG
1253 if (new->flags & IRQF_NOBALANCING) {
1254 irq_settings_set_no_balancing(desc);
1255 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1256 }
612e3684 1257
18404756 1258 /* Set default affinity mask once everything is setup */
3b8249e7 1259 setup_affinity(irq, desc, mask);
0c5d1eb7 1260
876dbd4c
TG
1261 } else if (new->flags & IRQF_TRIGGER_MASK) {
1262 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
1263 unsigned int omsk = irq_settings_get_trigger_mask(desc);
1264
1265 if (nmsk != omsk)
1266 /* hope the handler works with current trigger mode */
97fd75b7 1267 pr_warning("irq %d uses trigger mode %u; requested %u\n",
876dbd4c 1268 irq, nmsk, omsk);
1da177e4 1269 }
82736f4d 1270
69ab8494 1271 new->irq = irq;
f17c7545 1272 *old_ptr = new;
82736f4d 1273
cab303be
TG
1274 irq_pm_install_action(desc, new);
1275
8528b0f1
LT
1276 /* Reset broken irq detection when installing new handler */
1277 desc->irq_count = 0;
1278 desc->irqs_unhandled = 0;
1adb0850
TG
1279
1280 /*
1281 * Check whether we disabled the irq via the spurious handler
1282 * before. Reenable it and give it another chance.
1283 */
7acdd53e
TG
1284 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1285 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1286 __enable_irq(desc);
1adb0850
TG
1287 }
1288
239007b8 1289 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1290
69ab8494
TG
1291 /*
1292 * Strictly no need to wake it up, but hung_task complains
1293 * when no hard interrupt wakes the thread up.
1294 */
1295 if (new->thread)
1296 wake_up_process(new->thread);
1297
2c6927a3 1298 register_irq_proc(irq, desc);
1da177e4
LT
1299 new->dir = NULL;
1300 register_handler_proc(irq, new);
4f5058c3 1301 free_cpumask_var(mask);
1da177e4
LT
1302
1303 return 0;
f5163427
DS
1304
1305mismatch:
3cca53b0 1306 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1307 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1308 irq, new->flags, new->name, old->flags, old->name);
1309#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1310 dump_stack();
3f050447 1311#endif
f5d89470 1312 }
3aa551c9
TG
1313 ret = -EBUSY;
1314
3b8249e7 1315out_mask:
1c389795 1316 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7
TG
1317 free_cpumask_var(mask);
1318
3aa551c9 1319out_thread:
3aa551c9
TG
1320 if (new->thread) {
1321 struct task_struct *t = new->thread;
1322
1323 new->thread = NULL;
05d74efa 1324 kthread_stop(t);
3aa551c9
TG
1325 put_task_struct(t);
1326 }
b6873807
SAS
1327out_mput:
1328 module_put(desc->owner);
3aa551c9 1329 return ret;
1da177e4
LT
1330}
1331
d3c60047
TG
1332/**
1333 * setup_irq - setup an interrupt
1334 * @irq: Interrupt line to setup
1335 * @act: irqaction for the interrupt
1336 *
1337 * Used to statically setup interrupts in the early boot process.
1338 */
1339int setup_irq(unsigned int irq, struct irqaction *act)
1340{
986c011d 1341 int retval;
d3c60047
TG
1342 struct irq_desc *desc = irq_to_desc(irq);
1343
31d9d9b6
MZ
1344 if (WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1345 return -EINVAL;
986c011d
DD
1346 chip_bus_lock(desc);
1347 retval = __setup_irq(irq, desc, act);
1348 chip_bus_sync_unlock(desc);
1349
1350 return retval;
d3c60047 1351}
eb53b4e8 1352EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1353
31d9d9b6 1354/*
cbf94f06
MD
1355 * Internal function to unregister an irqaction - used to free
1356 * regular and special interrupts that are part of the architecture.
1da177e4 1357 */
cbf94f06 1358static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1359{
d3c60047 1360 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1361 struct irqaction *action, **action_ptr;
1da177e4
LT
1362 unsigned long flags;
1363
ae88a23b 1364 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1365
7d94f7ca 1366 if (!desc)
f21cfb25 1367 return NULL;
1da177e4 1368
239007b8 1369 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1370
1371 /*
1372 * There can be multiple actions per IRQ descriptor, find the right
1373 * one based on the dev_id:
1374 */
f17c7545 1375 action_ptr = &desc->action;
1da177e4 1376 for (;;) {
f17c7545 1377 action = *action_ptr;
1da177e4 1378
ae88a23b
IM
1379 if (!action) {
1380 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1381 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1382
f21cfb25 1383 return NULL;
ae88a23b 1384 }
1da177e4 1385
8316e381
IM
1386 if (action->dev_id == dev_id)
1387 break;
f17c7545 1388 action_ptr = &action->next;
ae88a23b 1389 }
dbce706e 1390
ae88a23b 1391 /* Found it - now remove it from the list of entries: */
f17c7545 1392 *action_ptr = action->next;
ae88a23b 1393
cab303be
TG
1394 irq_pm_remove_action(desc, action);
1395
ae88a23b 1396 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1397 if (!desc->action) {
46999238 1398 irq_shutdown(desc);
c1bacbae
TG
1399 irq_release_resources(desc);
1400 }
3aa551c9 1401
e7a297b0
PWJ
1402#ifdef CONFIG_SMP
1403 /* make sure affinity_hint is cleaned up */
1404 if (WARN_ON_ONCE(desc->affinity_hint))
1405 desc->affinity_hint = NULL;
1406#endif
1407
239007b8 1408 raw_spin_unlock_irqrestore(&desc->lock, flags);
ae88a23b
IM
1409
1410 unregister_handler_proc(irq, action);
1411
1412 /* Make sure it's not being used on another CPU: */
1413 synchronize_irq(irq);
1da177e4 1414
70edcd77 1415#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1416 /*
1417 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1418 * event to happen even now it's being freed, so let's make sure that
1419 * is so by doing an extra call to the handler ....
1420 *
1421 * ( We do this after actually deregistering it, to make sure that a
1422 * 'real' IRQ doesn't run in * parallel with our fake. )
1423 */
1424 if (action->flags & IRQF_SHARED) {
1425 local_irq_save(flags);
1426 action->handler(irq, dev_id);
1427 local_irq_restore(flags);
1da177e4 1428 }
ae88a23b 1429#endif
2d860ad7
LT
1430
1431 if (action->thread) {
05d74efa 1432 kthread_stop(action->thread);
2d860ad7
LT
1433 put_task_struct(action->thread);
1434 }
1435
b6873807 1436 module_put(desc->owner);
f21cfb25
MD
1437 return action;
1438}
1439
cbf94f06
MD
1440/**
1441 * remove_irq - free an interrupt
1442 * @irq: Interrupt line to free
1443 * @act: irqaction for the interrupt
1444 *
1445 * Used to remove interrupts statically setup by the early boot process.
1446 */
1447void remove_irq(unsigned int irq, struct irqaction *act)
1448{
31d9d9b6
MZ
1449 struct irq_desc *desc = irq_to_desc(irq);
1450
1451 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1452 __free_irq(irq, act->dev_id);
cbf94f06 1453}
eb53b4e8 1454EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1455
f21cfb25
MD
1456/**
1457 * free_irq - free an interrupt allocated with request_irq
1458 * @irq: Interrupt line to free
1459 * @dev_id: Device identity to free
1460 *
1461 * Remove an interrupt handler. The handler is removed and if the
1462 * interrupt line is no longer in use by any driver it is disabled.
1463 * On a shared IRQ the caller must ensure the interrupt is disabled
1464 * on the card it drives before calling this function. The function
1465 * does not return until any executing interrupts for this IRQ
1466 * have completed.
1467 *
1468 * This function must not be called from interrupt context.
1469 */
1470void free_irq(unsigned int irq, void *dev_id)
1471{
70aedd24
TG
1472 struct irq_desc *desc = irq_to_desc(irq);
1473
31d9d9b6 1474 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
70aedd24
TG
1475 return;
1476
cd7eab44
BH
1477#ifdef CONFIG_SMP
1478 if (WARN_ON(desc->affinity_notify))
1479 desc->affinity_notify = NULL;
1480#endif
1481
3876ec9e 1482 chip_bus_lock(desc);
cbf94f06 1483 kfree(__free_irq(irq, dev_id));
3876ec9e 1484 chip_bus_sync_unlock(desc);
1da177e4 1485}
1da177e4
LT
1486EXPORT_SYMBOL(free_irq);
1487
1488/**
3aa551c9 1489 * request_threaded_irq - allocate an interrupt line
1da177e4 1490 * @irq: Interrupt line to allocate
3aa551c9
TG
1491 * @handler: Function to be called when the IRQ occurs.
1492 * Primary handler for threaded interrupts
b25c340c
TG
1493 * If NULL and thread_fn != NULL the default
1494 * primary handler is installed
f48fe81e
TG
1495 * @thread_fn: Function called from the irq handler thread
1496 * If NULL, no irq thread is created
1da177e4
LT
1497 * @irqflags: Interrupt type flags
1498 * @devname: An ascii name for the claiming device
1499 * @dev_id: A cookie passed back to the handler function
1500 *
1501 * This call allocates interrupt resources and enables the
1502 * interrupt line and IRQ handling. From the point this
1503 * call is made your handler function may be invoked. Since
1504 * your handler function must clear any interrupt the board
1505 * raises, you must take care both to initialise your hardware
1506 * and to set up the interrupt handler in the right order.
1507 *
3aa551c9 1508 * If you want to set up a threaded irq handler for your device
6d21af4f 1509 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1510 * still called in hard interrupt context and has to check
1511 * whether the interrupt originates from the device. If yes it
1512 * needs to disable the interrupt on the device and return
39a2eddb 1513 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1514 * @thread_fn. This split handler design is necessary to support
1515 * shared interrupts.
1516 *
1da177e4
LT
1517 * Dev_id must be globally unique. Normally the address of the
1518 * device data structure is used as the cookie. Since the handler
1519 * receives this value it makes sense to use it.
1520 *
1521 * If your interrupt is shared you must pass a non NULL dev_id
1522 * as this is required when freeing the interrupt.
1523 *
1524 * Flags:
1525 *
3cca53b0 1526 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1527 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1528 *
1529 */
3aa551c9
TG
1530int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1531 irq_handler_t thread_fn, unsigned long irqflags,
1532 const char *devname, void *dev_id)
1da177e4 1533{
06fcb0c6 1534 struct irqaction *action;
08678b08 1535 struct irq_desc *desc;
d3c60047 1536 int retval;
1da177e4
LT
1537
1538 /*
1539 * Sanity-check: shared interrupts must pass in a real dev-ID,
1540 * otherwise we'll have trouble later trying to figure out
1541 * which interrupt is which (messes up the interrupt freeing
1542 * logic etc).
17f48034
RW
1543 *
1544 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1545 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1546 */
17f48034
RW
1547 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1548 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1549 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1550 return -EINVAL;
7d94f7ca 1551
cb5bc832 1552 desc = irq_to_desc(irq);
7d94f7ca 1553 if (!desc)
1da177e4 1554 return -EINVAL;
7d94f7ca 1555
31d9d9b6
MZ
1556 if (!irq_settings_can_request(desc) ||
1557 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1558 return -EINVAL;
b25c340c
TG
1559
1560 if (!handler) {
1561 if (!thread_fn)
1562 return -EINVAL;
1563 handler = irq_default_primary_handler;
1564 }
1da177e4 1565
45535732 1566 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1567 if (!action)
1568 return -ENOMEM;
1569
1570 action->handler = handler;
3aa551c9 1571 action->thread_fn = thread_fn;
1da177e4 1572 action->flags = irqflags;
1da177e4 1573 action->name = devname;
1da177e4
LT
1574 action->dev_id = dev_id;
1575
3876ec9e 1576 chip_bus_lock(desc);
d3c60047 1577 retval = __setup_irq(irq, desc, action);
3876ec9e 1578 chip_bus_sync_unlock(desc);
70aedd24 1579
377bf1e4
AV
1580 if (retval)
1581 kfree(action);
1582
6d83f94d 1583#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1584 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1585 /*
1586 * It's a shared IRQ -- the driver ought to be prepared for it
1587 * to happen immediately, so let's make sure....
377bf1e4
AV
1588 * We disable the irq to make sure that a 'real' IRQ doesn't
1589 * run in parallel with our fake.
a304e1b8 1590 */
59845b1f 1591 unsigned long flags;
a304e1b8 1592
377bf1e4 1593 disable_irq(irq);
59845b1f 1594 local_irq_save(flags);
377bf1e4 1595
59845b1f 1596 handler(irq, dev_id);
377bf1e4 1597
59845b1f 1598 local_irq_restore(flags);
377bf1e4 1599 enable_irq(irq);
a304e1b8
DW
1600 }
1601#endif
1da177e4
LT
1602 return retval;
1603}
3aa551c9 1604EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1605
1606/**
1607 * request_any_context_irq - allocate an interrupt line
1608 * @irq: Interrupt line to allocate
1609 * @handler: Function to be called when the IRQ occurs.
1610 * Threaded handler for threaded interrupts.
1611 * @flags: Interrupt type flags
1612 * @name: An ascii name for the claiming device
1613 * @dev_id: A cookie passed back to the handler function
1614 *
1615 * This call allocates interrupt resources and enables the
1616 * interrupt line and IRQ handling. It selects either a
1617 * hardirq or threaded handling method depending on the
1618 * context.
1619 *
1620 * On failure, it returns a negative value. On success,
1621 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1622 */
1623int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1624 unsigned long flags, const char *name, void *dev_id)
1625{
1626 struct irq_desc *desc = irq_to_desc(irq);
1627 int ret;
1628
1629 if (!desc)
1630 return -EINVAL;
1631
1ccb4e61 1632 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1633 ret = request_threaded_irq(irq, NULL, handler,
1634 flags, name, dev_id);
1635 return !ret ? IRQC_IS_NESTED : ret;
1636 }
1637
1638 ret = request_irq(irq, handler, flags, name, dev_id);
1639 return !ret ? IRQC_IS_HARDIRQ : ret;
1640}
1641EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1642
1e7c5fd2 1643void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1644{
1645 unsigned int cpu = smp_processor_id();
1646 unsigned long flags;
1647 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1648
1649 if (!desc)
1650 return;
1651
1e7c5fd2
MZ
1652 type &= IRQ_TYPE_SENSE_MASK;
1653 if (type != IRQ_TYPE_NONE) {
1654 int ret;
1655
a1ff541a 1656 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
1657
1658 if (ret) {
32cffdde 1659 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1660 goto out;
1661 }
1662 }
1663
31d9d9b6 1664 irq_percpu_enable(desc, cpu);
1e7c5fd2 1665out:
31d9d9b6
MZ
1666 irq_put_desc_unlock(desc, flags);
1667}
36a5df85 1668EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6
MZ
1669
1670void disable_percpu_irq(unsigned int irq)
1671{
1672 unsigned int cpu = smp_processor_id();
1673 unsigned long flags;
1674 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1675
1676 if (!desc)
1677 return;
1678
1679 irq_percpu_disable(desc, cpu);
1680 irq_put_desc_unlock(desc, flags);
1681}
36a5df85 1682EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1683
1684/*
1685 * Internal function to unregister a percpu irqaction.
1686 */
1687static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1688{
1689 struct irq_desc *desc = irq_to_desc(irq);
1690 struct irqaction *action;
1691 unsigned long flags;
1692
1693 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1694
1695 if (!desc)
1696 return NULL;
1697
1698 raw_spin_lock_irqsave(&desc->lock, flags);
1699
1700 action = desc->action;
1701 if (!action || action->percpu_dev_id != dev_id) {
1702 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1703 goto bad;
1704 }
1705
1706 if (!cpumask_empty(desc->percpu_enabled)) {
1707 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1708 irq, cpumask_first(desc->percpu_enabled));
1709 goto bad;
1710 }
1711
1712 /* Found it - now remove it from the list of entries: */
1713 desc->action = NULL;
1714
1715 raw_spin_unlock_irqrestore(&desc->lock, flags);
1716
1717 unregister_handler_proc(irq, action);
1718
1719 module_put(desc->owner);
1720 return action;
1721
1722bad:
1723 raw_spin_unlock_irqrestore(&desc->lock, flags);
1724 return NULL;
1725}
1726
1727/**
1728 * remove_percpu_irq - free a per-cpu interrupt
1729 * @irq: Interrupt line to free
1730 * @act: irqaction for the interrupt
1731 *
1732 * Used to remove interrupts statically setup by the early boot process.
1733 */
1734void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1735{
1736 struct irq_desc *desc = irq_to_desc(irq);
1737
1738 if (desc && irq_settings_is_per_cpu_devid(desc))
1739 __free_percpu_irq(irq, act->percpu_dev_id);
1740}
1741
1742/**
1743 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1744 * @irq: Interrupt line to free
1745 * @dev_id: Device identity to free
1746 *
1747 * Remove a percpu interrupt handler. The handler is removed, but
1748 * the interrupt line is not disabled. This must be done on each
1749 * CPU before calling this function. The function does not return
1750 * until any executing interrupts for this IRQ have completed.
1751 *
1752 * This function must not be called from interrupt context.
1753 */
1754void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1755{
1756 struct irq_desc *desc = irq_to_desc(irq);
1757
1758 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1759 return;
1760
1761 chip_bus_lock(desc);
1762 kfree(__free_percpu_irq(irq, dev_id));
1763 chip_bus_sync_unlock(desc);
1764}
1765
1766/**
1767 * setup_percpu_irq - setup a per-cpu interrupt
1768 * @irq: Interrupt line to setup
1769 * @act: irqaction for the interrupt
1770 *
1771 * Used to statically setup per-cpu interrupts in the early boot process.
1772 */
1773int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1774{
1775 struct irq_desc *desc = irq_to_desc(irq);
1776 int retval;
1777
1778 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1779 return -EINVAL;
1780 chip_bus_lock(desc);
1781 retval = __setup_irq(irq, desc, act);
1782 chip_bus_sync_unlock(desc);
1783
1784 return retval;
1785}
1786
1787/**
1788 * request_percpu_irq - allocate a percpu interrupt line
1789 * @irq: Interrupt line to allocate
1790 * @handler: Function to be called when the IRQ occurs.
1791 * @devname: An ascii name for the claiming device
1792 * @dev_id: A percpu cookie passed back to the handler function
1793 *
1794 * This call allocates interrupt resources, but doesn't
1795 * automatically enable the interrupt. It has to be done on each
1796 * CPU using enable_percpu_irq().
1797 *
1798 * Dev_id must be globally unique. It is a per-cpu variable, and
1799 * the handler gets called with the interrupted CPU's instance of
1800 * that variable.
1801 */
1802int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1803 const char *devname, void __percpu *dev_id)
1804{
1805 struct irqaction *action;
1806 struct irq_desc *desc;
1807 int retval;
1808
1809 if (!dev_id)
1810 return -EINVAL;
1811
1812 desc = irq_to_desc(irq);
1813 if (!desc || !irq_settings_can_request(desc) ||
1814 !irq_settings_is_per_cpu_devid(desc))
1815 return -EINVAL;
1816
1817 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1818 if (!action)
1819 return -ENOMEM;
1820
1821 action->handler = handler;
2ed0e645 1822 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
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1823 action->name = devname;
1824 action->percpu_dev_id = dev_id;
1825
1826 chip_bus_lock(desc);
1827 retval = __setup_irq(irq, desc, action);
1828 chip_bus_sync_unlock(desc);
1829
1830 if (retval)
1831 kfree(action);
1832
1833 return retval;
1834}
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1835
1836/**
1837 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
1838 * @irq: Interrupt line that is forwarded to a VM
1839 * @which: One of IRQCHIP_STATE_* the caller wants to know about
1840 * @state: a pointer to a boolean where the state is to be storeed
1841 *
1842 * This call snapshots the internal irqchip state of an
1843 * interrupt, returning into @state the bit corresponding to
1844 * stage @which
1845 *
1846 * This function should be called with preemption disabled if the
1847 * interrupt controller has per-cpu registers.
1848 */
1849int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
1850 bool *state)
1851{
1852 struct irq_desc *desc;
1853 struct irq_data *data;
1854 struct irq_chip *chip;
1855 unsigned long flags;
1856 int err = -EINVAL;
1857
1858 desc = irq_get_desc_buslock(irq, &flags, 0);
1859 if (!desc)
1860 return err;
1861
1862 data = irq_desc_get_irq_data(desc);
1863
1864 do {
1865 chip = irq_data_get_irq_chip(data);
1866 if (chip->irq_get_irqchip_state)
1867 break;
1868#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1869 data = data->parent_data;
1870#else
1871 data = NULL;
1872#endif
1873 } while (data);
1874
1875 if (data)
1876 err = chip->irq_get_irqchip_state(data, which, state);
1877
1878 irq_put_desc_busunlock(desc, flags);
1879 return err;
1880}
1881
1882/**
1883 * irq_set_irqchip_state - set the state of a forwarded interrupt.
1884 * @irq: Interrupt line that is forwarded to a VM
1885 * @which: State to be restored (one of IRQCHIP_STATE_*)
1886 * @val: Value corresponding to @which
1887 *
1888 * This call sets the internal irqchip state of an interrupt,
1889 * depending on the value of @which.
1890 *
1891 * This function should be called with preemption disabled if the
1892 * interrupt controller has per-cpu registers.
1893 */
1894int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
1895 bool val)
1896{
1897 struct irq_desc *desc;
1898 struct irq_data *data;
1899 struct irq_chip *chip;
1900 unsigned long flags;
1901 int err = -EINVAL;
1902
1903 desc = irq_get_desc_buslock(irq, &flags, 0);
1904 if (!desc)
1905 return err;
1906
1907 data = irq_desc_get_irq_data(desc);
1908
1909 do {
1910 chip = irq_data_get_irq_chip(data);
1911 if (chip->irq_set_irqchip_state)
1912 break;
1913#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1914 data = data->parent_data;
1915#else
1916 data = NULL;
1917#endif
1918 } while (data);
1919
1920 if (data)
1921 err = chip->irq_set_irqchip_state(data, which, val);
1922
1923 irq_put_desc_busunlock(desc, flags);
1924 return err;
1925}