[mirror_ubuntu-bionic-kernel.git] / kernel / irq / msi.c

/*
 * linux/kernel/irq/msi.c
 *
 * Copyright (C) 2014 Intel Corp.
 * Author: Jiang Liu <jiang.liu@linux.intel.com>
 *
 * This file is licensed under GPLv2.
 *
 * This file contains common code to support Message Signalled Interrupt for
 * PCI compatible and non PCI compatible devices.
 */
#include <linux/types.h>
#include <linux/device.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/msi.h>
#include <linux/slab.h>

/**
 * alloc_msi_entry - Allocate an initialize msi_entry
 * @dev:	Pointer to the device for which this is allocated
 * @nvec:	The number of vectors used in this entry
 * @affinity:	Optional pointer to an affinity mask array size of @nvec
 *
 * If @affinity is not NULL then a an affinity array[@nvec] is allocated
 * and the affinity masks from @affinity are copied.
 */
struct msi_desc *
alloc_msi_entry(struct device *dev, int nvec, const struct cpumask *affinity)
{
	struct msi_desc *desc;

	desc = kzalloc(sizeof(*desc), GFP_KERNEL);
	if (!desc)
		return NULL;

	INIT_LIST_HEAD(&desc->list);
	desc->dev = dev;
	desc->nvec_used = nvec;
	if (affinity) {
		desc->affinity = kmemdup(affinity,
			nvec * sizeof(*desc->affinity), GFP_KERNEL);
		if (!desc->affinity) {
			kfree(desc);
			return NULL;
		}
	}

	return desc;
}

void free_msi_entry(struct msi_desc *entry)
{
	kfree(entry->affinity);
	kfree(entry);
}

void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
{
	*msg = entry->msg;
}

void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
{
	struct msi_desc *entry = irq_get_msi_desc(irq);

	__get_cached_msi_msg(entry, msg);
}
EXPORT_SYMBOL_GPL(get_cached_msi_msg);

#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
static inline void irq_chip_write_msi_msg(struct irq_data *data,
					  struct msi_msg *msg)
{
	data->chip->irq_write_msi_msg(data, msg);
}

/**
 * msi_domain_set_affinity - Generic affinity setter function for MSI domains
 * @irq_data:	The irq data associated to the interrupt
 * @mask:	The affinity mask to set
 * @force:	Flag to enforce setting (disable online checks)
 *
 * Intended to be used by MSI interrupt controllers which are
 * implemented with hierarchical domains.
 */
int msi_domain_set_affinity(struct irq_data *irq_data,
			    const struct cpumask *mask, bool force)
{
	struct irq_data *parent = irq_data->parent_data;
	struct msi_msg msg;
	int ret;

	ret = parent->chip->irq_set_affinity(parent, mask, force);
	if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
		BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
		irq_chip_write_msi_msg(irq_data, &msg);
	}

	return ret;
}

static void msi_domain_activate(struct irq_domain *domain,
				struct irq_data *irq_data)
{
	struct msi_msg msg;

	BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
	irq_chip_write_msi_msg(irq_data, &msg);
}

static void msi_domain_deactivate(struct irq_domain *domain,
				  struct irq_data *irq_data)
{
	struct msi_msg msg;

	memset(&msg, 0, sizeof(msg));
	irq_chip_write_msi_msg(irq_data, &msg);
}

static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
			    unsigned int nr_irqs, void *arg)
{
	struct msi_domain_info *info = domain->host_data;
	struct msi_domain_ops *ops = info->ops;
	irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
	int i, ret;

	if (irq_find_mapping(domain, hwirq) > 0)
		return -EEXIST;

	if (domain->parent) {
		ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
		if (ret < 0)
			return ret;
	}

	for (i = 0; i < nr_irqs; i++) {
		ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
		if (ret < 0) {
			if (ops->msi_free) {
				for (i--; i > 0; i--)
					ops->msi_free(domain, info, virq + i);
			}
			irq_domain_free_irqs_top(domain, virq, nr_irqs);
			return ret;
		}
	}

	return 0;
}

static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
			    unsigned int nr_irqs)
{
	struct msi_domain_info *info = domain->host_data;
	int i;

	if (info->ops->msi_free) {
		for (i = 0; i < nr_irqs; i++)
			info->ops->msi_free(domain, info, virq + i);
	}
	irq_domain_free_irqs_top(domain, virq, nr_irqs);
}

static const struct irq_domain_ops msi_domain_ops = {
	.alloc		= msi_domain_alloc,
	.free		= msi_domain_free,
	.activate	= msi_domain_activate,
	.deactivate	= msi_domain_deactivate,
};

#ifdef GENERIC_MSI_DOMAIN_OPS
static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
						msi_alloc_info_t *arg)
{
	return arg->hwirq;
}

static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
				  int nvec, msi_alloc_info_t *arg)
{
	memset(arg, 0, sizeof(*arg));
	return 0;
}

static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
				    struct msi_desc *desc)
{
	arg->desc = desc;
}
#else
#define msi_domain_ops_get_hwirq	NULL
#define msi_domain_ops_prepare		NULL
#define msi_domain_ops_set_desc		NULL
#endif /* !GENERIC_MSI_DOMAIN_OPS */

static int msi_domain_ops_init(struct irq_domain *domain,
			       struct msi_domain_info *info,
			       unsigned int virq, irq_hw_number_t hwirq,
			       msi_alloc_info_t *arg)
{
	irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
				      info->chip_data);
	if (info->handler && info->handler_name) {
		__irq_set_handler(virq, info->handler, 0, info->handler_name);
		if (info->handler_data)
			irq_set_handler_data(virq, info->handler_data);
	}
	return 0;
}

static int msi_domain_ops_check(struct irq_domain *domain,
				struct msi_domain_info *info,
				struct device *dev)
{
	return 0;
}

static struct msi_domain_ops msi_domain_ops_default = {
	.get_hwirq	= msi_domain_ops_get_hwirq,
	.msi_init	= msi_domain_ops_init,
	.msi_check	= msi_domain_ops_check,
	.msi_prepare	= msi_domain_ops_prepare,
	.set_desc	= msi_domain_ops_set_desc,
};

static void msi_domain_update_dom_ops(struct msi_domain_info *info)
{
	struct msi_domain_ops *ops = info->ops;

	if (ops == NULL) {
		info->ops = &msi_domain_ops_default;
		return;
	}

	if (ops->get_hwirq == NULL)
		ops->get_hwirq = msi_domain_ops_default.get_hwirq;
	if (ops->msi_init == NULL)
		ops->msi_init = msi_domain_ops_default.msi_init;
	if (ops->msi_check == NULL)
		ops->msi_check = msi_domain_ops_default.msi_check;
	if (ops->msi_prepare == NULL)
		ops->msi_prepare = msi_domain_ops_default.msi_prepare;
	if (ops->set_desc == NULL)
		ops->set_desc = msi_domain_ops_default.set_desc;
}

static void msi_domain_update_chip_ops(struct msi_domain_info *info)
{
	struct irq_chip *chip = info->chip;

	BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask);
	if (!chip->irq_set_affinity)
		chip->irq_set_affinity = msi_domain_set_affinity;
}

/**
 * msi_create_irq_domain - Create a MSI interrupt domain
 * @fwnode:	Optional fwnode of the interrupt controller
 * @info:	MSI domain info
 * @parent:	Parent irq domain
 */
struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
					 struct msi_domain_info *info,
					 struct irq_domain *parent)
{
	struct irq_domain *domain;

	if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
		msi_domain_update_dom_ops(info);
	if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
		msi_domain_update_chip_ops(info);

	domain = irq_domain_create_hierarchy(parent, IRQ_DOMAIN_FLAG_MSI, 0,
					     fwnode, &msi_domain_ops, info);

	if (domain && !domain->name && info->chip)
		domain->name = info->chip->name;

	return domain;
}

int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
			    int nvec, msi_alloc_info_t *arg)
{
	struct msi_domain_info *info = domain->host_data;
	struct msi_domain_ops *ops = info->ops;
	int ret;

	ret = ops->msi_check(domain, info, dev);
	if (ret == 0)
		ret = ops->msi_prepare(domain, dev, nvec, arg);

	return ret;
}

int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
			     int virq, int nvec, msi_alloc_info_t *arg)
{
	struct msi_domain_info *info = domain->host_data;
	struct msi_domain_ops *ops = info->ops;
	struct msi_desc *desc;
	int ret = 0;

	for_each_msi_entry(desc, dev) {
		/* Don't even try the multi-MSI brain damage. */
		if (WARN_ON(!desc->irq || desc->nvec_used != 1)) {
			ret = -EINVAL;
			break;
		}

		if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
			continue;

		ops->set_desc(arg, desc);
		/* Assumes the domain mutex is held! */
		ret = irq_domain_alloc_irqs_hierarchy(domain, desc->irq, 1,
						      arg);
		if (ret)
			break;

		irq_set_msi_desc_off(desc->irq, 0, desc);
	}

	if (ret) {
		/* Mop up the damage */
		for_each_msi_entry(desc, dev) {
			if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
				continue;

			irq_domain_free_irqs_common(domain, desc->irq, 1);
		}
	}

	return ret;
}

/**
 * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
 * @domain:	The domain to allocate from
 * @dev:	Pointer to device struct of the device for which the interrupts
 *		are allocated
 * @nvec:	The number of interrupts to allocate
 *
 * Returns 0 on success or an error code.
 */
int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
			  int nvec)
{
	struct msi_domain_info *info = domain->host_data;
	struct msi_domain_ops *ops = info->ops;
	msi_alloc_info_t arg;
	struct msi_desc *desc;
	int i, ret, virq;

	ret = msi_domain_prepare_irqs(domain, dev, nvec, &arg);
	if (ret)
		return ret;

	for_each_msi_entry(desc, dev) {
		ops->set_desc(&arg, desc);

		virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used,
					       dev_to_node(dev), &arg, false,
					       desc->affinity);
		if (virq < 0) {
			ret = -ENOSPC;
			if (ops->handle_error)
				ret = ops->handle_error(domain, desc, ret);
			if (ops->msi_finish)
				ops->msi_finish(&arg, ret);
			return ret;
		}

		for (i = 0; i < desc->nvec_used; i++)
			irq_set_msi_desc_off(virq, i, desc);
	}

	if (ops->msi_finish)
		ops->msi_finish(&arg, 0);

	for_each_msi_entry(desc, dev) {
		virq = desc->irq;
		if (desc->nvec_used == 1)
			dev_dbg(dev, "irq %d for MSI\n", virq);
		else
			dev_dbg(dev, "irq [%d-%d] for MSI\n",
				virq, virq + desc->nvec_used - 1);
		/*
		 * This flag is set by the PCI layer as we need to activate
		 * the MSI entries before the PCI layer enables MSI in the
		 * card. Otherwise the card latches a random msi message.
		 */
		if (info->flags & MSI_FLAG_ACTIVATE_EARLY) {
			struct irq_data *irq_data;

			irq_data = irq_domain_get_irq_data(domain, desc->irq);
			irq_domain_activate_irq(irq_data);
		}
	}

	return 0;
}

/**
 * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
 * @domain:	The domain to managing the interrupts
 * @dev:	Pointer to device struct of the device for which the interrupts
 *		are free
 */
void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
{
	struct msi_desc *desc;

	for_each_msi_entry(desc, dev) {
		/*
		 * We might have failed to allocate an MSI early
		 * enough that there is no IRQ associated to this
		 * entry. If that's the case, don't do anything.
		 */
		if (desc->irq) {
			irq_domain_free_irqs(desc->irq, desc->nvec_used);
			desc->irq = 0;
		}
	}
}

/**
 * msi_get_domain_info - Get the MSI interrupt domain info for @domain
 * @domain:	The interrupt domain to retrieve data from
 *
 * Returns the pointer to the msi_domain_info stored in
 * @domain->host_data.
 */
struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
{
	return (struct msi_domain_info *)domain->host_data;
}

#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
Commit	Line	Data
f3cf8bb0 JL	1	/*
	2	* linux/kernel/irq/msi.c
	3	*
	4	* Copyright (C) 2014 Intel Corp.
	5	* Author: Jiang Liu <jiang.liu@linux.intel.com>
	6	*
	7	* This file is licensed under GPLv2.
	8	*
	9	* This file contains common code to support Message Signalled Interrupt for
	10	* PCI compatible and non PCI compatible devices.
	11	*/
aeeb5965 JL	12	#include <linux/types.h>
aeeb5965 JL	13	#include <linux/device.h>
f3cf8bb0 JL	14	#include <linux/irq.h>
	15	#include <linux/irqdomain.h>
	16	#include <linux/msi.h>
4e201566	17	#include <linux/slab.h>
d9109698	18
28f4b041 TG	19	/**
	20	* alloc_msi_entry - Allocate an initialize msi_entry
	21	* @dev: Pointer to the device for which this is allocated
	22	* @nvec: The number of vectors used in this entry
	23	* @affinity: Optional pointer to an affinity mask array size of @nvec
	24	*
	25	* If @affinity is not NULL then a an affinity array[@nvec] is allocated
	26	* and the affinity masks from @affinity are copied.
	27	*/
	28	struct msi_desc *
	29	alloc_msi_entry(struct device dev, int nvec, const struct cpumask affinity)
aa48b6f7	30	{
28f4b041 TG	31	struct msi_desc *desc;
	32
	33	desc = kzalloc(sizeof(*desc), GFP_KERNEL);
aa48b6f7 JL	34	if (!desc)
	35	return NULL;
	36
	37	INIT_LIST_HEAD(&desc->list);
	38	desc->dev = dev;
28f4b041 TG	39	desc->nvec_used = nvec;
	40	if (affinity) {
	41	desc->affinity = kmemdup(affinity,
	42	nvec * sizeof(*desc->affinity), GFP_KERNEL);
	43	if (!desc->affinity) {
	44	kfree(desc);
	45	return NULL;
	46	}
	47	}
aa48b6f7 JL	48
	49	return desc;
	50	}
	51
	52	void free_msi_entry(struct msi_desc *entry)
	53	{
28f4b041	54	kfree(entry->affinity);
aa48b6f7 JL	55	kfree(entry);
	56	}
	57
38b6a1cf JL	58	void __get_cached_msi_msg(struct msi_desc entry, struct msi_msg msg)
	59	{
	60	*msg = entry->msg;
	61	}
	62
	63	void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
	64	{
	65	struct msi_desc *entry = irq_get_msi_desc(irq);
	66
	67	__get_cached_msi_msg(entry, msg);
	68	}
	69	EXPORT_SYMBOL_GPL(get_cached_msi_msg);
	70
f3cf8bb0	71	#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
74faaf7a TG	72	static inline void irq_chip_write_msi_msg(struct irq_data *data,
	73	struct msi_msg *msg)
	74	{
	75	data->chip->irq_write_msi_msg(data, msg);
	76	}
	77
f3cf8bb0 JL	78	/**
	79	* msi_domain_set_affinity - Generic affinity setter function for MSI domains
	80	* @irq_data: The irq data associated to the interrupt
	81	* @mask: The affinity mask to set
	82	* @force: Flag to enforce setting (disable online checks)
	83	*
	84	* Intended to be used by MSI interrupt controllers which are
	85	* implemented with hierarchical domains.
	86	*/
	87	int msi_domain_set_affinity(struct irq_data *irq_data,
	88	const struct cpumask *mask, bool force)
	89	{
	90	struct irq_data *parent = irq_data->parent_data;
	91	struct msi_msg msg;
	92	int ret;
	93
	94	ret = parent->chip->irq_set_affinity(parent, mask, force);
	95	if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
	96	BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
	97	irq_chip_write_msi_msg(irq_data, &msg);
	98	}
	99
	100	return ret;
	101	}
	102
	103	static void msi_domain_activate(struct irq_domain *domain,
	104	struct irq_data *irq_data)
	105	{
	106	struct msi_msg msg;
	107
	108	BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
	109	irq_chip_write_msi_msg(irq_data, &msg);
	110	}
	111
	112	static void msi_domain_deactivate(struct irq_domain *domain,
	113	struct irq_data *irq_data)
	114	{
	115	struct msi_msg msg;
	116
	117	memset(&msg, 0, sizeof(msg));
	118	irq_chip_write_msi_msg(irq_data, &msg);
	119	}
	120
	121	static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
	122	unsigned int nr_irqs, void *arg)
	123	{
	124	struct msi_domain_info *info = domain->host_data;
	125	struct msi_domain_ops *ops = info->ops;
	126	irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
	127	int i, ret;
	128
	129	if (irq_find_mapping(domain, hwirq) > 0)
	130	return -EEXIST;
	131
bf6f869f LJ	132	if (domain->parent) {
	133	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
	134	if (ret < 0)
	135	return ret;
	136	}
f3cf8bb0 JL	137
	138	for (i = 0; i < nr_irqs; i++) {
	139	ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
	140	if (ret < 0) {
	141	if (ops->msi_free) {
	142	for (i--; i > 0; i--)
	143	ops->msi_free(domain, info, virq + i);
	144	}
	145	irq_domain_free_irqs_top(domain, virq, nr_irqs);
	146	return ret;
	147	}
	148	}
	149
	150	return 0;
	151	}
	152
	153	static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
	154	unsigned int nr_irqs)
	155	{
	156	struct msi_domain_info *info = domain->host_data;
	157	int i;
	158
	159	if (info->ops->msi_free) {
	160	for (i = 0; i < nr_irqs; i++)
	161	info->ops->msi_free(domain, info, virq + i);
	162	}
	163	irq_domain_free_irqs_top(domain, virq, nr_irqs);
	164	}
	165
01364028	166	static const struct irq_domain_ops msi_domain_ops = {
f3cf8bb0 JL	167	.alloc = msi_domain_alloc,
	168	.free = msi_domain_free,
	169	.activate = msi_domain_activate,
	170	.deactivate = msi_domain_deactivate,
	171	};
	172
aeeb5965 JL	173	#ifdef GENERIC_MSI_DOMAIN_OPS
	174	static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
	175	msi_alloc_info_t *arg)
	176	{
	177	return arg->hwirq;
	178	}
	179
	180	static int msi_domain_ops_prepare(struct irq_domain domain, struct device dev,
	181	int nvec, msi_alloc_info_t *arg)
	182	{
	183	memset(arg, 0, sizeof(*arg));
	184	return 0;
	185	}
	186
	187	static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
	188	struct msi_desc *desc)
	189	{
	190	arg->desc = desc;
	191	}
	192	#else
	193	#define msi_domain_ops_get_hwirq NULL
	194	#define msi_domain_ops_prepare NULL
	195	#define msi_domain_ops_set_desc NULL
	196	#endif /* !GENERIC_MSI_DOMAIN_OPS */
	197
	198	static int msi_domain_ops_init(struct irq_domain *domain,
	199	struct msi_domain_info *info,
	200	unsigned int virq, irq_hw_number_t hwirq,
	201	msi_alloc_info_t *arg)
	202	{
	203	irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
	204	info->chip_data);
	205	if (info->handler && info->handler_name) {
	206	__irq_set_handler(virq, info->handler, 0, info->handler_name);
	207	if (info->handler_data)
	208	irq_set_handler_data(virq, info->handler_data);
	209	}
	210	return 0;
	211	}
	212
	213	static int msi_domain_ops_check(struct irq_domain *domain,
	214	struct msi_domain_info *info,
	215	struct device *dev)
	216	{
	217	return 0;
	218	}
	219
	220	static struct msi_domain_ops msi_domain_ops_default = {
	221	.get_hwirq = msi_domain_ops_get_hwirq,
	222	.msi_init = msi_domain_ops_init,
	223	.msi_check = msi_domain_ops_check,
	224	.msi_prepare = msi_domain_ops_prepare,
	225	.set_desc = msi_domain_ops_set_desc,
	226	};
	227
	228	static void msi_domain_update_dom_ops(struct msi_domain_info *info)
	229	{
	230	struct msi_domain_ops *ops = info->ops;
	231
	232	if (ops == NULL) {
	233	info->ops = &msi_domain_ops_default;
	234	return;
	235	}
	236
237	if (ops->get_hwirq == NULL)
238	ops->get_hwirq = msi_domain_ops_default.get_hwirq;
239	if (ops->msi_init == NULL)
240	ops->msi_init = msi_domain_ops_default.msi_init;
241	if (ops->msi_check == NULL)
242	ops->msi_check = msi_domain_ops_default.msi_check;
243	if (ops->msi_prepare == NULL)
244	ops->msi_prepare = msi_domain_ops_default.msi_prepare;
245	if (ops->set_desc == NULL)
246	ops->set_desc = msi_domain_ops_default.set_desc;
247	}
248
249	static void msi_domain_update_chip_ops(struct msi_domain_info *info)
250	{
251	struct irq_chip *chip = info->chip;
252
0701c53e	253	BUG_ON(!chip \|\| !chip->irq_mask \|\| !chip->irq_unmask);
aeeb5965 JL	254	if (!chip->irq_set_affinity)
	255	chip->irq_set_affinity = msi_domain_set_affinity;
	256	}
	257
f3cf8bb0 JL	258	/**
f3cf8bb0 JL	259	* msi_create_irq_domain - Create a MSI interrupt domain
be5436c8	260	* @fwnode: Optional fwnode of the interrupt controller
f3cf8bb0 JL	261	* @info: MSI domain info
	262	* @parent: Parent irq domain
	263	*/
be5436c8	264	struct irq_domain msi_create_irq_domain(struct fwnode_handle fwnode,
f3cf8bb0 JL	265	struct msi_domain_info *info,
	266	struct irq_domain *parent)
	267	{
a97b852b MZ	268	struct irq_domain *domain;
a97b852b MZ	269
aeeb5965 JL	270	if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
	271	msi_domain_update_dom_ops(info);
	272	if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
	273	msi_domain_update_chip_ops(info);
f3cf8bb0	274
a97b852b MZ	275	domain = irq_domain_create_hierarchy(parent, IRQ_DOMAIN_FLAG_MSI, 0,
a97b852b MZ	276	fwnode, &msi_domain_ops, info);
0165308a TG	277
0165308a TG	278	if (domain && !domain->name && info->chip)
a97b852b MZ	279	domain->name = info->chip->name;
	280
	281	return domain;
f3cf8bb0 JL	282	}
f3cf8bb0 JL	283
b2eba39b MZ	284	int msi_domain_prepare_irqs(struct irq_domain domain, struct device dev,
	285	int nvec, msi_alloc_info_t *arg)
	286	{
	287	struct msi_domain_info *info = domain->host_data;
	288	struct msi_domain_ops *ops = info->ops;
	289	int ret;
	290
	291	ret = ops->msi_check(domain, info, dev);
	292	if (ret == 0)
	293	ret = ops->msi_prepare(domain, dev, nvec, arg);
	294
	295	return ret;
	296	}
	297
2145ac93 MZ	298	int msi_domain_populate_irqs(struct irq_domain domain, struct device dev,
	299	int virq, int nvec, msi_alloc_info_t *arg)
	300	{
	301	struct msi_domain_info *info = domain->host_data;
	302	struct msi_domain_ops *ops = info->ops;
	303	struct msi_desc *desc;
	304	int ret = 0;
	305
	306	for_each_msi_entry(desc, dev) {
	307	/* Don't even try the multi-MSI brain damage. */
	308	if (WARN_ON(!desc->irq \|\| desc->nvec_used != 1)) {
	309	ret = -EINVAL;
	310	break;
	311	}
	312
	313	if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
	314	continue;
	315
	316	ops->set_desc(arg, desc);
	317	/* Assumes the domain mutex is held! */
596a7a1d JK	318	ret = irq_domain_alloc_irqs_hierarchy(domain, desc->irq, 1,
596a7a1d JK	319	arg);
2145ac93 MZ	320	if (ret)
	321	break;
	322
596a7a1d	323	irq_set_msi_desc_off(desc->irq, 0, desc);
2145ac93 MZ	324	}
	325
	326	if (ret) {
	327	/* Mop up the damage */
	328	for_each_msi_entry(desc, dev) {
	329	if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
	330	continue;
	331
	332	irq_domain_free_irqs_common(domain, desc->irq, 1);
	333	}
	334	}
	335
	336	return ret;
	337	}
	338
d9109698 JL	339	/**
	340	* msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
	341	* @domain: The domain to allocate from
	342	* @dev: Pointer to device struct of the device for which the interrupts
	343	* are allocated
	344	* @nvec: The number of interrupts to allocate
	345	*
	346	* Returns 0 on success or an error code.
	347	*/
	348	int msi_domain_alloc_irqs(struct irq_domain domain, struct device dev,
	349	int nvec)
	350	{
	351	struct msi_domain_info *info = domain->host_data;
	352	struct msi_domain_ops *ops = info->ops;
	353	msi_alloc_info_t arg;
	354	struct msi_desc *desc;
b6140914	355	int i, ret, virq;
d9109698	356
b2eba39b	357	ret = msi_domain_prepare_irqs(domain, dev, nvec, &arg);
d9109698 JL	358	if (ret)
	359	return ret;
	360
	361	for_each_msi_entry(desc, dev) {
	362	ops->set_desc(&arg, desc);
	363
b6140914	364	virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used,
06ee6d57	365	dev_to_node(dev), &arg, false,
0972fa57	366	desc->affinity);
d9109698 JL	367	if (virq < 0) {
	368	ret = -ENOSPC;
	369	if (ops->handle_error)
	370	ret = ops->handle_error(domain, desc, ret);
	371	if (ops->msi_finish)
	372	ops->msi_finish(&arg, ret);
	373	return ret;
	374	}
	375
	376	for (i = 0; i < desc->nvec_used; i++)
	377	irq_set_msi_desc_off(virq, i, desc);
	378	}
	379
	380	if (ops->msi_finish)
	381	ops->msi_finish(&arg, 0);
	382
	383	for_each_msi_entry(desc, dev) {
4364e1a2	384	virq = desc->irq;
d9109698 JL	385	if (desc->nvec_used == 1)
	386	dev_dbg(dev, "irq %d for MSI\n", virq);
	387	else
	388	dev_dbg(dev, "irq [%d-%d] for MSI\n",
	389	virq, virq + desc->nvec_used - 1);
f3b0946d MZ	390	/*
	391	* This flag is set by the PCI layer as we need to activate
	392	* the MSI entries before the PCI layer enables MSI in the
	393	* card. Otherwise the card latches a random msi message.
	394	*/
	395	if (info->flags & MSI_FLAG_ACTIVATE_EARLY) {
	396	struct irq_data *irq_data;
	397
	398	irq_data = irq_domain_get_irq_data(domain, desc->irq);
	399	irq_domain_activate_irq(irq_data);
	400	}
d9109698 JL	401	}
	402
	403	return 0;
	404	}
	405
	406	/**
	407	* msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
	408	* @domain: The domain to managing the interrupts
	409	* @dev: Pointer to device struct of the device for which the interrupts
	410	* are free
	411	*/
	412	void msi_domain_free_irqs(struct irq_domain domain, struct device dev)
	413	{
	414	struct msi_desc *desc;
	415
	416	for_each_msi_entry(desc, dev) {
fe0c52fc MZ	417	/*
	418	* We might have failed to allocate an MSI early
	419	* enough that there is no IRQ associated to this
	420	* entry. If that's the case, don't do anything.
	421	*/
	422	if (desc->irq) {
	423	irq_domain_free_irqs(desc->irq, desc->nvec_used);
	424	desc->irq = 0;
	425	}
d9109698 JL	426	}
	427	}
	428
f3cf8bb0 JL	429	/**
	430	* msi_get_domain_info - Get the MSI interrupt domain info for @domain
	431	* @domain: The interrupt domain to retrieve data from
	432	*
	433	* Returns the pointer to the msi_domain_info stored in
	434	* @domain->host_data.
	435	*/
	436	struct msi_domain_info msi_get_domain_info(struct irq_domain domain)
	437	{
	438	return (struct msi_domain_info *)domain->host_data;
	439	}
	440
	441	#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */