[mirror_ubuntu-bionic-kernel.git] / kernel / irq / msi.c

/*
 * linux/kernel/irq/msi.c
 *
 * Copyright (C) 2014 Intel Corp.
 * Author: Jiang Liu <jiang.liu@linux.intel.com>
 *
 * This file is licensed under GPLv2.
 *
 * This file contains common code to support Message Signalled Interrupt for
 * PCI compatible and non PCI compatible devices.
 */
#include <linux/types.h>
#include <linux/device.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/msi.h>

/* Temparory solution for building, will be removed later */
#include <linux/pci.h>

void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
{
	*msg = entry->msg;
}

void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
{
	struct msi_desc *entry = irq_get_msi_desc(irq);

	__get_cached_msi_msg(entry, msg);
}
EXPORT_SYMBOL_GPL(get_cached_msi_msg);

#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
static inline void irq_chip_write_msi_msg(struct irq_data *data,
					  struct msi_msg *msg)
{
	data->chip->irq_write_msi_msg(data, msg);
}

/**
 * msi_domain_set_affinity - Generic affinity setter function for MSI domains
 * @irq_data:	The irq data associated to the interrupt
 * @mask:	The affinity mask to set
 * @force:	Flag to enforce setting (disable online checks)
 *
 * Intended to be used by MSI interrupt controllers which are
 * implemented with hierarchical domains.
 */
int msi_domain_set_affinity(struct irq_data *irq_data,
			    const struct cpumask *mask, bool force)
{
	struct irq_data *parent = irq_data->parent_data;
	struct msi_msg msg;
	int ret;

	ret = parent->chip->irq_set_affinity(parent, mask, force);
	if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
		BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
		irq_chip_write_msi_msg(irq_data, &msg);
	}

	return ret;
}

static void msi_domain_activate(struct irq_domain *domain,
				struct irq_data *irq_data)
{
	struct msi_msg msg;

	BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
	irq_chip_write_msi_msg(irq_data, &msg);
}

static void msi_domain_deactivate(struct irq_domain *domain,
				  struct irq_data *irq_data)
{
	struct msi_msg msg;

	memset(&msg, 0, sizeof(msg));
	irq_chip_write_msi_msg(irq_data, &msg);
}

static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
			    unsigned int nr_irqs, void *arg)
{
	struct msi_domain_info *info = domain->host_data;
	struct msi_domain_ops *ops = info->ops;
	irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
	int i, ret;

	if (irq_find_mapping(domain, hwirq) > 0)
		return -EEXIST;

	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
	if (ret < 0)
		return ret;

	for (i = 0; i < nr_irqs; i++) {
		ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
		if (ret < 0) {
			if (ops->msi_free) {
				for (i--; i > 0; i--)
					ops->msi_free(domain, info, virq + i);
			}
			irq_domain_free_irqs_top(domain, virq, nr_irqs);
			return ret;
		}
	}

	return 0;
}

static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
			    unsigned int nr_irqs)
{
	struct msi_domain_info *info = domain->host_data;
	int i;

	if (info->ops->msi_free) {
		for (i = 0; i < nr_irqs; i++)
			info->ops->msi_free(domain, info, virq + i);
	}
	irq_domain_free_irqs_top(domain, virq, nr_irqs);
}

static struct irq_domain_ops msi_domain_ops = {
	.alloc		= msi_domain_alloc,
	.free		= msi_domain_free,
	.activate	= msi_domain_activate,
	.deactivate	= msi_domain_deactivate,
};

#ifdef GENERIC_MSI_DOMAIN_OPS
static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
						msi_alloc_info_t *arg)
{
	return arg->hwirq;
}

static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
				  int nvec, msi_alloc_info_t *arg)
{
	memset(arg, 0, sizeof(*arg));
	return 0;
}

static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
				    struct msi_desc *desc)
{
	arg->desc = desc;
}
#else
#define msi_domain_ops_get_hwirq	NULL
#define msi_domain_ops_prepare		NULL
#define msi_domain_ops_set_desc		NULL
#endif /* !GENERIC_MSI_DOMAIN_OPS */

static int msi_domain_ops_init(struct irq_domain *domain,
			       struct msi_domain_info *info,
			       unsigned int virq, irq_hw_number_t hwirq,
			       msi_alloc_info_t *arg)
{
	irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
				      info->chip_data);
	if (info->handler && info->handler_name) {
		__irq_set_handler(virq, info->handler, 0, info->handler_name);
		if (info->handler_data)
			irq_set_handler_data(virq, info->handler_data);
	}
	return 0;
}

static int msi_domain_ops_check(struct irq_domain *domain,
				struct msi_domain_info *info,
				struct device *dev)
{
	return 0;
}

static struct msi_domain_ops msi_domain_ops_default = {
	.get_hwirq	= msi_domain_ops_get_hwirq,
	.msi_init	= msi_domain_ops_init,
	.msi_check	= msi_domain_ops_check,
	.msi_prepare	= msi_domain_ops_prepare,
	.set_desc	= msi_domain_ops_set_desc,
};

static void msi_domain_update_dom_ops(struct msi_domain_info *info)
{
	struct msi_domain_ops *ops = info->ops;

	if (ops == NULL) {
		info->ops = &msi_domain_ops_default;
		return;
	}

	if (ops->get_hwirq == NULL)
		ops->get_hwirq = msi_domain_ops_default.get_hwirq;
	if (ops->msi_init == NULL)
		ops->msi_init = msi_domain_ops_default.msi_init;
	if (ops->msi_check == NULL)
		ops->msi_check = msi_domain_ops_default.msi_check;
	if (ops->msi_prepare == NULL)
		ops->msi_prepare = msi_domain_ops_default.msi_prepare;
	if (ops->set_desc == NULL)
		ops->set_desc = msi_domain_ops_default.set_desc;
}

static void msi_domain_update_chip_ops(struct msi_domain_info *info)
{
	struct irq_chip *chip = info->chip;

	BUG_ON(!chip);
	if (!chip->irq_mask)
		chip->irq_mask = pci_msi_mask_irq;
	if (!chip->irq_unmask)
		chip->irq_unmask = pci_msi_unmask_irq;
	if (!chip->irq_set_affinity)
		chip->irq_set_affinity = msi_domain_set_affinity;
}

/**
 * msi_create_irq_domain - Create a MSI interrupt domain
 * @of_node:	Optional device-tree node of the interrupt controller
 * @info:	MSI domain info
 * @parent:	Parent irq domain
 */
struct irq_domain *msi_create_irq_domain(struct device_node *node,
					 struct msi_domain_info *info,
					 struct irq_domain *parent)
{
	if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
		msi_domain_update_dom_ops(info);
	if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
		msi_domain_update_chip_ops(info);

	return irq_domain_add_hierarchy(parent, 0, 0, node, &msi_domain_ops,
					info);
}

/**
 * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
 * @domain:	The domain to allocate from
 * @dev:	Pointer to device struct of the device for which the interrupts
 *		are allocated
 * @nvec:	The number of interrupts to allocate
 *
 * Returns 0 on success or an error code.
 */
int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
			  int nvec)
{
	struct msi_domain_info *info = domain->host_data;
	struct msi_domain_ops *ops = info->ops;
	msi_alloc_info_t arg;
	struct msi_desc *desc;
	int i, ret, virq = -1;

	ret = ops->msi_check(domain, info, dev);
	if (ret == 0)
		ret = ops->msi_prepare(domain, dev, nvec, &arg);
	if (ret)
		return ret;

	for_each_msi_entry(desc, dev) {
		ops->set_desc(&arg, desc);
		if (info->flags & MSI_FLAG_IDENTITY_MAP)
			virq = (int)ops->get_hwirq(info, &arg);
		else
			virq = -1;

		virq = __irq_domain_alloc_irqs(domain, virq, desc->nvec_used,
					       dev_to_node(dev), &arg, false);
		if (virq < 0) {
			ret = -ENOSPC;
			if (ops->handle_error)
				ret = ops->handle_error(domain, desc, ret);
			if (ops->msi_finish)
				ops->msi_finish(&arg, ret);
			return ret;
		}

		for (i = 0; i < desc->nvec_used; i++)
			irq_set_msi_desc_off(virq, i, desc);
	}

	if (ops->msi_finish)
		ops->msi_finish(&arg, 0);

	for_each_msi_entry(desc, dev) {
		if (desc->nvec_used == 1)
			dev_dbg(dev, "irq %d for MSI\n", virq);
		else
			dev_dbg(dev, "irq [%d-%d] for MSI\n",
				virq, virq + desc->nvec_used - 1);
	}

	return 0;
}

/**
 * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
 * @domain:	The domain to managing the interrupts
 * @dev:	Pointer to device struct of the device for which the interrupts
 *		are free
 */
void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
{
	struct msi_desc *desc;

	for_each_msi_entry(desc, dev) {
		/*
		 * We might have failed to allocate an MSI early
		 * enough that there is no IRQ associated to this
		 * entry. If that's the case, don't do anything.
		 */
		if (desc->irq) {
			irq_domain_free_irqs(desc->irq, desc->nvec_used);
			desc->irq = 0;
		}
	}
}

/**
 * msi_get_domain_info - Get the MSI interrupt domain info for @domain
 * @domain:	The interrupt domain to retrieve data from
 *
 * Returns the pointer to the msi_domain_info stored in
 * @domain->host_data.
 */
struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
{
	return (struct msi_domain_info *)domain->host_data;
}

#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
Commit	Line	Data
f3cf8bb0 JL	1	/*
	2	* linux/kernel/irq/msi.c
	3	*
	4	* Copyright (C) 2014 Intel Corp.
	5	* Author: Jiang Liu <jiang.liu@linux.intel.com>
	6	*
	7	* This file is licensed under GPLv2.
	8	*
	9	* This file contains common code to support Message Signalled Interrupt for
	10	* PCI compatible and non PCI compatible devices.
	11	*/
aeeb5965 JL	12	#include <linux/types.h>
aeeb5965 JL	13	#include <linux/device.h>
f3cf8bb0 JL	14	#include <linux/irq.h>
	15	#include <linux/irqdomain.h>
	16	#include <linux/msi.h>
	17
d9109698 JL	18	/* Temparory solution for building, will be removed later */
	19	#include <linux/pci.h>
	20
38b6a1cf JL	21	void __get_cached_msi_msg(struct msi_desc entry, struct msi_msg msg)
	22	{
	23	*msg = entry->msg;
	24	}
	25
	26	void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
	27	{
	28	struct msi_desc *entry = irq_get_msi_desc(irq);
	29
	30	__get_cached_msi_msg(entry, msg);
	31	}
	32	EXPORT_SYMBOL_GPL(get_cached_msi_msg);
	33
f3cf8bb0	34	#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
74faaf7a TG	35	static inline void irq_chip_write_msi_msg(struct irq_data *data,
	36	struct msi_msg *msg)
	37	{
	38	data->chip->irq_write_msi_msg(data, msg);
	39	}
	40
f3cf8bb0 JL	41	/**
	42	* msi_domain_set_affinity - Generic affinity setter function for MSI domains
	43	* @irq_data: The irq data associated to the interrupt
	44	* @mask: The affinity mask to set
	45	* @force: Flag to enforce setting (disable online checks)
	46	*
	47	* Intended to be used by MSI interrupt controllers which are
	48	* implemented with hierarchical domains.
	49	*/
	50	int msi_domain_set_affinity(struct irq_data *irq_data,
	51	const struct cpumask *mask, bool force)
	52	{
	53	struct irq_data *parent = irq_data->parent_data;
	54	struct msi_msg msg;
	55	int ret;
	56
	57	ret = parent->chip->irq_set_affinity(parent, mask, force);
	58	if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
	59	BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
	60	irq_chip_write_msi_msg(irq_data, &msg);
	61	}
	62
	63	return ret;
	64	}
	65
	66	static void msi_domain_activate(struct irq_domain *domain,
	67	struct irq_data *irq_data)
	68	{
	69	struct msi_msg msg;
	70
	71	BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
	72	irq_chip_write_msi_msg(irq_data, &msg);
	73	}
	74
	75	static void msi_domain_deactivate(struct irq_domain *domain,
	76	struct irq_data *irq_data)
	77	{
	78	struct msi_msg msg;
	79
	80	memset(&msg, 0, sizeof(msg));
	81	irq_chip_write_msi_msg(irq_data, &msg);
	82	}
	83
	84	static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
	85	unsigned int nr_irqs, void *arg)
	86	{
	87	struct msi_domain_info *info = domain->host_data;
	88	struct msi_domain_ops *ops = info->ops;
	89	irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
	90	int i, ret;
	91
	92	if (irq_find_mapping(domain, hwirq) > 0)
	93	return -EEXIST;
	94
	95	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
	96	if (ret < 0)
	97	return ret;
	98
	99	for (i = 0; i < nr_irqs; i++) {
	100	ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
	101	if (ret < 0) {
	102	if (ops->msi_free) {
	103	for (i--; i > 0; i--)
	104	ops->msi_free(domain, info, virq + i);
105	}
106	irq_domain_free_irqs_top(domain, virq, nr_irqs);
107	return ret;
108	}
109	}
110
111	return 0;
112	}
113
114	static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
115	unsigned int nr_irqs)
116	{
117	struct msi_domain_info *info = domain->host_data;
118	int i;
119
120	if (info->ops->msi_free) {
121	for (i = 0; i < nr_irqs; i++)
122	info->ops->msi_free(domain, info, virq + i);
123	}
124	irq_domain_free_irqs_top(domain, virq, nr_irqs);
125	}
126
127	static struct irq_domain_ops msi_domain_ops = {
128	.alloc = msi_domain_alloc,
129	.free = msi_domain_free,
130	.activate = msi_domain_activate,
131	.deactivate = msi_domain_deactivate,
132	};
133
aeeb5965 JL	134	#ifdef GENERIC_MSI_DOMAIN_OPS
	135	static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
	136	msi_alloc_info_t *arg)
	137	{
	138	return arg->hwirq;
	139	}
	140
	141	static int msi_domain_ops_prepare(struct irq_domain domain, struct device dev,
	142	int nvec, msi_alloc_info_t *arg)
	143	{
	144	memset(arg, 0, sizeof(*arg));
	145	return 0;
	146	}
	147
	148	static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
	149	struct msi_desc *desc)
	150	{
	151	arg->desc = desc;
	152	}
	153	#else
	154	#define msi_domain_ops_get_hwirq NULL
	155	#define msi_domain_ops_prepare NULL
	156	#define msi_domain_ops_set_desc NULL
	157	#endif /* !GENERIC_MSI_DOMAIN_OPS */
	158
	159	static int msi_domain_ops_init(struct irq_domain *domain,
	160	struct msi_domain_info *info,
	161	unsigned int virq, irq_hw_number_t hwirq,
	162	msi_alloc_info_t *arg)
	163	{
	164	irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
	165	info->chip_data);
	166	if (info->handler && info->handler_name) {
	167	__irq_set_handler(virq, info->handler, 0, info->handler_name);
	168	if (info->handler_data)
	169	irq_set_handler_data(virq, info->handler_data);
	170	}
	171	return 0;
	172	}
	173
	174	static int msi_domain_ops_check(struct irq_domain *domain,
	175	struct msi_domain_info *info,
	176	struct device *dev)
	177	{
	178	return 0;
	179	}
	180
	181	static struct msi_domain_ops msi_domain_ops_default = {
	182	.get_hwirq = msi_domain_ops_get_hwirq,
	183	.msi_init = msi_domain_ops_init,
	184	.msi_check = msi_domain_ops_check,
	185	.msi_prepare = msi_domain_ops_prepare,
	186	.set_desc = msi_domain_ops_set_desc,
	187	};
	188
	189	static void msi_domain_update_dom_ops(struct msi_domain_info *info)
	190	{
	191	struct msi_domain_ops *ops = info->ops;
	192
	193	if (ops == NULL) {
	194	info->ops = &msi_domain_ops_default;
	195	return;
	196	}
	197
198	if (ops->get_hwirq == NULL)
199	ops->get_hwirq = msi_domain_ops_default.get_hwirq;
200	if (ops->msi_init == NULL)
201	ops->msi_init = msi_domain_ops_default.msi_init;
202	if (ops->msi_check == NULL)
203	ops->msi_check = msi_domain_ops_default.msi_check;
204	if (ops->msi_prepare == NULL)
205	ops->msi_prepare = msi_domain_ops_default.msi_prepare;
206	if (ops->set_desc == NULL)
207	ops->set_desc = msi_domain_ops_default.set_desc;
208	}
209
210	static void msi_domain_update_chip_ops(struct msi_domain_info *info)
211	{
212	struct irq_chip *chip = info->chip;
213
214	BUG_ON(!chip);
215	if (!chip->irq_mask)
216	chip->irq_mask = pci_msi_mask_irq;
217	if (!chip->irq_unmask)
218	chip->irq_unmask = pci_msi_unmask_irq;
219	if (!chip->irq_set_affinity)
220	chip->irq_set_affinity = msi_domain_set_affinity;
221	}
222
f3cf8bb0 JL	223	/**
	224	* msi_create_irq_domain - Create a MSI interrupt domain
	225	* @of_node: Optional device-tree node of the interrupt controller
	226	* @info: MSI domain info
	227	* @parent: Parent irq domain
	228	*/
aeeb5965	229	struct irq_domain msi_create_irq_domain(struct device_node node,
f3cf8bb0 JL	230	struct msi_domain_info *info,
	231	struct irq_domain *parent)
	232	{
aeeb5965 JL	233	if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
	234	msi_domain_update_dom_ops(info);
	235	if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
	236	msi_domain_update_chip_ops(info);
f3cf8bb0	237
aeeb5965 JL	238	return irq_domain_add_hierarchy(parent, 0, 0, node, &msi_domain_ops,
aeeb5965 JL	239	info);
f3cf8bb0 JL	240	}
f3cf8bb0 JL	241
d9109698 JL	242	/**
	243	* msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
	244	* @domain: The domain to allocate from
	245	* @dev: Pointer to device struct of the device for which the interrupts
	246	* are allocated
	247	* @nvec: The number of interrupts to allocate
	248	*
	249	* Returns 0 on success or an error code.
	250	*/
	251	int msi_domain_alloc_irqs(struct irq_domain domain, struct device dev,
	252	int nvec)
	253	{
	254	struct msi_domain_info *info = domain->host_data;
	255	struct msi_domain_ops *ops = info->ops;
	256	msi_alloc_info_t arg;
	257	struct msi_desc *desc;
	258	int i, ret, virq = -1;
	259
	260	ret = ops->msi_check(domain, info, dev);
	261	if (ret == 0)
	262	ret = ops->msi_prepare(domain, dev, nvec, &arg);
	263	if (ret)
	264	return ret;
	265
	266	for_each_msi_entry(desc, dev) {
	267	ops->set_desc(&arg, desc);
aeeb5965 JL	268	if (info->flags & MSI_FLAG_IDENTITY_MAP)
	269	virq = (int)ops->get_hwirq(info, &arg);
	270	else
	271	virq = -1;
d9109698	272
aeeb5965	273	virq = __irq_domain_alloc_irqs(domain, virq, desc->nvec_used,
d9109698 JL	274	dev_to_node(dev), &arg, false);
	275	if (virq < 0) {
	276	ret = -ENOSPC;
	277	if (ops->handle_error)
	278	ret = ops->handle_error(domain, desc, ret);
	279	if (ops->msi_finish)
	280	ops->msi_finish(&arg, ret);
	281	return ret;
	282	}
	283
	284	for (i = 0; i < desc->nvec_used; i++)
	285	irq_set_msi_desc_off(virq, i, desc);
	286	}
	287
	288	if (ops->msi_finish)
	289	ops->msi_finish(&arg, 0);
	290
	291	for_each_msi_entry(desc, dev) {
	292	if (desc->nvec_used == 1)
	293	dev_dbg(dev, "irq %d for MSI\n", virq);
	294	else
	295	dev_dbg(dev, "irq [%d-%d] for MSI\n",
	296	virq, virq + desc->nvec_used - 1);
	297	}
	298
	299	return 0;
	300	}
	301
	302	/**
	303	* msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
	304	* @domain: The domain to managing the interrupts
	305	* @dev: Pointer to device struct of the device for which the interrupts
	306	* are free
	307	*/
	308	void msi_domain_free_irqs(struct irq_domain domain, struct device dev)
	309	{
	310	struct msi_desc *desc;
	311
	312	for_each_msi_entry(desc, dev) {
fe0c52fc MZ	313	/*
	314	* We might have failed to allocate an MSI early
	315	* enough that there is no IRQ associated to this
	316	* entry. If that's the case, don't do anything.
	317	*/
	318	if (desc->irq) {
	319	irq_domain_free_irqs(desc->irq, desc->nvec_used);
	320	desc->irq = 0;
	321	}
d9109698 JL	322	}
	323	}
	324
f3cf8bb0 JL	325	/**
	326	* msi_get_domain_info - Get the MSI interrupt domain info for @domain
	327	* @domain: The interrupt domain to retrieve data from
	328	*
	329	* Returns the pointer to the msi_domain_info stored in
	330	* @domain->host_data.
	331	*/
	332	struct msi_domain_info msi_get_domain_info(struct irq_domain domain)
	333	{
	334	return (struct msi_domain_info *)domain->host_data;
	335	}
	336
	337	#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */