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Commit | Line | Data |
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0793a61d TG |
1 | /* |
2 | * Performance counter core code | |
3 | * | |
4 | * Copyright(C) 2008 Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008 Red Hat, Inc., Ingo Molnar | |
6 | * | |
7b732a75 PZ |
7 | * |
8 | * For licensing details see kernel-base/COPYING | |
0793a61d TG |
9 | */ |
10 | ||
11 | #include <linux/fs.h> | |
b9cacc7b | 12 | #include <linux/mm.h> |
0793a61d TG |
13 | #include <linux/cpu.h> |
14 | #include <linux/smp.h> | |
04289bb9 | 15 | #include <linux/file.h> |
0793a61d TG |
16 | #include <linux/poll.h> |
17 | #include <linux/sysfs.h> | |
18 | #include <linux/ptrace.h> | |
19 | #include <linux/percpu.h> | |
b9cacc7b PZ |
20 | #include <linux/vmstat.h> |
21 | #include <linux/hardirq.h> | |
22 | #include <linux/rculist.h> | |
0793a61d TG |
23 | #include <linux/uaccess.h> |
24 | #include <linux/syscalls.h> | |
25 | #include <linux/anon_inodes.h> | |
aa9c4c0f | 26 | #include <linux/kernel_stat.h> |
0793a61d | 27 | #include <linux/perf_counter.h> |
0a4a9391 | 28 | #include <linux/dcache.h> |
0793a61d | 29 | |
4e193bd4 TB |
30 | #include <asm/irq_regs.h> |
31 | ||
0793a61d TG |
32 | /* |
33 | * Each CPU has a list of per CPU counters: | |
34 | */ | |
35 | DEFINE_PER_CPU(struct perf_cpu_context, perf_cpu_context); | |
36 | ||
088e2852 | 37 | int perf_max_counters __read_mostly = 1; |
0793a61d TG |
38 | static int perf_reserved_percpu __read_mostly; |
39 | static int perf_overcommit __read_mostly = 1; | |
40 | ||
41 | /* | |
42 | * Mutex for (sysadmin-configurable) counter reservations: | |
43 | */ | |
44 | static DEFINE_MUTEX(perf_resource_mutex); | |
45 | ||
46 | /* | |
47 | * Architecture provided APIs - weak aliases: | |
48 | */ | |
5c92d124 | 49 | extern __weak const struct hw_perf_counter_ops * |
621a01ea | 50 | hw_perf_counter_init(struct perf_counter *counter) |
0793a61d | 51 | { |
ff6f0541 | 52 | return NULL; |
0793a61d TG |
53 | } |
54 | ||
01b2838c | 55 | u64 __weak hw_perf_save_disable(void) { return 0; } |
01ea1cca | 56 | void __weak hw_perf_restore(u64 ctrl) { barrier(); } |
01d0287f | 57 | void __weak hw_perf_counter_setup(int cpu) { barrier(); } |
3cbed429 PM |
58 | int __weak hw_perf_group_sched_in(struct perf_counter *group_leader, |
59 | struct perf_cpu_context *cpuctx, | |
60 | struct perf_counter_context *ctx, int cpu) | |
61 | { | |
62 | return 0; | |
63 | } | |
0793a61d | 64 | |
4eb96fcf PM |
65 | void __weak perf_counter_print_debug(void) { } |
66 | ||
04289bb9 IM |
67 | static void |
68 | list_add_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
69 | { | |
70 | struct perf_counter *group_leader = counter->group_leader; | |
71 | ||
72 | /* | |
73 | * Depending on whether it is a standalone or sibling counter, | |
74 | * add it straight to the context's counter list, or to the group | |
75 | * leader's sibling list: | |
76 | */ | |
77 | if (counter->group_leader == counter) | |
78 | list_add_tail(&counter->list_entry, &ctx->counter_list); | |
5c148194 | 79 | else { |
04289bb9 | 80 | list_add_tail(&counter->list_entry, &group_leader->sibling_list); |
5c148194 PZ |
81 | group_leader->nr_siblings++; |
82 | } | |
592903cd PZ |
83 | |
84 | list_add_rcu(&counter->event_entry, &ctx->event_list); | |
04289bb9 IM |
85 | } |
86 | ||
87 | static void | |
88 | list_del_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
89 | { | |
90 | struct perf_counter *sibling, *tmp; | |
91 | ||
92 | list_del_init(&counter->list_entry); | |
592903cd | 93 | list_del_rcu(&counter->event_entry); |
04289bb9 | 94 | |
5c148194 PZ |
95 | if (counter->group_leader != counter) |
96 | counter->group_leader->nr_siblings--; | |
97 | ||
04289bb9 IM |
98 | /* |
99 | * If this was a group counter with sibling counters then | |
100 | * upgrade the siblings to singleton counters by adding them | |
101 | * to the context list directly: | |
102 | */ | |
103 | list_for_each_entry_safe(sibling, tmp, | |
104 | &counter->sibling_list, list_entry) { | |
105 | ||
75564232 | 106 | list_move_tail(&sibling->list_entry, &ctx->counter_list); |
04289bb9 IM |
107 | sibling->group_leader = sibling; |
108 | } | |
109 | } | |
110 | ||
3b6f9e5c PM |
111 | static void |
112 | counter_sched_out(struct perf_counter *counter, | |
113 | struct perf_cpu_context *cpuctx, | |
114 | struct perf_counter_context *ctx) | |
115 | { | |
116 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
117 | return; | |
118 | ||
119 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
53cfbf59 | 120 | counter->tstamp_stopped = ctx->time_now; |
3b6f9e5c PM |
121 | counter->hw_ops->disable(counter); |
122 | counter->oncpu = -1; | |
123 | ||
124 | if (!is_software_counter(counter)) | |
125 | cpuctx->active_oncpu--; | |
126 | ctx->nr_active--; | |
127 | if (counter->hw_event.exclusive || !cpuctx->active_oncpu) | |
128 | cpuctx->exclusive = 0; | |
129 | } | |
130 | ||
d859e29f PM |
131 | static void |
132 | group_sched_out(struct perf_counter *group_counter, | |
133 | struct perf_cpu_context *cpuctx, | |
134 | struct perf_counter_context *ctx) | |
135 | { | |
136 | struct perf_counter *counter; | |
137 | ||
138 | if (group_counter->state != PERF_COUNTER_STATE_ACTIVE) | |
139 | return; | |
140 | ||
141 | counter_sched_out(group_counter, cpuctx, ctx); | |
142 | ||
143 | /* | |
144 | * Schedule out siblings (if any): | |
145 | */ | |
146 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) | |
147 | counter_sched_out(counter, cpuctx, ctx); | |
148 | ||
149 | if (group_counter->hw_event.exclusive) | |
150 | cpuctx->exclusive = 0; | |
151 | } | |
152 | ||
0793a61d TG |
153 | /* |
154 | * Cross CPU call to remove a performance counter | |
155 | * | |
156 | * We disable the counter on the hardware level first. After that we | |
157 | * remove it from the context list. | |
158 | */ | |
04289bb9 | 159 | static void __perf_counter_remove_from_context(void *info) |
0793a61d TG |
160 | { |
161 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
162 | struct perf_counter *counter = info; | |
163 | struct perf_counter_context *ctx = counter->ctx; | |
9b51f66d | 164 | unsigned long flags; |
5c92d124 | 165 | u64 perf_flags; |
0793a61d TG |
166 | |
167 | /* | |
168 | * If this is a task context, we need to check whether it is | |
169 | * the current task context of this cpu. If not it has been | |
170 | * scheduled out before the smp call arrived. | |
171 | */ | |
172 | if (ctx->task && cpuctx->task_ctx != ctx) | |
173 | return; | |
174 | ||
aa9c4c0f IM |
175 | curr_rq_lock_irq_save(&flags); |
176 | spin_lock(&ctx->lock); | |
0793a61d | 177 | |
3b6f9e5c PM |
178 | counter_sched_out(counter, cpuctx, ctx); |
179 | ||
180 | counter->task = NULL; | |
0793a61d TG |
181 | ctx->nr_counters--; |
182 | ||
183 | /* | |
184 | * Protect the list operation against NMI by disabling the | |
185 | * counters on a global level. NOP for non NMI based counters. | |
186 | */ | |
01b2838c | 187 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 188 | list_del_counter(counter, ctx); |
01b2838c | 189 | hw_perf_restore(perf_flags); |
0793a61d TG |
190 | |
191 | if (!ctx->task) { | |
192 | /* | |
193 | * Allow more per task counters with respect to the | |
194 | * reservation: | |
195 | */ | |
196 | cpuctx->max_pertask = | |
197 | min(perf_max_counters - ctx->nr_counters, | |
198 | perf_max_counters - perf_reserved_percpu); | |
199 | } | |
200 | ||
aa9c4c0f IM |
201 | spin_unlock(&ctx->lock); |
202 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
203 | } |
204 | ||
205 | ||
206 | /* | |
207 | * Remove the counter from a task's (or a CPU's) list of counters. | |
208 | * | |
d859e29f | 209 | * Must be called with counter->mutex and ctx->mutex held. |
0793a61d TG |
210 | * |
211 | * CPU counters are removed with a smp call. For task counters we only | |
212 | * call when the task is on a CPU. | |
213 | */ | |
04289bb9 | 214 | static void perf_counter_remove_from_context(struct perf_counter *counter) |
0793a61d TG |
215 | { |
216 | struct perf_counter_context *ctx = counter->ctx; | |
217 | struct task_struct *task = ctx->task; | |
218 | ||
219 | if (!task) { | |
220 | /* | |
221 | * Per cpu counters are removed via an smp call and | |
222 | * the removal is always sucessful. | |
223 | */ | |
224 | smp_call_function_single(counter->cpu, | |
04289bb9 | 225 | __perf_counter_remove_from_context, |
0793a61d TG |
226 | counter, 1); |
227 | return; | |
228 | } | |
229 | ||
230 | retry: | |
04289bb9 | 231 | task_oncpu_function_call(task, __perf_counter_remove_from_context, |
0793a61d TG |
232 | counter); |
233 | ||
234 | spin_lock_irq(&ctx->lock); | |
235 | /* | |
236 | * If the context is active we need to retry the smp call. | |
237 | */ | |
04289bb9 | 238 | if (ctx->nr_active && !list_empty(&counter->list_entry)) { |
0793a61d TG |
239 | spin_unlock_irq(&ctx->lock); |
240 | goto retry; | |
241 | } | |
242 | ||
243 | /* | |
244 | * The lock prevents that this context is scheduled in so we | |
04289bb9 | 245 | * can remove the counter safely, if the call above did not |
0793a61d TG |
246 | * succeed. |
247 | */ | |
04289bb9 | 248 | if (!list_empty(&counter->list_entry)) { |
0793a61d | 249 | ctx->nr_counters--; |
04289bb9 | 250 | list_del_counter(counter, ctx); |
0793a61d TG |
251 | counter->task = NULL; |
252 | } | |
253 | spin_unlock_irq(&ctx->lock); | |
254 | } | |
255 | ||
53cfbf59 PM |
256 | /* |
257 | * Get the current time for this context. | |
258 | * If this is a task context, we use the task's task clock, | |
259 | * or for a per-cpu context, we use the cpu clock. | |
260 | */ | |
261 | static u64 get_context_time(struct perf_counter_context *ctx, int update) | |
262 | { | |
263 | struct task_struct *curr = ctx->task; | |
264 | ||
265 | if (!curr) | |
266 | return cpu_clock(smp_processor_id()); | |
267 | ||
268 | return __task_delta_exec(curr, update) + curr->se.sum_exec_runtime; | |
269 | } | |
270 | ||
271 | /* | |
272 | * Update the record of the current time in a context. | |
273 | */ | |
274 | static void update_context_time(struct perf_counter_context *ctx, int update) | |
275 | { | |
276 | ctx->time_now = get_context_time(ctx, update) - ctx->time_lost; | |
277 | } | |
278 | ||
279 | /* | |
280 | * Update the total_time_enabled and total_time_running fields for a counter. | |
281 | */ | |
282 | static void update_counter_times(struct perf_counter *counter) | |
283 | { | |
284 | struct perf_counter_context *ctx = counter->ctx; | |
285 | u64 run_end; | |
286 | ||
287 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) { | |
288 | counter->total_time_enabled = ctx->time_now - | |
289 | counter->tstamp_enabled; | |
290 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
291 | run_end = counter->tstamp_stopped; | |
292 | else | |
293 | run_end = ctx->time_now; | |
294 | counter->total_time_running = run_end - counter->tstamp_running; | |
295 | } | |
296 | } | |
297 | ||
298 | /* | |
299 | * Update total_time_enabled and total_time_running for all counters in a group. | |
300 | */ | |
301 | static void update_group_times(struct perf_counter *leader) | |
302 | { | |
303 | struct perf_counter *counter; | |
304 | ||
305 | update_counter_times(leader); | |
306 | list_for_each_entry(counter, &leader->sibling_list, list_entry) | |
307 | update_counter_times(counter); | |
308 | } | |
309 | ||
d859e29f PM |
310 | /* |
311 | * Cross CPU call to disable a performance counter | |
312 | */ | |
313 | static void __perf_counter_disable(void *info) | |
314 | { | |
315 | struct perf_counter *counter = info; | |
316 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
317 | struct perf_counter_context *ctx = counter->ctx; | |
318 | unsigned long flags; | |
319 | ||
320 | /* | |
321 | * If this is a per-task counter, need to check whether this | |
322 | * counter's task is the current task on this cpu. | |
323 | */ | |
324 | if (ctx->task && cpuctx->task_ctx != ctx) | |
325 | return; | |
326 | ||
327 | curr_rq_lock_irq_save(&flags); | |
328 | spin_lock(&ctx->lock); | |
329 | ||
330 | /* | |
331 | * If the counter is on, turn it off. | |
332 | * If it is in error state, leave it in error state. | |
333 | */ | |
334 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) { | |
53cfbf59 PM |
335 | update_context_time(ctx, 1); |
336 | update_counter_times(counter); | |
d859e29f PM |
337 | if (counter == counter->group_leader) |
338 | group_sched_out(counter, cpuctx, ctx); | |
339 | else | |
340 | counter_sched_out(counter, cpuctx, ctx); | |
341 | counter->state = PERF_COUNTER_STATE_OFF; | |
342 | } | |
343 | ||
344 | spin_unlock(&ctx->lock); | |
345 | curr_rq_unlock_irq_restore(&flags); | |
346 | } | |
347 | ||
348 | /* | |
349 | * Disable a counter. | |
350 | */ | |
351 | static void perf_counter_disable(struct perf_counter *counter) | |
352 | { | |
353 | struct perf_counter_context *ctx = counter->ctx; | |
354 | struct task_struct *task = ctx->task; | |
355 | ||
356 | if (!task) { | |
357 | /* | |
358 | * Disable the counter on the cpu that it's on | |
359 | */ | |
360 | smp_call_function_single(counter->cpu, __perf_counter_disable, | |
361 | counter, 1); | |
362 | return; | |
363 | } | |
364 | ||
365 | retry: | |
366 | task_oncpu_function_call(task, __perf_counter_disable, counter); | |
367 | ||
368 | spin_lock_irq(&ctx->lock); | |
369 | /* | |
370 | * If the counter is still active, we need to retry the cross-call. | |
371 | */ | |
372 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { | |
373 | spin_unlock_irq(&ctx->lock); | |
374 | goto retry; | |
375 | } | |
376 | ||
377 | /* | |
378 | * Since we have the lock this context can't be scheduled | |
379 | * in, so we can change the state safely. | |
380 | */ | |
53cfbf59 PM |
381 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
382 | update_counter_times(counter); | |
d859e29f | 383 | counter->state = PERF_COUNTER_STATE_OFF; |
53cfbf59 | 384 | } |
d859e29f PM |
385 | |
386 | spin_unlock_irq(&ctx->lock); | |
387 | } | |
388 | ||
389 | /* | |
390 | * Disable a counter and all its children. | |
391 | */ | |
392 | static void perf_counter_disable_family(struct perf_counter *counter) | |
393 | { | |
394 | struct perf_counter *child; | |
395 | ||
396 | perf_counter_disable(counter); | |
397 | ||
398 | /* | |
399 | * Lock the mutex to protect the list of children | |
400 | */ | |
401 | mutex_lock(&counter->mutex); | |
402 | list_for_each_entry(child, &counter->child_list, child_list) | |
403 | perf_counter_disable(child); | |
404 | mutex_unlock(&counter->mutex); | |
405 | } | |
406 | ||
235c7fc7 IM |
407 | static int |
408 | counter_sched_in(struct perf_counter *counter, | |
409 | struct perf_cpu_context *cpuctx, | |
410 | struct perf_counter_context *ctx, | |
411 | int cpu) | |
412 | { | |
3b6f9e5c | 413 | if (counter->state <= PERF_COUNTER_STATE_OFF) |
235c7fc7 IM |
414 | return 0; |
415 | ||
416 | counter->state = PERF_COUNTER_STATE_ACTIVE; | |
417 | counter->oncpu = cpu; /* TODO: put 'cpu' into cpuctx->cpu */ | |
418 | /* | |
419 | * The new state must be visible before we turn it on in the hardware: | |
420 | */ | |
421 | smp_wmb(); | |
422 | ||
423 | if (counter->hw_ops->enable(counter)) { | |
424 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
425 | counter->oncpu = -1; | |
426 | return -EAGAIN; | |
427 | } | |
428 | ||
53cfbf59 PM |
429 | counter->tstamp_running += ctx->time_now - counter->tstamp_stopped; |
430 | ||
3b6f9e5c PM |
431 | if (!is_software_counter(counter)) |
432 | cpuctx->active_oncpu++; | |
235c7fc7 IM |
433 | ctx->nr_active++; |
434 | ||
3b6f9e5c PM |
435 | if (counter->hw_event.exclusive) |
436 | cpuctx->exclusive = 1; | |
437 | ||
235c7fc7 IM |
438 | return 0; |
439 | } | |
440 | ||
3b6f9e5c PM |
441 | /* |
442 | * Return 1 for a group consisting entirely of software counters, | |
443 | * 0 if the group contains any hardware counters. | |
444 | */ | |
445 | static int is_software_only_group(struct perf_counter *leader) | |
446 | { | |
447 | struct perf_counter *counter; | |
448 | ||
449 | if (!is_software_counter(leader)) | |
450 | return 0; | |
5c148194 | 451 | |
3b6f9e5c PM |
452 | list_for_each_entry(counter, &leader->sibling_list, list_entry) |
453 | if (!is_software_counter(counter)) | |
454 | return 0; | |
5c148194 | 455 | |
3b6f9e5c PM |
456 | return 1; |
457 | } | |
458 | ||
459 | /* | |
460 | * Work out whether we can put this counter group on the CPU now. | |
461 | */ | |
462 | static int group_can_go_on(struct perf_counter *counter, | |
463 | struct perf_cpu_context *cpuctx, | |
464 | int can_add_hw) | |
465 | { | |
466 | /* | |
467 | * Groups consisting entirely of software counters can always go on. | |
468 | */ | |
469 | if (is_software_only_group(counter)) | |
470 | return 1; | |
471 | /* | |
472 | * If an exclusive group is already on, no other hardware | |
473 | * counters can go on. | |
474 | */ | |
475 | if (cpuctx->exclusive) | |
476 | return 0; | |
477 | /* | |
478 | * If this group is exclusive and there are already | |
479 | * counters on the CPU, it can't go on. | |
480 | */ | |
481 | if (counter->hw_event.exclusive && cpuctx->active_oncpu) | |
482 | return 0; | |
483 | /* | |
484 | * Otherwise, try to add it if all previous groups were able | |
485 | * to go on. | |
486 | */ | |
487 | return can_add_hw; | |
488 | } | |
489 | ||
53cfbf59 PM |
490 | static void add_counter_to_ctx(struct perf_counter *counter, |
491 | struct perf_counter_context *ctx) | |
492 | { | |
493 | list_add_counter(counter, ctx); | |
494 | ctx->nr_counters++; | |
495 | counter->prev_state = PERF_COUNTER_STATE_OFF; | |
496 | counter->tstamp_enabled = ctx->time_now; | |
497 | counter->tstamp_running = ctx->time_now; | |
498 | counter->tstamp_stopped = ctx->time_now; | |
499 | } | |
500 | ||
0793a61d | 501 | /* |
235c7fc7 | 502 | * Cross CPU call to install and enable a performance counter |
0793a61d TG |
503 | */ |
504 | static void __perf_install_in_context(void *info) | |
505 | { | |
506 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
507 | struct perf_counter *counter = info; | |
508 | struct perf_counter_context *ctx = counter->ctx; | |
d859e29f | 509 | struct perf_counter *leader = counter->group_leader; |
0793a61d | 510 | int cpu = smp_processor_id(); |
9b51f66d | 511 | unsigned long flags; |
5c92d124 | 512 | u64 perf_flags; |
3b6f9e5c | 513 | int err; |
0793a61d TG |
514 | |
515 | /* | |
516 | * If this is a task context, we need to check whether it is | |
517 | * the current task context of this cpu. If not it has been | |
518 | * scheduled out before the smp call arrived. | |
519 | */ | |
520 | if (ctx->task && cpuctx->task_ctx != ctx) | |
521 | return; | |
522 | ||
aa9c4c0f IM |
523 | curr_rq_lock_irq_save(&flags); |
524 | spin_lock(&ctx->lock); | |
53cfbf59 | 525 | update_context_time(ctx, 1); |
0793a61d TG |
526 | |
527 | /* | |
528 | * Protect the list operation against NMI by disabling the | |
529 | * counters on a global level. NOP for non NMI based counters. | |
530 | */ | |
01b2838c | 531 | perf_flags = hw_perf_save_disable(); |
0793a61d | 532 | |
53cfbf59 | 533 | add_counter_to_ctx(counter, ctx); |
0793a61d | 534 | |
d859e29f PM |
535 | /* |
536 | * Don't put the counter on if it is disabled or if | |
537 | * it is in a group and the group isn't on. | |
538 | */ | |
539 | if (counter->state != PERF_COUNTER_STATE_INACTIVE || | |
540 | (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE)) | |
541 | goto unlock; | |
542 | ||
3b6f9e5c PM |
543 | /* |
544 | * An exclusive counter can't go on if there are already active | |
545 | * hardware counters, and no hardware counter can go on if there | |
546 | * is already an exclusive counter on. | |
547 | */ | |
d859e29f | 548 | if (!group_can_go_on(counter, cpuctx, 1)) |
3b6f9e5c PM |
549 | err = -EEXIST; |
550 | else | |
551 | err = counter_sched_in(counter, cpuctx, ctx, cpu); | |
552 | ||
d859e29f PM |
553 | if (err) { |
554 | /* | |
555 | * This counter couldn't go on. If it is in a group | |
556 | * then we have to pull the whole group off. | |
557 | * If the counter group is pinned then put it in error state. | |
558 | */ | |
559 | if (leader != counter) | |
560 | group_sched_out(leader, cpuctx, ctx); | |
53cfbf59 PM |
561 | if (leader->hw_event.pinned) { |
562 | update_group_times(leader); | |
d859e29f | 563 | leader->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 564 | } |
d859e29f | 565 | } |
0793a61d | 566 | |
3b6f9e5c | 567 | if (!err && !ctx->task && cpuctx->max_pertask) |
0793a61d TG |
568 | cpuctx->max_pertask--; |
569 | ||
d859e29f | 570 | unlock: |
235c7fc7 IM |
571 | hw_perf_restore(perf_flags); |
572 | ||
aa9c4c0f IM |
573 | spin_unlock(&ctx->lock); |
574 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
575 | } |
576 | ||
577 | /* | |
578 | * Attach a performance counter to a context | |
579 | * | |
580 | * First we add the counter to the list with the hardware enable bit | |
581 | * in counter->hw_config cleared. | |
582 | * | |
583 | * If the counter is attached to a task which is on a CPU we use a smp | |
584 | * call to enable it in the task context. The task might have been | |
585 | * scheduled away, but we check this in the smp call again. | |
d859e29f PM |
586 | * |
587 | * Must be called with ctx->mutex held. | |
0793a61d TG |
588 | */ |
589 | static void | |
590 | perf_install_in_context(struct perf_counter_context *ctx, | |
591 | struct perf_counter *counter, | |
592 | int cpu) | |
593 | { | |
594 | struct task_struct *task = ctx->task; | |
595 | ||
0793a61d TG |
596 | if (!task) { |
597 | /* | |
598 | * Per cpu counters are installed via an smp call and | |
599 | * the install is always sucessful. | |
600 | */ | |
601 | smp_call_function_single(cpu, __perf_install_in_context, | |
602 | counter, 1); | |
603 | return; | |
604 | } | |
605 | ||
606 | counter->task = task; | |
607 | retry: | |
608 | task_oncpu_function_call(task, __perf_install_in_context, | |
609 | counter); | |
610 | ||
611 | spin_lock_irq(&ctx->lock); | |
612 | /* | |
0793a61d TG |
613 | * we need to retry the smp call. |
614 | */ | |
d859e29f | 615 | if (ctx->is_active && list_empty(&counter->list_entry)) { |
0793a61d TG |
616 | spin_unlock_irq(&ctx->lock); |
617 | goto retry; | |
618 | } | |
619 | ||
620 | /* | |
621 | * The lock prevents that this context is scheduled in so we | |
622 | * can add the counter safely, if it the call above did not | |
623 | * succeed. | |
624 | */ | |
53cfbf59 PM |
625 | if (list_empty(&counter->list_entry)) |
626 | add_counter_to_ctx(counter, ctx); | |
0793a61d TG |
627 | spin_unlock_irq(&ctx->lock); |
628 | } | |
629 | ||
d859e29f PM |
630 | /* |
631 | * Cross CPU call to enable a performance counter | |
632 | */ | |
633 | static void __perf_counter_enable(void *info) | |
04289bb9 | 634 | { |
d859e29f PM |
635 | struct perf_counter *counter = info; |
636 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
637 | struct perf_counter_context *ctx = counter->ctx; | |
638 | struct perf_counter *leader = counter->group_leader; | |
639 | unsigned long flags; | |
640 | int err; | |
04289bb9 | 641 | |
d859e29f PM |
642 | /* |
643 | * If this is a per-task counter, need to check whether this | |
644 | * counter's task is the current task on this cpu. | |
645 | */ | |
646 | if (ctx->task && cpuctx->task_ctx != ctx) | |
3cbed429 PM |
647 | return; |
648 | ||
d859e29f PM |
649 | curr_rq_lock_irq_save(&flags); |
650 | spin_lock(&ctx->lock); | |
53cfbf59 | 651 | update_context_time(ctx, 1); |
d859e29f | 652 | |
c07c99b6 | 653 | counter->prev_state = counter->state; |
d859e29f PM |
654 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) |
655 | goto unlock; | |
656 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
53cfbf59 | 657 | counter->tstamp_enabled = ctx->time_now - counter->total_time_enabled; |
04289bb9 IM |
658 | |
659 | /* | |
d859e29f PM |
660 | * If the counter is in a group and isn't the group leader, |
661 | * then don't put it on unless the group is on. | |
04289bb9 | 662 | */ |
d859e29f PM |
663 | if (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE) |
664 | goto unlock; | |
3b6f9e5c | 665 | |
d859e29f PM |
666 | if (!group_can_go_on(counter, cpuctx, 1)) |
667 | err = -EEXIST; | |
668 | else | |
669 | err = counter_sched_in(counter, cpuctx, ctx, | |
670 | smp_processor_id()); | |
671 | ||
672 | if (err) { | |
673 | /* | |
674 | * If this counter can't go on and it's part of a | |
675 | * group, then the whole group has to come off. | |
676 | */ | |
677 | if (leader != counter) | |
678 | group_sched_out(leader, cpuctx, ctx); | |
53cfbf59 PM |
679 | if (leader->hw_event.pinned) { |
680 | update_group_times(leader); | |
d859e29f | 681 | leader->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 682 | } |
d859e29f PM |
683 | } |
684 | ||
685 | unlock: | |
686 | spin_unlock(&ctx->lock); | |
687 | curr_rq_unlock_irq_restore(&flags); | |
688 | } | |
689 | ||
690 | /* | |
691 | * Enable a counter. | |
692 | */ | |
693 | static void perf_counter_enable(struct perf_counter *counter) | |
694 | { | |
695 | struct perf_counter_context *ctx = counter->ctx; | |
696 | struct task_struct *task = ctx->task; | |
697 | ||
698 | if (!task) { | |
699 | /* | |
700 | * Enable the counter on the cpu that it's on | |
701 | */ | |
702 | smp_call_function_single(counter->cpu, __perf_counter_enable, | |
703 | counter, 1); | |
704 | return; | |
705 | } | |
706 | ||
707 | spin_lock_irq(&ctx->lock); | |
708 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
709 | goto out; | |
710 | ||
711 | /* | |
712 | * If the counter is in error state, clear that first. | |
713 | * That way, if we see the counter in error state below, we | |
714 | * know that it has gone back into error state, as distinct | |
715 | * from the task having been scheduled away before the | |
716 | * cross-call arrived. | |
717 | */ | |
718 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
719 | counter->state = PERF_COUNTER_STATE_OFF; | |
720 | ||
721 | retry: | |
722 | spin_unlock_irq(&ctx->lock); | |
723 | task_oncpu_function_call(task, __perf_counter_enable, counter); | |
724 | ||
725 | spin_lock_irq(&ctx->lock); | |
726 | ||
727 | /* | |
728 | * If the context is active and the counter is still off, | |
729 | * we need to retry the cross-call. | |
730 | */ | |
731 | if (ctx->is_active && counter->state == PERF_COUNTER_STATE_OFF) | |
732 | goto retry; | |
733 | ||
734 | /* | |
735 | * Since we have the lock this context can't be scheduled | |
736 | * in, so we can change the state safely. | |
737 | */ | |
53cfbf59 | 738 | if (counter->state == PERF_COUNTER_STATE_OFF) { |
d859e29f | 739 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
53cfbf59 PM |
740 | counter->tstamp_enabled = ctx->time_now - |
741 | counter->total_time_enabled; | |
742 | } | |
d859e29f PM |
743 | out: |
744 | spin_unlock_irq(&ctx->lock); | |
745 | } | |
746 | ||
747 | /* | |
748 | * Enable a counter and all its children. | |
749 | */ | |
750 | static void perf_counter_enable_family(struct perf_counter *counter) | |
751 | { | |
752 | struct perf_counter *child; | |
753 | ||
754 | perf_counter_enable(counter); | |
755 | ||
756 | /* | |
757 | * Lock the mutex to protect the list of children | |
758 | */ | |
759 | mutex_lock(&counter->mutex); | |
760 | list_for_each_entry(child, &counter->child_list, child_list) | |
761 | perf_counter_enable(child); | |
762 | mutex_unlock(&counter->mutex); | |
04289bb9 IM |
763 | } |
764 | ||
235c7fc7 IM |
765 | void __perf_counter_sched_out(struct perf_counter_context *ctx, |
766 | struct perf_cpu_context *cpuctx) | |
767 | { | |
768 | struct perf_counter *counter; | |
3cbed429 | 769 | u64 flags; |
235c7fc7 | 770 | |
d859e29f PM |
771 | spin_lock(&ctx->lock); |
772 | ctx->is_active = 0; | |
235c7fc7 | 773 | if (likely(!ctx->nr_counters)) |
d859e29f | 774 | goto out; |
53cfbf59 | 775 | update_context_time(ctx, 0); |
235c7fc7 | 776 | |
3cbed429 | 777 | flags = hw_perf_save_disable(); |
235c7fc7 IM |
778 | if (ctx->nr_active) { |
779 | list_for_each_entry(counter, &ctx->counter_list, list_entry) | |
780 | group_sched_out(counter, cpuctx, ctx); | |
781 | } | |
3cbed429 | 782 | hw_perf_restore(flags); |
d859e29f | 783 | out: |
235c7fc7 IM |
784 | spin_unlock(&ctx->lock); |
785 | } | |
786 | ||
0793a61d TG |
787 | /* |
788 | * Called from scheduler to remove the counters of the current task, | |
789 | * with interrupts disabled. | |
790 | * | |
791 | * We stop each counter and update the counter value in counter->count. | |
792 | * | |
7671581f | 793 | * This does not protect us against NMI, but disable() |
0793a61d TG |
794 | * sets the disabled bit in the control field of counter _before_ |
795 | * accessing the counter control register. If a NMI hits, then it will | |
796 | * not restart the counter. | |
797 | */ | |
798 | void perf_counter_task_sched_out(struct task_struct *task, int cpu) | |
799 | { | |
800 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
801 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
4a0deca6 | 802 | struct pt_regs *regs; |
0793a61d TG |
803 | |
804 | if (likely(!cpuctx->task_ctx)) | |
805 | return; | |
806 | ||
4a0deca6 PZ |
807 | regs = task_pt_regs(task); |
808 | perf_swcounter_event(PERF_COUNT_CONTEXT_SWITCHES, 1, 1, regs); | |
235c7fc7 IM |
809 | __perf_counter_sched_out(ctx, cpuctx); |
810 | ||
0793a61d TG |
811 | cpuctx->task_ctx = NULL; |
812 | } | |
813 | ||
235c7fc7 | 814 | static void perf_counter_cpu_sched_out(struct perf_cpu_context *cpuctx) |
04289bb9 | 815 | { |
235c7fc7 | 816 | __perf_counter_sched_out(&cpuctx->ctx, cpuctx); |
04289bb9 IM |
817 | } |
818 | ||
7995888f | 819 | static int |
04289bb9 IM |
820 | group_sched_in(struct perf_counter *group_counter, |
821 | struct perf_cpu_context *cpuctx, | |
822 | struct perf_counter_context *ctx, | |
823 | int cpu) | |
824 | { | |
95cdd2e7 | 825 | struct perf_counter *counter, *partial_group; |
3cbed429 PM |
826 | int ret; |
827 | ||
828 | if (group_counter->state == PERF_COUNTER_STATE_OFF) | |
829 | return 0; | |
830 | ||
831 | ret = hw_perf_group_sched_in(group_counter, cpuctx, ctx, cpu); | |
832 | if (ret) | |
833 | return ret < 0 ? ret : 0; | |
04289bb9 | 834 | |
c07c99b6 | 835 | group_counter->prev_state = group_counter->state; |
95cdd2e7 IM |
836 | if (counter_sched_in(group_counter, cpuctx, ctx, cpu)) |
837 | return -EAGAIN; | |
04289bb9 IM |
838 | |
839 | /* | |
840 | * Schedule in siblings as one group (if any): | |
841 | */ | |
7995888f | 842 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { |
c07c99b6 | 843 | counter->prev_state = counter->state; |
95cdd2e7 IM |
844 | if (counter_sched_in(counter, cpuctx, ctx, cpu)) { |
845 | partial_group = counter; | |
846 | goto group_error; | |
847 | } | |
95cdd2e7 IM |
848 | } |
849 | ||
3cbed429 | 850 | return 0; |
95cdd2e7 IM |
851 | |
852 | group_error: | |
853 | /* | |
854 | * Groups can be scheduled in as one unit only, so undo any | |
855 | * partial group before returning: | |
856 | */ | |
857 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { | |
858 | if (counter == partial_group) | |
859 | break; | |
860 | counter_sched_out(counter, cpuctx, ctx); | |
7995888f | 861 | } |
95cdd2e7 | 862 | counter_sched_out(group_counter, cpuctx, ctx); |
7995888f | 863 | |
95cdd2e7 | 864 | return -EAGAIN; |
04289bb9 IM |
865 | } |
866 | ||
235c7fc7 IM |
867 | static void |
868 | __perf_counter_sched_in(struct perf_counter_context *ctx, | |
869 | struct perf_cpu_context *cpuctx, int cpu) | |
0793a61d | 870 | { |
0793a61d | 871 | struct perf_counter *counter; |
3cbed429 | 872 | u64 flags; |
dd0e6ba2 | 873 | int can_add_hw = 1; |
0793a61d | 874 | |
d859e29f PM |
875 | spin_lock(&ctx->lock); |
876 | ctx->is_active = 1; | |
0793a61d | 877 | if (likely(!ctx->nr_counters)) |
d859e29f | 878 | goto out; |
0793a61d | 879 | |
53cfbf59 PM |
880 | /* |
881 | * Add any time since the last sched_out to the lost time | |
882 | * so it doesn't get included in the total_time_enabled and | |
883 | * total_time_running measures for counters in the context. | |
884 | */ | |
885 | ctx->time_lost = get_context_time(ctx, 0) - ctx->time_now; | |
886 | ||
3cbed429 | 887 | flags = hw_perf_save_disable(); |
3b6f9e5c PM |
888 | |
889 | /* | |
890 | * First go through the list and put on any pinned groups | |
891 | * in order to give them the best chance of going on. | |
892 | */ | |
893 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
894 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
895 | !counter->hw_event.pinned) | |
896 | continue; | |
897 | if (counter->cpu != -1 && counter->cpu != cpu) | |
898 | continue; | |
899 | ||
900 | if (group_can_go_on(counter, cpuctx, 1)) | |
901 | group_sched_in(counter, cpuctx, ctx, cpu); | |
902 | ||
903 | /* | |
904 | * If this pinned group hasn't been scheduled, | |
905 | * put it in error state. | |
906 | */ | |
53cfbf59 PM |
907 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
908 | update_group_times(counter); | |
3b6f9e5c | 909 | counter->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 910 | } |
3b6f9e5c PM |
911 | } |
912 | ||
04289bb9 | 913 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
3b6f9e5c PM |
914 | /* |
915 | * Ignore counters in OFF or ERROR state, and | |
916 | * ignore pinned counters since we did them already. | |
917 | */ | |
918 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
919 | counter->hw_event.pinned) | |
920 | continue; | |
921 | ||
04289bb9 IM |
922 | /* |
923 | * Listen to the 'cpu' scheduling filter constraint | |
924 | * of counters: | |
925 | */ | |
0793a61d TG |
926 | if (counter->cpu != -1 && counter->cpu != cpu) |
927 | continue; | |
928 | ||
3b6f9e5c | 929 | if (group_can_go_on(counter, cpuctx, can_add_hw)) { |
dd0e6ba2 PM |
930 | if (group_sched_in(counter, cpuctx, ctx, cpu)) |
931 | can_add_hw = 0; | |
3b6f9e5c | 932 | } |
0793a61d | 933 | } |
3cbed429 | 934 | hw_perf_restore(flags); |
d859e29f | 935 | out: |
0793a61d | 936 | spin_unlock(&ctx->lock); |
235c7fc7 IM |
937 | } |
938 | ||
939 | /* | |
940 | * Called from scheduler to add the counters of the current task | |
941 | * with interrupts disabled. | |
942 | * | |
943 | * We restore the counter value and then enable it. | |
944 | * | |
945 | * This does not protect us against NMI, but enable() | |
946 | * sets the enabled bit in the control field of counter _before_ | |
947 | * accessing the counter control register. If a NMI hits, then it will | |
948 | * keep the counter running. | |
949 | */ | |
950 | void perf_counter_task_sched_in(struct task_struct *task, int cpu) | |
951 | { | |
952 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
953 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
04289bb9 | 954 | |
235c7fc7 | 955 | __perf_counter_sched_in(ctx, cpuctx, cpu); |
0793a61d TG |
956 | cpuctx->task_ctx = ctx; |
957 | } | |
958 | ||
235c7fc7 IM |
959 | static void perf_counter_cpu_sched_in(struct perf_cpu_context *cpuctx, int cpu) |
960 | { | |
961 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
962 | ||
963 | __perf_counter_sched_in(ctx, cpuctx, cpu); | |
964 | } | |
965 | ||
1d1c7ddb IM |
966 | int perf_counter_task_disable(void) |
967 | { | |
968 | struct task_struct *curr = current; | |
969 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
970 | struct perf_counter *counter; | |
aa9c4c0f | 971 | unsigned long flags; |
1d1c7ddb IM |
972 | u64 perf_flags; |
973 | int cpu; | |
974 | ||
975 | if (likely(!ctx->nr_counters)) | |
976 | return 0; | |
977 | ||
aa9c4c0f | 978 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
979 | cpu = smp_processor_id(); |
980 | ||
aa9c4c0f IM |
981 | /* force the update of the task clock: */ |
982 | __task_delta_exec(curr, 1); | |
983 | ||
1d1c7ddb IM |
984 | perf_counter_task_sched_out(curr, cpu); |
985 | ||
986 | spin_lock(&ctx->lock); | |
987 | ||
988 | /* | |
989 | * Disable all the counters: | |
990 | */ | |
991 | perf_flags = hw_perf_save_disable(); | |
992 | ||
3b6f9e5c | 993 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
53cfbf59 PM |
994 | if (counter->state != PERF_COUNTER_STATE_ERROR) { |
995 | update_group_times(counter); | |
3b6f9e5c | 996 | counter->state = PERF_COUNTER_STATE_OFF; |
53cfbf59 | 997 | } |
3b6f9e5c | 998 | } |
9b51f66d | 999 | |
1d1c7ddb IM |
1000 | hw_perf_restore(perf_flags); |
1001 | ||
1002 | spin_unlock(&ctx->lock); | |
1003 | ||
aa9c4c0f | 1004 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
1005 | |
1006 | return 0; | |
1007 | } | |
1008 | ||
1009 | int perf_counter_task_enable(void) | |
1010 | { | |
1011 | struct task_struct *curr = current; | |
1012 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
1013 | struct perf_counter *counter; | |
aa9c4c0f | 1014 | unsigned long flags; |
1d1c7ddb IM |
1015 | u64 perf_flags; |
1016 | int cpu; | |
1017 | ||
1018 | if (likely(!ctx->nr_counters)) | |
1019 | return 0; | |
1020 | ||
aa9c4c0f | 1021 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
1022 | cpu = smp_processor_id(); |
1023 | ||
aa9c4c0f IM |
1024 | /* force the update of the task clock: */ |
1025 | __task_delta_exec(curr, 1); | |
1026 | ||
235c7fc7 IM |
1027 | perf_counter_task_sched_out(curr, cpu); |
1028 | ||
1d1c7ddb IM |
1029 | spin_lock(&ctx->lock); |
1030 | ||
1031 | /* | |
1032 | * Disable all the counters: | |
1033 | */ | |
1034 | perf_flags = hw_perf_save_disable(); | |
1035 | ||
1036 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
3b6f9e5c | 1037 | if (counter->state > PERF_COUNTER_STATE_OFF) |
1d1c7ddb | 1038 | continue; |
6a930700 | 1039 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
53cfbf59 PM |
1040 | counter->tstamp_enabled = ctx->time_now - |
1041 | counter->total_time_enabled; | |
aa9c4c0f | 1042 | counter->hw_event.disabled = 0; |
1d1c7ddb IM |
1043 | } |
1044 | hw_perf_restore(perf_flags); | |
1045 | ||
1046 | spin_unlock(&ctx->lock); | |
1047 | ||
1048 | perf_counter_task_sched_in(curr, cpu); | |
1049 | ||
aa9c4c0f | 1050 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
1051 | |
1052 | return 0; | |
1053 | } | |
1054 | ||
235c7fc7 IM |
1055 | /* |
1056 | * Round-robin a context's counters: | |
1057 | */ | |
1058 | static void rotate_ctx(struct perf_counter_context *ctx) | |
0793a61d | 1059 | { |
0793a61d | 1060 | struct perf_counter *counter; |
5c92d124 | 1061 | u64 perf_flags; |
0793a61d | 1062 | |
235c7fc7 | 1063 | if (!ctx->nr_counters) |
0793a61d TG |
1064 | return; |
1065 | ||
0793a61d | 1066 | spin_lock(&ctx->lock); |
0793a61d | 1067 | /* |
04289bb9 | 1068 | * Rotate the first entry last (works just fine for group counters too): |
0793a61d | 1069 | */ |
01b2838c | 1070 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 1071 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
75564232 | 1072 | list_move_tail(&counter->list_entry, &ctx->counter_list); |
0793a61d TG |
1073 | break; |
1074 | } | |
01b2838c | 1075 | hw_perf_restore(perf_flags); |
0793a61d TG |
1076 | |
1077 | spin_unlock(&ctx->lock); | |
235c7fc7 IM |
1078 | } |
1079 | ||
1080 | void perf_counter_task_tick(struct task_struct *curr, int cpu) | |
1081 | { | |
1082 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1083 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
1084 | const int rotate_percpu = 0; | |
1085 | ||
1086 | if (rotate_percpu) | |
1087 | perf_counter_cpu_sched_out(cpuctx); | |
1088 | perf_counter_task_sched_out(curr, cpu); | |
0793a61d | 1089 | |
235c7fc7 IM |
1090 | if (rotate_percpu) |
1091 | rotate_ctx(&cpuctx->ctx); | |
1092 | rotate_ctx(ctx); | |
1093 | ||
1094 | if (rotate_percpu) | |
1095 | perf_counter_cpu_sched_in(cpuctx, cpu); | |
0793a61d TG |
1096 | perf_counter_task_sched_in(curr, cpu); |
1097 | } | |
1098 | ||
0793a61d TG |
1099 | /* |
1100 | * Cross CPU call to read the hardware counter | |
1101 | */ | |
7671581f | 1102 | static void __read(void *info) |
0793a61d | 1103 | { |
621a01ea | 1104 | struct perf_counter *counter = info; |
53cfbf59 | 1105 | struct perf_counter_context *ctx = counter->ctx; |
aa9c4c0f | 1106 | unsigned long flags; |
621a01ea | 1107 | |
aa9c4c0f | 1108 | curr_rq_lock_irq_save(&flags); |
53cfbf59 PM |
1109 | if (ctx->is_active) |
1110 | update_context_time(ctx, 1); | |
7671581f | 1111 | counter->hw_ops->read(counter); |
53cfbf59 | 1112 | update_counter_times(counter); |
aa9c4c0f | 1113 | curr_rq_unlock_irq_restore(&flags); |
0793a61d TG |
1114 | } |
1115 | ||
04289bb9 | 1116 | static u64 perf_counter_read(struct perf_counter *counter) |
0793a61d TG |
1117 | { |
1118 | /* | |
1119 | * If counter is enabled and currently active on a CPU, update the | |
1120 | * value in the counter structure: | |
1121 | */ | |
6a930700 | 1122 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { |
0793a61d | 1123 | smp_call_function_single(counter->oncpu, |
7671581f | 1124 | __read, counter, 1); |
53cfbf59 PM |
1125 | } else if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
1126 | update_counter_times(counter); | |
0793a61d TG |
1127 | } |
1128 | ||
ee06094f | 1129 | return atomic64_read(&counter->count); |
0793a61d TG |
1130 | } |
1131 | ||
0793a61d TG |
1132 | static void put_context(struct perf_counter_context *ctx) |
1133 | { | |
1134 | if (ctx->task) | |
1135 | put_task_struct(ctx->task); | |
1136 | } | |
1137 | ||
1138 | static struct perf_counter_context *find_get_context(pid_t pid, int cpu) | |
1139 | { | |
1140 | struct perf_cpu_context *cpuctx; | |
1141 | struct perf_counter_context *ctx; | |
1142 | struct task_struct *task; | |
1143 | ||
1144 | /* | |
1145 | * If cpu is not a wildcard then this is a percpu counter: | |
1146 | */ | |
1147 | if (cpu != -1) { | |
1148 | /* Must be root to operate on a CPU counter: */ | |
1149 | if (!capable(CAP_SYS_ADMIN)) | |
1150 | return ERR_PTR(-EACCES); | |
1151 | ||
1152 | if (cpu < 0 || cpu > num_possible_cpus()) | |
1153 | return ERR_PTR(-EINVAL); | |
1154 | ||
1155 | /* | |
1156 | * We could be clever and allow to attach a counter to an | |
1157 | * offline CPU and activate it when the CPU comes up, but | |
1158 | * that's for later. | |
1159 | */ | |
1160 | if (!cpu_isset(cpu, cpu_online_map)) | |
1161 | return ERR_PTR(-ENODEV); | |
1162 | ||
1163 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1164 | ctx = &cpuctx->ctx; | |
1165 | ||
0793a61d TG |
1166 | return ctx; |
1167 | } | |
1168 | ||
1169 | rcu_read_lock(); | |
1170 | if (!pid) | |
1171 | task = current; | |
1172 | else | |
1173 | task = find_task_by_vpid(pid); | |
1174 | if (task) | |
1175 | get_task_struct(task); | |
1176 | rcu_read_unlock(); | |
1177 | ||
1178 | if (!task) | |
1179 | return ERR_PTR(-ESRCH); | |
1180 | ||
1181 | ctx = &task->perf_counter_ctx; | |
1182 | ctx->task = task; | |
1183 | ||
1184 | /* Reuse ptrace permission checks for now. */ | |
1185 | if (!ptrace_may_access(task, PTRACE_MODE_READ)) { | |
1186 | put_context(ctx); | |
1187 | return ERR_PTR(-EACCES); | |
1188 | } | |
1189 | ||
1190 | return ctx; | |
1191 | } | |
1192 | ||
592903cd PZ |
1193 | static void free_counter_rcu(struct rcu_head *head) |
1194 | { | |
1195 | struct perf_counter *counter; | |
1196 | ||
1197 | counter = container_of(head, struct perf_counter, rcu_head); | |
1198 | kfree(counter); | |
1199 | } | |
1200 | ||
925d519a PZ |
1201 | static void perf_pending_sync(struct perf_counter *counter); |
1202 | ||
f1600952 PZ |
1203 | static void free_counter(struct perf_counter *counter) |
1204 | { | |
925d519a PZ |
1205 | perf_pending_sync(counter); |
1206 | ||
e077df4f PZ |
1207 | if (counter->destroy) |
1208 | counter->destroy(counter); | |
1209 | ||
f1600952 PZ |
1210 | call_rcu(&counter->rcu_head, free_counter_rcu); |
1211 | } | |
1212 | ||
0793a61d TG |
1213 | /* |
1214 | * Called when the last reference to the file is gone. | |
1215 | */ | |
1216 | static int perf_release(struct inode *inode, struct file *file) | |
1217 | { | |
1218 | struct perf_counter *counter = file->private_data; | |
1219 | struct perf_counter_context *ctx = counter->ctx; | |
1220 | ||
1221 | file->private_data = NULL; | |
1222 | ||
d859e29f | 1223 | mutex_lock(&ctx->mutex); |
0793a61d TG |
1224 | mutex_lock(&counter->mutex); |
1225 | ||
04289bb9 | 1226 | perf_counter_remove_from_context(counter); |
0793a61d TG |
1227 | |
1228 | mutex_unlock(&counter->mutex); | |
d859e29f | 1229 | mutex_unlock(&ctx->mutex); |
0793a61d | 1230 | |
f1600952 | 1231 | free_counter(counter); |
5af75917 | 1232 | put_context(ctx); |
0793a61d TG |
1233 | |
1234 | return 0; | |
1235 | } | |
1236 | ||
1237 | /* | |
1238 | * Read the performance counter - simple non blocking version for now | |
1239 | */ | |
1240 | static ssize_t | |
1241 | perf_read_hw(struct perf_counter *counter, char __user *buf, size_t count) | |
1242 | { | |
53cfbf59 PM |
1243 | u64 values[3]; |
1244 | int n; | |
0793a61d | 1245 | |
3b6f9e5c PM |
1246 | /* |
1247 | * Return end-of-file for a read on a counter that is in | |
1248 | * error state (i.e. because it was pinned but it couldn't be | |
1249 | * scheduled on to the CPU at some point). | |
1250 | */ | |
1251 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
1252 | return 0; | |
1253 | ||
0793a61d | 1254 | mutex_lock(&counter->mutex); |
53cfbf59 PM |
1255 | values[0] = perf_counter_read(counter); |
1256 | n = 1; | |
1257 | if (counter->hw_event.read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) | |
1258 | values[n++] = counter->total_time_enabled + | |
1259 | atomic64_read(&counter->child_total_time_enabled); | |
1260 | if (counter->hw_event.read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) | |
1261 | values[n++] = counter->total_time_running + | |
1262 | atomic64_read(&counter->child_total_time_running); | |
0793a61d TG |
1263 | mutex_unlock(&counter->mutex); |
1264 | ||
53cfbf59 PM |
1265 | if (count < n * sizeof(u64)) |
1266 | return -EINVAL; | |
1267 | count = n * sizeof(u64); | |
1268 | ||
1269 | if (copy_to_user(buf, values, count)) | |
1270 | return -EFAULT; | |
1271 | ||
1272 | return count; | |
0793a61d TG |
1273 | } |
1274 | ||
0793a61d TG |
1275 | static ssize_t |
1276 | perf_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | |
1277 | { | |
1278 | struct perf_counter *counter = file->private_data; | |
1279 | ||
7b732a75 | 1280 | return perf_read_hw(counter, buf, count); |
0793a61d TG |
1281 | } |
1282 | ||
1283 | static unsigned int perf_poll(struct file *file, poll_table *wait) | |
1284 | { | |
1285 | struct perf_counter *counter = file->private_data; | |
c7138f37 PZ |
1286 | struct perf_mmap_data *data; |
1287 | unsigned int events; | |
1288 | ||
1289 | rcu_read_lock(); | |
1290 | data = rcu_dereference(counter->data); | |
1291 | if (data) | |
1292 | events = atomic_xchg(&data->wakeup, 0); | |
1293 | else | |
1294 | events = POLL_HUP; | |
1295 | rcu_read_unlock(); | |
0793a61d TG |
1296 | |
1297 | poll_wait(file, &counter->waitq, wait); | |
1298 | ||
0793a61d TG |
1299 | return events; |
1300 | } | |
1301 | ||
d859e29f PM |
1302 | static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
1303 | { | |
1304 | struct perf_counter *counter = file->private_data; | |
1305 | int err = 0; | |
1306 | ||
1307 | switch (cmd) { | |
1308 | case PERF_COUNTER_IOC_ENABLE: | |
1309 | perf_counter_enable_family(counter); | |
1310 | break; | |
1311 | case PERF_COUNTER_IOC_DISABLE: | |
1312 | perf_counter_disable_family(counter); | |
1313 | break; | |
1314 | default: | |
1315 | err = -ENOTTY; | |
1316 | } | |
1317 | return err; | |
1318 | } | |
1319 | ||
38ff667b PZ |
1320 | /* |
1321 | * Callers need to ensure there can be no nesting of this function, otherwise | |
1322 | * the seqlock logic goes bad. We can not serialize this because the arch | |
1323 | * code calls this from NMI context. | |
1324 | */ | |
1325 | void perf_counter_update_userpage(struct perf_counter *counter) | |
37d81828 | 1326 | { |
38ff667b PZ |
1327 | struct perf_mmap_data *data; |
1328 | struct perf_counter_mmap_page *userpg; | |
1329 | ||
1330 | rcu_read_lock(); | |
1331 | data = rcu_dereference(counter->data); | |
1332 | if (!data) | |
1333 | goto unlock; | |
1334 | ||
1335 | userpg = data->user_page; | |
37d81828 | 1336 | |
7b732a75 PZ |
1337 | /* |
1338 | * Disable preemption so as to not let the corresponding user-space | |
1339 | * spin too long if we get preempted. | |
1340 | */ | |
1341 | preempt_disable(); | |
37d81828 PM |
1342 | ++userpg->lock; |
1343 | smp_wmb(); | |
1344 | userpg->index = counter->hw.idx; | |
1345 | userpg->offset = atomic64_read(&counter->count); | |
1346 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) | |
1347 | userpg->offset -= atomic64_read(&counter->hw.prev_count); | |
7b732a75 | 1348 | |
37d81828 PM |
1349 | smp_wmb(); |
1350 | ++userpg->lock; | |
7b732a75 | 1351 | preempt_enable(); |
38ff667b | 1352 | unlock: |
7b732a75 | 1353 | rcu_read_unlock(); |
37d81828 PM |
1354 | } |
1355 | ||
1356 | static int perf_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |
1357 | { | |
1358 | struct perf_counter *counter = vma->vm_file->private_data; | |
7b732a75 PZ |
1359 | struct perf_mmap_data *data; |
1360 | int ret = VM_FAULT_SIGBUS; | |
1361 | ||
1362 | rcu_read_lock(); | |
1363 | data = rcu_dereference(counter->data); | |
1364 | if (!data) | |
1365 | goto unlock; | |
1366 | ||
1367 | if (vmf->pgoff == 0) { | |
1368 | vmf->page = virt_to_page(data->user_page); | |
1369 | } else { | |
1370 | int nr = vmf->pgoff - 1; | |
37d81828 | 1371 | |
7b732a75 PZ |
1372 | if ((unsigned)nr > data->nr_pages) |
1373 | goto unlock; | |
37d81828 | 1374 | |
7b732a75 PZ |
1375 | vmf->page = virt_to_page(data->data_pages[nr]); |
1376 | } | |
37d81828 | 1377 | get_page(vmf->page); |
7b732a75 PZ |
1378 | ret = 0; |
1379 | unlock: | |
1380 | rcu_read_unlock(); | |
1381 | ||
1382 | return ret; | |
1383 | } | |
1384 | ||
1385 | static int perf_mmap_data_alloc(struct perf_counter *counter, int nr_pages) | |
1386 | { | |
1387 | struct perf_mmap_data *data; | |
1388 | unsigned long size; | |
1389 | int i; | |
1390 | ||
1391 | WARN_ON(atomic_read(&counter->mmap_count)); | |
1392 | ||
1393 | size = sizeof(struct perf_mmap_data); | |
1394 | size += nr_pages * sizeof(void *); | |
1395 | ||
1396 | data = kzalloc(size, GFP_KERNEL); | |
1397 | if (!data) | |
1398 | goto fail; | |
1399 | ||
1400 | data->user_page = (void *)get_zeroed_page(GFP_KERNEL); | |
1401 | if (!data->user_page) | |
1402 | goto fail_user_page; | |
1403 | ||
1404 | for (i = 0; i < nr_pages; i++) { | |
1405 | data->data_pages[i] = (void *)get_zeroed_page(GFP_KERNEL); | |
1406 | if (!data->data_pages[i]) | |
1407 | goto fail_data_pages; | |
1408 | } | |
1409 | ||
1410 | data->nr_pages = nr_pages; | |
1411 | ||
1412 | rcu_assign_pointer(counter->data, data); | |
1413 | ||
37d81828 | 1414 | return 0; |
7b732a75 PZ |
1415 | |
1416 | fail_data_pages: | |
1417 | for (i--; i >= 0; i--) | |
1418 | free_page((unsigned long)data->data_pages[i]); | |
1419 | ||
1420 | free_page((unsigned long)data->user_page); | |
1421 | ||
1422 | fail_user_page: | |
1423 | kfree(data); | |
1424 | ||
1425 | fail: | |
1426 | return -ENOMEM; | |
1427 | } | |
1428 | ||
1429 | static void __perf_mmap_data_free(struct rcu_head *rcu_head) | |
1430 | { | |
1431 | struct perf_mmap_data *data = container_of(rcu_head, | |
1432 | struct perf_mmap_data, rcu_head); | |
1433 | int i; | |
1434 | ||
1435 | free_page((unsigned long)data->user_page); | |
1436 | for (i = 0; i < data->nr_pages; i++) | |
1437 | free_page((unsigned long)data->data_pages[i]); | |
1438 | kfree(data); | |
1439 | } | |
1440 | ||
1441 | static void perf_mmap_data_free(struct perf_counter *counter) | |
1442 | { | |
1443 | struct perf_mmap_data *data = counter->data; | |
1444 | ||
1445 | WARN_ON(atomic_read(&counter->mmap_count)); | |
1446 | ||
1447 | rcu_assign_pointer(counter->data, NULL); | |
1448 | call_rcu(&data->rcu_head, __perf_mmap_data_free); | |
1449 | } | |
1450 | ||
1451 | static void perf_mmap_open(struct vm_area_struct *vma) | |
1452 | { | |
1453 | struct perf_counter *counter = vma->vm_file->private_data; | |
1454 | ||
1455 | atomic_inc(&counter->mmap_count); | |
1456 | } | |
1457 | ||
1458 | static void perf_mmap_close(struct vm_area_struct *vma) | |
1459 | { | |
1460 | struct perf_counter *counter = vma->vm_file->private_data; | |
1461 | ||
1462 | if (atomic_dec_and_mutex_lock(&counter->mmap_count, | |
1463 | &counter->mmap_mutex)) { | |
1464 | perf_mmap_data_free(counter); | |
1465 | mutex_unlock(&counter->mmap_mutex); | |
1466 | } | |
37d81828 PM |
1467 | } |
1468 | ||
1469 | static struct vm_operations_struct perf_mmap_vmops = { | |
7b732a75 PZ |
1470 | .open = perf_mmap_open, |
1471 | .close = perf_mmap_close, | |
37d81828 PM |
1472 | .fault = perf_mmap_fault, |
1473 | }; | |
1474 | ||
1475 | static int perf_mmap(struct file *file, struct vm_area_struct *vma) | |
1476 | { | |
1477 | struct perf_counter *counter = file->private_data; | |
7b732a75 PZ |
1478 | unsigned long vma_size; |
1479 | unsigned long nr_pages; | |
1480 | unsigned long locked, lock_limit; | |
1481 | int ret = 0; | |
37d81828 PM |
1482 | |
1483 | if (!(vma->vm_flags & VM_SHARED) || (vma->vm_flags & VM_WRITE)) | |
1484 | return -EINVAL; | |
7b732a75 PZ |
1485 | |
1486 | vma_size = vma->vm_end - vma->vm_start; | |
1487 | nr_pages = (vma_size / PAGE_SIZE) - 1; | |
1488 | ||
7730d865 PZ |
1489 | /* |
1490 | * If we have data pages ensure they're a power-of-two number, so we | |
1491 | * can do bitmasks instead of modulo. | |
1492 | */ | |
1493 | if (nr_pages != 0 && !is_power_of_2(nr_pages)) | |
37d81828 PM |
1494 | return -EINVAL; |
1495 | ||
7b732a75 | 1496 | if (vma_size != PAGE_SIZE * (1 + nr_pages)) |
37d81828 PM |
1497 | return -EINVAL; |
1498 | ||
7b732a75 PZ |
1499 | if (vma->vm_pgoff != 0) |
1500 | return -EINVAL; | |
37d81828 | 1501 | |
7b732a75 PZ |
1502 | locked = vma_size >> PAGE_SHIFT; |
1503 | locked += vma->vm_mm->locked_vm; | |
1504 | ||
1505 | lock_limit = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur; | |
1506 | lock_limit >>= PAGE_SHIFT; | |
1507 | ||
1508 | if ((locked > lock_limit) && !capable(CAP_IPC_LOCK)) | |
1509 | return -EPERM; | |
1510 | ||
1511 | mutex_lock(&counter->mmap_mutex); | |
1512 | if (atomic_inc_not_zero(&counter->mmap_count)) | |
1513 | goto out; | |
1514 | ||
1515 | WARN_ON(counter->data); | |
1516 | ret = perf_mmap_data_alloc(counter, nr_pages); | |
1517 | if (!ret) | |
1518 | atomic_set(&counter->mmap_count, 1); | |
1519 | out: | |
1520 | mutex_unlock(&counter->mmap_mutex); | |
37d81828 PM |
1521 | |
1522 | vma->vm_flags &= ~VM_MAYWRITE; | |
1523 | vma->vm_flags |= VM_RESERVED; | |
1524 | vma->vm_ops = &perf_mmap_vmops; | |
7b732a75 PZ |
1525 | |
1526 | return ret; | |
37d81828 PM |
1527 | } |
1528 | ||
0793a61d TG |
1529 | static const struct file_operations perf_fops = { |
1530 | .release = perf_release, | |
1531 | .read = perf_read, | |
1532 | .poll = perf_poll, | |
d859e29f PM |
1533 | .unlocked_ioctl = perf_ioctl, |
1534 | .compat_ioctl = perf_ioctl, | |
37d81828 | 1535 | .mmap = perf_mmap, |
0793a61d TG |
1536 | }; |
1537 | ||
925d519a PZ |
1538 | /* |
1539 | * Perf counter wakeup | |
1540 | * | |
1541 | * If there's data, ensure we set the poll() state and publish everything | |
1542 | * to user-space before waking everybody up. | |
1543 | */ | |
1544 | ||
1545 | void perf_counter_wakeup(struct perf_counter *counter) | |
1546 | { | |
1547 | struct perf_mmap_data *data; | |
1548 | ||
1549 | rcu_read_lock(); | |
1550 | data = rcu_dereference(counter->data); | |
1551 | if (data) { | |
1552 | (void)atomic_xchg(&data->wakeup, POLL_IN); | |
38ff667b PZ |
1553 | /* |
1554 | * Ensure all data writes are issued before updating the | |
1555 | * user-space data head information. The matching rmb() | |
1556 | * will be in userspace after reading this value. | |
1557 | */ | |
1558 | smp_wmb(); | |
1559 | data->user_page->data_head = atomic_read(&data->head); | |
925d519a PZ |
1560 | } |
1561 | rcu_read_unlock(); | |
1562 | ||
1563 | wake_up_all(&counter->waitq); | |
1564 | } | |
1565 | ||
1566 | /* | |
1567 | * Pending wakeups | |
1568 | * | |
1569 | * Handle the case where we need to wakeup up from NMI (or rq->lock) context. | |
1570 | * | |
1571 | * The NMI bit means we cannot possibly take locks. Therefore, maintain a | |
1572 | * single linked list and use cmpxchg() to add entries lockless. | |
1573 | */ | |
1574 | ||
1575 | #define PENDING_TAIL ((struct perf_wakeup_entry *)-1UL) | |
1576 | ||
1577 | static DEFINE_PER_CPU(struct perf_wakeup_entry *, perf_wakeup_head) = { | |
1578 | PENDING_TAIL, | |
1579 | }; | |
1580 | ||
1581 | static void perf_pending_queue(struct perf_counter *counter) | |
1582 | { | |
1583 | struct perf_wakeup_entry **head; | |
1584 | struct perf_wakeup_entry *prev, *next; | |
1585 | ||
1586 | if (cmpxchg(&counter->wakeup.next, NULL, PENDING_TAIL) != NULL) | |
1587 | return; | |
1588 | ||
1589 | head = &get_cpu_var(perf_wakeup_head); | |
1590 | ||
1591 | do { | |
1592 | prev = counter->wakeup.next = *head; | |
1593 | next = &counter->wakeup; | |
1594 | } while (cmpxchg(head, prev, next) != prev); | |
1595 | ||
1596 | set_perf_counter_pending(); | |
1597 | ||
1598 | put_cpu_var(perf_wakeup_head); | |
1599 | } | |
1600 | ||
1601 | static int __perf_pending_run(void) | |
1602 | { | |
1603 | struct perf_wakeup_entry *list; | |
1604 | int nr = 0; | |
1605 | ||
1606 | list = xchg(&__get_cpu_var(perf_wakeup_head), PENDING_TAIL); | |
1607 | while (list != PENDING_TAIL) { | |
1608 | struct perf_counter *counter = container_of(list, | |
1609 | struct perf_counter, wakeup); | |
1610 | ||
1611 | list = list->next; | |
1612 | ||
1613 | counter->wakeup.next = NULL; | |
1614 | /* | |
1615 | * Ensure we observe the unqueue before we issue the wakeup, | |
1616 | * so that we won't be waiting forever. | |
1617 | * -- see perf_not_pending(). | |
1618 | */ | |
1619 | smp_wmb(); | |
1620 | ||
1621 | perf_counter_wakeup(counter); | |
1622 | nr++; | |
1623 | } | |
1624 | ||
1625 | return nr; | |
1626 | } | |
1627 | ||
1628 | static inline int perf_not_pending(struct perf_counter *counter) | |
1629 | { | |
1630 | /* | |
1631 | * If we flush on whatever cpu we run, there is a chance we don't | |
1632 | * need to wait. | |
1633 | */ | |
1634 | get_cpu(); | |
1635 | __perf_pending_run(); | |
1636 | put_cpu(); | |
1637 | ||
1638 | /* | |
1639 | * Ensure we see the proper queue state before going to sleep | |
1640 | * so that we do not miss the wakeup. -- see perf_pending_handle() | |
1641 | */ | |
1642 | smp_rmb(); | |
1643 | return counter->wakeup.next == NULL; | |
1644 | } | |
1645 | ||
1646 | static void perf_pending_sync(struct perf_counter *counter) | |
1647 | { | |
1648 | wait_event(counter->waitq, perf_not_pending(counter)); | |
1649 | } | |
1650 | ||
1651 | void perf_counter_do_pending(void) | |
1652 | { | |
1653 | __perf_pending_run(); | |
1654 | } | |
1655 | ||
0322cd6e PZ |
1656 | /* |
1657 | * Output | |
1658 | */ | |
1659 | ||
b9cacc7b PZ |
1660 | struct perf_output_handle { |
1661 | struct perf_counter *counter; | |
1662 | struct perf_mmap_data *data; | |
1663 | unsigned int offset; | |
63e35b25 | 1664 | unsigned int head; |
b9cacc7b | 1665 | int wakeup; |
78d613eb | 1666 | int nmi; |
b9cacc7b PZ |
1667 | }; |
1668 | ||
78d613eb PZ |
1669 | static inline void __perf_output_wakeup(struct perf_output_handle *handle) |
1670 | { | |
1671 | if (handle->nmi) | |
1672 | perf_pending_queue(handle->counter); | |
1673 | else | |
1674 | perf_counter_wakeup(handle->counter); | |
1675 | } | |
1676 | ||
b9cacc7b | 1677 | static int perf_output_begin(struct perf_output_handle *handle, |
78d613eb PZ |
1678 | struct perf_counter *counter, unsigned int size, |
1679 | int nmi) | |
0322cd6e | 1680 | { |
7b732a75 | 1681 | struct perf_mmap_data *data; |
b9cacc7b | 1682 | unsigned int offset, head; |
0322cd6e | 1683 | |
7b732a75 | 1684 | rcu_read_lock(); |
7b732a75 PZ |
1685 | data = rcu_dereference(counter->data); |
1686 | if (!data) | |
1687 | goto out; | |
1688 | ||
78d613eb PZ |
1689 | handle->counter = counter; |
1690 | handle->nmi = nmi; | |
1691 | ||
7b732a75 | 1692 | if (!data->nr_pages) |
78d613eb | 1693 | goto fail; |
7b732a75 | 1694 | |
7b732a75 PZ |
1695 | do { |
1696 | offset = head = atomic_read(&data->head); | |
c7138f37 | 1697 | head += size; |
7b732a75 PZ |
1698 | } while (atomic_cmpxchg(&data->head, offset, head) != offset); |
1699 | ||
b9cacc7b PZ |
1700 | handle->data = data; |
1701 | handle->offset = offset; | |
63e35b25 | 1702 | handle->head = head; |
b9cacc7b | 1703 | handle->wakeup = (offset >> PAGE_SHIFT) != (head >> PAGE_SHIFT); |
0322cd6e | 1704 | |
b9cacc7b | 1705 | return 0; |
7b732a75 | 1706 | |
78d613eb PZ |
1707 | fail: |
1708 | __perf_output_wakeup(handle); | |
b9cacc7b PZ |
1709 | out: |
1710 | rcu_read_unlock(); | |
7b732a75 | 1711 | |
b9cacc7b PZ |
1712 | return -ENOSPC; |
1713 | } | |
7b732a75 | 1714 | |
b9cacc7b PZ |
1715 | static void perf_output_copy(struct perf_output_handle *handle, |
1716 | void *buf, unsigned int len) | |
1717 | { | |
1718 | unsigned int pages_mask; | |
1719 | unsigned int offset; | |
1720 | unsigned int size; | |
1721 | void **pages; | |
1722 | ||
1723 | offset = handle->offset; | |
1724 | pages_mask = handle->data->nr_pages - 1; | |
1725 | pages = handle->data->data_pages; | |
1726 | ||
1727 | do { | |
1728 | unsigned int page_offset; | |
1729 | int nr; | |
1730 | ||
1731 | nr = (offset >> PAGE_SHIFT) & pages_mask; | |
1732 | page_offset = offset & (PAGE_SIZE - 1); | |
1733 | size = min_t(unsigned int, PAGE_SIZE - page_offset, len); | |
1734 | ||
1735 | memcpy(pages[nr] + page_offset, buf, size); | |
1736 | ||
1737 | len -= size; | |
1738 | buf += size; | |
1739 | offset += size; | |
1740 | } while (len); | |
1741 | ||
1742 | handle->offset = offset; | |
63e35b25 PZ |
1743 | |
1744 | WARN_ON_ONCE(handle->offset > handle->head); | |
b9cacc7b PZ |
1745 | } |
1746 | ||
5c148194 PZ |
1747 | #define perf_output_put(handle, x) \ |
1748 | perf_output_copy((handle), &(x), sizeof(x)) | |
1749 | ||
78d613eb | 1750 | static void perf_output_end(struct perf_output_handle *handle) |
b9cacc7b | 1751 | { |
78d613eb PZ |
1752 | if (handle->wakeup) |
1753 | __perf_output_wakeup(handle); | |
7b732a75 | 1754 | rcu_read_unlock(); |
b9cacc7b PZ |
1755 | } |
1756 | ||
7b732a75 PZ |
1757 | static void perf_output_simple(struct perf_counter *counter, |
1758 | int nmi, struct pt_regs *regs) | |
1759 | { | |
5ed00415 PZ |
1760 | int ret; |
1761 | struct perf_output_handle handle; | |
1762 | struct perf_event_header header; | |
1763 | u64 ip; | |
5c148194 | 1764 | struct { |
ea5d20cf | 1765 | u32 pid, tid; |
5ed00415 | 1766 | } tid_entry; |
7b732a75 | 1767 | |
5ed00415 PZ |
1768 | header.type = PERF_EVENT_OVERFLOW; |
1769 | header.size = sizeof(header); | |
7b732a75 | 1770 | |
5ed00415 PZ |
1771 | ip = instruction_pointer(regs); |
1772 | header.type |= __PERF_EVENT_IP; | |
1773 | header.size += sizeof(ip); | |
ea5d20cf PZ |
1774 | |
1775 | if (counter->hw_event.include_tid) { | |
1776 | /* namespace issues */ | |
5ed00415 PZ |
1777 | tid_entry.pid = current->group_leader->pid; |
1778 | tid_entry.tid = current->pid; | |
1779 | ||
1780 | header.type |= __PERF_EVENT_TID; | |
1781 | header.size += sizeof(tid_entry); | |
1782 | } | |
1783 | ||
1784 | ret = perf_output_begin(&handle, counter, header.size, nmi); | |
1785 | if (ret) | |
1786 | return; | |
ea5d20cf | 1787 | |
5ed00415 PZ |
1788 | perf_output_put(&handle, header); |
1789 | perf_output_put(&handle, ip); | |
ea5d20cf | 1790 | |
5ed00415 PZ |
1791 | if (counter->hw_event.include_tid) |
1792 | perf_output_put(&handle, tid_entry); | |
ea5d20cf | 1793 | |
5ed00415 | 1794 | perf_output_end(&handle); |
0322cd6e PZ |
1795 | } |
1796 | ||
7b732a75 | 1797 | static void perf_output_group(struct perf_counter *counter, int nmi) |
0322cd6e | 1798 | { |
5c148194 PZ |
1799 | struct perf_output_handle handle; |
1800 | struct perf_event_header header; | |
0322cd6e | 1801 | struct perf_counter *leader, *sub; |
5c148194 PZ |
1802 | unsigned int size; |
1803 | struct { | |
1804 | u64 event; | |
1805 | u64 counter; | |
1806 | } entry; | |
1807 | int ret; | |
1808 | ||
1809 | size = sizeof(header) + counter->nr_siblings * sizeof(entry); | |
1810 | ||
78d613eb | 1811 | ret = perf_output_begin(&handle, counter, size, nmi); |
5c148194 PZ |
1812 | if (ret) |
1813 | return; | |
1814 | ||
1815 | header.type = PERF_EVENT_GROUP; | |
1816 | header.size = size; | |
1817 | ||
1818 | perf_output_put(&handle, header); | |
0322cd6e PZ |
1819 | |
1820 | leader = counter->group_leader; | |
1821 | list_for_each_entry(sub, &leader->sibling_list, list_entry) { | |
1822 | if (sub != counter) | |
1823 | sub->hw_ops->read(sub); | |
7b732a75 PZ |
1824 | |
1825 | entry.event = sub->hw_event.config; | |
1826 | entry.counter = atomic64_read(&sub->count); | |
1827 | ||
5c148194 | 1828 | perf_output_put(&handle, entry); |
0322cd6e | 1829 | } |
5c148194 | 1830 | |
78d613eb | 1831 | perf_output_end(&handle); |
0322cd6e PZ |
1832 | } |
1833 | ||
1834 | void perf_counter_output(struct perf_counter *counter, | |
1835 | int nmi, struct pt_regs *regs) | |
1836 | { | |
1837 | switch (counter->hw_event.record_type) { | |
1838 | case PERF_RECORD_SIMPLE: | |
1839 | return; | |
1840 | ||
1841 | case PERF_RECORD_IRQ: | |
7b732a75 | 1842 | perf_output_simple(counter, nmi, regs); |
0322cd6e PZ |
1843 | break; |
1844 | ||
1845 | case PERF_RECORD_GROUP: | |
7b732a75 | 1846 | perf_output_group(counter, nmi); |
0322cd6e PZ |
1847 | break; |
1848 | } | |
0322cd6e PZ |
1849 | } |
1850 | ||
0a4a9391 PZ |
1851 | /* |
1852 | * mmap tracking | |
1853 | */ | |
1854 | ||
1855 | struct perf_mmap_event { | |
1856 | struct file *file; | |
1857 | char *file_name; | |
1858 | int file_size; | |
1859 | ||
1860 | struct { | |
1861 | struct perf_event_header header; | |
1862 | ||
1863 | u32 pid; | |
1864 | u32 tid; | |
1865 | u64 start; | |
1866 | u64 len; | |
1867 | u64 pgoff; | |
1868 | } event; | |
1869 | }; | |
1870 | ||
1871 | static void perf_counter_mmap_output(struct perf_counter *counter, | |
1872 | struct perf_mmap_event *mmap_event) | |
1873 | { | |
1874 | struct perf_output_handle handle; | |
1875 | int size = mmap_event->event.header.size; | |
78d613eb | 1876 | int ret = perf_output_begin(&handle, counter, size, 0); |
0a4a9391 PZ |
1877 | |
1878 | if (ret) | |
1879 | return; | |
1880 | ||
1881 | perf_output_put(&handle, mmap_event->event); | |
1882 | perf_output_copy(&handle, mmap_event->file_name, | |
1883 | mmap_event->file_size); | |
78d613eb | 1884 | perf_output_end(&handle); |
0a4a9391 PZ |
1885 | } |
1886 | ||
1887 | static int perf_counter_mmap_match(struct perf_counter *counter, | |
1888 | struct perf_mmap_event *mmap_event) | |
1889 | { | |
1890 | if (counter->hw_event.mmap && | |
1891 | mmap_event->event.header.type == PERF_EVENT_MMAP) | |
1892 | return 1; | |
1893 | ||
1894 | if (counter->hw_event.munmap && | |
1895 | mmap_event->event.header.type == PERF_EVENT_MUNMAP) | |
1896 | return 1; | |
1897 | ||
1898 | return 0; | |
1899 | } | |
1900 | ||
1901 | static void perf_counter_mmap_ctx(struct perf_counter_context *ctx, | |
1902 | struct perf_mmap_event *mmap_event) | |
1903 | { | |
1904 | struct perf_counter *counter; | |
1905 | ||
1906 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) | |
1907 | return; | |
1908 | ||
1909 | rcu_read_lock(); | |
1910 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
1911 | if (perf_counter_mmap_match(counter, mmap_event)) | |
1912 | perf_counter_mmap_output(counter, mmap_event); | |
1913 | } | |
1914 | rcu_read_unlock(); | |
1915 | } | |
1916 | ||
1917 | static void perf_counter_mmap_event(struct perf_mmap_event *mmap_event) | |
1918 | { | |
1919 | struct perf_cpu_context *cpuctx; | |
1920 | struct file *file = mmap_event->file; | |
1921 | unsigned int size; | |
1922 | char tmp[16]; | |
1923 | char *buf = NULL; | |
1924 | char *name; | |
1925 | ||
1926 | if (file) { | |
1927 | buf = kzalloc(PATH_MAX, GFP_KERNEL); | |
1928 | if (!buf) { | |
1929 | name = strncpy(tmp, "//enomem", sizeof(tmp)); | |
1930 | goto got_name; | |
1931 | } | |
1932 | name = dentry_path(file->f_dentry, buf, PATH_MAX); | |
1933 | if (IS_ERR(name)) { | |
1934 | name = strncpy(tmp, "//toolong", sizeof(tmp)); | |
1935 | goto got_name; | |
1936 | } | |
1937 | } else { | |
1938 | name = strncpy(tmp, "//anon", sizeof(tmp)); | |
1939 | goto got_name; | |
1940 | } | |
1941 | ||
1942 | got_name: | |
1943 | size = ALIGN(strlen(name), sizeof(u64)); | |
1944 | ||
1945 | mmap_event->file_name = name; | |
1946 | mmap_event->file_size = size; | |
1947 | ||
1948 | mmap_event->event.header.size = sizeof(mmap_event->event) + size; | |
1949 | ||
1950 | cpuctx = &get_cpu_var(perf_cpu_context); | |
1951 | perf_counter_mmap_ctx(&cpuctx->ctx, mmap_event); | |
1952 | put_cpu_var(perf_cpu_context); | |
1953 | ||
1954 | perf_counter_mmap_ctx(¤t->perf_counter_ctx, mmap_event); | |
1955 | ||
1956 | kfree(buf); | |
1957 | } | |
1958 | ||
1959 | void perf_counter_mmap(unsigned long addr, unsigned long len, | |
1960 | unsigned long pgoff, struct file *file) | |
1961 | { | |
1962 | struct perf_mmap_event mmap_event = { | |
1963 | .file = file, | |
1964 | .event = { | |
1965 | .header = { .type = PERF_EVENT_MMAP, }, | |
1966 | .pid = current->group_leader->pid, | |
1967 | .tid = current->pid, | |
1968 | .start = addr, | |
1969 | .len = len, | |
1970 | .pgoff = pgoff, | |
1971 | }, | |
1972 | }; | |
1973 | ||
1974 | perf_counter_mmap_event(&mmap_event); | |
1975 | } | |
1976 | ||
1977 | void perf_counter_munmap(unsigned long addr, unsigned long len, | |
1978 | unsigned long pgoff, struct file *file) | |
1979 | { | |
1980 | struct perf_mmap_event mmap_event = { | |
1981 | .file = file, | |
1982 | .event = { | |
1983 | .header = { .type = PERF_EVENT_MUNMAP, }, | |
1984 | .pid = current->group_leader->pid, | |
1985 | .tid = current->pid, | |
1986 | .start = addr, | |
1987 | .len = len, | |
1988 | .pgoff = pgoff, | |
1989 | }, | |
1990 | }; | |
1991 | ||
1992 | perf_counter_mmap_event(&mmap_event); | |
1993 | } | |
1994 | ||
15dbf27c PZ |
1995 | /* |
1996 | * Generic software counter infrastructure | |
1997 | */ | |
1998 | ||
1999 | static void perf_swcounter_update(struct perf_counter *counter) | |
2000 | { | |
2001 | struct hw_perf_counter *hwc = &counter->hw; | |
2002 | u64 prev, now; | |
2003 | s64 delta; | |
2004 | ||
2005 | again: | |
2006 | prev = atomic64_read(&hwc->prev_count); | |
2007 | now = atomic64_read(&hwc->count); | |
2008 | if (atomic64_cmpxchg(&hwc->prev_count, prev, now) != prev) | |
2009 | goto again; | |
2010 | ||
2011 | delta = now - prev; | |
2012 | ||
2013 | atomic64_add(delta, &counter->count); | |
2014 | atomic64_sub(delta, &hwc->period_left); | |
2015 | } | |
2016 | ||
2017 | static void perf_swcounter_set_period(struct perf_counter *counter) | |
2018 | { | |
2019 | struct hw_perf_counter *hwc = &counter->hw; | |
2020 | s64 left = atomic64_read(&hwc->period_left); | |
2021 | s64 period = hwc->irq_period; | |
2022 | ||
2023 | if (unlikely(left <= -period)) { | |
2024 | left = period; | |
2025 | atomic64_set(&hwc->period_left, left); | |
2026 | } | |
2027 | ||
2028 | if (unlikely(left <= 0)) { | |
2029 | left += period; | |
2030 | atomic64_add(period, &hwc->period_left); | |
2031 | } | |
2032 | ||
2033 | atomic64_set(&hwc->prev_count, -left); | |
2034 | atomic64_set(&hwc->count, -left); | |
2035 | } | |
2036 | ||
d6d020e9 PZ |
2037 | static enum hrtimer_restart perf_swcounter_hrtimer(struct hrtimer *hrtimer) |
2038 | { | |
2039 | struct perf_counter *counter; | |
2040 | struct pt_regs *regs; | |
2041 | ||
2042 | counter = container_of(hrtimer, struct perf_counter, hw.hrtimer); | |
2043 | counter->hw_ops->read(counter); | |
2044 | ||
2045 | regs = get_irq_regs(); | |
2046 | /* | |
2047 | * In case we exclude kernel IPs or are somehow not in interrupt | |
2048 | * context, provide the next best thing, the user IP. | |
2049 | */ | |
2050 | if ((counter->hw_event.exclude_kernel || !regs) && | |
2051 | !counter->hw_event.exclude_user) | |
2052 | regs = task_pt_regs(current); | |
2053 | ||
2054 | if (regs) | |
0322cd6e | 2055 | perf_counter_output(counter, 0, regs); |
d6d020e9 PZ |
2056 | |
2057 | hrtimer_forward_now(hrtimer, ns_to_ktime(counter->hw.irq_period)); | |
2058 | ||
2059 | return HRTIMER_RESTART; | |
2060 | } | |
2061 | ||
2062 | static void perf_swcounter_overflow(struct perf_counter *counter, | |
2063 | int nmi, struct pt_regs *regs) | |
2064 | { | |
b8e83514 PZ |
2065 | perf_swcounter_update(counter); |
2066 | perf_swcounter_set_period(counter); | |
0322cd6e | 2067 | perf_counter_output(counter, nmi, regs); |
d6d020e9 PZ |
2068 | } |
2069 | ||
15dbf27c | 2070 | static int perf_swcounter_match(struct perf_counter *counter, |
b8e83514 PZ |
2071 | enum perf_event_types type, |
2072 | u32 event, struct pt_regs *regs) | |
15dbf27c PZ |
2073 | { |
2074 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
2075 | return 0; | |
2076 | ||
f4a2deb4 | 2077 | if (perf_event_raw(&counter->hw_event)) |
b8e83514 PZ |
2078 | return 0; |
2079 | ||
f4a2deb4 | 2080 | if (perf_event_type(&counter->hw_event) != type) |
15dbf27c PZ |
2081 | return 0; |
2082 | ||
f4a2deb4 | 2083 | if (perf_event_id(&counter->hw_event) != event) |
15dbf27c PZ |
2084 | return 0; |
2085 | ||
2086 | if (counter->hw_event.exclude_user && user_mode(regs)) | |
2087 | return 0; | |
2088 | ||
2089 | if (counter->hw_event.exclude_kernel && !user_mode(regs)) | |
2090 | return 0; | |
2091 | ||
2092 | return 1; | |
2093 | } | |
2094 | ||
d6d020e9 PZ |
2095 | static void perf_swcounter_add(struct perf_counter *counter, u64 nr, |
2096 | int nmi, struct pt_regs *regs) | |
2097 | { | |
2098 | int neg = atomic64_add_negative(nr, &counter->hw.count); | |
2099 | if (counter->hw.irq_period && !neg) | |
2100 | perf_swcounter_overflow(counter, nmi, regs); | |
2101 | } | |
2102 | ||
15dbf27c | 2103 | static void perf_swcounter_ctx_event(struct perf_counter_context *ctx, |
b8e83514 PZ |
2104 | enum perf_event_types type, u32 event, |
2105 | u64 nr, int nmi, struct pt_regs *regs) | |
15dbf27c PZ |
2106 | { |
2107 | struct perf_counter *counter; | |
15dbf27c | 2108 | |
01ef09d9 | 2109 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) |
15dbf27c PZ |
2110 | return; |
2111 | ||
592903cd PZ |
2112 | rcu_read_lock(); |
2113 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
b8e83514 | 2114 | if (perf_swcounter_match(counter, type, event, regs)) |
d6d020e9 | 2115 | perf_swcounter_add(counter, nr, nmi, regs); |
15dbf27c | 2116 | } |
592903cd | 2117 | rcu_read_unlock(); |
15dbf27c PZ |
2118 | } |
2119 | ||
96f6d444 PZ |
2120 | static int *perf_swcounter_recursion_context(struct perf_cpu_context *cpuctx) |
2121 | { | |
2122 | if (in_nmi()) | |
2123 | return &cpuctx->recursion[3]; | |
2124 | ||
2125 | if (in_irq()) | |
2126 | return &cpuctx->recursion[2]; | |
2127 | ||
2128 | if (in_softirq()) | |
2129 | return &cpuctx->recursion[1]; | |
2130 | ||
2131 | return &cpuctx->recursion[0]; | |
2132 | } | |
2133 | ||
b8e83514 PZ |
2134 | static void __perf_swcounter_event(enum perf_event_types type, u32 event, |
2135 | u64 nr, int nmi, struct pt_regs *regs) | |
15dbf27c PZ |
2136 | { |
2137 | struct perf_cpu_context *cpuctx = &get_cpu_var(perf_cpu_context); | |
96f6d444 PZ |
2138 | int *recursion = perf_swcounter_recursion_context(cpuctx); |
2139 | ||
2140 | if (*recursion) | |
2141 | goto out; | |
2142 | ||
2143 | (*recursion)++; | |
2144 | barrier(); | |
15dbf27c | 2145 | |
b8e83514 PZ |
2146 | perf_swcounter_ctx_event(&cpuctx->ctx, type, event, nr, nmi, regs); |
2147 | if (cpuctx->task_ctx) { | |
2148 | perf_swcounter_ctx_event(cpuctx->task_ctx, type, event, | |
2149 | nr, nmi, regs); | |
2150 | } | |
15dbf27c | 2151 | |
96f6d444 PZ |
2152 | barrier(); |
2153 | (*recursion)--; | |
2154 | ||
2155 | out: | |
15dbf27c PZ |
2156 | put_cpu_var(perf_cpu_context); |
2157 | } | |
2158 | ||
b8e83514 PZ |
2159 | void perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs) |
2160 | { | |
2161 | __perf_swcounter_event(PERF_TYPE_SOFTWARE, event, nr, nmi, regs); | |
2162 | } | |
2163 | ||
15dbf27c PZ |
2164 | static void perf_swcounter_read(struct perf_counter *counter) |
2165 | { | |
2166 | perf_swcounter_update(counter); | |
2167 | } | |
2168 | ||
2169 | static int perf_swcounter_enable(struct perf_counter *counter) | |
2170 | { | |
2171 | perf_swcounter_set_period(counter); | |
2172 | return 0; | |
2173 | } | |
2174 | ||
2175 | static void perf_swcounter_disable(struct perf_counter *counter) | |
2176 | { | |
2177 | perf_swcounter_update(counter); | |
2178 | } | |
2179 | ||
ac17dc8e PZ |
2180 | static const struct hw_perf_counter_ops perf_ops_generic = { |
2181 | .enable = perf_swcounter_enable, | |
2182 | .disable = perf_swcounter_disable, | |
2183 | .read = perf_swcounter_read, | |
2184 | }; | |
2185 | ||
15dbf27c PZ |
2186 | /* |
2187 | * Software counter: cpu wall time clock | |
2188 | */ | |
2189 | ||
9abf8a08 PM |
2190 | static void cpu_clock_perf_counter_update(struct perf_counter *counter) |
2191 | { | |
2192 | int cpu = raw_smp_processor_id(); | |
2193 | s64 prev; | |
2194 | u64 now; | |
2195 | ||
2196 | now = cpu_clock(cpu); | |
2197 | prev = atomic64_read(&counter->hw.prev_count); | |
2198 | atomic64_set(&counter->hw.prev_count, now); | |
2199 | atomic64_add(now - prev, &counter->count); | |
2200 | } | |
2201 | ||
d6d020e9 PZ |
2202 | static int cpu_clock_perf_counter_enable(struct perf_counter *counter) |
2203 | { | |
2204 | struct hw_perf_counter *hwc = &counter->hw; | |
2205 | int cpu = raw_smp_processor_id(); | |
2206 | ||
2207 | atomic64_set(&hwc->prev_count, cpu_clock(cpu)); | |
039fc91e PZ |
2208 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
2209 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 2210 | if (hwc->irq_period) { |
d6d020e9 PZ |
2211 | __hrtimer_start_range_ns(&hwc->hrtimer, |
2212 | ns_to_ktime(hwc->irq_period), 0, | |
2213 | HRTIMER_MODE_REL, 0); | |
2214 | } | |
2215 | ||
2216 | return 0; | |
2217 | } | |
2218 | ||
5c92d124 IM |
2219 | static void cpu_clock_perf_counter_disable(struct perf_counter *counter) |
2220 | { | |
d6d020e9 | 2221 | hrtimer_cancel(&counter->hw.hrtimer); |
9abf8a08 | 2222 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
2223 | } |
2224 | ||
2225 | static void cpu_clock_perf_counter_read(struct perf_counter *counter) | |
2226 | { | |
9abf8a08 | 2227 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
2228 | } |
2229 | ||
2230 | static const struct hw_perf_counter_ops perf_ops_cpu_clock = { | |
7671581f IM |
2231 | .enable = cpu_clock_perf_counter_enable, |
2232 | .disable = cpu_clock_perf_counter_disable, | |
2233 | .read = cpu_clock_perf_counter_read, | |
5c92d124 IM |
2234 | }; |
2235 | ||
15dbf27c PZ |
2236 | /* |
2237 | * Software counter: task time clock | |
2238 | */ | |
2239 | ||
aa9c4c0f IM |
2240 | /* |
2241 | * Called from within the scheduler: | |
2242 | */ | |
2243 | static u64 task_clock_perf_counter_val(struct perf_counter *counter, int update) | |
bae43c99 | 2244 | { |
aa9c4c0f IM |
2245 | struct task_struct *curr = counter->task; |
2246 | u64 delta; | |
2247 | ||
aa9c4c0f IM |
2248 | delta = __task_delta_exec(curr, update); |
2249 | ||
2250 | return curr->se.sum_exec_runtime + delta; | |
2251 | } | |
2252 | ||
2253 | static void task_clock_perf_counter_update(struct perf_counter *counter, u64 now) | |
2254 | { | |
2255 | u64 prev; | |
8cb391e8 IM |
2256 | s64 delta; |
2257 | ||
2258 | prev = atomic64_read(&counter->hw.prev_count); | |
8cb391e8 IM |
2259 | |
2260 | atomic64_set(&counter->hw.prev_count, now); | |
2261 | ||
2262 | delta = now - prev; | |
8cb391e8 IM |
2263 | |
2264 | atomic64_add(delta, &counter->count); | |
bae43c99 IM |
2265 | } |
2266 | ||
95cdd2e7 | 2267 | static int task_clock_perf_counter_enable(struct perf_counter *counter) |
8cb391e8 | 2268 | { |
d6d020e9 PZ |
2269 | struct hw_perf_counter *hwc = &counter->hw; |
2270 | ||
2271 | atomic64_set(&hwc->prev_count, task_clock_perf_counter_val(counter, 0)); | |
039fc91e PZ |
2272 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
2273 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 2274 | if (hwc->irq_period) { |
d6d020e9 PZ |
2275 | __hrtimer_start_range_ns(&hwc->hrtimer, |
2276 | ns_to_ktime(hwc->irq_period), 0, | |
2277 | HRTIMER_MODE_REL, 0); | |
2278 | } | |
95cdd2e7 IM |
2279 | |
2280 | return 0; | |
8cb391e8 IM |
2281 | } |
2282 | ||
2283 | static void task_clock_perf_counter_disable(struct perf_counter *counter) | |
bae43c99 | 2284 | { |
d6d020e9 PZ |
2285 | hrtimer_cancel(&counter->hw.hrtimer); |
2286 | task_clock_perf_counter_update(counter, | |
2287 | task_clock_perf_counter_val(counter, 0)); | |
2288 | } | |
aa9c4c0f | 2289 | |
d6d020e9 PZ |
2290 | static void task_clock_perf_counter_read(struct perf_counter *counter) |
2291 | { | |
2292 | task_clock_perf_counter_update(counter, | |
2293 | task_clock_perf_counter_val(counter, 1)); | |
bae43c99 IM |
2294 | } |
2295 | ||
2296 | static const struct hw_perf_counter_ops perf_ops_task_clock = { | |
7671581f IM |
2297 | .enable = task_clock_perf_counter_enable, |
2298 | .disable = task_clock_perf_counter_disable, | |
2299 | .read = task_clock_perf_counter_read, | |
bae43c99 IM |
2300 | }; |
2301 | ||
15dbf27c PZ |
2302 | /* |
2303 | * Software counter: cpu migrations | |
2304 | */ | |
2305 | ||
23a185ca | 2306 | static inline u64 get_cpu_migrations(struct perf_counter *counter) |
6c594c21 | 2307 | { |
23a185ca PM |
2308 | struct task_struct *curr = counter->ctx->task; |
2309 | ||
2310 | if (curr) | |
2311 | return curr->se.nr_migrations; | |
2312 | return cpu_nr_migrations(smp_processor_id()); | |
6c594c21 IM |
2313 | } |
2314 | ||
2315 | static void cpu_migrations_perf_counter_update(struct perf_counter *counter) | |
2316 | { | |
2317 | u64 prev, now; | |
2318 | s64 delta; | |
2319 | ||
2320 | prev = atomic64_read(&counter->hw.prev_count); | |
23a185ca | 2321 | now = get_cpu_migrations(counter); |
6c594c21 IM |
2322 | |
2323 | atomic64_set(&counter->hw.prev_count, now); | |
2324 | ||
2325 | delta = now - prev; | |
6c594c21 IM |
2326 | |
2327 | atomic64_add(delta, &counter->count); | |
2328 | } | |
2329 | ||
2330 | static void cpu_migrations_perf_counter_read(struct perf_counter *counter) | |
2331 | { | |
2332 | cpu_migrations_perf_counter_update(counter); | |
2333 | } | |
2334 | ||
95cdd2e7 | 2335 | static int cpu_migrations_perf_counter_enable(struct perf_counter *counter) |
6c594c21 | 2336 | { |
c07c99b6 PM |
2337 | if (counter->prev_state <= PERF_COUNTER_STATE_OFF) |
2338 | atomic64_set(&counter->hw.prev_count, | |
2339 | get_cpu_migrations(counter)); | |
95cdd2e7 | 2340 | return 0; |
6c594c21 IM |
2341 | } |
2342 | ||
2343 | static void cpu_migrations_perf_counter_disable(struct perf_counter *counter) | |
2344 | { | |
2345 | cpu_migrations_perf_counter_update(counter); | |
2346 | } | |
2347 | ||
2348 | static const struct hw_perf_counter_ops perf_ops_cpu_migrations = { | |
7671581f IM |
2349 | .enable = cpu_migrations_perf_counter_enable, |
2350 | .disable = cpu_migrations_perf_counter_disable, | |
2351 | .read = cpu_migrations_perf_counter_read, | |
6c594c21 IM |
2352 | }; |
2353 | ||
e077df4f PZ |
2354 | #ifdef CONFIG_EVENT_PROFILE |
2355 | void perf_tpcounter_event(int event_id) | |
2356 | { | |
b8e83514 PZ |
2357 | struct pt_regs *regs = get_irq_regs(); |
2358 | ||
2359 | if (!regs) | |
2360 | regs = task_pt_regs(current); | |
2361 | ||
2362 | __perf_swcounter_event(PERF_TYPE_TRACEPOINT, event_id, 1, 1, regs); | |
e077df4f PZ |
2363 | } |
2364 | ||
2365 | extern int ftrace_profile_enable(int); | |
2366 | extern void ftrace_profile_disable(int); | |
2367 | ||
2368 | static void tp_perf_counter_destroy(struct perf_counter *counter) | |
2369 | { | |
f4a2deb4 | 2370 | ftrace_profile_disable(perf_event_id(&counter->hw_event)); |
e077df4f PZ |
2371 | } |
2372 | ||
2373 | static const struct hw_perf_counter_ops * | |
2374 | tp_perf_counter_init(struct perf_counter *counter) | |
2375 | { | |
f4a2deb4 | 2376 | int event_id = perf_event_id(&counter->hw_event); |
e077df4f PZ |
2377 | int ret; |
2378 | ||
2379 | ret = ftrace_profile_enable(event_id); | |
2380 | if (ret) | |
2381 | return NULL; | |
2382 | ||
2383 | counter->destroy = tp_perf_counter_destroy; | |
b8e83514 | 2384 | counter->hw.irq_period = counter->hw_event.irq_period; |
e077df4f PZ |
2385 | |
2386 | return &perf_ops_generic; | |
2387 | } | |
2388 | #else | |
2389 | static const struct hw_perf_counter_ops * | |
2390 | tp_perf_counter_init(struct perf_counter *counter) | |
2391 | { | |
2392 | return NULL; | |
2393 | } | |
2394 | #endif | |
2395 | ||
5c92d124 IM |
2396 | static const struct hw_perf_counter_ops * |
2397 | sw_perf_counter_init(struct perf_counter *counter) | |
2398 | { | |
15dbf27c | 2399 | struct perf_counter_hw_event *hw_event = &counter->hw_event; |
5c92d124 | 2400 | const struct hw_perf_counter_ops *hw_ops = NULL; |
15dbf27c | 2401 | struct hw_perf_counter *hwc = &counter->hw; |
5c92d124 | 2402 | |
0475f9ea PM |
2403 | /* |
2404 | * Software counters (currently) can't in general distinguish | |
2405 | * between user, kernel and hypervisor events. | |
2406 | * However, context switches and cpu migrations are considered | |
2407 | * to be kernel events, and page faults are never hypervisor | |
2408 | * events. | |
2409 | */ | |
f4a2deb4 | 2410 | switch (perf_event_id(&counter->hw_event)) { |
5c92d124 | 2411 | case PERF_COUNT_CPU_CLOCK: |
d6d020e9 PZ |
2412 | hw_ops = &perf_ops_cpu_clock; |
2413 | ||
2414 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
2415 | hw_event->irq_period = 10000; | |
5c92d124 | 2416 | break; |
bae43c99 | 2417 | case PERF_COUNT_TASK_CLOCK: |
23a185ca PM |
2418 | /* |
2419 | * If the user instantiates this as a per-cpu counter, | |
2420 | * use the cpu_clock counter instead. | |
2421 | */ | |
2422 | if (counter->ctx->task) | |
2423 | hw_ops = &perf_ops_task_clock; | |
2424 | else | |
2425 | hw_ops = &perf_ops_cpu_clock; | |
d6d020e9 PZ |
2426 | |
2427 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
2428 | hw_event->irq_period = 10000; | |
bae43c99 | 2429 | break; |
e06c61a8 | 2430 | case PERF_COUNT_PAGE_FAULTS: |
ac17dc8e PZ |
2431 | case PERF_COUNT_PAGE_FAULTS_MIN: |
2432 | case PERF_COUNT_PAGE_FAULTS_MAJ: | |
5d6a27d8 | 2433 | case PERF_COUNT_CONTEXT_SWITCHES: |
4a0deca6 | 2434 | hw_ops = &perf_ops_generic; |
5d6a27d8 | 2435 | break; |
6c594c21 | 2436 | case PERF_COUNT_CPU_MIGRATIONS: |
0475f9ea PM |
2437 | if (!counter->hw_event.exclude_kernel) |
2438 | hw_ops = &perf_ops_cpu_migrations; | |
6c594c21 | 2439 | break; |
5c92d124 | 2440 | } |
15dbf27c PZ |
2441 | |
2442 | if (hw_ops) | |
2443 | hwc->irq_period = hw_event->irq_period; | |
2444 | ||
5c92d124 IM |
2445 | return hw_ops; |
2446 | } | |
2447 | ||
0793a61d TG |
2448 | /* |
2449 | * Allocate and initialize a counter structure | |
2450 | */ | |
2451 | static struct perf_counter * | |
04289bb9 IM |
2452 | perf_counter_alloc(struct perf_counter_hw_event *hw_event, |
2453 | int cpu, | |
23a185ca | 2454 | struct perf_counter_context *ctx, |
9b51f66d IM |
2455 | struct perf_counter *group_leader, |
2456 | gfp_t gfpflags) | |
0793a61d | 2457 | { |
5c92d124 | 2458 | const struct hw_perf_counter_ops *hw_ops; |
621a01ea | 2459 | struct perf_counter *counter; |
d5d2bc0d | 2460 | long err; |
0793a61d | 2461 | |
9b51f66d | 2462 | counter = kzalloc(sizeof(*counter), gfpflags); |
0793a61d | 2463 | if (!counter) |
d5d2bc0d | 2464 | return ERR_PTR(-ENOMEM); |
0793a61d | 2465 | |
04289bb9 IM |
2466 | /* |
2467 | * Single counters are their own group leaders, with an | |
2468 | * empty sibling list: | |
2469 | */ | |
2470 | if (!group_leader) | |
2471 | group_leader = counter; | |
2472 | ||
0793a61d | 2473 | mutex_init(&counter->mutex); |
04289bb9 | 2474 | INIT_LIST_HEAD(&counter->list_entry); |
592903cd | 2475 | INIT_LIST_HEAD(&counter->event_entry); |
04289bb9 | 2476 | INIT_LIST_HEAD(&counter->sibling_list); |
0793a61d TG |
2477 | init_waitqueue_head(&counter->waitq); |
2478 | ||
7b732a75 PZ |
2479 | mutex_init(&counter->mmap_mutex); |
2480 | ||
d859e29f PM |
2481 | INIT_LIST_HEAD(&counter->child_list); |
2482 | ||
9f66a381 IM |
2483 | counter->cpu = cpu; |
2484 | counter->hw_event = *hw_event; | |
04289bb9 | 2485 | counter->group_leader = group_leader; |
621a01ea | 2486 | counter->hw_ops = NULL; |
23a185ca | 2487 | counter->ctx = ctx; |
621a01ea | 2488 | |
235c7fc7 | 2489 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
a86ed508 IM |
2490 | if (hw_event->disabled) |
2491 | counter->state = PERF_COUNTER_STATE_OFF; | |
2492 | ||
5c92d124 | 2493 | hw_ops = NULL; |
b8e83514 | 2494 | |
f4a2deb4 | 2495 | if (perf_event_raw(hw_event)) { |
b8e83514 | 2496 | hw_ops = hw_perf_counter_init(counter); |
f4a2deb4 PZ |
2497 | goto done; |
2498 | } | |
2499 | ||
2500 | switch (perf_event_type(hw_event)) { | |
b8e83514 | 2501 | case PERF_TYPE_HARDWARE: |
5c92d124 | 2502 | hw_ops = hw_perf_counter_init(counter); |
b8e83514 PZ |
2503 | break; |
2504 | ||
2505 | case PERF_TYPE_SOFTWARE: | |
2506 | hw_ops = sw_perf_counter_init(counter); | |
2507 | break; | |
2508 | ||
2509 | case PERF_TYPE_TRACEPOINT: | |
2510 | hw_ops = tp_perf_counter_init(counter); | |
2511 | break; | |
2512 | } | |
d5d2bc0d PM |
2513 | done: |
2514 | err = 0; | |
2515 | if (!hw_ops) | |
2516 | err = -EINVAL; | |
2517 | else if (IS_ERR(hw_ops)) | |
2518 | err = PTR_ERR(hw_ops); | |
5c92d124 | 2519 | |
d5d2bc0d | 2520 | if (err) { |
621a01ea | 2521 | kfree(counter); |
d5d2bc0d | 2522 | return ERR_PTR(err); |
621a01ea | 2523 | } |
d5d2bc0d | 2524 | |
621a01ea | 2525 | counter->hw_ops = hw_ops; |
0793a61d TG |
2526 | |
2527 | return counter; | |
2528 | } | |
2529 | ||
2530 | /** | |
2743a5b0 | 2531 | * sys_perf_counter_open - open a performance counter, associate it to a task/cpu |
9f66a381 IM |
2532 | * |
2533 | * @hw_event_uptr: event type attributes for monitoring/sampling | |
0793a61d | 2534 | * @pid: target pid |
9f66a381 IM |
2535 | * @cpu: target cpu |
2536 | * @group_fd: group leader counter fd | |
0793a61d | 2537 | */ |
2743a5b0 | 2538 | SYSCALL_DEFINE5(perf_counter_open, |
f3dfd265 | 2539 | const struct perf_counter_hw_event __user *, hw_event_uptr, |
2743a5b0 | 2540 | pid_t, pid, int, cpu, int, group_fd, unsigned long, flags) |
0793a61d | 2541 | { |
04289bb9 | 2542 | struct perf_counter *counter, *group_leader; |
9f66a381 | 2543 | struct perf_counter_hw_event hw_event; |
04289bb9 | 2544 | struct perf_counter_context *ctx; |
9b51f66d | 2545 | struct file *counter_file = NULL; |
04289bb9 IM |
2546 | struct file *group_file = NULL; |
2547 | int fput_needed = 0; | |
9b51f66d | 2548 | int fput_needed2 = 0; |
0793a61d TG |
2549 | int ret; |
2550 | ||
2743a5b0 PM |
2551 | /* for future expandability... */ |
2552 | if (flags) | |
2553 | return -EINVAL; | |
2554 | ||
9f66a381 | 2555 | if (copy_from_user(&hw_event, hw_event_uptr, sizeof(hw_event)) != 0) |
eab656ae TG |
2556 | return -EFAULT; |
2557 | ||
04289bb9 | 2558 | /* |
ccff286d IM |
2559 | * Get the target context (task or percpu): |
2560 | */ | |
2561 | ctx = find_get_context(pid, cpu); | |
2562 | if (IS_ERR(ctx)) | |
2563 | return PTR_ERR(ctx); | |
2564 | ||
2565 | /* | |
2566 | * Look up the group leader (we will attach this counter to it): | |
04289bb9 IM |
2567 | */ |
2568 | group_leader = NULL; | |
2569 | if (group_fd != -1) { | |
2570 | ret = -EINVAL; | |
2571 | group_file = fget_light(group_fd, &fput_needed); | |
2572 | if (!group_file) | |
ccff286d | 2573 | goto err_put_context; |
04289bb9 | 2574 | if (group_file->f_op != &perf_fops) |
ccff286d | 2575 | goto err_put_context; |
04289bb9 IM |
2576 | |
2577 | group_leader = group_file->private_data; | |
2578 | /* | |
ccff286d IM |
2579 | * Do not allow a recursive hierarchy (this new sibling |
2580 | * becoming part of another group-sibling): | |
2581 | */ | |
2582 | if (group_leader->group_leader != group_leader) | |
2583 | goto err_put_context; | |
2584 | /* | |
2585 | * Do not allow to attach to a group in a different | |
2586 | * task or CPU context: | |
04289bb9 | 2587 | */ |
ccff286d IM |
2588 | if (group_leader->ctx != ctx) |
2589 | goto err_put_context; | |
3b6f9e5c PM |
2590 | /* |
2591 | * Only a group leader can be exclusive or pinned | |
2592 | */ | |
2593 | if (hw_event.exclusive || hw_event.pinned) | |
2594 | goto err_put_context; | |
04289bb9 IM |
2595 | } |
2596 | ||
23a185ca PM |
2597 | counter = perf_counter_alloc(&hw_event, cpu, ctx, group_leader, |
2598 | GFP_KERNEL); | |
d5d2bc0d PM |
2599 | ret = PTR_ERR(counter); |
2600 | if (IS_ERR(counter)) | |
0793a61d TG |
2601 | goto err_put_context; |
2602 | ||
0793a61d TG |
2603 | ret = anon_inode_getfd("[perf_counter]", &perf_fops, counter, 0); |
2604 | if (ret < 0) | |
9b51f66d IM |
2605 | goto err_free_put_context; |
2606 | ||
2607 | counter_file = fget_light(ret, &fput_needed2); | |
2608 | if (!counter_file) | |
2609 | goto err_free_put_context; | |
2610 | ||
2611 | counter->filp = counter_file; | |
d859e29f | 2612 | mutex_lock(&ctx->mutex); |
9b51f66d | 2613 | perf_install_in_context(ctx, counter, cpu); |
d859e29f | 2614 | mutex_unlock(&ctx->mutex); |
9b51f66d IM |
2615 | |
2616 | fput_light(counter_file, fput_needed2); | |
0793a61d | 2617 | |
04289bb9 IM |
2618 | out_fput: |
2619 | fput_light(group_file, fput_needed); | |
2620 | ||
0793a61d TG |
2621 | return ret; |
2622 | ||
9b51f66d | 2623 | err_free_put_context: |
0793a61d TG |
2624 | kfree(counter); |
2625 | ||
2626 | err_put_context: | |
2627 | put_context(ctx); | |
2628 | ||
04289bb9 | 2629 | goto out_fput; |
0793a61d TG |
2630 | } |
2631 | ||
9b51f66d IM |
2632 | /* |
2633 | * Initialize the perf_counter context in a task_struct: | |
2634 | */ | |
2635 | static void | |
2636 | __perf_counter_init_context(struct perf_counter_context *ctx, | |
2637 | struct task_struct *task) | |
2638 | { | |
2639 | memset(ctx, 0, sizeof(*ctx)); | |
2640 | spin_lock_init(&ctx->lock); | |
d859e29f | 2641 | mutex_init(&ctx->mutex); |
9b51f66d | 2642 | INIT_LIST_HEAD(&ctx->counter_list); |
592903cd | 2643 | INIT_LIST_HEAD(&ctx->event_list); |
9b51f66d IM |
2644 | ctx->task = task; |
2645 | } | |
2646 | ||
2647 | /* | |
2648 | * inherit a counter from parent task to child task: | |
2649 | */ | |
d859e29f | 2650 | static struct perf_counter * |
9b51f66d IM |
2651 | inherit_counter(struct perf_counter *parent_counter, |
2652 | struct task_struct *parent, | |
2653 | struct perf_counter_context *parent_ctx, | |
2654 | struct task_struct *child, | |
d859e29f | 2655 | struct perf_counter *group_leader, |
9b51f66d IM |
2656 | struct perf_counter_context *child_ctx) |
2657 | { | |
2658 | struct perf_counter *child_counter; | |
2659 | ||
d859e29f PM |
2660 | /* |
2661 | * Instead of creating recursive hierarchies of counters, | |
2662 | * we link inherited counters back to the original parent, | |
2663 | * which has a filp for sure, which we use as the reference | |
2664 | * count: | |
2665 | */ | |
2666 | if (parent_counter->parent) | |
2667 | parent_counter = parent_counter->parent; | |
2668 | ||
9b51f66d | 2669 | child_counter = perf_counter_alloc(&parent_counter->hw_event, |
23a185ca PM |
2670 | parent_counter->cpu, child_ctx, |
2671 | group_leader, GFP_KERNEL); | |
d5d2bc0d PM |
2672 | if (IS_ERR(child_counter)) |
2673 | return child_counter; | |
9b51f66d IM |
2674 | |
2675 | /* | |
2676 | * Link it up in the child's context: | |
2677 | */ | |
9b51f66d | 2678 | child_counter->task = child; |
53cfbf59 | 2679 | add_counter_to_ctx(child_counter, child_ctx); |
9b51f66d IM |
2680 | |
2681 | child_counter->parent = parent_counter; | |
9b51f66d IM |
2682 | /* |
2683 | * inherit into child's child as well: | |
2684 | */ | |
2685 | child_counter->hw_event.inherit = 1; | |
2686 | ||
2687 | /* | |
2688 | * Get a reference to the parent filp - we will fput it | |
2689 | * when the child counter exits. This is safe to do because | |
2690 | * we are in the parent and we know that the filp still | |
2691 | * exists and has a nonzero count: | |
2692 | */ | |
2693 | atomic_long_inc(&parent_counter->filp->f_count); | |
2694 | ||
d859e29f PM |
2695 | /* |
2696 | * Link this into the parent counter's child list | |
2697 | */ | |
2698 | mutex_lock(&parent_counter->mutex); | |
2699 | list_add_tail(&child_counter->child_list, &parent_counter->child_list); | |
2700 | ||
2701 | /* | |
2702 | * Make the child state follow the state of the parent counter, | |
2703 | * not its hw_event.disabled bit. We hold the parent's mutex, | |
2704 | * so we won't race with perf_counter_{en,dis}able_family. | |
2705 | */ | |
2706 | if (parent_counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
2707 | child_counter->state = PERF_COUNTER_STATE_INACTIVE; | |
2708 | else | |
2709 | child_counter->state = PERF_COUNTER_STATE_OFF; | |
2710 | ||
2711 | mutex_unlock(&parent_counter->mutex); | |
2712 | ||
2713 | return child_counter; | |
2714 | } | |
2715 | ||
2716 | static int inherit_group(struct perf_counter *parent_counter, | |
2717 | struct task_struct *parent, | |
2718 | struct perf_counter_context *parent_ctx, | |
2719 | struct task_struct *child, | |
2720 | struct perf_counter_context *child_ctx) | |
2721 | { | |
2722 | struct perf_counter *leader; | |
2723 | struct perf_counter *sub; | |
d5d2bc0d | 2724 | struct perf_counter *child_ctr; |
d859e29f PM |
2725 | |
2726 | leader = inherit_counter(parent_counter, parent, parent_ctx, | |
2727 | child, NULL, child_ctx); | |
d5d2bc0d PM |
2728 | if (IS_ERR(leader)) |
2729 | return PTR_ERR(leader); | |
d859e29f | 2730 | list_for_each_entry(sub, &parent_counter->sibling_list, list_entry) { |
d5d2bc0d PM |
2731 | child_ctr = inherit_counter(sub, parent, parent_ctx, |
2732 | child, leader, child_ctx); | |
2733 | if (IS_ERR(child_ctr)) | |
2734 | return PTR_ERR(child_ctr); | |
d859e29f | 2735 | } |
9b51f66d IM |
2736 | return 0; |
2737 | } | |
2738 | ||
d859e29f PM |
2739 | static void sync_child_counter(struct perf_counter *child_counter, |
2740 | struct perf_counter *parent_counter) | |
2741 | { | |
2742 | u64 parent_val, child_val; | |
2743 | ||
2744 | parent_val = atomic64_read(&parent_counter->count); | |
2745 | child_val = atomic64_read(&child_counter->count); | |
2746 | ||
2747 | /* | |
2748 | * Add back the child's count to the parent's count: | |
2749 | */ | |
2750 | atomic64_add(child_val, &parent_counter->count); | |
53cfbf59 PM |
2751 | atomic64_add(child_counter->total_time_enabled, |
2752 | &parent_counter->child_total_time_enabled); | |
2753 | atomic64_add(child_counter->total_time_running, | |
2754 | &parent_counter->child_total_time_running); | |
d859e29f PM |
2755 | |
2756 | /* | |
2757 | * Remove this counter from the parent's list | |
2758 | */ | |
2759 | mutex_lock(&parent_counter->mutex); | |
2760 | list_del_init(&child_counter->child_list); | |
2761 | mutex_unlock(&parent_counter->mutex); | |
2762 | ||
2763 | /* | |
2764 | * Release the parent counter, if this was the last | |
2765 | * reference to it. | |
2766 | */ | |
2767 | fput(parent_counter->filp); | |
2768 | } | |
2769 | ||
9b51f66d IM |
2770 | static void |
2771 | __perf_counter_exit_task(struct task_struct *child, | |
2772 | struct perf_counter *child_counter, | |
2773 | struct perf_counter_context *child_ctx) | |
2774 | { | |
2775 | struct perf_counter *parent_counter; | |
d859e29f | 2776 | struct perf_counter *sub, *tmp; |
9b51f66d IM |
2777 | |
2778 | /* | |
235c7fc7 IM |
2779 | * If we do not self-reap then we have to wait for the |
2780 | * child task to unschedule (it will happen for sure), | |
2781 | * so that its counter is at its final count. (This | |
2782 | * condition triggers rarely - child tasks usually get | |
2783 | * off their CPU before the parent has a chance to | |
2784 | * get this far into the reaping action) | |
9b51f66d | 2785 | */ |
235c7fc7 IM |
2786 | if (child != current) { |
2787 | wait_task_inactive(child, 0); | |
2788 | list_del_init(&child_counter->list_entry); | |
53cfbf59 | 2789 | update_counter_times(child_counter); |
235c7fc7 | 2790 | } else { |
0cc0c027 | 2791 | struct perf_cpu_context *cpuctx; |
235c7fc7 IM |
2792 | unsigned long flags; |
2793 | u64 perf_flags; | |
2794 | ||
2795 | /* | |
2796 | * Disable and unlink this counter. | |
2797 | * | |
2798 | * Be careful about zapping the list - IRQ/NMI context | |
2799 | * could still be processing it: | |
2800 | */ | |
2801 | curr_rq_lock_irq_save(&flags); | |
2802 | perf_flags = hw_perf_save_disable(); | |
0cc0c027 IM |
2803 | |
2804 | cpuctx = &__get_cpu_var(perf_cpu_context); | |
2805 | ||
d859e29f | 2806 | group_sched_out(child_counter, cpuctx, child_ctx); |
53cfbf59 | 2807 | update_counter_times(child_counter); |
0cc0c027 | 2808 | |
235c7fc7 | 2809 | list_del_init(&child_counter->list_entry); |
0cc0c027 | 2810 | |
235c7fc7 | 2811 | child_ctx->nr_counters--; |
9b51f66d | 2812 | |
235c7fc7 IM |
2813 | hw_perf_restore(perf_flags); |
2814 | curr_rq_unlock_irq_restore(&flags); | |
2815 | } | |
9b51f66d IM |
2816 | |
2817 | parent_counter = child_counter->parent; | |
2818 | /* | |
2819 | * It can happen that parent exits first, and has counters | |
2820 | * that are still around due to the child reference. These | |
2821 | * counters need to be zapped - but otherwise linger. | |
2822 | */ | |
d859e29f PM |
2823 | if (parent_counter) { |
2824 | sync_child_counter(child_counter, parent_counter); | |
2825 | list_for_each_entry_safe(sub, tmp, &child_counter->sibling_list, | |
2826 | list_entry) { | |
4bcf349a | 2827 | if (sub->parent) { |
d859e29f | 2828 | sync_child_counter(sub, sub->parent); |
f1600952 | 2829 | free_counter(sub); |
4bcf349a | 2830 | } |
d859e29f | 2831 | } |
f1600952 | 2832 | free_counter(child_counter); |
4bcf349a | 2833 | } |
9b51f66d IM |
2834 | } |
2835 | ||
2836 | /* | |
d859e29f | 2837 | * When a child task exits, feed back counter values to parent counters. |
9b51f66d | 2838 | * |
d859e29f | 2839 | * Note: we may be running in child context, but the PID is not hashed |
9b51f66d IM |
2840 | * anymore so new counters will not be added. |
2841 | */ | |
2842 | void perf_counter_exit_task(struct task_struct *child) | |
2843 | { | |
2844 | struct perf_counter *child_counter, *tmp; | |
2845 | struct perf_counter_context *child_ctx; | |
2846 | ||
2847 | child_ctx = &child->perf_counter_ctx; | |
2848 | ||
2849 | if (likely(!child_ctx->nr_counters)) | |
2850 | return; | |
2851 | ||
2852 | list_for_each_entry_safe(child_counter, tmp, &child_ctx->counter_list, | |
2853 | list_entry) | |
2854 | __perf_counter_exit_task(child, child_counter, child_ctx); | |
2855 | } | |
2856 | ||
2857 | /* | |
2858 | * Initialize the perf_counter context in task_struct | |
2859 | */ | |
2860 | void perf_counter_init_task(struct task_struct *child) | |
2861 | { | |
2862 | struct perf_counter_context *child_ctx, *parent_ctx; | |
d859e29f | 2863 | struct perf_counter *counter; |
9b51f66d | 2864 | struct task_struct *parent = current; |
9b51f66d IM |
2865 | |
2866 | child_ctx = &child->perf_counter_ctx; | |
2867 | parent_ctx = &parent->perf_counter_ctx; | |
2868 | ||
2869 | __perf_counter_init_context(child_ctx, child); | |
2870 | ||
2871 | /* | |
2872 | * This is executed from the parent task context, so inherit | |
2873 | * counters that have been marked for cloning: | |
2874 | */ | |
2875 | ||
2876 | if (likely(!parent_ctx->nr_counters)) | |
2877 | return; | |
2878 | ||
2879 | /* | |
2880 | * Lock the parent list. No need to lock the child - not PID | |
2881 | * hashed yet and not running, so nobody can access it. | |
2882 | */ | |
d859e29f | 2883 | mutex_lock(&parent_ctx->mutex); |
9b51f66d IM |
2884 | |
2885 | /* | |
2886 | * We dont have to disable NMIs - we are only looking at | |
2887 | * the list, not manipulating it: | |
2888 | */ | |
2889 | list_for_each_entry(counter, &parent_ctx->counter_list, list_entry) { | |
d859e29f | 2890 | if (!counter->hw_event.inherit) |
9b51f66d IM |
2891 | continue; |
2892 | ||
d859e29f | 2893 | if (inherit_group(counter, parent, |
9b51f66d IM |
2894 | parent_ctx, child, child_ctx)) |
2895 | break; | |
2896 | } | |
2897 | ||
d859e29f | 2898 | mutex_unlock(&parent_ctx->mutex); |
9b51f66d IM |
2899 | } |
2900 | ||
04289bb9 | 2901 | static void __cpuinit perf_counter_init_cpu(int cpu) |
0793a61d | 2902 | { |
04289bb9 | 2903 | struct perf_cpu_context *cpuctx; |
0793a61d | 2904 | |
04289bb9 IM |
2905 | cpuctx = &per_cpu(perf_cpu_context, cpu); |
2906 | __perf_counter_init_context(&cpuctx->ctx, NULL); | |
0793a61d TG |
2907 | |
2908 | mutex_lock(&perf_resource_mutex); | |
04289bb9 | 2909 | cpuctx->max_pertask = perf_max_counters - perf_reserved_percpu; |
0793a61d | 2910 | mutex_unlock(&perf_resource_mutex); |
04289bb9 | 2911 | |
01d0287f | 2912 | hw_perf_counter_setup(cpu); |
0793a61d TG |
2913 | } |
2914 | ||
2915 | #ifdef CONFIG_HOTPLUG_CPU | |
04289bb9 | 2916 | static void __perf_counter_exit_cpu(void *info) |
0793a61d TG |
2917 | { |
2918 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
2919 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
2920 | struct perf_counter *counter, *tmp; | |
2921 | ||
04289bb9 IM |
2922 | list_for_each_entry_safe(counter, tmp, &ctx->counter_list, list_entry) |
2923 | __perf_counter_remove_from_context(counter); | |
0793a61d | 2924 | } |
04289bb9 | 2925 | static void perf_counter_exit_cpu(int cpu) |
0793a61d | 2926 | { |
d859e29f PM |
2927 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); |
2928 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
2929 | ||
2930 | mutex_lock(&ctx->mutex); | |
04289bb9 | 2931 | smp_call_function_single(cpu, __perf_counter_exit_cpu, NULL, 1); |
d859e29f | 2932 | mutex_unlock(&ctx->mutex); |
0793a61d TG |
2933 | } |
2934 | #else | |
04289bb9 | 2935 | static inline void perf_counter_exit_cpu(int cpu) { } |
0793a61d TG |
2936 | #endif |
2937 | ||
2938 | static int __cpuinit | |
2939 | perf_cpu_notify(struct notifier_block *self, unsigned long action, void *hcpu) | |
2940 | { | |
2941 | unsigned int cpu = (long)hcpu; | |
2942 | ||
2943 | switch (action) { | |
2944 | ||
2945 | case CPU_UP_PREPARE: | |
2946 | case CPU_UP_PREPARE_FROZEN: | |
04289bb9 | 2947 | perf_counter_init_cpu(cpu); |
0793a61d TG |
2948 | break; |
2949 | ||
2950 | case CPU_DOWN_PREPARE: | |
2951 | case CPU_DOWN_PREPARE_FROZEN: | |
04289bb9 | 2952 | perf_counter_exit_cpu(cpu); |
0793a61d TG |
2953 | break; |
2954 | ||
2955 | default: | |
2956 | break; | |
2957 | } | |
2958 | ||
2959 | return NOTIFY_OK; | |
2960 | } | |
2961 | ||
2962 | static struct notifier_block __cpuinitdata perf_cpu_nb = { | |
2963 | .notifier_call = perf_cpu_notify, | |
2964 | }; | |
2965 | ||
2966 | static int __init perf_counter_init(void) | |
2967 | { | |
2968 | perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_UP_PREPARE, | |
2969 | (void *)(long)smp_processor_id()); | |
2970 | register_cpu_notifier(&perf_cpu_nb); | |
2971 | ||
2972 | return 0; | |
2973 | } | |
2974 | early_initcall(perf_counter_init); | |
2975 | ||
2976 | static ssize_t perf_show_reserve_percpu(struct sysdev_class *class, char *buf) | |
2977 | { | |
2978 | return sprintf(buf, "%d\n", perf_reserved_percpu); | |
2979 | } | |
2980 | ||
2981 | static ssize_t | |
2982 | perf_set_reserve_percpu(struct sysdev_class *class, | |
2983 | const char *buf, | |
2984 | size_t count) | |
2985 | { | |
2986 | struct perf_cpu_context *cpuctx; | |
2987 | unsigned long val; | |
2988 | int err, cpu, mpt; | |
2989 | ||
2990 | err = strict_strtoul(buf, 10, &val); | |
2991 | if (err) | |
2992 | return err; | |
2993 | if (val > perf_max_counters) | |
2994 | return -EINVAL; | |
2995 | ||
2996 | mutex_lock(&perf_resource_mutex); | |
2997 | perf_reserved_percpu = val; | |
2998 | for_each_online_cpu(cpu) { | |
2999 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
3000 | spin_lock_irq(&cpuctx->ctx.lock); | |
3001 | mpt = min(perf_max_counters - cpuctx->ctx.nr_counters, | |
3002 | perf_max_counters - perf_reserved_percpu); | |
3003 | cpuctx->max_pertask = mpt; | |
3004 | spin_unlock_irq(&cpuctx->ctx.lock); | |
3005 | } | |
3006 | mutex_unlock(&perf_resource_mutex); | |
3007 | ||
3008 | return count; | |
3009 | } | |
3010 | ||
3011 | static ssize_t perf_show_overcommit(struct sysdev_class *class, char *buf) | |
3012 | { | |
3013 | return sprintf(buf, "%d\n", perf_overcommit); | |
3014 | } | |
3015 | ||
3016 | static ssize_t | |
3017 | perf_set_overcommit(struct sysdev_class *class, const char *buf, size_t count) | |
3018 | { | |
3019 | unsigned long val; | |
3020 | int err; | |
3021 | ||
3022 | err = strict_strtoul(buf, 10, &val); | |
3023 | if (err) | |
3024 | return err; | |
3025 | if (val > 1) | |
3026 | return -EINVAL; | |
3027 | ||
3028 | mutex_lock(&perf_resource_mutex); | |
3029 | perf_overcommit = val; | |
3030 | mutex_unlock(&perf_resource_mutex); | |
3031 | ||
3032 | return count; | |
3033 | } | |
3034 | ||
3035 | static SYSDEV_CLASS_ATTR( | |
3036 | reserve_percpu, | |
3037 | 0644, | |
3038 | perf_show_reserve_percpu, | |
3039 | perf_set_reserve_percpu | |
3040 | ); | |
3041 | ||
3042 | static SYSDEV_CLASS_ATTR( | |
3043 | overcommit, | |
3044 | 0644, | |
3045 | perf_show_overcommit, | |
3046 | perf_set_overcommit | |
3047 | ); | |
3048 | ||
3049 | static struct attribute *perfclass_attrs[] = { | |
3050 | &attr_reserve_percpu.attr, | |
3051 | &attr_overcommit.attr, | |
3052 | NULL | |
3053 | }; | |
3054 | ||
3055 | static struct attribute_group perfclass_attr_group = { | |
3056 | .attrs = perfclass_attrs, | |
3057 | .name = "perf_counters", | |
3058 | }; | |
3059 | ||
3060 | static int __init perf_counter_sysfs_init(void) | |
3061 | { | |
3062 | return sysfs_create_group(&cpu_sysdev_class.kset.kobj, | |
3063 | &perfclass_attr_group); | |
3064 | } | |
3065 | device_initcall(perf_counter_sysfs_init); |