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Commit | Line | Data |
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0793a61d TG |
1 | /* |
2 | * Performance counter core code | |
3 | * | |
4 | * Copyright(C) 2008 Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008 Red Hat, Inc., Ingo Molnar | |
6 | * | |
7b732a75 PZ |
7 | * |
8 | * For licensing details see kernel-base/COPYING | |
0793a61d TG |
9 | */ |
10 | ||
11 | #include <linux/fs.h> | |
b9cacc7b | 12 | #include <linux/mm.h> |
0793a61d TG |
13 | #include <linux/cpu.h> |
14 | #include <linux/smp.h> | |
04289bb9 | 15 | #include <linux/file.h> |
0793a61d TG |
16 | #include <linux/poll.h> |
17 | #include <linux/sysfs.h> | |
18 | #include <linux/ptrace.h> | |
19 | #include <linux/percpu.h> | |
b9cacc7b PZ |
20 | #include <linux/vmstat.h> |
21 | #include <linux/hardirq.h> | |
22 | #include <linux/rculist.h> | |
0793a61d TG |
23 | #include <linux/uaccess.h> |
24 | #include <linux/syscalls.h> | |
25 | #include <linux/anon_inodes.h> | |
aa9c4c0f | 26 | #include <linux/kernel_stat.h> |
0793a61d TG |
27 | #include <linux/perf_counter.h> |
28 | ||
4e193bd4 TB |
29 | #include <asm/irq_regs.h> |
30 | ||
0793a61d TG |
31 | /* |
32 | * Each CPU has a list of per CPU counters: | |
33 | */ | |
34 | DEFINE_PER_CPU(struct perf_cpu_context, perf_cpu_context); | |
35 | ||
088e2852 | 36 | int perf_max_counters __read_mostly = 1; |
0793a61d TG |
37 | static int perf_reserved_percpu __read_mostly; |
38 | static int perf_overcommit __read_mostly = 1; | |
39 | ||
40 | /* | |
41 | * Mutex for (sysadmin-configurable) counter reservations: | |
42 | */ | |
43 | static DEFINE_MUTEX(perf_resource_mutex); | |
44 | ||
45 | /* | |
46 | * Architecture provided APIs - weak aliases: | |
47 | */ | |
5c92d124 | 48 | extern __weak const struct hw_perf_counter_ops * |
621a01ea | 49 | hw_perf_counter_init(struct perf_counter *counter) |
0793a61d | 50 | { |
ff6f0541 | 51 | return NULL; |
0793a61d TG |
52 | } |
53 | ||
01b2838c | 54 | u64 __weak hw_perf_save_disable(void) { return 0; } |
01ea1cca | 55 | void __weak hw_perf_restore(u64 ctrl) { barrier(); } |
01d0287f | 56 | void __weak hw_perf_counter_setup(int cpu) { barrier(); } |
3cbed429 PM |
57 | int __weak hw_perf_group_sched_in(struct perf_counter *group_leader, |
58 | struct perf_cpu_context *cpuctx, | |
59 | struct perf_counter_context *ctx, int cpu) | |
60 | { | |
61 | return 0; | |
62 | } | |
0793a61d | 63 | |
4eb96fcf PM |
64 | void __weak perf_counter_print_debug(void) { } |
65 | ||
04289bb9 IM |
66 | static void |
67 | list_add_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
68 | { | |
69 | struct perf_counter *group_leader = counter->group_leader; | |
70 | ||
71 | /* | |
72 | * Depending on whether it is a standalone or sibling counter, | |
73 | * add it straight to the context's counter list, or to the group | |
74 | * leader's sibling list: | |
75 | */ | |
76 | if (counter->group_leader == counter) | |
77 | list_add_tail(&counter->list_entry, &ctx->counter_list); | |
5c148194 | 78 | else { |
04289bb9 | 79 | list_add_tail(&counter->list_entry, &group_leader->sibling_list); |
5c148194 PZ |
80 | group_leader->nr_siblings++; |
81 | } | |
592903cd PZ |
82 | |
83 | list_add_rcu(&counter->event_entry, &ctx->event_list); | |
04289bb9 IM |
84 | } |
85 | ||
86 | static void | |
87 | list_del_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
88 | { | |
89 | struct perf_counter *sibling, *tmp; | |
90 | ||
91 | list_del_init(&counter->list_entry); | |
592903cd | 92 | list_del_rcu(&counter->event_entry); |
04289bb9 | 93 | |
5c148194 PZ |
94 | if (counter->group_leader != counter) |
95 | counter->group_leader->nr_siblings--; | |
96 | ||
04289bb9 IM |
97 | /* |
98 | * If this was a group counter with sibling counters then | |
99 | * upgrade the siblings to singleton counters by adding them | |
100 | * to the context list directly: | |
101 | */ | |
102 | list_for_each_entry_safe(sibling, tmp, | |
103 | &counter->sibling_list, list_entry) { | |
104 | ||
75564232 | 105 | list_move_tail(&sibling->list_entry, &ctx->counter_list); |
04289bb9 IM |
106 | sibling->group_leader = sibling; |
107 | } | |
108 | } | |
109 | ||
3b6f9e5c PM |
110 | static void |
111 | counter_sched_out(struct perf_counter *counter, | |
112 | struct perf_cpu_context *cpuctx, | |
113 | struct perf_counter_context *ctx) | |
114 | { | |
115 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
116 | return; | |
117 | ||
118 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
53cfbf59 | 119 | counter->tstamp_stopped = ctx->time_now; |
3b6f9e5c PM |
120 | counter->hw_ops->disable(counter); |
121 | counter->oncpu = -1; | |
122 | ||
123 | if (!is_software_counter(counter)) | |
124 | cpuctx->active_oncpu--; | |
125 | ctx->nr_active--; | |
126 | if (counter->hw_event.exclusive || !cpuctx->active_oncpu) | |
127 | cpuctx->exclusive = 0; | |
128 | } | |
129 | ||
d859e29f PM |
130 | static void |
131 | group_sched_out(struct perf_counter *group_counter, | |
132 | struct perf_cpu_context *cpuctx, | |
133 | struct perf_counter_context *ctx) | |
134 | { | |
135 | struct perf_counter *counter; | |
136 | ||
137 | if (group_counter->state != PERF_COUNTER_STATE_ACTIVE) | |
138 | return; | |
139 | ||
140 | counter_sched_out(group_counter, cpuctx, ctx); | |
141 | ||
142 | /* | |
143 | * Schedule out siblings (if any): | |
144 | */ | |
145 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) | |
146 | counter_sched_out(counter, cpuctx, ctx); | |
147 | ||
148 | if (group_counter->hw_event.exclusive) | |
149 | cpuctx->exclusive = 0; | |
150 | } | |
151 | ||
0793a61d TG |
152 | /* |
153 | * Cross CPU call to remove a performance counter | |
154 | * | |
155 | * We disable the counter on the hardware level first. After that we | |
156 | * remove it from the context list. | |
157 | */ | |
04289bb9 | 158 | static void __perf_counter_remove_from_context(void *info) |
0793a61d TG |
159 | { |
160 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
161 | struct perf_counter *counter = info; | |
162 | struct perf_counter_context *ctx = counter->ctx; | |
9b51f66d | 163 | unsigned long flags; |
5c92d124 | 164 | u64 perf_flags; |
0793a61d TG |
165 | |
166 | /* | |
167 | * If this is a task context, we need to check whether it is | |
168 | * the current task context of this cpu. If not it has been | |
169 | * scheduled out before the smp call arrived. | |
170 | */ | |
171 | if (ctx->task && cpuctx->task_ctx != ctx) | |
172 | return; | |
173 | ||
aa9c4c0f IM |
174 | curr_rq_lock_irq_save(&flags); |
175 | spin_lock(&ctx->lock); | |
0793a61d | 176 | |
3b6f9e5c PM |
177 | counter_sched_out(counter, cpuctx, ctx); |
178 | ||
179 | counter->task = NULL; | |
0793a61d TG |
180 | ctx->nr_counters--; |
181 | ||
182 | /* | |
183 | * Protect the list operation against NMI by disabling the | |
184 | * counters on a global level. NOP for non NMI based counters. | |
185 | */ | |
01b2838c | 186 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 187 | list_del_counter(counter, ctx); |
01b2838c | 188 | hw_perf_restore(perf_flags); |
0793a61d TG |
189 | |
190 | if (!ctx->task) { | |
191 | /* | |
192 | * Allow more per task counters with respect to the | |
193 | * reservation: | |
194 | */ | |
195 | cpuctx->max_pertask = | |
196 | min(perf_max_counters - ctx->nr_counters, | |
197 | perf_max_counters - perf_reserved_percpu); | |
198 | } | |
199 | ||
aa9c4c0f IM |
200 | spin_unlock(&ctx->lock); |
201 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
202 | } |
203 | ||
204 | ||
205 | /* | |
206 | * Remove the counter from a task's (or a CPU's) list of counters. | |
207 | * | |
d859e29f | 208 | * Must be called with counter->mutex and ctx->mutex held. |
0793a61d TG |
209 | * |
210 | * CPU counters are removed with a smp call. For task counters we only | |
211 | * call when the task is on a CPU. | |
212 | */ | |
04289bb9 | 213 | static void perf_counter_remove_from_context(struct perf_counter *counter) |
0793a61d TG |
214 | { |
215 | struct perf_counter_context *ctx = counter->ctx; | |
216 | struct task_struct *task = ctx->task; | |
217 | ||
218 | if (!task) { | |
219 | /* | |
220 | * Per cpu counters are removed via an smp call and | |
221 | * the removal is always sucessful. | |
222 | */ | |
223 | smp_call_function_single(counter->cpu, | |
04289bb9 | 224 | __perf_counter_remove_from_context, |
0793a61d TG |
225 | counter, 1); |
226 | return; | |
227 | } | |
228 | ||
229 | retry: | |
04289bb9 | 230 | task_oncpu_function_call(task, __perf_counter_remove_from_context, |
0793a61d TG |
231 | counter); |
232 | ||
233 | spin_lock_irq(&ctx->lock); | |
234 | /* | |
235 | * If the context is active we need to retry the smp call. | |
236 | */ | |
04289bb9 | 237 | if (ctx->nr_active && !list_empty(&counter->list_entry)) { |
0793a61d TG |
238 | spin_unlock_irq(&ctx->lock); |
239 | goto retry; | |
240 | } | |
241 | ||
242 | /* | |
243 | * The lock prevents that this context is scheduled in so we | |
04289bb9 | 244 | * can remove the counter safely, if the call above did not |
0793a61d TG |
245 | * succeed. |
246 | */ | |
04289bb9 | 247 | if (!list_empty(&counter->list_entry)) { |
0793a61d | 248 | ctx->nr_counters--; |
04289bb9 | 249 | list_del_counter(counter, ctx); |
0793a61d TG |
250 | counter->task = NULL; |
251 | } | |
252 | spin_unlock_irq(&ctx->lock); | |
253 | } | |
254 | ||
53cfbf59 PM |
255 | /* |
256 | * Get the current time for this context. | |
257 | * If this is a task context, we use the task's task clock, | |
258 | * or for a per-cpu context, we use the cpu clock. | |
259 | */ | |
260 | static u64 get_context_time(struct perf_counter_context *ctx, int update) | |
261 | { | |
262 | struct task_struct *curr = ctx->task; | |
263 | ||
264 | if (!curr) | |
265 | return cpu_clock(smp_processor_id()); | |
266 | ||
267 | return __task_delta_exec(curr, update) + curr->se.sum_exec_runtime; | |
268 | } | |
269 | ||
270 | /* | |
271 | * Update the record of the current time in a context. | |
272 | */ | |
273 | static void update_context_time(struct perf_counter_context *ctx, int update) | |
274 | { | |
275 | ctx->time_now = get_context_time(ctx, update) - ctx->time_lost; | |
276 | } | |
277 | ||
278 | /* | |
279 | * Update the total_time_enabled and total_time_running fields for a counter. | |
280 | */ | |
281 | static void update_counter_times(struct perf_counter *counter) | |
282 | { | |
283 | struct perf_counter_context *ctx = counter->ctx; | |
284 | u64 run_end; | |
285 | ||
286 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) { | |
287 | counter->total_time_enabled = ctx->time_now - | |
288 | counter->tstamp_enabled; | |
289 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
290 | run_end = counter->tstamp_stopped; | |
291 | else | |
292 | run_end = ctx->time_now; | |
293 | counter->total_time_running = run_end - counter->tstamp_running; | |
294 | } | |
295 | } | |
296 | ||
297 | /* | |
298 | * Update total_time_enabled and total_time_running for all counters in a group. | |
299 | */ | |
300 | static void update_group_times(struct perf_counter *leader) | |
301 | { | |
302 | struct perf_counter *counter; | |
303 | ||
304 | update_counter_times(leader); | |
305 | list_for_each_entry(counter, &leader->sibling_list, list_entry) | |
306 | update_counter_times(counter); | |
307 | } | |
308 | ||
d859e29f PM |
309 | /* |
310 | * Cross CPU call to disable a performance counter | |
311 | */ | |
312 | static void __perf_counter_disable(void *info) | |
313 | { | |
314 | struct perf_counter *counter = info; | |
315 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
316 | struct perf_counter_context *ctx = counter->ctx; | |
317 | unsigned long flags; | |
318 | ||
319 | /* | |
320 | * If this is a per-task counter, need to check whether this | |
321 | * counter's task is the current task on this cpu. | |
322 | */ | |
323 | if (ctx->task && cpuctx->task_ctx != ctx) | |
324 | return; | |
325 | ||
326 | curr_rq_lock_irq_save(&flags); | |
327 | spin_lock(&ctx->lock); | |
328 | ||
329 | /* | |
330 | * If the counter is on, turn it off. | |
331 | * If it is in error state, leave it in error state. | |
332 | */ | |
333 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) { | |
53cfbf59 PM |
334 | update_context_time(ctx, 1); |
335 | update_counter_times(counter); | |
d859e29f PM |
336 | if (counter == counter->group_leader) |
337 | group_sched_out(counter, cpuctx, ctx); | |
338 | else | |
339 | counter_sched_out(counter, cpuctx, ctx); | |
340 | counter->state = PERF_COUNTER_STATE_OFF; | |
341 | } | |
342 | ||
343 | spin_unlock(&ctx->lock); | |
344 | curr_rq_unlock_irq_restore(&flags); | |
345 | } | |
346 | ||
347 | /* | |
348 | * Disable a counter. | |
349 | */ | |
350 | static void perf_counter_disable(struct perf_counter *counter) | |
351 | { | |
352 | struct perf_counter_context *ctx = counter->ctx; | |
353 | struct task_struct *task = ctx->task; | |
354 | ||
355 | if (!task) { | |
356 | /* | |
357 | * Disable the counter on the cpu that it's on | |
358 | */ | |
359 | smp_call_function_single(counter->cpu, __perf_counter_disable, | |
360 | counter, 1); | |
361 | return; | |
362 | } | |
363 | ||
364 | retry: | |
365 | task_oncpu_function_call(task, __perf_counter_disable, counter); | |
366 | ||
367 | spin_lock_irq(&ctx->lock); | |
368 | /* | |
369 | * If the counter is still active, we need to retry the cross-call. | |
370 | */ | |
371 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { | |
372 | spin_unlock_irq(&ctx->lock); | |
373 | goto retry; | |
374 | } | |
375 | ||
376 | /* | |
377 | * Since we have the lock this context can't be scheduled | |
378 | * in, so we can change the state safely. | |
379 | */ | |
53cfbf59 PM |
380 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
381 | update_counter_times(counter); | |
d859e29f | 382 | counter->state = PERF_COUNTER_STATE_OFF; |
53cfbf59 | 383 | } |
d859e29f PM |
384 | |
385 | spin_unlock_irq(&ctx->lock); | |
386 | } | |
387 | ||
388 | /* | |
389 | * Disable a counter and all its children. | |
390 | */ | |
391 | static void perf_counter_disable_family(struct perf_counter *counter) | |
392 | { | |
393 | struct perf_counter *child; | |
394 | ||
395 | perf_counter_disable(counter); | |
396 | ||
397 | /* | |
398 | * Lock the mutex to protect the list of children | |
399 | */ | |
400 | mutex_lock(&counter->mutex); | |
401 | list_for_each_entry(child, &counter->child_list, child_list) | |
402 | perf_counter_disable(child); | |
403 | mutex_unlock(&counter->mutex); | |
404 | } | |
405 | ||
235c7fc7 IM |
406 | static int |
407 | counter_sched_in(struct perf_counter *counter, | |
408 | struct perf_cpu_context *cpuctx, | |
409 | struct perf_counter_context *ctx, | |
410 | int cpu) | |
411 | { | |
3b6f9e5c | 412 | if (counter->state <= PERF_COUNTER_STATE_OFF) |
235c7fc7 IM |
413 | return 0; |
414 | ||
415 | counter->state = PERF_COUNTER_STATE_ACTIVE; | |
416 | counter->oncpu = cpu; /* TODO: put 'cpu' into cpuctx->cpu */ | |
417 | /* | |
418 | * The new state must be visible before we turn it on in the hardware: | |
419 | */ | |
420 | smp_wmb(); | |
421 | ||
422 | if (counter->hw_ops->enable(counter)) { | |
423 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
424 | counter->oncpu = -1; | |
425 | return -EAGAIN; | |
426 | } | |
427 | ||
53cfbf59 PM |
428 | counter->tstamp_running += ctx->time_now - counter->tstamp_stopped; |
429 | ||
3b6f9e5c PM |
430 | if (!is_software_counter(counter)) |
431 | cpuctx->active_oncpu++; | |
235c7fc7 IM |
432 | ctx->nr_active++; |
433 | ||
3b6f9e5c PM |
434 | if (counter->hw_event.exclusive) |
435 | cpuctx->exclusive = 1; | |
436 | ||
235c7fc7 IM |
437 | return 0; |
438 | } | |
439 | ||
3b6f9e5c PM |
440 | /* |
441 | * Return 1 for a group consisting entirely of software counters, | |
442 | * 0 if the group contains any hardware counters. | |
443 | */ | |
444 | static int is_software_only_group(struct perf_counter *leader) | |
445 | { | |
446 | struct perf_counter *counter; | |
447 | ||
448 | if (!is_software_counter(leader)) | |
449 | return 0; | |
5c148194 | 450 | |
3b6f9e5c PM |
451 | list_for_each_entry(counter, &leader->sibling_list, list_entry) |
452 | if (!is_software_counter(counter)) | |
453 | return 0; | |
5c148194 | 454 | |
3b6f9e5c PM |
455 | return 1; |
456 | } | |
457 | ||
458 | /* | |
459 | * Work out whether we can put this counter group on the CPU now. | |
460 | */ | |
461 | static int group_can_go_on(struct perf_counter *counter, | |
462 | struct perf_cpu_context *cpuctx, | |
463 | int can_add_hw) | |
464 | { | |
465 | /* | |
466 | * Groups consisting entirely of software counters can always go on. | |
467 | */ | |
468 | if (is_software_only_group(counter)) | |
469 | return 1; | |
470 | /* | |
471 | * If an exclusive group is already on, no other hardware | |
472 | * counters can go on. | |
473 | */ | |
474 | if (cpuctx->exclusive) | |
475 | return 0; | |
476 | /* | |
477 | * If this group is exclusive and there are already | |
478 | * counters on the CPU, it can't go on. | |
479 | */ | |
480 | if (counter->hw_event.exclusive && cpuctx->active_oncpu) | |
481 | return 0; | |
482 | /* | |
483 | * Otherwise, try to add it if all previous groups were able | |
484 | * to go on. | |
485 | */ | |
486 | return can_add_hw; | |
487 | } | |
488 | ||
53cfbf59 PM |
489 | static void add_counter_to_ctx(struct perf_counter *counter, |
490 | struct perf_counter_context *ctx) | |
491 | { | |
492 | list_add_counter(counter, ctx); | |
493 | ctx->nr_counters++; | |
494 | counter->prev_state = PERF_COUNTER_STATE_OFF; | |
495 | counter->tstamp_enabled = ctx->time_now; | |
496 | counter->tstamp_running = ctx->time_now; | |
497 | counter->tstamp_stopped = ctx->time_now; | |
498 | } | |
499 | ||
0793a61d | 500 | /* |
235c7fc7 | 501 | * Cross CPU call to install and enable a performance counter |
0793a61d TG |
502 | */ |
503 | static void __perf_install_in_context(void *info) | |
504 | { | |
505 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
506 | struct perf_counter *counter = info; | |
507 | struct perf_counter_context *ctx = counter->ctx; | |
d859e29f | 508 | struct perf_counter *leader = counter->group_leader; |
0793a61d | 509 | int cpu = smp_processor_id(); |
9b51f66d | 510 | unsigned long flags; |
5c92d124 | 511 | u64 perf_flags; |
3b6f9e5c | 512 | int err; |
0793a61d TG |
513 | |
514 | /* | |
515 | * If this is a task context, we need to check whether it is | |
516 | * the current task context of this cpu. If not it has been | |
517 | * scheduled out before the smp call arrived. | |
518 | */ | |
519 | if (ctx->task && cpuctx->task_ctx != ctx) | |
520 | return; | |
521 | ||
aa9c4c0f IM |
522 | curr_rq_lock_irq_save(&flags); |
523 | spin_lock(&ctx->lock); | |
53cfbf59 | 524 | update_context_time(ctx, 1); |
0793a61d TG |
525 | |
526 | /* | |
527 | * Protect the list operation against NMI by disabling the | |
528 | * counters on a global level. NOP for non NMI based counters. | |
529 | */ | |
01b2838c | 530 | perf_flags = hw_perf_save_disable(); |
0793a61d | 531 | |
53cfbf59 | 532 | add_counter_to_ctx(counter, ctx); |
0793a61d | 533 | |
d859e29f PM |
534 | /* |
535 | * Don't put the counter on if it is disabled or if | |
536 | * it is in a group and the group isn't on. | |
537 | */ | |
538 | if (counter->state != PERF_COUNTER_STATE_INACTIVE || | |
539 | (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE)) | |
540 | goto unlock; | |
541 | ||
3b6f9e5c PM |
542 | /* |
543 | * An exclusive counter can't go on if there are already active | |
544 | * hardware counters, and no hardware counter can go on if there | |
545 | * is already an exclusive counter on. | |
546 | */ | |
d859e29f | 547 | if (!group_can_go_on(counter, cpuctx, 1)) |
3b6f9e5c PM |
548 | err = -EEXIST; |
549 | else | |
550 | err = counter_sched_in(counter, cpuctx, ctx, cpu); | |
551 | ||
d859e29f PM |
552 | if (err) { |
553 | /* | |
554 | * This counter couldn't go on. If it is in a group | |
555 | * then we have to pull the whole group off. | |
556 | * If the counter group is pinned then put it in error state. | |
557 | */ | |
558 | if (leader != counter) | |
559 | group_sched_out(leader, cpuctx, ctx); | |
53cfbf59 PM |
560 | if (leader->hw_event.pinned) { |
561 | update_group_times(leader); | |
d859e29f | 562 | leader->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 563 | } |
d859e29f | 564 | } |
0793a61d | 565 | |
3b6f9e5c | 566 | if (!err && !ctx->task && cpuctx->max_pertask) |
0793a61d TG |
567 | cpuctx->max_pertask--; |
568 | ||
d859e29f | 569 | unlock: |
235c7fc7 IM |
570 | hw_perf_restore(perf_flags); |
571 | ||
aa9c4c0f IM |
572 | spin_unlock(&ctx->lock); |
573 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
574 | } |
575 | ||
576 | /* | |
577 | * Attach a performance counter to a context | |
578 | * | |
579 | * First we add the counter to the list with the hardware enable bit | |
580 | * in counter->hw_config cleared. | |
581 | * | |
582 | * If the counter is attached to a task which is on a CPU we use a smp | |
583 | * call to enable it in the task context. The task might have been | |
584 | * scheduled away, but we check this in the smp call again. | |
d859e29f PM |
585 | * |
586 | * Must be called with ctx->mutex held. | |
0793a61d TG |
587 | */ |
588 | static void | |
589 | perf_install_in_context(struct perf_counter_context *ctx, | |
590 | struct perf_counter *counter, | |
591 | int cpu) | |
592 | { | |
593 | struct task_struct *task = ctx->task; | |
594 | ||
0793a61d TG |
595 | if (!task) { |
596 | /* | |
597 | * Per cpu counters are installed via an smp call and | |
598 | * the install is always sucessful. | |
599 | */ | |
600 | smp_call_function_single(cpu, __perf_install_in_context, | |
601 | counter, 1); | |
602 | return; | |
603 | } | |
604 | ||
605 | counter->task = task; | |
606 | retry: | |
607 | task_oncpu_function_call(task, __perf_install_in_context, | |
608 | counter); | |
609 | ||
610 | spin_lock_irq(&ctx->lock); | |
611 | /* | |
0793a61d TG |
612 | * we need to retry the smp call. |
613 | */ | |
d859e29f | 614 | if (ctx->is_active && list_empty(&counter->list_entry)) { |
0793a61d TG |
615 | spin_unlock_irq(&ctx->lock); |
616 | goto retry; | |
617 | } | |
618 | ||
619 | /* | |
620 | * The lock prevents that this context is scheduled in so we | |
621 | * can add the counter safely, if it the call above did not | |
622 | * succeed. | |
623 | */ | |
53cfbf59 PM |
624 | if (list_empty(&counter->list_entry)) |
625 | add_counter_to_ctx(counter, ctx); | |
0793a61d TG |
626 | spin_unlock_irq(&ctx->lock); |
627 | } | |
628 | ||
d859e29f PM |
629 | /* |
630 | * Cross CPU call to enable a performance counter | |
631 | */ | |
632 | static void __perf_counter_enable(void *info) | |
04289bb9 | 633 | { |
d859e29f PM |
634 | struct perf_counter *counter = info; |
635 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
636 | struct perf_counter_context *ctx = counter->ctx; | |
637 | struct perf_counter *leader = counter->group_leader; | |
638 | unsigned long flags; | |
639 | int err; | |
04289bb9 | 640 | |
d859e29f PM |
641 | /* |
642 | * If this is a per-task counter, need to check whether this | |
643 | * counter's task is the current task on this cpu. | |
644 | */ | |
645 | if (ctx->task && cpuctx->task_ctx != ctx) | |
3cbed429 PM |
646 | return; |
647 | ||
d859e29f PM |
648 | curr_rq_lock_irq_save(&flags); |
649 | spin_lock(&ctx->lock); | |
53cfbf59 | 650 | update_context_time(ctx, 1); |
d859e29f | 651 | |
c07c99b6 | 652 | counter->prev_state = counter->state; |
d859e29f PM |
653 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) |
654 | goto unlock; | |
655 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
53cfbf59 | 656 | counter->tstamp_enabled = ctx->time_now - counter->total_time_enabled; |
04289bb9 IM |
657 | |
658 | /* | |
d859e29f PM |
659 | * If the counter is in a group and isn't the group leader, |
660 | * then don't put it on unless the group is on. | |
04289bb9 | 661 | */ |
d859e29f PM |
662 | if (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE) |
663 | goto unlock; | |
3b6f9e5c | 664 | |
d859e29f PM |
665 | if (!group_can_go_on(counter, cpuctx, 1)) |
666 | err = -EEXIST; | |
667 | else | |
668 | err = counter_sched_in(counter, cpuctx, ctx, | |
669 | smp_processor_id()); | |
670 | ||
671 | if (err) { | |
672 | /* | |
673 | * If this counter can't go on and it's part of a | |
674 | * group, then the whole group has to come off. | |
675 | */ | |
676 | if (leader != counter) | |
677 | group_sched_out(leader, cpuctx, ctx); | |
53cfbf59 PM |
678 | if (leader->hw_event.pinned) { |
679 | update_group_times(leader); | |
d859e29f | 680 | leader->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 681 | } |
d859e29f PM |
682 | } |
683 | ||
684 | unlock: | |
685 | spin_unlock(&ctx->lock); | |
686 | curr_rq_unlock_irq_restore(&flags); | |
687 | } | |
688 | ||
689 | /* | |
690 | * Enable a counter. | |
691 | */ | |
692 | static void perf_counter_enable(struct perf_counter *counter) | |
693 | { | |
694 | struct perf_counter_context *ctx = counter->ctx; | |
695 | struct task_struct *task = ctx->task; | |
696 | ||
697 | if (!task) { | |
698 | /* | |
699 | * Enable the counter on the cpu that it's on | |
700 | */ | |
701 | smp_call_function_single(counter->cpu, __perf_counter_enable, | |
702 | counter, 1); | |
703 | return; | |
704 | } | |
705 | ||
706 | spin_lock_irq(&ctx->lock); | |
707 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
708 | goto out; | |
709 | ||
710 | /* | |
711 | * If the counter is in error state, clear that first. | |
712 | * That way, if we see the counter in error state below, we | |
713 | * know that it has gone back into error state, as distinct | |
714 | * from the task having been scheduled away before the | |
715 | * cross-call arrived. | |
716 | */ | |
717 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
718 | counter->state = PERF_COUNTER_STATE_OFF; | |
719 | ||
720 | retry: | |
721 | spin_unlock_irq(&ctx->lock); | |
722 | task_oncpu_function_call(task, __perf_counter_enable, counter); | |
723 | ||
724 | spin_lock_irq(&ctx->lock); | |
725 | ||
726 | /* | |
727 | * If the context is active and the counter is still off, | |
728 | * we need to retry the cross-call. | |
729 | */ | |
730 | if (ctx->is_active && counter->state == PERF_COUNTER_STATE_OFF) | |
731 | goto retry; | |
732 | ||
733 | /* | |
734 | * Since we have the lock this context can't be scheduled | |
735 | * in, so we can change the state safely. | |
736 | */ | |
53cfbf59 | 737 | if (counter->state == PERF_COUNTER_STATE_OFF) { |
d859e29f | 738 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
53cfbf59 PM |
739 | counter->tstamp_enabled = ctx->time_now - |
740 | counter->total_time_enabled; | |
741 | } | |
d859e29f PM |
742 | out: |
743 | spin_unlock_irq(&ctx->lock); | |
744 | } | |
745 | ||
746 | /* | |
747 | * Enable a counter and all its children. | |
748 | */ | |
749 | static void perf_counter_enable_family(struct perf_counter *counter) | |
750 | { | |
751 | struct perf_counter *child; | |
752 | ||
753 | perf_counter_enable(counter); | |
754 | ||
755 | /* | |
756 | * Lock the mutex to protect the list of children | |
757 | */ | |
758 | mutex_lock(&counter->mutex); | |
759 | list_for_each_entry(child, &counter->child_list, child_list) | |
760 | perf_counter_enable(child); | |
761 | mutex_unlock(&counter->mutex); | |
04289bb9 IM |
762 | } |
763 | ||
235c7fc7 IM |
764 | void __perf_counter_sched_out(struct perf_counter_context *ctx, |
765 | struct perf_cpu_context *cpuctx) | |
766 | { | |
767 | struct perf_counter *counter; | |
3cbed429 | 768 | u64 flags; |
235c7fc7 | 769 | |
d859e29f PM |
770 | spin_lock(&ctx->lock); |
771 | ctx->is_active = 0; | |
235c7fc7 | 772 | if (likely(!ctx->nr_counters)) |
d859e29f | 773 | goto out; |
53cfbf59 | 774 | update_context_time(ctx, 0); |
235c7fc7 | 775 | |
3cbed429 | 776 | flags = hw_perf_save_disable(); |
235c7fc7 IM |
777 | if (ctx->nr_active) { |
778 | list_for_each_entry(counter, &ctx->counter_list, list_entry) | |
779 | group_sched_out(counter, cpuctx, ctx); | |
780 | } | |
3cbed429 | 781 | hw_perf_restore(flags); |
d859e29f | 782 | out: |
235c7fc7 IM |
783 | spin_unlock(&ctx->lock); |
784 | } | |
785 | ||
0793a61d TG |
786 | /* |
787 | * Called from scheduler to remove the counters of the current task, | |
788 | * with interrupts disabled. | |
789 | * | |
790 | * We stop each counter and update the counter value in counter->count. | |
791 | * | |
7671581f | 792 | * This does not protect us against NMI, but disable() |
0793a61d TG |
793 | * sets the disabled bit in the control field of counter _before_ |
794 | * accessing the counter control register. If a NMI hits, then it will | |
795 | * not restart the counter. | |
796 | */ | |
797 | void perf_counter_task_sched_out(struct task_struct *task, int cpu) | |
798 | { | |
799 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
800 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
4a0deca6 | 801 | struct pt_regs *regs; |
0793a61d TG |
802 | |
803 | if (likely(!cpuctx->task_ctx)) | |
804 | return; | |
805 | ||
4a0deca6 PZ |
806 | regs = task_pt_regs(task); |
807 | perf_swcounter_event(PERF_COUNT_CONTEXT_SWITCHES, 1, 1, regs); | |
235c7fc7 IM |
808 | __perf_counter_sched_out(ctx, cpuctx); |
809 | ||
0793a61d TG |
810 | cpuctx->task_ctx = NULL; |
811 | } | |
812 | ||
235c7fc7 | 813 | static void perf_counter_cpu_sched_out(struct perf_cpu_context *cpuctx) |
04289bb9 | 814 | { |
235c7fc7 | 815 | __perf_counter_sched_out(&cpuctx->ctx, cpuctx); |
04289bb9 IM |
816 | } |
817 | ||
7995888f | 818 | static int |
04289bb9 IM |
819 | group_sched_in(struct perf_counter *group_counter, |
820 | struct perf_cpu_context *cpuctx, | |
821 | struct perf_counter_context *ctx, | |
822 | int cpu) | |
823 | { | |
95cdd2e7 | 824 | struct perf_counter *counter, *partial_group; |
3cbed429 PM |
825 | int ret; |
826 | ||
827 | if (group_counter->state == PERF_COUNTER_STATE_OFF) | |
828 | return 0; | |
829 | ||
830 | ret = hw_perf_group_sched_in(group_counter, cpuctx, ctx, cpu); | |
831 | if (ret) | |
832 | return ret < 0 ? ret : 0; | |
04289bb9 | 833 | |
c07c99b6 | 834 | group_counter->prev_state = group_counter->state; |
95cdd2e7 IM |
835 | if (counter_sched_in(group_counter, cpuctx, ctx, cpu)) |
836 | return -EAGAIN; | |
04289bb9 IM |
837 | |
838 | /* | |
839 | * Schedule in siblings as one group (if any): | |
840 | */ | |
7995888f | 841 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { |
c07c99b6 | 842 | counter->prev_state = counter->state; |
95cdd2e7 IM |
843 | if (counter_sched_in(counter, cpuctx, ctx, cpu)) { |
844 | partial_group = counter; | |
845 | goto group_error; | |
846 | } | |
95cdd2e7 IM |
847 | } |
848 | ||
3cbed429 | 849 | return 0; |
95cdd2e7 IM |
850 | |
851 | group_error: | |
852 | /* | |
853 | * Groups can be scheduled in as one unit only, so undo any | |
854 | * partial group before returning: | |
855 | */ | |
856 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { | |
857 | if (counter == partial_group) | |
858 | break; | |
859 | counter_sched_out(counter, cpuctx, ctx); | |
7995888f | 860 | } |
95cdd2e7 | 861 | counter_sched_out(group_counter, cpuctx, ctx); |
7995888f | 862 | |
95cdd2e7 | 863 | return -EAGAIN; |
04289bb9 IM |
864 | } |
865 | ||
235c7fc7 IM |
866 | static void |
867 | __perf_counter_sched_in(struct perf_counter_context *ctx, | |
868 | struct perf_cpu_context *cpuctx, int cpu) | |
0793a61d | 869 | { |
0793a61d | 870 | struct perf_counter *counter; |
3cbed429 | 871 | u64 flags; |
dd0e6ba2 | 872 | int can_add_hw = 1; |
0793a61d | 873 | |
d859e29f PM |
874 | spin_lock(&ctx->lock); |
875 | ctx->is_active = 1; | |
0793a61d | 876 | if (likely(!ctx->nr_counters)) |
d859e29f | 877 | goto out; |
0793a61d | 878 | |
53cfbf59 PM |
879 | /* |
880 | * Add any time since the last sched_out to the lost time | |
881 | * so it doesn't get included in the total_time_enabled and | |
882 | * total_time_running measures for counters in the context. | |
883 | */ | |
884 | ctx->time_lost = get_context_time(ctx, 0) - ctx->time_now; | |
885 | ||
3cbed429 | 886 | flags = hw_perf_save_disable(); |
3b6f9e5c PM |
887 | |
888 | /* | |
889 | * First go through the list and put on any pinned groups | |
890 | * in order to give them the best chance of going on. | |
891 | */ | |
892 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
893 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
894 | !counter->hw_event.pinned) | |
895 | continue; | |
896 | if (counter->cpu != -1 && counter->cpu != cpu) | |
897 | continue; | |
898 | ||
899 | if (group_can_go_on(counter, cpuctx, 1)) | |
900 | group_sched_in(counter, cpuctx, ctx, cpu); | |
901 | ||
902 | /* | |
903 | * If this pinned group hasn't been scheduled, | |
904 | * put it in error state. | |
905 | */ | |
53cfbf59 PM |
906 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
907 | update_group_times(counter); | |
3b6f9e5c | 908 | counter->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 909 | } |
3b6f9e5c PM |
910 | } |
911 | ||
04289bb9 | 912 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
3b6f9e5c PM |
913 | /* |
914 | * Ignore counters in OFF or ERROR state, and | |
915 | * ignore pinned counters since we did them already. | |
916 | */ | |
917 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
918 | counter->hw_event.pinned) | |
919 | continue; | |
920 | ||
04289bb9 IM |
921 | /* |
922 | * Listen to the 'cpu' scheduling filter constraint | |
923 | * of counters: | |
924 | */ | |
0793a61d TG |
925 | if (counter->cpu != -1 && counter->cpu != cpu) |
926 | continue; | |
927 | ||
3b6f9e5c | 928 | if (group_can_go_on(counter, cpuctx, can_add_hw)) { |
dd0e6ba2 PM |
929 | if (group_sched_in(counter, cpuctx, ctx, cpu)) |
930 | can_add_hw = 0; | |
3b6f9e5c | 931 | } |
0793a61d | 932 | } |
3cbed429 | 933 | hw_perf_restore(flags); |
d859e29f | 934 | out: |
0793a61d | 935 | spin_unlock(&ctx->lock); |
235c7fc7 IM |
936 | } |
937 | ||
938 | /* | |
939 | * Called from scheduler to add the counters of the current task | |
940 | * with interrupts disabled. | |
941 | * | |
942 | * We restore the counter value and then enable it. | |
943 | * | |
944 | * This does not protect us against NMI, but enable() | |
945 | * sets the enabled bit in the control field of counter _before_ | |
946 | * accessing the counter control register. If a NMI hits, then it will | |
947 | * keep the counter running. | |
948 | */ | |
949 | void perf_counter_task_sched_in(struct task_struct *task, int cpu) | |
950 | { | |
951 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
952 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
04289bb9 | 953 | |
235c7fc7 | 954 | __perf_counter_sched_in(ctx, cpuctx, cpu); |
0793a61d TG |
955 | cpuctx->task_ctx = ctx; |
956 | } | |
957 | ||
235c7fc7 IM |
958 | static void perf_counter_cpu_sched_in(struct perf_cpu_context *cpuctx, int cpu) |
959 | { | |
960 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
961 | ||
962 | __perf_counter_sched_in(ctx, cpuctx, cpu); | |
963 | } | |
964 | ||
1d1c7ddb IM |
965 | int perf_counter_task_disable(void) |
966 | { | |
967 | struct task_struct *curr = current; | |
968 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
969 | struct perf_counter *counter; | |
aa9c4c0f | 970 | unsigned long flags; |
1d1c7ddb IM |
971 | u64 perf_flags; |
972 | int cpu; | |
973 | ||
974 | if (likely(!ctx->nr_counters)) | |
975 | return 0; | |
976 | ||
aa9c4c0f | 977 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
978 | cpu = smp_processor_id(); |
979 | ||
aa9c4c0f IM |
980 | /* force the update of the task clock: */ |
981 | __task_delta_exec(curr, 1); | |
982 | ||
1d1c7ddb IM |
983 | perf_counter_task_sched_out(curr, cpu); |
984 | ||
985 | spin_lock(&ctx->lock); | |
986 | ||
987 | /* | |
988 | * Disable all the counters: | |
989 | */ | |
990 | perf_flags = hw_perf_save_disable(); | |
991 | ||
3b6f9e5c | 992 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
53cfbf59 PM |
993 | if (counter->state != PERF_COUNTER_STATE_ERROR) { |
994 | update_group_times(counter); | |
3b6f9e5c | 995 | counter->state = PERF_COUNTER_STATE_OFF; |
53cfbf59 | 996 | } |
3b6f9e5c | 997 | } |
9b51f66d | 998 | |
1d1c7ddb IM |
999 | hw_perf_restore(perf_flags); |
1000 | ||
1001 | spin_unlock(&ctx->lock); | |
1002 | ||
aa9c4c0f | 1003 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
1004 | |
1005 | return 0; | |
1006 | } | |
1007 | ||
1008 | int perf_counter_task_enable(void) | |
1009 | { | |
1010 | struct task_struct *curr = current; | |
1011 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
1012 | struct perf_counter *counter; | |
aa9c4c0f | 1013 | unsigned long flags; |
1d1c7ddb IM |
1014 | u64 perf_flags; |
1015 | int cpu; | |
1016 | ||
1017 | if (likely(!ctx->nr_counters)) | |
1018 | return 0; | |
1019 | ||
aa9c4c0f | 1020 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
1021 | cpu = smp_processor_id(); |
1022 | ||
aa9c4c0f IM |
1023 | /* force the update of the task clock: */ |
1024 | __task_delta_exec(curr, 1); | |
1025 | ||
235c7fc7 IM |
1026 | perf_counter_task_sched_out(curr, cpu); |
1027 | ||
1d1c7ddb IM |
1028 | spin_lock(&ctx->lock); |
1029 | ||
1030 | /* | |
1031 | * Disable all the counters: | |
1032 | */ | |
1033 | perf_flags = hw_perf_save_disable(); | |
1034 | ||
1035 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
3b6f9e5c | 1036 | if (counter->state > PERF_COUNTER_STATE_OFF) |
1d1c7ddb | 1037 | continue; |
6a930700 | 1038 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
53cfbf59 PM |
1039 | counter->tstamp_enabled = ctx->time_now - |
1040 | counter->total_time_enabled; | |
aa9c4c0f | 1041 | counter->hw_event.disabled = 0; |
1d1c7ddb IM |
1042 | } |
1043 | hw_perf_restore(perf_flags); | |
1044 | ||
1045 | spin_unlock(&ctx->lock); | |
1046 | ||
1047 | perf_counter_task_sched_in(curr, cpu); | |
1048 | ||
aa9c4c0f | 1049 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
1050 | |
1051 | return 0; | |
1052 | } | |
1053 | ||
235c7fc7 IM |
1054 | /* |
1055 | * Round-robin a context's counters: | |
1056 | */ | |
1057 | static void rotate_ctx(struct perf_counter_context *ctx) | |
0793a61d | 1058 | { |
0793a61d | 1059 | struct perf_counter *counter; |
5c92d124 | 1060 | u64 perf_flags; |
0793a61d | 1061 | |
235c7fc7 | 1062 | if (!ctx->nr_counters) |
0793a61d TG |
1063 | return; |
1064 | ||
0793a61d | 1065 | spin_lock(&ctx->lock); |
0793a61d | 1066 | /* |
04289bb9 | 1067 | * Rotate the first entry last (works just fine for group counters too): |
0793a61d | 1068 | */ |
01b2838c | 1069 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 1070 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
75564232 | 1071 | list_move_tail(&counter->list_entry, &ctx->counter_list); |
0793a61d TG |
1072 | break; |
1073 | } | |
01b2838c | 1074 | hw_perf_restore(perf_flags); |
0793a61d TG |
1075 | |
1076 | spin_unlock(&ctx->lock); | |
235c7fc7 IM |
1077 | } |
1078 | ||
1079 | void perf_counter_task_tick(struct task_struct *curr, int cpu) | |
1080 | { | |
1081 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1082 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
1083 | const int rotate_percpu = 0; | |
1084 | ||
1085 | if (rotate_percpu) | |
1086 | perf_counter_cpu_sched_out(cpuctx); | |
1087 | perf_counter_task_sched_out(curr, cpu); | |
0793a61d | 1088 | |
235c7fc7 IM |
1089 | if (rotate_percpu) |
1090 | rotate_ctx(&cpuctx->ctx); | |
1091 | rotate_ctx(ctx); | |
1092 | ||
1093 | if (rotate_percpu) | |
1094 | perf_counter_cpu_sched_in(cpuctx, cpu); | |
0793a61d TG |
1095 | perf_counter_task_sched_in(curr, cpu); |
1096 | } | |
1097 | ||
0793a61d TG |
1098 | /* |
1099 | * Cross CPU call to read the hardware counter | |
1100 | */ | |
7671581f | 1101 | static void __read(void *info) |
0793a61d | 1102 | { |
621a01ea | 1103 | struct perf_counter *counter = info; |
53cfbf59 | 1104 | struct perf_counter_context *ctx = counter->ctx; |
aa9c4c0f | 1105 | unsigned long flags; |
621a01ea | 1106 | |
aa9c4c0f | 1107 | curr_rq_lock_irq_save(&flags); |
53cfbf59 PM |
1108 | if (ctx->is_active) |
1109 | update_context_time(ctx, 1); | |
7671581f | 1110 | counter->hw_ops->read(counter); |
53cfbf59 | 1111 | update_counter_times(counter); |
aa9c4c0f | 1112 | curr_rq_unlock_irq_restore(&flags); |
0793a61d TG |
1113 | } |
1114 | ||
04289bb9 | 1115 | static u64 perf_counter_read(struct perf_counter *counter) |
0793a61d TG |
1116 | { |
1117 | /* | |
1118 | * If counter is enabled and currently active on a CPU, update the | |
1119 | * value in the counter structure: | |
1120 | */ | |
6a930700 | 1121 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { |
0793a61d | 1122 | smp_call_function_single(counter->oncpu, |
7671581f | 1123 | __read, counter, 1); |
53cfbf59 PM |
1124 | } else if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
1125 | update_counter_times(counter); | |
0793a61d TG |
1126 | } |
1127 | ||
ee06094f | 1128 | return atomic64_read(&counter->count); |
0793a61d TG |
1129 | } |
1130 | ||
0793a61d TG |
1131 | static void put_context(struct perf_counter_context *ctx) |
1132 | { | |
1133 | if (ctx->task) | |
1134 | put_task_struct(ctx->task); | |
1135 | } | |
1136 | ||
1137 | static struct perf_counter_context *find_get_context(pid_t pid, int cpu) | |
1138 | { | |
1139 | struct perf_cpu_context *cpuctx; | |
1140 | struct perf_counter_context *ctx; | |
1141 | struct task_struct *task; | |
1142 | ||
1143 | /* | |
1144 | * If cpu is not a wildcard then this is a percpu counter: | |
1145 | */ | |
1146 | if (cpu != -1) { | |
1147 | /* Must be root to operate on a CPU counter: */ | |
1148 | if (!capable(CAP_SYS_ADMIN)) | |
1149 | return ERR_PTR(-EACCES); | |
1150 | ||
1151 | if (cpu < 0 || cpu > num_possible_cpus()) | |
1152 | return ERR_PTR(-EINVAL); | |
1153 | ||
1154 | /* | |
1155 | * We could be clever and allow to attach a counter to an | |
1156 | * offline CPU and activate it when the CPU comes up, but | |
1157 | * that's for later. | |
1158 | */ | |
1159 | if (!cpu_isset(cpu, cpu_online_map)) | |
1160 | return ERR_PTR(-ENODEV); | |
1161 | ||
1162 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1163 | ctx = &cpuctx->ctx; | |
1164 | ||
0793a61d TG |
1165 | return ctx; |
1166 | } | |
1167 | ||
1168 | rcu_read_lock(); | |
1169 | if (!pid) | |
1170 | task = current; | |
1171 | else | |
1172 | task = find_task_by_vpid(pid); | |
1173 | if (task) | |
1174 | get_task_struct(task); | |
1175 | rcu_read_unlock(); | |
1176 | ||
1177 | if (!task) | |
1178 | return ERR_PTR(-ESRCH); | |
1179 | ||
1180 | ctx = &task->perf_counter_ctx; | |
1181 | ctx->task = task; | |
1182 | ||
1183 | /* Reuse ptrace permission checks for now. */ | |
1184 | if (!ptrace_may_access(task, PTRACE_MODE_READ)) { | |
1185 | put_context(ctx); | |
1186 | return ERR_PTR(-EACCES); | |
1187 | } | |
1188 | ||
1189 | return ctx; | |
1190 | } | |
1191 | ||
592903cd PZ |
1192 | static void free_counter_rcu(struct rcu_head *head) |
1193 | { | |
1194 | struct perf_counter *counter; | |
1195 | ||
1196 | counter = container_of(head, struct perf_counter, rcu_head); | |
1197 | kfree(counter); | |
1198 | } | |
1199 | ||
925d519a PZ |
1200 | static void perf_pending_sync(struct perf_counter *counter); |
1201 | ||
f1600952 PZ |
1202 | static void free_counter(struct perf_counter *counter) |
1203 | { | |
925d519a PZ |
1204 | perf_pending_sync(counter); |
1205 | ||
e077df4f PZ |
1206 | if (counter->destroy) |
1207 | counter->destroy(counter); | |
1208 | ||
f1600952 PZ |
1209 | call_rcu(&counter->rcu_head, free_counter_rcu); |
1210 | } | |
1211 | ||
0793a61d TG |
1212 | /* |
1213 | * Called when the last reference to the file is gone. | |
1214 | */ | |
1215 | static int perf_release(struct inode *inode, struct file *file) | |
1216 | { | |
1217 | struct perf_counter *counter = file->private_data; | |
1218 | struct perf_counter_context *ctx = counter->ctx; | |
1219 | ||
1220 | file->private_data = NULL; | |
1221 | ||
d859e29f | 1222 | mutex_lock(&ctx->mutex); |
0793a61d TG |
1223 | mutex_lock(&counter->mutex); |
1224 | ||
04289bb9 | 1225 | perf_counter_remove_from_context(counter); |
0793a61d TG |
1226 | |
1227 | mutex_unlock(&counter->mutex); | |
d859e29f | 1228 | mutex_unlock(&ctx->mutex); |
0793a61d | 1229 | |
f1600952 | 1230 | free_counter(counter); |
5af75917 | 1231 | put_context(ctx); |
0793a61d TG |
1232 | |
1233 | return 0; | |
1234 | } | |
1235 | ||
1236 | /* | |
1237 | * Read the performance counter - simple non blocking version for now | |
1238 | */ | |
1239 | static ssize_t | |
1240 | perf_read_hw(struct perf_counter *counter, char __user *buf, size_t count) | |
1241 | { | |
53cfbf59 PM |
1242 | u64 values[3]; |
1243 | int n; | |
0793a61d | 1244 | |
3b6f9e5c PM |
1245 | /* |
1246 | * Return end-of-file for a read on a counter that is in | |
1247 | * error state (i.e. because it was pinned but it couldn't be | |
1248 | * scheduled on to the CPU at some point). | |
1249 | */ | |
1250 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
1251 | return 0; | |
1252 | ||
0793a61d | 1253 | mutex_lock(&counter->mutex); |
53cfbf59 PM |
1254 | values[0] = perf_counter_read(counter); |
1255 | n = 1; | |
1256 | if (counter->hw_event.read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) | |
1257 | values[n++] = counter->total_time_enabled + | |
1258 | atomic64_read(&counter->child_total_time_enabled); | |
1259 | if (counter->hw_event.read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) | |
1260 | values[n++] = counter->total_time_running + | |
1261 | atomic64_read(&counter->child_total_time_running); | |
0793a61d TG |
1262 | mutex_unlock(&counter->mutex); |
1263 | ||
53cfbf59 PM |
1264 | if (count < n * sizeof(u64)) |
1265 | return -EINVAL; | |
1266 | count = n * sizeof(u64); | |
1267 | ||
1268 | if (copy_to_user(buf, values, count)) | |
1269 | return -EFAULT; | |
1270 | ||
1271 | return count; | |
0793a61d TG |
1272 | } |
1273 | ||
0793a61d TG |
1274 | static ssize_t |
1275 | perf_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | |
1276 | { | |
1277 | struct perf_counter *counter = file->private_data; | |
1278 | ||
7b732a75 | 1279 | return perf_read_hw(counter, buf, count); |
0793a61d TG |
1280 | } |
1281 | ||
1282 | static unsigned int perf_poll(struct file *file, poll_table *wait) | |
1283 | { | |
1284 | struct perf_counter *counter = file->private_data; | |
c7138f37 PZ |
1285 | struct perf_mmap_data *data; |
1286 | unsigned int events; | |
1287 | ||
1288 | rcu_read_lock(); | |
1289 | data = rcu_dereference(counter->data); | |
1290 | if (data) | |
1291 | events = atomic_xchg(&data->wakeup, 0); | |
1292 | else | |
1293 | events = POLL_HUP; | |
1294 | rcu_read_unlock(); | |
0793a61d TG |
1295 | |
1296 | poll_wait(file, &counter->waitq, wait); | |
1297 | ||
0793a61d TG |
1298 | return events; |
1299 | } | |
1300 | ||
d859e29f PM |
1301 | static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
1302 | { | |
1303 | struct perf_counter *counter = file->private_data; | |
1304 | int err = 0; | |
1305 | ||
1306 | switch (cmd) { | |
1307 | case PERF_COUNTER_IOC_ENABLE: | |
1308 | perf_counter_enable_family(counter); | |
1309 | break; | |
1310 | case PERF_COUNTER_IOC_DISABLE: | |
1311 | perf_counter_disable_family(counter); | |
1312 | break; | |
1313 | default: | |
1314 | err = -ENOTTY; | |
1315 | } | |
1316 | return err; | |
1317 | } | |
1318 | ||
38ff667b PZ |
1319 | /* |
1320 | * Callers need to ensure there can be no nesting of this function, otherwise | |
1321 | * the seqlock logic goes bad. We can not serialize this because the arch | |
1322 | * code calls this from NMI context. | |
1323 | */ | |
1324 | void perf_counter_update_userpage(struct perf_counter *counter) | |
37d81828 | 1325 | { |
38ff667b PZ |
1326 | struct perf_mmap_data *data; |
1327 | struct perf_counter_mmap_page *userpg; | |
1328 | ||
1329 | rcu_read_lock(); | |
1330 | data = rcu_dereference(counter->data); | |
1331 | if (!data) | |
1332 | goto unlock; | |
1333 | ||
1334 | userpg = data->user_page; | |
37d81828 | 1335 | |
7b732a75 PZ |
1336 | /* |
1337 | * Disable preemption so as to not let the corresponding user-space | |
1338 | * spin too long if we get preempted. | |
1339 | */ | |
1340 | preempt_disable(); | |
37d81828 PM |
1341 | ++userpg->lock; |
1342 | smp_wmb(); | |
1343 | userpg->index = counter->hw.idx; | |
1344 | userpg->offset = atomic64_read(&counter->count); | |
1345 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) | |
1346 | userpg->offset -= atomic64_read(&counter->hw.prev_count); | |
7b732a75 | 1347 | |
37d81828 PM |
1348 | smp_wmb(); |
1349 | ++userpg->lock; | |
7b732a75 | 1350 | preempt_enable(); |
38ff667b | 1351 | unlock: |
7b732a75 | 1352 | rcu_read_unlock(); |
37d81828 PM |
1353 | } |
1354 | ||
1355 | static int perf_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |
1356 | { | |
1357 | struct perf_counter *counter = vma->vm_file->private_data; | |
7b732a75 PZ |
1358 | struct perf_mmap_data *data; |
1359 | int ret = VM_FAULT_SIGBUS; | |
1360 | ||
1361 | rcu_read_lock(); | |
1362 | data = rcu_dereference(counter->data); | |
1363 | if (!data) | |
1364 | goto unlock; | |
1365 | ||
1366 | if (vmf->pgoff == 0) { | |
1367 | vmf->page = virt_to_page(data->user_page); | |
1368 | } else { | |
1369 | int nr = vmf->pgoff - 1; | |
37d81828 | 1370 | |
7b732a75 PZ |
1371 | if ((unsigned)nr > data->nr_pages) |
1372 | goto unlock; | |
37d81828 | 1373 | |
7b732a75 PZ |
1374 | vmf->page = virt_to_page(data->data_pages[nr]); |
1375 | } | |
37d81828 | 1376 | get_page(vmf->page); |
7b732a75 PZ |
1377 | ret = 0; |
1378 | unlock: | |
1379 | rcu_read_unlock(); | |
1380 | ||
1381 | return ret; | |
1382 | } | |
1383 | ||
1384 | static int perf_mmap_data_alloc(struct perf_counter *counter, int nr_pages) | |
1385 | { | |
1386 | struct perf_mmap_data *data; | |
1387 | unsigned long size; | |
1388 | int i; | |
1389 | ||
1390 | WARN_ON(atomic_read(&counter->mmap_count)); | |
1391 | ||
1392 | size = sizeof(struct perf_mmap_data); | |
1393 | size += nr_pages * sizeof(void *); | |
1394 | ||
1395 | data = kzalloc(size, GFP_KERNEL); | |
1396 | if (!data) | |
1397 | goto fail; | |
1398 | ||
1399 | data->user_page = (void *)get_zeroed_page(GFP_KERNEL); | |
1400 | if (!data->user_page) | |
1401 | goto fail_user_page; | |
1402 | ||
1403 | for (i = 0; i < nr_pages; i++) { | |
1404 | data->data_pages[i] = (void *)get_zeroed_page(GFP_KERNEL); | |
1405 | if (!data->data_pages[i]) | |
1406 | goto fail_data_pages; | |
1407 | } | |
1408 | ||
1409 | data->nr_pages = nr_pages; | |
1410 | ||
1411 | rcu_assign_pointer(counter->data, data); | |
1412 | ||
37d81828 | 1413 | return 0; |
7b732a75 PZ |
1414 | |
1415 | fail_data_pages: | |
1416 | for (i--; i >= 0; i--) | |
1417 | free_page((unsigned long)data->data_pages[i]); | |
1418 | ||
1419 | free_page((unsigned long)data->user_page); | |
1420 | ||
1421 | fail_user_page: | |
1422 | kfree(data); | |
1423 | ||
1424 | fail: | |
1425 | return -ENOMEM; | |
1426 | } | |
1427 | ||
1428 | static void __perf_mmap_data_free(struct rcu_head *rcu_head) | |
1429 | { | |
1430 | struct perf_mmap_data *data = container_of(rcu_head, | |
1431 | struct perf_mmap_data, rcu_head); | |
1432 | int i; | |
1433 | ||
1434 | free_page((unsigned long)data->user_page); | |
1435 | for (i = 0; i < data->nr_pages; i++) | |
1436 | free_page((unsigned long)data->data_pages[i]); | |
1437 | kfree(data); | |
1438 | } | |
1439 | ||
1440 | static void perf_mmap_data_free(struct perf_counter *counter) | |
1441 | { | |
1442 | struct perf_mmap_data *data = counter->data; | |
1443 | ||
1444 | WARN_ON(atomic_read(&counter->mmap_count)); | |
1445 | ||
1446 | rcu_assign_pointer(counter->data, NULL); | |
1447 | call_rcu(&data->rcu_head, __perf_mmap_data_free); | |
1448 | } | |
1449 | ||
1450 | static void perf_mmap_open(struct vm_area_struct *vma) | |
1451 | { | |
1452 | struct perf_counter *counter = vma->vm_file->private_data; | |
1453 | ||
1454 | atomic_inc(&counter->mmap_count); | |
1455 | } | |
1456 | ||
1457 | static void perf_mmap_close(struct vm_area_struct *vma) | |
1458 | { | |
1459 | struct perf_counter *counter = vma->vm_file->private_data; | |
1460 | ||
1461 | if (atomic_dec_and_mutex_lock(&counter->mmap_count, | |
1462 | &counter->mmap_mutex)) { | |
1463 | perf_mmap_data_free(counter); | |
1464 | mutex_unlock(&counter->mmap_mutex); | |
1465 | } | |
37d81828 PM |
1466 | } |
1467 | ||
1468 | static struct vm_operations_struct perf_mmap_vmops = { | |
7b732a75 PZ |
1469 | .open = perf_mmap_open, |
1470 | .close = perf_mmap_close, | |
37d81828 PM |
1471 | .fault = perf_mmap_fault, |
1472 | }; | |
1473 | ||
1474 | static int perf_mmap(struct file *file, struct vm_area_struct *vma) | |
1475 | { | |
1476 | struct perf_counter *counter = file->private_data; | |
7b732a75 PZ |
1477 | unsigned long vma_size; |
1478 | unsigned long nr_pages; | |
1479 | unsigned long locked, lock_limit; | |
1480 | int ret = 0; | |
37d81828 PM |
1481 | |
1482 | if (!(vma->vm_flags & VM_SHARED) || (vma->vm_flags & VM_WRITE)) | |
1483 | return -EINVAL; | |
7b732a75 PZ |
1484 | |
1485 | vma_size = vma->vm_end - vma->vm_start; | |
1486 | nr_pages = (vma_size / PAGE_SIZE) - 1; | |
1487 | ||
7730d865 PZ |
1488 | /* |
1489 | * If we have data pages ensure they're a power-of-two number, so we | |
1490 | * can do bitmasks instead of modulo. | |
1491 | */ | |
1492 | if (nr_pages != 0 && !is_power_of_2(nr_pages)) | |
37d81828 PM |
1493 | return -EINVAL; |
1494 | ||
7b732a75 | 1495 | if (vma_size != PAGE_SIZE * (1 + nr_pages)) |
37d81828 PM |
1496 | return -EINVAL; |
1497 | ||
7b732a75 PZ |
1498 | if (vma->vm_pgoff != 0) |
1499 | return -EINVAL; | |
37d81828 | 1500 | |
7b732a75 PZ |
1501 | locked = vma_size >> PAGE_SHIFT; |
1502 | locked += vma->vm_mm->locked_vm; | |
1503 | ||
1504 | lock_limit = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur; | |
1505 | lock_limit >>= PAGE_SHIFT; | |
1506 | ||
1507 | if ((locked > lock_limit) && !capable(CAP_IPC_LOCK)) | |
1508 | return -EPERM; | |
1509 | ||
1510 | mutex_lock(&counter->mmap_mutex); | |
1511 | if (atomic_inc_not_zero(&counter->mmap_count)) | |
1512 | goto out; | |
1513 | ||
1514 | WARN_ON(counter->data); | |
1515 | ret = perf_mmap_data_alloc(counter, nr_pages); | |
1516 | if (!ret) | |
1517 | atomic_set(&counter->mmap_count, 1); | |
1518 | out: | |
1519 | mutex_unlock(&counter->mmap_mutex); | |
37d81828 PM |
1520 | |
1521 | vma->vm_flags &= ~VM_MAYWRITE; | |
1522 | vma->vm_flags |= VM_RESERVED; | |
1523 | vma->vm_ops = &perf_mmap_vmops; | |
7b732a75 PZ |
1524 | |
1525 | return ret; | |
37d81828 PM |
1526 | } |
1527 | ||
0793a61d TG |
1528 | static const struct file_operations perf_fops = { |
1529 | .release = perf_release, | |
1530 | .read = perf_read, | |
1531 | .poll = perf_poll, | |
d859e29f PM |
1532 | .unlocked_ioctl = perf_ioctl, |
1533 | .compat_ioctl = perf_ioctl, | |
37d81828 | 1534 | .mmap = perf_mmap, |
0793a61d TG |
1535 | }; |
1536 | ||
925d519a PZ |
1537 | /* |
1538 | * Perf counter wakeup | |
1539 | * | |
1540 | * If there's data, ensure we set the poll() state and publish everything | |
1541 | * to user-space before waking everybody up. | |
1542 | */ | |
1543 | ||
1544 | void perf_counter_wakeup(struct perf_counter *counter) | |
1545 | { | |
1546 | struct perf_mmap_data *data; | |
1547 | ||
1548 | rcu_read_lock(); | |
1549 | data = rcu_dereference(counter->data); | |
1550 | if (data) { | |
1551 | (void)atomic_xchg(&data->wakeup, POLL_IN); | |
38ff667b PZ |
1552 | /* |
1553 | * Ensure all data writes are issued before updating the | |
1554 | * user-space data head information. The matching rmb() | |
1555 | * will be in userspace after reading this value. | |
1556 | */ | |
1557 | smp_wmb(); | |
1558 | data->user_page->data_head = atomic_read(&data->head); | |
925d519a PZ |
1559 | } |
1560 | rcu_read_unlock(); | |
1561 | ||
1562 | wake_up_all(&counter->waitq); | |
1563 | } | |
1564 | ||
1565 | /* | |
1566 | * Pending wakeups | |
1567 | * | |
1568 | * Handle the case where we need to wakeup up from NMI (or rq->lock) context. | |
1569 | * | |
1570 | * The NMI bit means we cannot possibly take locks. Therefore, maintain a | |
1571 | * single linked list and use cmpxchg() to add entries lockless. | |
1572 | */ | |
1573 | ||
1574 | #define PENDING_TAIL ((struct perf_wakeup_entry *)-1UL) | |
1575 | ||
1576 | static DEFINE_PER_CPU(struct perf_wakeup_entry *, perf_wakeup_head) = { | |
1577 | PENDING_TAIL, | |
1578 | }; | |
1579 | ||
1580 | static void perf_pending_queue(struct perf_counter *counter) | |
1581 | { | |
1582 | struct perf_wakeup_entry **head; | |
1583 | struct perf_wakeup_entry *prev, *next; | |
1584 | ||
1585 | if (cmpxchg(&counter->wakeup.next, NULL, PENDING_TAIL) != NULL) | |
1586 | return; | |
1587 | ||
1588 | head = &get_cpu_var(perf_wakeup_head); | |
1589 | ||
1590 | do { | |
1591 | prev = counter->wakeup.next = *head; | |
1592 | next = &counter->wakeup; | |
1593 | } while (cmpxchg(head, prev, next) != prev); | |
1594 | ||
1595 | set_perf_counter_pending(); | |
1596 | ||
1597 | put_cpu_var(perf_wakeup_head); | |
1598 | } | |
1599 | ||
1600 | static int __perf_pending_run(void) | |
1601 | { | |
1602 | struct perf_wakeup_entry *list; | |
1603 | int nr = 0; | |
1604 | ||
1605 | list = xchg(&__get_cpu_var(perf_wakeup_head), PENDING_TAIL); | |
1606 | while (list != PENDING_TAIL) { | |
1607 | struct perf_counter *counter = container_of(list, | |
1608 | struct perf_counter, wakeup); | |
1609 | ||
1610 | list = list->next; | |
1611 | ||
1612 | counter->wakeup.next = NULL; | |
1613 | /* | |
1614 | * Ensure we observe the unqueue before we issue the wakeup, | |
1615 | * so that we won't be waiting forever. | |
1616 | * -- see perf_not_pending(). | |
1617 | */ | |
1618 | smp_wmb(); | |
1619 | ||
1620 | perf_counter_wakeup(counter); | |
1621 | nr++; | |
1622 | } | |
1623 | ||
1624 | return nr; | |
1625 | } | |
1626 | ||
1627 | static inline int perf_not_pending(struct perf_counter *counter) | |
1628 | { | |
1629 | /* | |
1630 | * If we flush on whatever cpu we run, there is a chance we don't | |
1631 | * need to wait. | |
1632 | */ | |
1633 | get_cpu(); | |
1634 | __perf_pending_run(); | |
1635 | put_cpu(); | |
1636 | ||
1637 | /* | |
1638 | * Ensure we see the proper queue state before going to sleep | |
1639 | * so that we do not miss the wakeup. -- see perf_pending_handle() | |
1640 | */ | |
1641 | smp_rmb(); | |
1642 | return counter->wakeup.next == NULL; | |
1643 | } | |
1644 | ||
1645 | static void perf_pending_sync(struct perf_counter *counter) | |
1646 | { | |
1647 | wait_event(counter->waitq, perf_not_pending(counter)); | |
1648 | } | |
1649 | ||
1650 | void perf_counter_do_pending(void) | |
1651 | { | |
1652 | __perf_pending_run(); | |
1653 | } | |
1654 | ||
0322cd6e PZ |
1655 | /* |
1656 | * Output | |
1657 | */ | |
1658 | ||
b9cacc7b PZ |
1659 | struct perf_output_handle { |
1660 | struct perf_counter *counter; | |
1661 | struct perf_mmap_data *data; | |
1662 | unsigned int offset; | |
63e35b25 | 1663 | unsigned int head; |
b9cacc7b PZ |
1664 | int wakeup; |
1665 | }; | |
1666 | ||
1667 | static int perf_output_begin(struct perf_output_handle *handle, | |
1668 | struct perf_counter *counter, unsigned int size) | |
0322cd6e | 1669 | { |
7b732a75 | 1670 | struct perf_mmap_data *data; |
b9cacc7b | 1671 | unsigned int offset, head; |
0322cd6e | 1672 | |
7b732a75 | 1673 | rcu_read_lock(); |
7b732a75 PZ |
1674 | data = rcu_dereference(counter->data); |
1675 | if (!data) | |
1676 | goto out; | |
1677 | ||
1678 | if (!data->nr_pages) | |
1679 | goto out; | |
1680 | ||
7b732a75 PZ |
1681 | do { |
1682 | offset = head = atomic_read(&data->head); | |
c7138f37 | 1683 | head += size; |
7b732a75 PZ |
1684 | } while (atomic_cmpxchg(&data->head, offset, head) != offset); |
1685 | ||
b9cacc7b PZ |
1686 | handle->counter = counter; |
1687 | handle->data = data; | |
1688 | handle->offset = offset; | |
63e35b25 | 1689 | handle->head = head; |
b9cacc7b | 1690 | handle->wakeup = (offset >> PAGE_SHIFT) != (head >> PAGE_SHIFT); |
0322cd6e | 1691 | |
b9cacc7b | 1692 | return 0; |
7b732a75 | 1693 | |
b9cacc7b PZ |
1694 | out: |
1695 | rcu_read_unlock(); | |
7b732a75 | 1696 | |
b9cacc7b PZ |
1697 | return -ENOSPC; |
1698 | } | |
7b732a75 | 1699 | |
b9cacc7b PZ |
1700 | static void perf_output_copy(struct perf_output_handle *handle, |
1701 | void *buf, unsigned int len) | |
1702 | { | |
1703 | unsigned int pages_mask; | |
1704 | unsigned int offset; | |
1705 | unsigned int size; | |
1706 | void **pages; | |
1707 | ||
1708 | offset = handle->offset; | |
1709 | pages_mask = handle->data->nr_pages - 1; | |
1710 | pages = handle->data->data_pages; | |
1711 | ||
1712 | do { | |
1713 | unsigned int page_offset; | |
1714 | int nr; | |
1715 | ||
1716 | nr = (offset >> PAGE_SHIFT) & pages_mask; | |
1717 | page_offset = offset & (PAGE_SIZE - 1); | |
1718 | size = min_t(unsigned int, PAGE_SIZE - page_offset, len); | |
1719 | ||
1720 | memcpy(pages[nr] + page_offset, buf, size); | |
1721 | ||
1722 | len -= size; | |
1723 | buf += size; | |
1724 | offset += size; | |
1725 | } while (len); | |
1726 | ||
1727 | handle->offset = offset; | |
63e35b25 PZ |
1728 | |
1729 | WARN_ON_ONCE(handle->offset > handle->head); | |
b9cacc7b PZ |
1730 | } |
1731 | ||
5c148194 PZ |
1732 | #define perf_output_put(handle, x) \ |
1733 | perf_output_copy((handle), &(x), sizeof(x)) | |
1734 | ||
b9cacc7b PZ |
1735 | static void perf_output_end(struct perf_output_handle *handle, int nmi) |
1736 | { | |
1737 | if (handle->wakeup) { | |
925d519a PZ |
1738 | if (nmi) |
1739 | perf_pending_queue(handle->counter); | |
1740 | else | |
1741 | perf_counter_wakeup(handle->counter); | |
0322cd6e | 1742 | } |
7b732a75 | 1743 | rcu_read_unlock(); |
b9cacc7b PZ |
1744 | } |
1745 | ||
1746 | static int perf_output_write(struct perf_counter *counter, int nmi, | |
1747 | void *buf, ssize_t size) | |
1748 | { | |
1749 | struct perf_output_handle handle; | |
1750 | int ret; | |
7b732a75 | 1751 | |
b9cacc7b PZ |
1752 | ret = perf_output_begin(&handle, counter, size); |
1753 | if (ret) | |
1754 | goto out; | |
1755 | ||
1756 | perf_output_copy(&handle, buf, size); | |
1757 | perf_output_end(&handle, nmi); | |
1758 | ||
1759 | out: | |
7b732a75 PZ |
1760 | return ret; |
1761 | } | |
1762 | ||
1763 | static void perf_output_simple(struct perf_counter *counter, | |
1764 | int nmi, struct pt_regs *regs) | |
1765 | { | |
ea5d20cf | 1766 | unsigned int size; |
5c148194 PZ |
1767 | struct { |
1768 | struct perf_event_header header; | |
1769 | u64 ip; | |
ea5d20cf | 1770 | u32 pid, tid; |
5c148194 | 1771 | } event; |
7b732a75 | 1772 | |
5c148194 | 1773 | event.header.type = PERF_EVENT_IP; |
5c148194 | 1774 | event.ip = instruction_pointer(regs); |
7b732a75 | 1775 | |
ea5d20cf PZ |
1776 | size = sizeof(event); |
1777 | ||
1778 | if (counter->hw_event.include_tid) { | |
1779 | /* namespace issues */ | |
1780 | event.pid = current->group_leader->pid; | |
1781 | event.tid = current->pid; | |
1782 | ||
1783 | event.header.type |= __PERF_EVENT_TID; | |
1784 | } else | |
1785 | size -= sizeof(u64); | |
1786 | ||
1787 | event.header.size = size; | |
1788 | ||
1789 | perf_output_write(counter, nmi, &event, size); | |
0322cd6e PZ |
1790 | } |
1791 | ||
7b732a75 | 1792 | static void perf_output_group(struct perf_counter *counter, int nmi) |
0322cd6e | 1793 | { |
5c148194 PZ |
1794 | struct perf_output_handle handle; |
1795 | struct perf_event_header header; | |
0322cd6e | 1796 | struct perf_counter *leader, *sub; |
5c148194 PZ |
1797 | unsigned int size; |
1798 | struct { | |
1799 | u64 event; | |
1800 | u64 counter; | |
1801 | } entry; | |
1802 | int ret; | |
1803 | ||
1804 | size = sizeof(header) + counter->nr_siblings * sizeof(entry); | |
1805 | ||
1806 | ret = perf_output_begin(&handle, counter, size); | |
1807 | if (ret) | |
1808 | return; | |
1809 | ||
1810 | header.type = PERF_EVENT_GROUP; | |
1811 | header.size = size; | |
1812 | ||
1813 | perf_output_put(&handle, header); | |
0322cd6e PZ |
1814 | |
1815 | leader = counter->group_leader; | |
1816 | list_for_each_entry(sub, &leader->sibling_list, list_entry) { | |
1817 | if (sub != counter) | |
1818 | sub->hw_ops->read(sub); | |
7b732a75 PZ |
1819 | |
1820 | entry.event = sub->hw_event.config; | |
1821 | entry.counter = atomic64_read(&sub->count); | |
1822 | ||
5c148194 | 1823 | perf_output_put(&handle, entry); |
0322cd6e | 1824 | } |
5c148194 PZ |
1825 | |
1826 | perf_output_end(&handle, nmi); | |
0322cd6e PZ |
1827 | } |
1828 | ||
1829 | void perf_counter_output(struct perf_counter *counter, | |
1830 | int nmi, struct pt_regs *regs) | |
1831 | { | |
1832 | switch (counter->hw_event.record_type) { | |
1833 | case PERF_RECORD_SIMPLE: | |
1834 | return; | |
1835 | ||
1836 | case PERF_RECORD_IRQ: | |
7b732a75 | 1837 | perf_output_simple(counter, nmi, regs); |
0322cd6e PZ |
1838 | break; |
1839 | ||
1840 | case PERF_RECORD_GROUP: | |
7b732a75 | 1841 | perf_output_group(counter, nmi); |
0322cd6e PZ |
1842 | break; |
1843 | } | |
0322cd6e PZ |
1844 | } |
1845 | ||
15dbf27c PZ |
1846 | /* |
1847 | * Generic software counter infrastructure | |
1848 | */ | |
1849 | ||
1850 | static void perf_swcounter_update(struct perf_counter *counter) | |
1851 | { | |
1852 | struct hw_perf_counter *hwc = &counter->hw; | |
1853 | u64 prev, now; | |
1854 | s64 delta; | |
1855 | ||
1856 | again: | |
1857 | prev = atomic64_read(&hwc->prev_count); | |
1858 | now = atomic64_read(&hwc->count); | |
1859 | if (atomic64_cmpxchg(&hwc->prev_count, prev, now) != prev) | |
1860 | goto again; | |
1861 | ||
1862 | delta = now - prev; | |
1863 | ||
1864 | atomic64_add(delta, &counter->count); | |
1865 | atomic64_sub(delta, &hwc->period_left); | |
1866 | } | |
1867 | ||
1868 | static void perf_swcounter_set_period(struct perf_counter *counter) | |
1869 | { | |
1870 | struct hw_perf_counter *hwc = &counter->hw; | |
1871 | s64 left = atomic64_read(&hwc->period_left); | |
1872 | s64 period = hwc->irq_period; | |
1873 | ||
1874 | if (unlikely(left <= -period)) { | |
1875 | left = period; | |
1876 | atomic64_set(&hwc->period_left, left); | |
1877 | } | |
1878 | ||
1879 | if (unlikely(left <= 0)) { | |
1880 | left += period; | |
1881 | atomic64_add(period, &hwc->period_left); | |
1882 | } | |
1883 | ||
1884 | atomic64_set(&hwc->prev_count, -left); | |
1885 | atomic64_set(&hwc->count, -left); | |
1886 | } | |
1887 | ||
d6d020e9 PZ |
1888 | static enum hrtimer_restart perf_swcounter_hrtimer(struct hrtimer *hrtimer) |
1889 | { | |
1890 | struct perf_counter *counter; | |
1891 | struct pt_regs *regs; | |
1892 | ||
1893 | counter = container_of(hrtimer, struct perf_counter, hw.hrtimer); | |
1894 | counter->hw_ops->read(counter); | |
1895 | ||
1896 | regs = get_irq_regs(); | |
1897 | /* | |
1898 | * In case we exclude kernel IPs or are somehow not in interrupt | |
1899 | * context, provide the next best thing, the user IP. | |
1900 | */ | |
1901 | if ((counter->hw_event.exclude_kernel || !regs) && | |
1902 | !counter->hw_event.exclude_user) | |
1903 | regs = task_pt_regs(current); | |
1904 | ||
1905 | if (regs) | |
0322cd6e | 1906 | perf_counter_output(counter, 0, regs); |
d6d020e9 PZ |
1907 | |
1908 | hrtimer_forward_now(hrtimer, ns_to_ktime(counter->hw.irq_period)); | |
1909 | ||
1910 | return HRTIMER_RESTART; | |
1911 | } | |
1912 | ||
1913 | static void perf_swcounter_overflow(struct perf_counter *counter, | |
1914 | int nmi, struct pt_regs *regs) | |
1915 | { | |
b8e83514 PZ |
1916 | perf_swcounter_update(counter); |
1917 | perf_swcounter_set_period(counter); | |
0322cd6e | 1918 | perf_counter_output(counter, nmi, regs); |
d6d020e9 PZ |
1919 | } |
1920 | ||
15dbf27c | 1921 | static int perf_swcounter_match(struct perf_counter *counter, |
b8e83514 PZ |
1922 | enum perf_event_types type, |
1923 | u32 event, struct pt_regs *regs) | |
15dbf27c PZ |
1924 | { |
1925 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
1926 | return 0; | |
1927 | ||
f4a2deb4 | 1928 | if (perf_event_raw(&counter->hw_event)) |
b8e83514 PZ |
1929 | return 0; |
1930 | ||
f4a2deb4 | 1931 | if (perf_event_type(&counter->hw_event) != type) |
15dbf27c PZ |
1932 | return 0; |
1933 | ||
f4a2deb4 | 1934 | if (perf_event_id(&counter->hw_event) != event) |
15dbf27c PZ |
1935 | return 0; |
1936 | ||
1937 | if (counter->hw_event.exclude_user && user_mode(regs)) | |
1938 | return 0; | |
1939 | ||
1940 | if (counter->hw_event.exclude_kernel && !user_mode(regs)) | |
1941 | return 0; | |
1942 | ||
1943 | return 1; | |
1944 | } | |
1945 | ||
d6d020e9 PZ |
1946 | static void perf_swcounter_add(struct perf_counter *counter, u64 nr, |
1947 | int nmi, struct pt_regs *regs) | |
1948 | { | |
1949 | int neg = atomic64_add_negative(nr, &counter->hw.count); | |
1950 | if (counter->hw.irq_period && !neg) | |
1951 | perf_swcounter_overflow(counter, nmi, regs); | |
1952 | } | |
1953 | ||
15dbf27c | 1954 | static void perf_swcounter_ctx_event(struct perf_counter_context *ctx, |
b8e83514 PZ |
1955 | enum perf_event_types type, u32 event, |
1956 | u64 nr, int nmi, struct pt_regs *regs) | |
15dbf27c PZ |
1957 | { |
1958 | struct perf_counter *counter; | |
15dbf27c | 1959 | |
01ef09d9 | 1960 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) |
15dbf27c PZ |
1961 | return; |
1962 | ||
592903cd PZ |
1963 | rcu_read_lock(); |
1964 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
b8e83514 | 1965 | if (perf_swcounter_match(counter, type, event, regs)) |
d6d020e9 | 1966 | perf_swcounter_add(counter, nr, nmi, regs); |
15dbf27c | 1967 | } |
592903cd | 1968 | rcu_read_unlock(); |
15dbf27c PZ |
1969 | } |
1970 | ||
96f6d444 PZ |
1971 | static int *perf_swcounter_recursion_context(struct perf_cpu_context *cpuctx) |
1972 | { | |
1973 | if (in_nmi()) | |
1974 | return &cpuctx->recursion[3]; | |
1975 | ||
1976 | if (in_irq()) | |
1977 | return &cpuctx->recursion[2]; | |
1978 | ||
1979 | if (in_softirq()) | |
1980 | return &cpuctx->recursion[1]; | |
1981 | ||
1982 | return &cpuctx->recursion[0]; | |
1983 | } | |
1984 | ||
b8e83514 PZ |
1985 | static void __perf_swcounter_event(enum perf_event_types type, u32 event, |
1986 | u64 nr, int nmi, struct pt_regs *regs) | |
15dbf27c PZ |
1987 | { |
1988 | struct perf_cpu_context *cpuctx = &get_cpu_var(perf_cpu_context); | |
96f6d444 PZ |
1989 | int *recursion = perf_swcounter_recursion_context(cpuctx); |
1990 | ||
1991 | if (*recursion) | |
1992 | goto out; | |
1993 | ||
1994 | (*recursion)++; | |
1995 | barrier(); | |
15dbf27c | 1996 | |
b8e83514 PZ |
1997 | perf_swcounter_ctx_event(&cpuctx->ctx, type, event, nr, nmi, regs); |
1998 | if (cpuctx->task_ctx) { | |
1999 | perf_swcounter_ctx_event(cpuctx->task_ctx, type, event, | |
2000 | nr, nmi, regs); | |
2001 | } | |
15dbf27c | 2002 | |
96f6d444 PZ |
2003 | barrier(); |
2004 | (*recursion)--; | |
2005 | ||
2006 | out: | |
15dbf27c PZ |
2007 | put_cpu_var(perf_cpu_context); |
2008 | } | |
2009 | ||
b8e83514 PZ |
2010 | void perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs) |
2011 | { | |
2012 | __perf_swcounter_event(PERF_TYPE_SOFTWARE, event, nr, nmi, regs); | |
2013 | } | |
2014 | ||
15dbf27c PZ |
2015 | static void perf_swcounter_read(struct perf_counter *counter) |
2016 | { | |
2017 | perf_swcounter_update(counter); | |
2018 | } | |
2019 | ||
2020 | static int perf_swcounter_enable(struct perf_counter *counter) | |
2021 | { | |
2022 | perf_swcounter_set_period(counter); | |
2023 | return 0; | |
2024 | } | |
2025 | ||
2026 | static void perf_swcounter_disable(struct perf_counter *counter) | |
2027 | { | |
2028 | perf_swcounter_update(counter); | |
2029 | } | |
2030 | ||
ac17dc8e PZ |
2031 | static const struct hw_perf_counter_ops perf_ops_generic = { |
2032 | .enable = perf_swcounter_enable, | |
2033 | .disable = perf_swcounter_disable, | |
2034 | .read = perf_swcounter_read, | |
2035 | }; | |
2036 | ||
15dbf27c PZ |
2037 | /* |
2038 | * Software counter: cpu wall time clock | |
2039 | */ | |
2040 | ||
9abf8a08 PM |
2041 | static void cpu_clock_perf_counter_update(struct perf_counter *counter) |
2042 | { | |
2043 | int cpu = raw_smp_processor_id(); | |
2044 | s64 prev; | |
2045 | u64 now; | |
2046 | ||
2047 | now = cpu_clock(cpu); | |
2048 | prev = atomic64_read(&counter->hw.prev_count); | |
2049 | atomic64_set(&counter->hw.prev_count, now); | |
2050 | atomic64_add(now - prev, &counter->count); | |
2051 | } | |
2052 | ||
d6d020e9 PZ |
2053 | static int cpu_clock_perf_counter_enable(struct perf_counter *counter) |
2054 | { | |
2055 | struct hw_perf_counter *hwc = &counter->hw; | |
2056 | int cpu = raw_smp_processor_id(); | |
2057 | ||
2058 | atomic64_set(&hwc->prev_count, cpu_clock(cpu)); | |
039fc91e PZ |
2059 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
2060 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 2061 | if (hwc->irq_period) { |
d6d020e9 PZ |
2062 | __hrtimer_start_range_ns(&hwc->hrtimer, |
2063 | ns_to_ktime(hwc->irq_period), 0, | |
2064 | HRTIMER_MODE_REL, 0); | |
2065 | } | |
2066 | ||
2067 | return 0; | |
2068 | } | |
2069 | ||
5c92d124 IM |
2070 | static void cpu_clock_perf_counter_disable(struct perf_counter *counter) |
2071 | { | |
d6d020e9 | 2072 | hrtimer_cancel(&counter->hw.hrtimer); |
9abf8a08 | 2073 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
2074 | } |
2075 | ||
2076 | static void cpu_clock_perf_counter_read(struct perf_counter *counter) | |
2077 | { | |
9abf8a08 | 2078 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
2079 | } |
2080 | ||
2081 | static const struct hw_perf_counter_ops perf_ops_cpu_clock = { | |
7671581f IM |
2082 | .enable = cpu_clock_perf_counter_enable, |
2083 | .disable = cpu_clock_perf_counter_disable, | |
2084 | .read = cpu_clock_perf_counter_read, | |
5c92d124 IM |
2085 | }; |
2086 | ||
15dbf27c PZ |
2087 | /* |
2088 | * Software counter: task time clock | |
2089 | */ | |
2090 | ||
aa9c4c0f IM |
2091 | /* |
2092 | * Called from within the scheduler: | |
2093 | */ | |
2094 | static u64 task_clock_perf_counter_val(struct perf_counter *counter, int update) | |
bae43c99 | 2095 | { |
aa9c4c0f IM |
2096 | struct task_struct *curr = counter->task; |
2097 | u64 delta; | |
2098 | ||
aa9c4c0f IM |
2099 | delta = __task_delta_exec(curr, update); |
2100 | ||
2101 | return curr->se.sum_exec_runtime + delta; | |
2102 | } | |
2103 | ||
2104 | static void task_clock_perf_counter_update(struct perf_counter *counter, u64 now) | |
2105 | { | |
2106 | u64 prev; | |
8cb391e8 IM |
2107 | s64 delta; |
2108 | ||
2109 | prev = atomic64_read(&counter->hw.prev_count); | |
8cb391e8 IM |
2110 | |
2111 | atomic64_set(&counter->hw.prev_count, now); | |
2112 | ||
2113 | delta = now - prev; | |
8cb391e8 IM |
2114 | |
2115 | atomic64_add(delta, &counter->count); | |
bae43c99 IM |
2116 | } |
2117 | ||
95cdd2e7 | 2118 | static int task_clock_perf_counter_enable(struct perf_counter *counter) |
8cb391e8 | 2119 | { |
d6d020e9 PZ |
2120 | struct hw_perf_counter *hwc = &counter->hw; |
2121 | ||
2122 | atomic64_set(&hwc->prev_count, task_clock_perf_counter_val(counter, 0)); | |
039fc91e PZ |
2123 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
2124 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 2125 | if (hwc->irq_period) { |
d6d020e9 PZ |
2126 | __hrtimer_start_range_ns(&hwc->hrtimer, |
2127 | ns_to_ktime(hwc->irq_period), 0, | |
2128 | HRTIMER_MODE_REL, 0); | |
2129 | } | |
95cdd2e7 IM |
2130 | |
2131 | return 0; | |
8cb391e8 IM |
2132 | } |
2133 | ||
2134 | static void task_clock_perf_counter_disable(struct perf_counter *counter) | |
bae43c99 | 2135 | { |
d6d020e9 PZ |
2136 | hrtimer_cancel(&counter->hw.hrtimer); |
2137 | task_clock_perf_counter_update(counter, | |
2138 | task_clock_perf_counter_val(counter, 0)); | |
2139 | } | |
aa9c4c0f | 2140 | |
d6d020e9 PZ |
2141 | static void task_clock_perf_counter_read(struct perf_counter *counter) |
2142 | { | |
2143 | task_clock_perf_counter_update(counter, | |
2144 | task_clock_perf_counter_val(counter, 1)); | |
bae43c99 IM |
2145 | } |
2146 | ||
2147 | static const struct hw_perf_counter_ops perf_ops_task_clock = { | |
7671581f IM |
2148 | .enable = task_clock_perf_counter_enable, |
2149 | .disable = task_clock_perf_counter_disable, | |
2150 | .read = task_clock_perf_counter_read, | |
bae43c99 IM |
2151 | }; |
2152 | ||
15dbf27c PZ |
2153 | /* |
2154 | * Software counter: cpu migrations | |
2155 | */ | |
2156 | ||
23a185ca | 2157 | static inline u64 get_cpu_migrations(struct perf_counter *counter) |
6c594c21 | 2158 | { |
23a185ca PM |
2159 | struct task_struct *curr = counter->ctx->task; |
2160 | ||
2161 | if (curr) | |
2162 | return curr->se.nr_migrations; | |
2163 | return cpu_nr_migrations(smp_processor_id()); | |
6c594c21 IM |
2164 | } |
2165 | ||
2166 | static void cpu_migrations_perf_counter_update(struct perf_counter *counter) | |
2167 | { | |
2168 | u64 prev, now; | |
2169 | s64 delta; | |
2170 | ||
2171 | prev = atomic64_read(&counter->hw.prev_count); | |
23a185ca | 2172 | now = get_cpu_migrations(counter); |
6c594c21 IM |
2173 | |
2174 | atomic64_set(&counter->hw.prev_count, now); | |
2175 | ||
2176 | delta = now - prev; | |
6c594c21 IM |
2177 | |
2178 | atomic64_add(delta, &counter->count); | |
2179 | } | |
2180 | ||
2181 | static void cpu_migrations_perf_counter_read(struct perf_counter *counter) | |
2182 | { | |
2183 | cpu_migrations_perf_counter_update(counter); | |
2184 | } | |
2185 | ||
95cdd2e7 | 2186 | static int cpu_migrations_perf_counter_enable(struct perf_counter *counter) |
6c594c21 | 2187 | { |
c07c99b6 PM |
2188 | if (counter->prev_state <= PERF_COUNTER_STATE_OFF) |
2189 | atomic64_set(&counter->hw.prev_count, | |
2190 | get_cpu_migrations(counter)); | |
95cdd2e7 | 2191 | return 0; |
6c594c21 IM |
2192 | } |
2193 | ||
2194 | static void cpu_migrations_perf_counter_disable(struct perf_counter *counter) | |
2195 | { | |
2196 | cpu_migrations_perf_counter_update(counter); | |
2197 | } | |
2198 | ||
2199 | static const struct hw_perf_counter_ops perf_ops_cpu_migrations = { | |
7671581f IM |
2200 | .enable = cpu_migrations_perf_counter_enable, |
2201 | .disable = cpu_migrations_perf_counter_disable, | |
2202 | .read = cpu_migrations_perf_counter_read, | |
6c594c21 IM |
2203 | }; |
2204 | ||
e077df4f PZ |
2205 | #ifdef CONFIG_EVENT_PROFILE |
2206 | void perf_tpcounter_event(int event_id) | |
2207 | { | |
b8e83514 PZ |
2208 | struct pt_regs *regs = get_irq_regs(); |
2209 | ||
2210 | if (!regs) | |
2211 | regs = task_pt_regs(current); | |
2212 | ||
2213 | __perf_swcounter_event(PERF_TYPE_TRACEPOINT, event_id, 1, 1, regs); | |
e077df4f PZ |
2214 | } |
2215 | ||
2216 | extern int ftrace_profile_enable(int); | |
2217 | extern void ftrace_profile_disable(int); | |
2218 | ||
2219 | static void tp_perf_counter_destroy(struct perf_counter *counter) | |
2220 | { | |
f4a2deb4 | 2221 | ftrace_profile_disable(perf_event_id(&counter->hw_event)); |
e077df4f PZ |
2222 | } |
2223 | ||
2224 | static const struct hw_perf_counter_ops * | |
2225 | tp_perf_counter_init(struct perf_counter *counter) | |
2226 | { | |
f4a2deb4 | 2227 | int event_id = perf_event_id(&counter->hw_event); |
e077df4f PZ |
2228 | int ret; |
2229 | ||
2230 | ret = ftrace_profile_enable(event_id); | |
2231 | if (ret) | |
2232 | return NULL; | |
2233 | ||
2234 | counter->destroy = tp_perf_counter_destroy; | |
b8e83514 | 2235 | counter->hw.irq_period = counter->hw_event.irq_period; |
e077df4f PZ |
2236 | |
2237 | return &perf_ops_generic; | |
2238 | } | |
2239 | #else | |
2240 | static const struct hw_perf_counter_ops * | |
2241 | tp_perf_counter_init(struct perf_counter *counter) | |
2242 | { | |
2243 | return NULL; | |
2244 | } | |
2245 | #endif | |
2246 | ||
5c92d124 IM |
2247 | static const struct hw_perf_counter_ops * |
2248 | sw_perf_counter_init(struct perf_counter *counter) | |
2249 | { | |
15dbf27c | 2250 | struct perf_counter_hw_event *hw_event = &counter->hw_event; |
5c92d124 | 2251 | const struct hw_perf_counter_ops *hw_ops = NULL; |
15dbf27c | 2252 | struct hw_perf_counter *hwc = &counter->hw; |
5c92d124 | 2253 | |
0475f9ea PM |
2254 | /* |
2255 | * Software counters (currently) can't in general distinguish | |
2256 | * between user, kernel and hypervisor events. | |
2257 | * However, context switches and cpu migrations are considered | |
2258 | * to be kernel events, and page faults are never hypervisor | |
2259 | * events. | |
2260 | */ | |
f4a2deb4 | 2261 | switch (perf_event_id(&counter->hw_event)) { |
5c92d124 | 2262 | case PERF_COUNT_CPU_CLOCK: |
d6d020e9 PZ |
2263 | hw_ops = &perf_ops_cpu_clock; |
2264 | ||
2265 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
2266 | hw_event->irq_period = 10000; | |
5c92d124 | 2267 | break; |
bae43c99 | 2268 | case PERF_COUNT_TASK_CLOCK: |
23a185ca PM |
2269 | /* |
2270 | * If the user instantiates this as a per-cpu counter, | |
2271 | * use the cpu_clock counter instead. | |
2272 | */ | |
2273 | if (counter->ctx->task) | |
2274 | hw_ops = &perf_ops_task_clock; | |
2275 | else | |
2276 | hw_ops = &perf_ops_cpu_clock; | |
d6d020e9 PZ |
2277 | |
2278 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
2279 | hw_event->irq_period = 10000; | |
bae43c99 | 2280 | break; |
e06c61a8 | 2281 | case PERF_COUNT_PAGE_FAULTS: |
ac17dc8e PZ |
2282 | case PERF_COUNT_PAGE_FAULTS_MIN: |
2283 | case PERF_COUNT_PAGE_FAULTS_MAJ: | |
5d6a27d8 | 2284 | case PERF_COUNT_CONTEXT_SWITCHES: |
4a0deca6 | 2285 | hw_ops = &perf_ops_generic; |
5d6a27d8 | 2286 | break; |
6c594c21 | 2287 | case PERF_COUNT_CPU_MIGRATIONS: |
0475f9ea PM |
2288 | if (!counter->hw_event.exclude_kernel) |
2289 | hw_ops = &perf_ops_cpu_migrations; | |
6c594c21 | 2290 | break; |
5c92d124 | 2291 | } |
15dbf27c PZ |
2292 | |
2293 | if (hw_ops) | |
2294 | hwc->irq_period = hw_event->irq_period; | |
2295 | ||
5c92d124 IM |
2296 | return hw_ops; |
2297 | } | |
2298 | ||
0793a61d TG |
2299 | /* |
2300 | * Allocate and initialize a counter structure | |
2301 | */ | |
2302 | static struct perf_counter * | |
04289bb9 IM |
2303 | perf_counter_alloc(struct perf_counter_hw_event *hw_event, |
2304 | int cpu, | |
23a185ca | 2305 | struct perf_counter_context *ctx, |
9b51f66d IM |
2306 | struct perf_counter *group_leader, |
2307 | gfp_t gfpflags) | |
0793a61d | 2308 | { |
5c92d124 | 2309 | const struct hw_perf_counter_ops *hw_ops; |
621a01ea | 2310 | struct perf_counter *counter; |
0793a61d | 2311 | |
9b51f66d | 2312 | counter = kzalloc(sizeof(*counter), gfpflags); |
0793a61d TG |
2313 | if (!counter) |
2314 | return NULL; | |
2315 | ||
04289bb9 IM |
2316 | /* |
2317 | * Single counters are their own group leaders, with an | |
2318 | * empty sibling list: | |
2319 | */ | |
2320 | if (!group_leader) | |
2321 | group_leader = counter; | |
2322 | ||
0793a61d | 2323 | mutex_init(&counter->mutex); |
04289bb9 | 2324 | INIT_LIST_HEAD(&counter->list_entry); |
592903cd | 2325 | INIT_LIST_HEAD(&counter->event_entry); |
04289bb9 | 2326 | INIT_LIST_HEAD(&counter->sibling_list); |
0793a61d TG |
2327 | init_waitqueue_head(&counter->waitq); |
2328 | ||
7b732a75 PZ |
2329 | mutex_init(&counter->mmap_mutex); |
2330 | ||
d859e29f PM |
2331 | INIT_LIST_HEAD(&counter->child_list); |
2332 | ||
9f66a381 IM |
2333 | counter->cpu = cpu; |
2334 | counter->hw_event = *hw_event; | |
04289bb9 | 2335 | counter->group_leader = group_leader; |
621a01ea | 2336 | counter->hw_ops = NULL; |
23a185ca | 2337 | counter->ctx = ctx; |
621a01ea | 2338 | |
235c7fc7 | 2339 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
a86ed508 IM |
2340 | if (hw_event->disabled) |
2341 | counter->state = PERF_COUNTER_STATE_OFF; | |
2342 | ||
5c92d124 | 2343 | hw_ops = NULL; |
b8e83514 | 2344 | |
f4a2deb4 | 2345 | if (perf_event_raw(hw_event)) { |
b8e83514 | 2346 | hw_ops = hw_perf_counter_init(counter); |
f4a2deb4 PZ |
2347 | goto done; |
2348 | } | |
2349 | ||
2350 | switch (perf_event_type(hw_event)) { | |
b8e83514 | 2351 | case PERF_TYPE_HARDWARE: |
5c92d124 | 2352 | hw_ops = hw_perf_counter_init(counter); |
b8e83514 PZ |
2353 | break; |
2354 | ||
2355 | case PERF_TYPE_SOFTWARE: | |
2356 | hw_ops = sw_perf_counter_init(counter); | |
2357 | break; | |
2358 | ||
2359 | case PERF_TYPE_TRACEPOINT: | |
2360 | hw_ops = tp_perf_counter_init(counter); | |
2361 | break; | |
2362 | } | |
5c92d124 | 2363 | |
621a01ea IM |
2364 | if (!hw_ops) { |
2365 | kfree(counter); | |
2366 | return NULL; | |
2367 | } | |
f4a2deb4 | 2368 | done: |
621a01ea | 2369 | counter->hw_ops = hw_ops; |
0793a61d TG |
2370 | |
2371 | return counter; | |
2372 | } | |
2373 | ||
2374 | /** | |
2743a5b0 | 2375 | * sys_perf_counter_open - open a performance counter, associate it to a task/cpu |
9f66a381 IM |
2376 | * |
2377 | * @hw_event_uptr: event type attributes for monitoring/sampling | |
0793a61d | 2378 | * @pid: target pid |
9f66a381 IM |
2379 | * @cpu: target cpu |
2380 | * @group_fd: group leader counter fd | |
0793a61d | 2381 | */ |
2743a5b0 | 2382 | SYSCALL_DEFINE5(perf_counter_open, |
f3dfd265 | 2383 | const struct perf_counter_hw_event __user *, hw_event_uptr, |
2743a5b0 | 2384 | pid_t, pid, int, cpu, int, group_fd, unsigned long, flags) |
0793a61d | 2385 | { |
04289bb9 | 2386 | struct perf_counter *counter, *group_leader; |
9f66a381 | 2387 | struct perf_counter_hw_event hw_event; |
04289bb9 | 2388 | struct perf_counter_context *ctx; |
9b51f66d | 2389 | struct file *counter_file = NULL; |
04289bb9 IM |
2390 | struct file *group_file = NULL; |
2391 | int fput_needed = 0; | |
9b51f66d | 2392 | int fput_needed2 = 0; |
0793a61d TG |
2393 | int ret; |
2394 | ||
2743a5b0 PM |
2395 | /* for future expandability... */ |
2396 | if (flags) | |
2397 | return -EINVAL; | |
2398 | ||
9f66a381 | 2399 | if (copy_from_user(&hw_event, hw_event_uptr, sizeof(hw_event)) != 0) |
eab656ae TG |
2400 | return -EFAULT; |
2401 | ||
04289bb9 | 2402 | /* |
ccff286d IM |
2403 | * Get the target context (task or percpu): |
2404 | */ | |
2405 | ctx = find_get_context(pid, cpu); | |
2406 | if (IS_ERR(ctx)) | |
2407 | return PTR_ERR(ctx); | |
2408 | ||
2409 | /* | |
2410 | * Look up the group leader (we will attach this counter to it): | |
04289bb9 IM |
2411 | */ |
2412 | group_leader = NULL; | |
2413 | if (group_fd != -1) { | |
2414 | ret = -EINVAL; | |
2415 | group_file = fget_light(group_fd, &fput_needed); | |
2416 | if (!group_file) | |
ccff286d | 2417 | goto err_put_context; |
04289bb9 | 2418 | if (group_file->f_op != &perf_fops) |
ccff286d | 2419 | goto err_put_context; |
04289bb9 IM |
2420 | |
2421 | group_leader = group_file->private_data; | |
2422 | /* | |
ccff286d IM |
2423 | * Do not allow a recursive hierarchy (this new sibling |
2424 | * becoming part of another group-sibling): | |
2425 | */ | |
2426 | if (group_leader->group_leader != group_leader) | |
2427 | goto err_put_context; | |
2428 | /* | |
2429 | * Do not allow to attach to a group in a different | |
2430 | * task or CPU context: | |
04289bb9 | 2431 | */ |
ccff286d IM |
2432 | if (group_leader->ctx != ctx) |
2433 | goto err_put_context; | |
3b6f9e5c PM |
2434 | /* |
2435 | * Only a group leader can be exclusive or pinned | |
2436 | */ | |
2437 | if (hw_event.exclusive || hw_event.pinned) | |
2438 | goto err_put_context; | |
04289bb9 IM |
2439 | } |
2440 | ||
5c92d124 | 2441 | ret = -EINVAL; |
23a185ca PM |
2442 | counter = perf_counter_alloc(&hw_event, cpu, ctx, group_leader, |
2443 | GFP_KERNEL); | |
0793a61d TG |
2444 | if (!counter) |
2445 | goto err_put_context; | |
2446 | ||
0793a61d TG |
2447 | ret = anon_inode_getfd("[perf_counter]", &perf_fops, counter, 0); |
2448 | if (ret < 0) | |
9b51f66d IM |
2449 | goto err_free_put_context; |
2450 | ||
2451 | counter_file = fget_light(ret, &fput_needed2); | |
2452 | if (!counter_file) | |
2453 | goto err_free_put_context; | |
2454 | ||
2455 | counter->filp = counter_file; | |
d859e29f | 2456 | mutex_lock(&ctx->mutex); |
9b51f66d | 2457 | perf_install_in_context(ctx, counter, cpu); |
d859e29f | 2458 | mutex_unlock(&ctx->mutex); |
9b51f66d IM |
2459 | |
2460 | fput_light(counter_file, fput_needed2); | |
0793a61d | 2461 | |
04289bb9 IM |
2462 | out_fput: |
2463 | fput_light(group_file, fput_needed); | |
2464 | ||
0793a61d TG |
2465 | return ret; |
2466 | ||
9b51f66d | 2467 | err_free_put_context: |
0793a61d TG |
2468 | kfree(counter); |
2469 | ||
2470 | err_put_context: | |
2471 | put_context(ctx); | |
2472 | ||
04289bb9 | 2473 | goto out_fput; |
0793a61d TG |
2474 | } |
2475 | ||
9b51f66d IM |
2476 | /* |
2477 | * Initialize the perf_counter context in a task_struct: | |
2478 | */ | |
2479 | static void | |
2480 | __perf_counter_init_context(struct perf_counter_context *ctx, | |
2481 | struct task_struct *task) | |
2482 | { | |
2483 | memset(ctx, 0, sizeof(*ctx)); | |
2484 | spin_lock_init(&ctx->lock); | |
d859e29f | 2485 | mutex_init(&ctx->mutex); |
9b51f66d | 2486 | INIT_LIST_HEAD(&ctx->counter_list); |
592903cd | 2487 | INIT_LIST_HEAD(&ctx->event_list); |
9b51f66d IM |
2488 | ctx->task = task; |
2489 | } | |
2490 | ||
2491 | /* | |
2492 | * inherit a counter from parent task to child task: | |
2493 | */ | |
d859e29f | 2494 | static struct perf_counter * |
9b51f66d IM |
2495 | inherit_counter(struct perf_counter *parent_counter, |
2496 | struct task_struct *parent, | |
2497 | struct perf_counter_context *parent_ctx, | |
2498 | struct task_struct *child, | |
d859e29f | 2499 | struct perf_counter *group_leader, |
9b51f66d IM |
2500 | struct perf_counter_context *child_ctx) |
2501 | { | |
2502 | struct perf_counter *child_counter; | |
2503 | ||
d859e29f PM |
2504 | /* |
2505 | * Instead of creating recursive hierarchies of counters, | |
2506 | * we link inherited counters back to the original parent, | |
2507 | * which has a filp for sure, which we use as the reference | |
2508 | * count: | |
2509 | */ | |
2510 | if (parent_counter->parent) | |
2511 | parent_counter = parent_counter->parent; | |
2512 | ||
9b51f66d | 2513 | child_counter = perf_counter_alloc(&parent_counter->hw_event, |
23a185ca PM |
2514 | parent_counter->cpu, child_ctx, |
2515 | group_leader, GFP_KERNEL); | |
9b51f66d | 2516 | if (!child_counter) |
d859e29f | 2517 | return NULL; |
9b51f66d IM |
2518 | |
2519 | /* | |
2520 | * Link it up in the child's context: | |
2521 | */ | |
9b51f66d | 2522 | child_counter->task = child; |
53cfbf59 | 2523 | add_counter_to_ctx(child_counter, child_ctx); |
9b51f66d IM |
2524 | |
2525 | child_counter->parent = parent_counter; | |
9b51f66d IM |
2526 | /* |
2527 | * inherit into child's child as well: | |
2528 | */ | |
2529 | child_counter->hw_event.inherit = 1; | |
2530 | ||
2531 | /* | |
2532 | * Get a reference to the parent filp - we will fput it | |
2533 | * when the child counter exits. This is safe to do because | |
2534 | * we are in the parent and we know that the filp still | |
2535 | * exists and has a nonzero count: | |
2536 | */ | |
2537 | atomic_long_inc(&parent_counter->filp->f_count); | |
2538 | ||
d859e29f PM |
2539 | /* |
2540 | * Link this into the parent counter's child list | |
2541 | */ | |
2542 | mutex_lock(&parent_counter->mutex); | |
2543 | list_add_tail(&child_counter->child_list, &parent_counter->child_list); | |
2544 | ||
2545 | /* | |
2546 | * Make the child state follow the state of the parent counter, | |
2547 | * not its hw_event.disabled bit. We hold the parent's mutex, | |
2548 | * so we won't race with perf_counter_{en,dis}able_family. | |
2549 | */ | |
2550 | if (parent_counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
2551 | child_counter->state = PERF_COUNTER_STATE_INACTIVE; | |
2552 | else | |
2553 | child_counter->state = PERF_COUNTER_STATE_OFF; | |
2554 | ||
2555 | mutex_unlock(&parent_counter->mutex); | |
2556 | ||
2557 | return child_counter; | |
2558 | } | |
2559 | ||
2560 | static int inherit_group(struct perf_counter *parent_counter, | |
2561 | struct task_struct *parent, | |
2562 | struct perf_counter_context *parent_ctx, | |
2563 | struct task_struct *child, | |
2564 | struct perf_counter_context *child_ctx) | |
2565 | { | |
2566 | struct perf_counter *leader; | |
2567 | struct perf_counter *sub; | |
2568 | ||
2569 | leader = inherit_counter(parent_counter, parent, parent_ctx, | |
2570 | child, NULL, child_ctx); | |
2571 | if (!leader) | |
2572 | return -ENOMEM; | |
2573 | list_for_each_entry(sub, &parent_counter->sibling_list, list_entry) { | |
2574 | if (!inherit_counter(sub, parent, parent_ctx, | |
2575 | child, leader, child_ctx)) | |
2576 | return -ENOMEM; | |
2577 | } | |
9b51f66d IM |
2578 | return 0; |
2579 | } | |
2580 | ||
d859e29f PM |
2581 | static void sync_child_counter(struct perf_counter *child_counter, |
2582 | struct perf_counter *parent_counter) | |
2583 | { | |
2584 | u64 parent_val, child_val; | |
2585 | ||
2586 | parent_val = atomic64_read(&parent_counter->count); | |
2587 | child_val = atomic64_read(&child_counter->count); | |
2588 | ||
2589 | /* | |
2590 | * Add back the child's count to the parent's count: | |
2591 | */ | |
2592 | atomic64_add(child_val, &parent_counter->count); | |
53cfbf59 PM |
2593 | atomic64_add(child_counter->total_time_enabled, |
2594 | &parent_counter->child_total_time_enabled); | |
2595 | atomic64_add(child_counter->total_time_running, | |
2596 | &parent_counter->child_total_time_running); | |
d859e29f PM |
2597 | |
2598 | /* | |
2599 | * Remove this counter from the parent's list | |
2600 | */ | |
2601 | mutex_lock(&parent_counter->mutex); | |
2602 | list_del_init(&child_counter->child_list); | |
2603 | mutex_unlock(&parent_counter->mutex); | |
2604 | ||
2605 | /* | |
2606 | * Release the parent counter, if this was the last | |
2607 | * reference to it. | |
2608 | */ | |
2609 | fput(parent_counter->filp); | |
2610 | } | |
2611 | ||
9b51f66d IM |
2612 | static void |
2613 | __perf_counter_exit_task(struct task_struct *child, | |
2614 | struct perf_counter *child_counter, | |
2615 | struct perf_counter_context *child_ctx) | |
2616 | { | |
2617 | struct perf_counter *parent_counter; | |
d859e29f | 2618 | struct perf_counter *sub, *tmp; |
9b51f66d IM |
2619 | |
2620 | /* | |
235c7fc7 IM |
2621 | * If we do not self-reap then we have to wait for the |
2622 | * child task to unschedule (it will happen for sure), | |
2623 | * so that its counter is at its final count. (This | |
2624 | * condition triggers rarely - child tasks usually get | |
2625 | * off their CPU before the parent has a chance to | |
2626 | * get this far into the reaping action) | |
9b51f66d | 2627 | */ |
235c7fc7 IM |
2628 | if (child != current) { |
2629 | wait_task_inactive(child, 0); | |
2630 | list_del_init(&child_counter->list_entry); | |
53cfbf59 | 2631 | update_counter_times(child_counter); |
235c7fc7 | 2632 | } else { |
0cc0c027 | 2633 | struct perf_cpu_context *cpuctx; |
235c7fc7 IM |
2634 | unsigned long flags; |
2635 | u64 perf_flags; | |
2636 | ||
2637 | /* | |
2638 | * Disable and unlink this counter. | |
2639 | * | |
2640 | * Be careful about zapping the list - IRQ/NMI context | |
2641 | * could still be processing it: | |
2642 | */ | |
2643 | curr_rq_lock_irq_save(&flags); | |
2644 | perf_flags = hw_perf_save_disable(); | |
0cc0c027 IM |
2645 | |
2646 | cpuctx = &__get_cpu_var(perf_cpu_context); | |
2647 | ||
d859e29f | 2648 | group_sched_out(child_counter, cpuctx, child_ctx); |
53cfbf59 | 2649 | update_counter_times(child_counter); |
0cc0c027 | 2650 | |
235c7fc7 | 2651 | list_del_init(&child_counter->list_entry); |
0cc0c027 | 2652 | |
235c7fc7 | 2653 | child_ctx->nr_counters--; |
9b51f66d | 2654 | |
235c7fc7 IM |
2655 | hw_perf_restore(perf_flags); |
2656 | curr_rq_unlock_irq_restore(&flags); | |
2657 | } | |
9b51f66d IM |
2658 | |
2659 | parent_counter = child_counter->parent; | |
2660 | /* | |
2661 | * It can happen that parent exits first, and has counters | |
2662 | * that are still around due to the child reference. These | |
2663 | * counters need to be zapped - but otherwise linger. | |
2664 | */ | |
d859e29f PM |
2665 | if (parent_counter) { |
2666 | sync_child_counter(child_counter, parent_counter); | |
2667 | list_for_each_entry_safe(sub, tmp, &child_counter->sibling_list, | |
2668 | list_entry) { | |
4bcf349a | 2669 | if (sub->parent) { |
d859e29f | 2670 | sync_child_counter(sub, sub->parent); |
f1600952 | 2671 | free_counter(sub); |
4bcf349a | 2672 | } |
d859e29f | 2673 | } |
f1600952 | 2674 | free_counter(child_counter); |
4bcf349a | 2675 | } |
9b51f66d IM |
2676 | } |
2677 | ||
2678 | /* | |
d859e29f | 2679 | * When a child task exits, feed back counter values to parent counters. |
9b51f66d | 2680 | * |
d859e29f | 2681 | * Note: we may be running in child context, but the PID is not hashed |
9b51f66d IM |
2682 | * anymore so new counters will not be added. |
2683 | */ | |
2684 | void perf_counter_exit_task(struct task_struct *child) | |
2685 | { | |
2686 | struct perf_counter *child_counter, *tmp; | |
2687 | struct perf_counter_context *child_ctx; | |
2688 | ||
2689 | child_ctx = &child->perf_counter_ctx; | |
2690 | ||
2691 | if (likely(!child_ctx->nr_counters)) | |
2692 | return; | |
2693 | ||
2694 | list_for_each_entry_safe(child_counter, tmp, &child_ctx->counter_list, | |
2695 | list_entry) | |
2696 | __perf_counter_exit_task(child, child_counter, child_ctx); | |
2697 | } | |
2698 | ||
2699 | /* | |
2700 | * Initialize the perf_counter context in task_struct | |
2701 | */ | |
2702 | void perf_counter_init_task(struct task_struct *child) | |
2703 | { | |
2704 | struct perf_counter_context *child_ctx, *parent_ctx; | |
d859e29f | 2705 | struct perf_counter *counter; |
9b51f66d | 2706 | struct task_struct *parent = current; |
9b51f66d IM |
2707 | |
2708 | child_ctx = &child->perf_counter_ctx; | |
2709 | parent_ctx = &parent->perf_counter_ctx; | |
2710 | ||
2711 | __perf_counter_init_context(child_ctx, child); | |
2712 | ||
2713 | /* | |
2714 | * This is executed from the parent task context, so inherit | |
2715 | * counters that have been marked for cloning: | |
2716 | */ | |
2717 | ||
2718 | if (likely(!parent_ctx->nr_counters)) | |
2719 | return; | |
2720 | ||
2721 | /* | |
2722 | * Lock the parent list. No need to lock the child - not PID | |
2723 | * hashed yet and not running, so nobody can access it. | |
2724 | */ | |
d859e29f | 2725 | mutex_lock(&parent_ctx->mutex); |
9b51f66d IM |
2726 | |
2727 | /* | |
2728 | * We dont have to disable NMIs - we are only looking at | |
2729 | * the list, not manipulating it: | |
2730 | */ | |
2731 | list_for_each_entry(counter, &parent_ctx->counter_list, list_entry) { | |
d859e29f | 2732 | if (!counter->hw_event.inherit) |
9b51f66d IM |
2733 | continue; |
2734 | ||
d859e29f | 2735 | if (inherit_group(counter, parent, |
9b51f66d IM |
2736 | parent_ctx, child, child_ctx)) |
2737 | break; | |
2738 | } | |
2739 | ||
d859e29f | 2740 | mutex_unlock(&parent_ctx->mutex); |
9b51f66d IM |
2741 | } |
2742 | ||
04289bb9 | 2743 | static void __cpuinit perf_counter_init_cpu(int cpu) |
0793a61d | 2744 | { |
04289bb9 | 2745 | struct perf_cpu_context *cpuctx; |
0793a61d | 2746 | |
04289bb9 IM |
2747 | cpuctx = &per_cpu(perf_cpu_context, cpu); |
2748 | __perf_counter_init_context(&cpuctx->ctx, NULL); | |
0793a61d TG |
2749 | |
2750 | mutex_lock(&perf_resource_mutex); | |
04289bb9 | 2751 | cpuctx->max_pertask = perf_max_counters - perf_reserved_percpu; |
0793a61d | 2752 | mutex_unlock(&perf_resource_mutex); |
04289bb9 | 2753 | |
01d0287f | 2754 | hw_perf_counter_setup(cpu); |
0793a61d TG |
2755 | } |
2756 | ||
2757 | #ifdef CONFIG_HOTPLUG_CPU | |
04289bb9 | 2758 | static void __perf_counter_exit_cpu(void *info) |
0793a61d TG |
2759 | { |
2760 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
2761 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
2762 | struct perf_counter *counter, *tmp; | |
2763 | ||
04289bb9 IM |
2764 | list_for_each_entry_safe(counter, tmp, &ctx->counter_list, list_entry) |
2765 | __perf_counter_remove_from_context(counter); | |
0793a61d | 2766 | } |
04289bb9 | 2767 | static void perf_counter_exit_cpu(int cpu) |
0793a61d | 2768 | { |
d859e29f PM |
2769 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); |
2770 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
2771 | ||
2772 | mutex_lock(&ctx->mutex); | |
04289bb9 | 2773 | smp_call_function_single(cpu, __perf_counter_exit_cpu, NULL, 1); |
d859e29f | 2774 | mutex_unlock(&ctx->mutex); |
0793a61d TG |
2775 | } |
2776 | #else | |
04289bb9 | 2777 | static inline void perf_counter_exit_cpu(int cpu) { } |
0793a61d TG |
2778 | #endif |
2779 | ||
2780 | static int __cpuinit | |
2781 | perf_cpu_notify(struct notifier_block *self, unsigned long action, void *hcpu) | |
2782 | { | |
2783 | unsigned int cpu = (long)hcpu; | |
2784 | ||
2785 | switch (action) { | |
2786 | ||
2787 | case CPU_UP_PREPARE: | |
2788 | case CPU_UP_PREPARE_FROZEN: | |
04289bb9 | 2789 | perf_counter_init_cpu(cpu); |
0793a61d TG |
2790 | break; |
2791 | ||
2792 | case CPU_DOWN_PREPARE: | |
2793 | case CPU_DOWN_PREPARE_FROZEN: | |
04289bb9 | 2794 | perf_counter_exit_cpu(cpu); |
0793a61d TG |
2795 | break; |
2796 | ||
2797 | default: | |
2798 | break; | |
2799 | } | |
2800 | ||
2801 | return NOTIFY_OK; | |
2802 | } | |
2803 | ||
2804 | static struct notifier_block __cpuinitdata perf_cpu_nb = { | |
2805 | .notifier_call = perf_cpu_notify, | |
2806 | }; | |
2807 | ||
2808 | static int __init perf_counter_init(void) | |
2809 | { | |
2810 | perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_UP_PREPARE, | |
2811 | (void *)(long)smp_processor_id()); | |
2812 | register_cpu_notifier(&perf_cpu_nb); | |
2813 | ||
2814 | return 0; | |
2815 | } | |
2816 | early_initcall(perf_counter_init); | |
2817 | ||
2818 | static ssize_t perf_show_reserve_percpu(struct sysdev_class *class, char *buf) | |
2819 | { | |
2820 | return sprintf(buf, "%d\n", perf_reserved_percpu); | |
2821 | } | |
2822 | ||
2823 | static ssize_t | |
2824 | perf_set_reserve_percpu(struct sysdev_class *class, | |
2825 | const char *buf, | |
2826 | size_t count) | |
2827 | { | |
2828 | struct perf_cpu_context *cpuctx; | |
2829 | unsigned long val; | |
2830 | int err, cpu, mpt; | |
2831 | ||
2832 | err = strict_strtoul(buf, 10, &val); | |
2833 | if (err) | |
2834 | return err; | |
2835 | if (val > perf_max_counters) | |
2836 | return -EINVAL; | |
2837 | ||
2838 | mutex_lock(&perf_resource_mutex); | |
2839 | perf_reserved_percpu = val; | |
2840 | for_each_online_cpu(cpu) { | |
2841 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
2842 | spin_lock_irq(&cpuctx->ctx.lock); | |
2843 | mpt = min(perf_max_counters - cpuctx->ctx.nr_counters, | |
2844 | perf_max_counters - perf_reserved_percpu); | |
2845 | cpuctx->max_pertask = mpt; | |
2846 | spin_unlock_irq(&cpuctx->ctx.lock); | |
2847 | } | |
2848 | mutex_unlock(&perf_resource_mutex); | |
2849 | ||
2850 | return count; | |
2851 | } | |
2852 | ||
2853 | static ssize_t perf_show_overcommit(struct sysdev_class *class, char *buf) | |
2854 | { | |
2855 | return sprintf(buf, "%d\n", perf_overcommit); | |
2856 | } | |
2857 | ||
2858 | static ssize_t | |
2859 | perf_set_overcommit(struct sysdev_class *class, const char *buf, size_t count) | |
2860 | { | |
2861 | unsigned long val; | |
2862 | int err; | |
2863 | ||
2864 | err = strict_strtoul(buf, 10, &val); | |
2865 | if (err) | |
2866 | return err; | |
2867 | if (val > 1) | |
2868 | return -EINVAL; | |
2869 | ||
2870 | mutex_lock(&perf_resource_mutex); | |
2871 | perf_overcommit = val; | |
2872 | mutex_unlock(&perf_resource_mutex); | |
2873 | ||
2874 | return count; | |
2875 | } | |
2876 | ||
2877 | static SYSDEV_CLASS_ATTR( | |
2878 | reserve_percpu, | |
2879 | 0644, | |
2880 | perf_show_reserve_percpu, | |
2881 | perf_set_reserve_percpu | |
2882 | ); | |
2883 | ||
2884 | static SYSDEV_CLASS_ATTR( | |
2885 | overcommit, | |
2886 | 0644, | |
2887 | perf_show_overcommit, | |
2888 | perf_set_overcommit | |
2889 | ); | |
2890 | ||
2891 | static struct attribute *perfclass_attrs[] = { | |
2892 | &attr_reserve_percpu.attr, | |
2893 | &attr_overcommit.attr, | |
2894 | NULL | |
2895 | }; | |
2896 | ||
2897 | static struct attribute_group perfclass_attr_group = { | |
2898 | .attrs = perfclass_attrs, | |
2899 | .name = "perf_counters", | |
2900 | }; | |
2901 | ||
2902 | static int __init perf_counter_sysfs_init(void) | |
2903 | { | |
2904 | return sysfs_create_group(&cpu_sysdev_class.kset.kobj, | |
2905 | &perfclass_attr_group); | |
2906 | } | |
2907 | device_initcall(perf_counter_sysfs_init); |