]>
Commit | Line | Data |
---|---|---|
0793a61d TG |
1 | /* |
2 | * Performance counter core code | |
3 | * | |
4 | * Copyright(C) 2008 Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008 Red Hat, Inc., Ingo Molnar | |
6 | * | |
7b732a75 PZ |
7 | * |
8 | * For licensing details see kernel-base/COPYING | |
0793a61d TG |
9 | */ |
10 | ||
11 | #include <linux/fs.h> | |
b9cacc7b | 12 | #include <linux/mm.h> |
0793a61d TG |
13 | #include <linux/cpu.h> |
14 | #include <linux/smp.h> | |
04289bb9 | 15 | #include <linux/file.h> |
0793a61d TG |
16 | #include <linux/poll.h> |
17 | #include <linux/sysfs.h> | |
18 | #include <linux/ptrace.h> | |
19 | #include <linux/percpu.h> | |
b9cacc7b PZ |
20 | #include <linux/vmstat.h> |
21 | #include <linux/hardirq.h> | |
22 | #include <linux/rculist.h> | |
0793a61d TG |
23 | #include <linux/uaccess.h> |
24 | #include <linux/syscalls.h> | |
25 | #include <linux/anon_inodes.h> | |
aa9c4c0f | 26 | #include <linux/kernel_stat.h> |
0793a61d | 27 | #include <linux/perf_counter.h> |
0a4a9391 | 28 | #include <linux/dcache.h> |
0793a61d | 29 | |
4e193bd4 TB |
30 | #include <asm/irq_regs.h> |
31 | ||
0793a61d TG |
32 | /* |
33 | * Each CPU has a list of per CPU counters: | |
34 | */ | |
35 | DEFINE_PER_CPU(struct perf_cpu_context, perf_cpu_context); | |
36 | ||
088e2852 | 37 | int perf_max_counters __read_mostly = 1; |
0793a61d TG |
38 | static int perf_reserved_percpu __read_mostly; |
39 | static int perf_overcommit __read_mostly = 1; | |
40 | ||
9ee318a7 PZ |
41 | static atomic_t nr_mmap_tracking __read_mostly; |
42 | static atomic_t nr_munmap_tracking __read_mostly; | |
43 | static atomic_t nr_comm_tracking __read_mostly; | |
44 | ||
1ccd1549 PZ |
45 | int sysctl_perf_counter_priv __read_mostly; /* do we need to be privileged */ |
46 | ||
0793a61d TG |
47 | /* |
48 | * Mutex for (sysadmin-configurable) counter reservations: | |
49 | */ | |
50 | static DEFINE_MUTEX(perf_resource_mutex); | |
51 | ||
52 | /* | |
53 | * Architecture provided APIs - weak aliases: | |
54 | */ | |
5c92d124 | 55 | extern __weak const struct hw_perf_counter_ops * |
621a01ea | 56 | hw_perf_counter_init(struct perf_counter *counter) |
0793a61d | 57 | { |
ff6f0541 | 58 | return NULL; |
0793a61d TG |
59 | } |
60 | ||
01b2838c | 61 | u64 __weak hw_perf_save_disable(void) { return 0; } |
01ea1cca | 62 | void __weak hw_perf_restore(u64 ctrl) { barrier(); } |
01d0287f | 63 | void __weak hw_perf_counter_setup(int cpu) { barrier(); } |
3cbed429 PM |
64 | int __weak hw_perf_group_sched_in(struct perf_counter *group_leader, |
65 | struct perf_cpu_context *cpuctx, | |
66 | struct perf_counter_context *ctx, int cpu) | |
67 | { | |
68 | return 0; | |
69 | } | |
0793a61d | 70 | |
4eb96fcf PM |
71 | void __weak perf_counter_print_debug(void) { } |
72 | ||
04289bb9 IM |
73 | static void |
74 | list_add_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
75 | { | |
76 | struct perf_counter *group_leader = counter->group_leader; | |
77 | ||
78 | /* | |
79 | * Depending on whether it is a standalone or sibling counter, | |
80 | * add it straight to the context's counter list, or to the group | |
81 | * leader's sibling list: | |
82 | */ | |
83 | if (counter->group_leader == counter) | |
84 | list_add_tail(&counter->list_entry, &ctx->counter_list); | |
5c148194 | 85 | else { |
04289bb9 | 86 | list_add_tail(&counter->list_entry, &group_leader->sibling_list); |
5c148194 PZ |
87 | group_leader->nr_siblings++; |
88 | } | |
592903cd PZ |
89 | |
90 | list_add_rcu(&counter->event_entry, &ctx->event_list); | |
04289bb9 IM |
91 | } |
92 | ||
93 | static void | |
94 | list_del_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
95 | { | |
96 | struct perf_counter *sibling, *tmp; | |
97 | ||
98 | list_del_init(&counter->list_entry); | |
592903cd | 99 | list_del_rcu(&counter->event_entry); |
04289bb9 | 100 | |
5c148194 PZ |
101 | if (counter->group_leader != counter) |
102 | counter->group_leader->nr_siblings--; | |
103 | ||
04289bb9 IM |
104 | /* |
105 | * If this was a group counter with sibling counters then | |
106 | * upgrade the siblings to singleton counters by adding them | |
107 | * to the context list directly: | |
108 | */ | |
109 | list_for_each_entry_safe(sibling, tmp, | |
110 | &counter->sibling_list, list_entry) { | |
111 | ||
75564232 | 112 | list_move_tail(&sibling->list_entry, &ctx->counter_list); |
04289bb9 IM |
113 | sibling->group_leader = sibling; |
114 | } | |
115 | } | |
116 | ||
3b6f9e5c PM |
117 | static void |
118 | counter_sched_out(struct perf_counter *counter, | |
119 | struct perf_cpu_context *cpuctx, | |
120 | struct perf_counter_context *ctx) | |
121 | { | |
122 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
123 | return; | |
124 | ||
125 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
4af4998b | 126 | counter->tstamp_stopped = ctx->time; |
3b6f9e5c PM |
127 | counter->hw_ops->disable(counter); |
128 | counter->oncpu = -1; | |
129 | ||
130 | if (!is_software_counter(counter)) | |
131 | cpuctx->active_oncpu--; | |
132 | ctx->nr_active--; | |
133 | if (counter->hw_event.exclusive || !cpuctx->active_oncpu) | |
134 | cpuctx->exclusive = 0; | |
135 | } | |
136 | ||
d859e29f PM |
137 | static void |
138 | group_sched_out(struct perf_counter *group_counter, | |
139 | struct perf_cpu_context *cpuctx, | |
140 | struct perf_counter_context *ctx) | |
141 | { | |
142 | struct perf_counter *counter; | |
143 | ||
144 | if (group_counter->state != PERF_COUNTER_STATE_ACTIVE) | |
145 | return; | |
146 | ||
147 | counter_sched_out(group_counter, cpuctx, ctx); | |
148 | ||
149 | /* | |
150 | * Schedule out siblings (if any): | |
151 | */ | |
152 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) | |
153 | counter_sched_out(counter, cpuctx, ctx); | |
154 | ||
155 | if (group_counter->hw_event.exclusive) | |
156 | cpuctx->exclusive = 0; | |
157 | } | |
158 | ||
0793a61d TG |
159 | /* |
160 | * Cross CPU call to remove a performance counter | |
161 | * | |
162 | * We disable the counter on the hardware level first. After that we | |
163 | * remove it from the context list. | |
164 | */ | |
04289bb9 | 165 | static void __perf_counter_remove_from_context(void *info) |
0793a61d TG |
166 | { |
167 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
168 | struct perf_counter *counter = info; | |
169 | struct perf_counter_context *ctx = counter->ctx; | |
9b51f66d | 170 | unsigned long flags; |
5c92d124 | 171 | u64 perf_flags; |
0793a61d TG |
172 | |
173 | /* | |
174 | * If this is a task context, we need to check whether it is | |
175 | * the current task context of this cpu. If not it has been | |
176 | * scheduled out before the smp call arrived. | |
177 | */ | |
178 | if (ctx->task && cpuctx->task_ctx != ctx) | |
179 | return; | |
180 | ||
849691a6 | 181 | spin_lock_irqsave(&ctx->lock, flags); |
0793a61d | 182 | |
3b6f9e5c PM |
183 | counter_sched_out(counter, cpuctx, ctx); |
184 | ||
185 | counter->task = NULL; | |
0793a61d TG |
186 | ctx->nr_counters--; |
187 | ||
188 | /* | |
189 | * Protect the list operation against NMI by disabling the | |
190 | * counters on a global level. NOP for non NMI based counters. | |
191 | */ | |
01b2838c | 192 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 193 | list_del_counter(counter, ctx); |
01b2838c | 194 | hw_perf_restore(perf_flags); |
0793a61d TG |
195 | |
196 | if (!ctx->task) { | |
197 | /* | |
198 | * Allow more per task counters with respect to the | |
199 | * reservation: | |
200 | */ | |
201 | cpuctx->max_pertask = | |
202 | min(perf_max_counters - ctx->nr_counters, | |
203 | perf_max_counters - perf_reserved_percpu); | |
204 | } | |
205 | ||
849691a6 | 206 | spin_unlock_irqrestore(&ctx->lock, flags); |
0793a61d TG |
207 | } |
208 | ||
209 | ||
210 | /* | |
211 | * Remove the counter from a task's (or a CPU's) list of counters. | |
212 | * | |
d859e29f | 213 | * Must be called with counter->mutex and ctx->mutex held. |
0793a61d TG |
214 | * |
215 | * CPU counters are removed with a smp call. For task counters we only | |
216 | * call when the task is on a CPU. | |
217 | */ | |
04289bb9 | 218 | static void perf_counter_remove_from_context(struct perf_counter *counter) |
0793a61d TG |
219 | { |
220 | struct perf_counter_context *ctx = counter->ctx; | |
221 | struct task_struct *task = ctx->task; | |
222 | ||
223 | if (!task) { | |
224 | /* | |
225 | * Per cpu counters are removed via an smp call and | |
226 | * the removal is always sucessful. | |
227 | */ | |
228 | smp_call_function_single(counter->cpu, | |
04289bb9 | 229 | __perf_counter_remove_from_context, |
0793a61d TG |
230 | counter, 1); |
231 | return; | |
232 | } | |
233 | ||
234 | retry: | |
04289bb9 | 235 | task_oncpu_function_call(task, __perf_counter_remove_from_context, |
0793a61d TG |
236 | counter); |
237 | ||
238 | spin_lock_irq(&ctx->lock); | |
239 | /* | |
240 | * If the context is active we need to retry the smp call. | |
241 | */ | |
04289bb9 | 242 | if (ctx->nr_active && !list_empty(&counter->list_entry)) { |
0793a61d TG |
243 | spin_unlock_irq(&ctx->lock); |
244 | goto retry; | |
245 | } | |
246 | ||
247 | /* | |
248 | * The lock prevents that this context is scheduled in so we | |
04289bb9 | 249 | * can remove the counter safely, if the call above did not |
0793a61d TG |
250 | * succeed. |
251 | */ | |
04289bb9 | 252 | if (!list_empty(&counter->list_entry)) { |
0793a61d | 253 | ctx->nr_counters--; |
04289bb9 | 254 | list_del_counter(counter, ctx); |
0793a61d TG |
255 | counter->task = NULL; |
256 | } | |
257 | spin_unlock_irq(&ctx->lock); | |
258 | } | |
259 | ||
4af4998b | 260 | static inline u64 perf_clock(void) |
53cfbf59 | 261 | { |
4af4998b | 262 | return cpu_clock(smp_processor_id()); |
53cfbf59 PM |
263 | } |
264 | ||
265 | /* | |
266 | * Update the record of the current time in a context. | |
267 | */ | |
4af4998b | 268 | static void update_context_time(struct perf_counter_context *ctx) |
53cfbf59 | 269 | { |
4af4998b PZ |
270 | u64 now = perf_clock(); |
271 | ||
272 | ctx->time += now - ctx->timestamp; | |
273 | ctx->timestamp = now; | |
53cfbf59 PM |
274 | } |
275 | ||
276 | /* | |
277 | * Update the total_time_enabled and total_time_running fields for a counter. | |
278 | */ | |
279 | static void update_counter_times(struct perf_counter *counter) | |
280 | { | |
281 | struct perf_counter_context *ctx = counter->ctx; | |
282 | u64 run_end; | |
283 | ||
4af4998b PZ |
284 | if (counter->state < PERF_COUNTER_STATE_INACTIVE) |
285 | return; | |
286 | ||
287 | counter->total_time_enabled = ctx->time - counter->tstamp_enabled; | |
288 | ||
289 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
290 | run_end = counter->tstamp_stopped; | |
291 | else | |
292 | run_end = ctx->time; | |
293 | ||
294 | counter->total_time_running = run_end - counter->tstamp_running; | |
53cfbf59 PM |
295 | } |
296 | ||
297 | /* | |
298 | * Update total_time_enabled and total_time_running for all counters in a group. | |
299 | */ | |
300 | static void update_group_times(struct perf_counter *leader) | |
301 | { | |
302 | struct perf_counter *counter; | |
303 | ||
304 | update_counter_times(leader); | |
305 | list_for_each_entry(counter, &leader->sibling_list, list_entry) | |
306 | update_counter_times(counter); | |
307 | } | |
308 | ||
d859e29f PM |
309 | /* |
310 | * Cross CPU call to disable a performance counter | |
311 | */ | |
312 | static void __perf_counter_disable(void *info) | |
313 | { | |
314 | struct perf_counter *counter = info; | |
315 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
316 | struct perf_counter_context *ctx = counter->ctx; | |
317 | unsigned long flags; | |
318 | ||
319 | /* | |
320 | * If this is a per-task counter, need to check whether this | |
321 | * counter's task is the current task on this cpu. | |
322 | */ | |
323 | if (ctx->task && cpuctx->task_ctx != ctx) | |
324 | return; | |
325 | ||
849691a6 | 326 | spin_lock_irqsave(&ctx->lock, flags); |
d859e29f PM |
327 | |
328 | /* | |
329 | * If the counter is on, turn it off. | |
330 | * If it is in error state, leave it in error state. | |
331 | */ | |
332 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) { | |
4af4998b | 333 | update_context_time(ctx); |
53cfbf59 | 334 | update_counter_times(counter); |
d859e29f PM |
335 | if (counter == counter->group_leader) |
336 | group_sched_out(counter, cpuctx, ctx); | |
337 | else | |
338 | counter_sched_out(counter, cpuctx, ctx); | |
339 | counter->state = PERF_COUNTER_STATE_OFF; | |
340 | } | |
341 | ||
849691a6 | 342 | spin_unlock_irqrestore(&ctx->lock, flags); |
d859e29f PM |
343 | } |
344 | ||
345 | /* | |
346 | * Disable a counter. | |
347 | */ | |
348 | static void perf_counter_disable(struct perf_counter *counter) | |
349 | { | |
350 | struct perf_counter_context *ctx = counter->ctx; | |
351 | struct task_struct *task = ctx->task; | |
352 | ||
353 | if (!task) { | |
354 | /* | |
355 | * Disable the counter on the cpu that it's on | |
356 | */ | |
357 | smp_call_function_single(counter->cpu, __perf_counter_disable, | |
358 | counter, 1); | |
359 | return; | |
360 | } | |
361 | ||
362 | retry: | |
363 | task_oncpu_function_call(task, __perf_counter_disable, counter); | |
364 | ||
365 | spin_lock_irq(&ctx->lock); | |
366 | /* | |
367 | * If the counter is still active, we need to retry the cross-call. | |
368 | */ | |
369 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { | |
370 | spin_unlock_irq(&ctx->lock); | |
371 | goto retry; | |
372 | } | |
373 | ||
374 | /* | |
375 | * Since we have the lock this context can't be scheduled | |
376 | * in, so we can change the state safely. | |
377 | */ | |
53cfbf59 PM |
378 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
379 | update_counter_times(counter); | |
d859e29f | 380 | counter->state = PERF_COUNTER_STATE_OFF; |
53cfbf59 | 381 | } |
d859e29f PM |
382 | |
383 | spin_unlock_irq(&ctx->lock); | |
384 | } | |
385 | ||
386 | /* | |
387 | * Disable a counter and all its children. | |
388 | */ | |
389 | static void perf_counter_disable_family(struct perf_counter *counter) | |
390 | { | |
391 | struct perf_counter *child; | |
392 | ||
393 | perf_counter_disable(counter); | |
394 | ||
395 | /* | |
396 | * Lock the mutex to protect the list of children | |
397 | */ | |
398 | mutex_lock(&counter->mutex); | |
399 | list_for_each_entry(child, &counter->child_list, child_list) | |
400 | perf_counter_disable(child); | |
401 | mutex_unlock(&counter->mutex); | |
402 | } | |
403 | ||
235c7fc7 IM |
404 | static int |
405 | counter_sched_in(struct perf_counter *counter, | |
406 | struct perf_cpu_context *cpuctx, | |
407 | struct perf_counter_context *ctx, | |
408 | int cpu) | |
409 | { | |
3b6f9e5c | 410 | if (counter->state <= PERF_COUNTER_STATE_OFF) |
235c7fc7 IM |
411 | return 0; |
412 | ||
413 | counter->state = PERF_COUNTER_STATE_ACTIVE; | |
414 | counter->oncpu = cpu; /* TODO: put 'cpu' into cpuctx->cpu */ | |
415 | /* | |
416 | * The new state must be visible before we turn it on in the hardware: | |
417 | */ | |
418 | smp_wmb(); | |
419 | ||
420 | if (counter->hw_ops->enable(counter)) { | |
421 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
422 | counter->oncpu = -1; | |
423 | return -EAGAIN; | |
424 | } | |
425 | ||
4af4998b | 426 | counter->tstamp_running += ctx->time - counter->tstamp_stopped; |
53cfbf59 | 427 | |
3b6f9e5c PM |
428 | if (!is_software_counter(counter)) |
429 | cpuctx->active_oncpu++; | |
235c7fc7 IM |
430 | ctx->nr_active++; |
431 | ||
3b6f9e5c PM |
432 | if (counter->hw_event.exclusive) |
433 | cpuctx->exclusive = 1; | |
434 | ||
235c7fc7 IM |
435 | return 0; |
436 | } | |
437 | ||
3b6f9e5c PM |
438 | /* |
439 | * Return 1 for a group consisting entirely of software counters, | |
440 | * 0 if the group contains any hardware counters. | |
441 | */ | |
442 | static int is_software_only_group(struct perf_counter *leader) | |
443 | { | |
444 | struct perf_counter *counter; | |
445 | ||
446 | if (!is_software_counter(leader)) | |
447 | return 0; | |
5c148194 | 448 | |
3b6f9e5c PM |
449 | list_for_each_entry(counter, &leader->sibling_list, list_entry) |
450 | if (!is_software_counter(counter)) | |
451 | return 0; | |
5c148194 | 452 | |
3b6f9e5c PM |
453 | return 1; |
454 | } | |
455 | ||
456 | /* | |
457 | * Work out whether we can put this counter group on the CPU now. | |
458 | */ | |
459 | static int group_can_go_on(struct perf_counter *counter, | |
460 | struct perf_cpu_context *cpuctx, | |
461 | int can_add_hw) | |
462 | { | |
463 | /* | |
464 | * Groups consisting entirely of software counters can always go on. | |
465 | */ | |
466 | if (is_software_only_group(counter)) | |
467 | return 1; | |
468 | /* | |
469 | * If an exclusive group is already on, no other hardware | |
470 | * counters can go on. | |
471 | */ | |
472 | if (cpuctx->exclusive) | |
473 | return 0; | |
474 | /* | |
475 | * If this group is exclusive and there are already | |
476 | * counters on the CPU, it can't go on. | |
477 | */ | |
478 | if (counter->hw_event.exclusive && cpuctx->active_oncpu) | |
479 | return 0; | |
480 | /* | |
481 | * Otherwise, try to add it if all previous groups were able | |
482 | * to go on. | |
483 | */ | |
484 | return can_add_hw; | |
485 | } | |
486 | ||
53cfbf59 PM |
487 | static void add_counter_to_ctx(struct perf_counter *counter, |
488 | struct perf_counter_context *ctx) | |
489 | { | |
490 | list_add_counter(counter, ctx); | |
491 | ctx->nr_counters++; | |
492 | counter->prev_state = PERF_COUNTER_STATE_OFF; | |
4af4998b PZ |
493 | counter->tstamp_enabled = ctx->time; |
494 | counter->tstamp_running = ctx->time; | |
495 | counter->tstamp_stopped = ctx->time; | |
53cfbf59 PM |
496 | } |
497 | ||
0793a61d | 498 | /* |
235c7fc7 | 499 | * Cross CPU call to install and enable a performance counter |
0793a61d TG |
500 | */ |
501 | static void __perf_install_in_context(void *info) | |
502 | { | |
503 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
504 | struct perf_counter *counter = info; | |
505 | struct perf_counter_context *ctx = counter->ctx; | |
d859e29f | 506 | struct perf_counter *leader = counter->group_leader; |
0793a61d | 507 | int cpu = smp_processor_id(); |
9b51f66d | 508 | unsigned long flags; |
5c92d124 | 509 | u64 perf_flags; |
3b6f9e5c | 510 | int err; |
0793a61d TG |
511 | |
512 | /* | |
513 | * If this is a task context, we need to check whether it is | |
514 | * the current task context of this cpu. If not it has been | |
515 | * scheduled out before the smp call arrived. | |
516 | */ | |
517 | if (ctx->task && cpuctx->task_ctx != ctx) | |
518 | return; | |
519 | ||
849691a6 | 520 | spin_lock_irqsave(&ctx->lock, flags); |
4af4998b | 521 | update_context_time(ctx); |
0793a61d TG |
522 | |
523 | /* | |
524 | * Protect the list operation against NMI by disabling the | |
525 | * counters on a global level. NOP for non NMI based counters. | |
526 | */ | |
01b2838c | 527 | perf_flags = hw_perf_save_disable(); |
0793a61d | 528 | |
53cfbf59 | 529 | add_counter_to_ctx(counter, ctx); |
0793a61d | 530 | |
d859e29f PM |
531 | /* |
532 | * Don't put the counter on if it is disabled or if | |
533 | * it is in a group and the group isn't on. | |
534 | */ | |
535 | if (counter->state != PERF_COUNTER_STATE_INACTIVE || | |
536 | (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE)) | |
537 | goto unlock; | |
538 | ||
3b6f9e5c PM |
539 | /* |
540 | * An exclusive counter can't go on if there are already active | |
541 | * hardware counters, and no hardware counter can go on if there | |
542 | * is already an exclusive counter on. | |
543 | */ | |
d859e29f | 544 | if (!group_can_go_on(counter, cpuctx, 1)) |
3b6f9e5c PM |
545 | err = -EEXIST; |
546 | else | |
547 | err = counter_sched_in(counter, cpuctx, ctx, cpu); | |
548 | ||
d859e29f PM |
549 | if (err) { |
550 | /* | |
551 | * This counter couldn't go on. If it is in a group | |
552 | * then we have to pull the whole group off. | |
553 | * If the counter group is pinned then put it in error state. | |
554 | */ | |
555 | if (leader != counter) | |
556 | group_sched_out(leader, cpuctx, ctx); | |
53cfbf59 PM |
557 | if (leader->hw_event.pinned) { |
558 | update_group_times(leader); | |
d859e29f | 559 | leader->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 560 | } |
d859e29f | 561 | } |
0793a61d | 562 | |
3b6f9e5c | 563 | if (!err && !ctx->task && cpuctx->max_pertask) |
0793a61d TG |
564 | cpuctx->max_pertask--; |
565 | ||
d859e29f | 566 | unlock: |
235c7fc7 IM |
567 | hw_perf_restore(perf_flags); |
568 | ||
849691a6 | 569 | spin_unlock_irqrestore(&ctx->lock, flags); |
0793a61d TG |
570 | } |
571 | ||
572 | /* | |
573 | * Attach a performance counter to a context | |
574 | * | |
575 | * First we add the counter to the list with the hardware enable bit | |
576 | * in counter->hw_config cleared. | |
577 | * | |
578 | * If the counter is attached to a task which is on a CPU we use a smp | |
579 | * call to enable it in the task context. The task might have been | |
580 | * scheduled away, but we check this in the smp call again. | |
d859e29f PM |
581 | * |
582 | * Must be called with ctx->mutex held. | |
0793a61d TG |
583 | */ |
584 | static void | |
585 | perf_install_in_context(struct perf_counter_context *ctx, | |
586 | struct perf_counter *counter, | |
587 | int cpu) | |
588 | { | |
589 | struct task_struct *task = ctx->task; | |
590 | ||
0793a61d TG |
591 | if (!task) { |
592 | /* | |
593 | * Per cpu counters are installed via an smp call and | |
594 | * the install is always sucessful. | |
595 | */ | |
596 | smp_call_function_single(cpu, __perf_install_in_context, | |
597 | counter, 1); | |
598 | return; | |
599 | } | |
600 | ||
601 | counter->task = task; | |
602 | retry: | |
603 | task_oncpu_function_call(task, __perf_install_in_context, | |
604 | counter); | |
605 | ||
606 | spin_lock_irq(&ctx->lock); | |
607 | /* | |
0793a61d TG |
608 | * we need to retry the smp call. |
609 | */ | |
d859e29f | 610 | if (ctx->is_active && list_empty(&counter->list_entry)) { |
0793a61d TG |
611 | spin_unlock_irq(&ctx->lock); |
612 | goto retry; | |
613 | } | |
614 | ||
615 | /* | |
616 | * The lock prevents that this context is scheduled in so we | |
617 | * can add the counter safely, if it the call above did not | |
618 | * succeed. | |
619 | */ | |
53cfbf59 PM |
620 | if (list_empty(&counter->list_entry)) |
621 | add_counter_to_ctx(counter, ctx); | |
0793a61d TG |
622 | spin_unlock_irq(&ctx->lock); |
623 | } | |
624 | ||
d859e29f PM |
625 | /* |
626 | * Cross CPU call to enable a performance counter | |
627 | */ | |
628 | static void __perf_counter_enable(void *info) | |
04289bb9 | 629 | { |
d859e29f PM |
630 | struct perf_counter *counter = info; |
631 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
632 | struct perf_counter_context *ctx = counter->ctx; | |
633 | struct perf_counter *leader = counter->group_leader; | |
634 | unsigned long flags; | |
635 | int err; | |
04289bb9 | 636 | |
d859e29f PM |
637 | /* |
638 | * If this is a per-task counter, need to check whether this | |
639 | * counter's task is the current task on this cpu. | |
640 | */ | |
641 | if (ctx->task && cpuctx->task_ctx != ctx) | |
3cbed429 PM |
642 | return; |
643 | ||
849691a6 | 644 | spin_lock_irqsave(&ctx->lock, flags); |
4af4998b | 645 | update_context_time(ctx); |
d859e29f | 646 | |
c07c99b6 | 647 | counter->prev_state = counter->state; |
d859e29f PM |
648 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) |
649 | goto unlock; | |
650 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
4af4998b | 651 | counter->tstamp_enabled = ctx->time - counter->total_time_enabled; |
04289bb9 IM |
652 | |
653 | /* | |
d859e29f PM |
654 | * If the counter is in a group and isn't the group leader, |
655 | * then don't put it on unless the group is on. | |
04289bb9 | 656 | */ |
d859e29f PM |
657 | if (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE) |
658 | goto unlock; | |
3b6f9e5c | 659 | |
d859e29f PM |
660 | if (!group_can_go_on(counter, cpuctx, 1)) |
661 | err = -EEXIST; | |
662 | else | |
663 | err = counter_sched_in(counter, cpuctx, ctx, | |
664 | smp_processor_id()); | |
665 | ||
666 | if (err) { | |
667 | /* | |
668 | * If this counter can't go on and it's part of a | |
669 | * group, then the whole group has to come off. | |
670 | */ | |
671 | if (leader != counter) | |
672 | group_sched_out(leader, cpuctx, ctx); | |
53cfbf59 PM |
673 | if (leader->hw_event.pinned) { |
674 | update_group_times(leader); | |
d859e29f | 675 | leader->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 676 | } |
d859e29f PM |
677 | } |
678 | ||
679 | unlock: | |
849691a6 | 680 | spin_unlock_irqrestore(&ctx->lock, flags); |
d859e29f PM |
681 | } |
682 | ||
683 | /* | |
684 | * Enable a counter. | |
685 | */ | |
686 | static void perf_counter_enable(struct perf_counter *counter) | |
687 | { | |
688 | struct perf_counter_context *ctx = counter->ctx; | |
689 | struct task_struct *task = ctx->task; | |
690 | ||
691 | if (!task) { | |
692 | /* | |
693 | * Enable the counter on the cpu that it's on | |
694 | */ | |
695 | smp_call_function_single(counter->cpu, __perf_counter_enable, | |
696 | counter, 1); | |
697 | return; | |
698 | } | |
699 | ||
700 | spin_lock_irq(&ctx->lock); | |
701 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
702 | goto out; | |
703 | ||
704 | /* | |
705 | * If the counter is in error state, clear that first. | |
706 | * That way, if we see the counter in error state below, we | |
707 | * know that it has gone back into error state, as distinct | |
708 | * from the task having been scheduled away before the | |
709 | * cross-call arrived. | |
710 | */ | |
711 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
712 | counter->state = PERF_COUNTER_STATE_OFF; | |
713 | ||
714 | retry: | |
715 | spin_unlock_irq(&ctx->lock); | |
716 | task_oncpu_function_call(task, __perf_counter_enable, counter); | |
717 | ||
718 | spin_lock_irq(&ctx->lock); | |
719 | ||
720 | /* | |
721 | * If the context is active and the counter is still off, | |
722 | * we need to retry the cross-call. | |
723 | */ | |
724 | if (ctx->is_active && counter->state == PERF_COUNTER_STATE_OFF) | |
725 | goto retry; | |
726 | ||
727 | /* | |
728 | * Since we have the lock this context can't be scheduled | |
729 | * in, so we can change the state safely. | |
730 | */ | |
53cfbf59 | 731 | if (counter->state == PERF_COUNTER_STATE_OFF) { |
d859e29f | 732 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
4af4998b PZ |
733 | counter->tstamp_enabled = |
734 | ctx->time - counter->total_time_enabled; | |
53cfbf59 | 735 | } |
d859e29f PM |
736 | out: |
737 | spin_unlock_irq(&ctx->lock); | |
738 | } | |
739 | ||
79f14641 PZ |
740 | static void perf_counter_refresh(struct perf_counter *counter, int refresh) |
741 | { | |
742 | atomic_add(refresh, &counter->event_limit); | |
743 | perf_counter_enable(counter); | |
744 | } | |
745 | ||
d859e29f PM |
746 | /* |
747 | * Enable a counter and all its children. | |
748 | */ | |
749 | static void perf_counter_enable_family(struct perf_counter *counter) | |
750 | { | |
751 | struct perf_counter *child; | |
752 | ||
753 | perf_counter_enable(counter); | |
754 | ||
755 | /* | |
756 | * Lock the mutex to protect the list of children | |
757 | */ | |
758 | mutex_lock(&counter->mutex); | |
759 | list_for_each_entry(child, &counter->child_list, child_list) | |
760 | perf_counter_enable(child); | |
761 | mutex_unlock(&counter->mutex); | |
04289bb9 IM |
762 | } |
763 | ||
235c7fc7 IM |
764 | void __perf_counter_sched_out(struct perf_counter_context *ctx, |
765 | struct perf_cpu_context *cpuctx) | |
766 | { | |
767 | struct perf_counter *counter; | |
3cbed429 | 768 | u64 flags; |
235c7fc7 | 769 | |
d859e29f PM |
770 | spin_lock(&ctx->lock); |
771 | ctx->is_active = 0; | |
235c7fc7 | 772 | if (likely(!ctx->nr_counters)) |
d859e29f | 773 | goto out; |
4af4998b | 774 | update_context_time(ctx); |
235c7fc7 | 775 | |
3cbed429 | 776 | flags = hw_perf_save_disable(); |
235c7fc7 IM |
777 | if (ctx->nr_active) { |
778 | list_for_each_entry(counter, &ctx->counter_list, list_entry) | |
779 | group_sched_out(counter, cpuctx, ctx); | |
780 | } | |
3cbed429 | 781 | hw_perf_restore(flags); |
d859e29f | 782 | out: |
235c7fc7 IM |
783 | spin_unlock(&ctx->lock); |
784 | } | |
785 | ||
0793a61d TG |
786 | /* |
787 | * Called from scheduler to remove the counters of the current task, | |
788 | * with interrupts disabled. | |
789 | * | |
790 | * We stop each counter and update the counter value in counter->count. | |
791 | * | |
7671581f | 792 | * This does not protect us against NMI, but disable() |
0793a61d TG |
793 | * sets the disabled bit in the control field of counter _before_ |
794 | * accessing the counter control register. If a NMI hits, then it will | |
795 | * not restart the counter. | |
796 | */ | |
797 | void perf_counter_task_sched_out(struct task_struct *task, int cpu) | |
798 | { | |
799 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
800 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
4a0deca6 | 801 | struct pt_regs *regs; |
0793a61d TG |
802 | |
803 | if (likely(!cpuctx->task_ctx)) | |
804 | return; | |
805 | ||
bce379bf PZ |
806 | update_context_time(ctx); |
807 | ||
4a0deca6 | 808 | regs = task_pt_regs(task); |
78f13e95 | 809 | perf_swcounter_event(PERF_COUNT_CONTEXT_SWITCHES, 1, 1, regs, 0); |
235c7fc7 IM |
810 | __perf_counter_sched_out(ctx, cpuctx); |
811 | ||
0793a61d TG |
812 | cpuctx->task_ctx = NULL; |
813 | } | |
814 | ||
235c7fc7 | 815 | static void perf_counter_cpu_sched_out(struct perf_cpu_context *cpuctx) |
04289bb9 | 816 | { |
235c7fc7 | 817 | __perf_counter_sched_out(&cpuctx->ctx, cpuctx); |
04289bb9 IM |
818 | } |
819 | ||
7995888f | 820 | static int |
04289bb9 IM |
821 | group_sched_in(struct perf_counter *group_counter, |
822 | struct perf_cpu_context *cpuctx, | |
823 | struct perf_counter_context *ctx, | |
824 | int cpu) | |
825 | { | |
95cdd2e7 | 826 | struct perf_counter *counter, *partial_group; |
3cbed429 PM |
827 | int ret; |
828 | ||
829 | if (group_counter->state == PERF_COUNTER_STATE_OFF) | |
830 | return 0; | |
831 | ||
832 | ret = hw_perf_group_sched_in(group_counter, cpuctx, ctx, cpu); | |
833 | if (ret) | |
834 | return ret < 0 ? ret : 0; | |
04289bb9 | 835 | |
c07c99b6 | 836 | group_counter->prev_state = group_counter->state; |
95cdd2e7 IM |
837 | if (counter_sched_in(group_counter, cpuctx, ctx, cpu)) |
838 | return -EAGAIN; | |
04289bb9 IM |
839 | |
840 | /* | |
841 | * Schedule in siblings as one group (if any): | |
842 | */ | |
7995888f | 843 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { |
c07c99b6 | 844 | counter->prev_state = counter->state; |
95cdd2e7 IM |
845 | if (counter_sched_in(counter, cpuctx, ctx, cpu)) { |
846 | partial_group = counter; | |
847 | goto group_error; | |
848 | } | |
95cdd2e7 IM |
849 | } |
850 | ||
3cbed429 | 851 | return 0; |
95cdd2e7 IM |
852 | |
853 | group_error: | |
854 | /* | |
855 | * Groups can be scheduled in as one unit only, so undo any | |
856 | * partial group before returning: | |
857 | */ | |
858 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { | |
859 | if (counter == partial_group) | |
860 | break; | |
861 | counter_sched_out(counter, cpuctx, ctx); | |
7995888f | 862 | } |
95cdd2e7 | 863 | counter_sched_out(group_counter, cpuctx, ctx); |
7995888f | 864 | |
95cdd2e7 | 865 | return -EAGAIN; |
04289bb9 IM |
866 | } |
867 | ||
235c7fc7 IM |
868 | static void |
869 | __perf_counter_sched_in(struct perf_counter_context *ctx, | |
870 | struct perf_cpu_context *cpuctx, int cpu) | |
0793a61d | 871 | { |
0793a61d | 872 | struct perf_counter *counter; |
3cbed429 | 873 | u64 flags; |
dd0e6ba2 | 874 | int can_add_hw = 1; |
0793a61d | 875 | |
d859e29f PM |
876 | spin_lock(&ctx->lock); |
877 | ctx->is_active = 1; | |
0793a61d | 878 | if (likely(!ctx->nr_counters)) |
d859e29f | 879 | goto out; |
0793a61d | 880 | |
4af4998b | 881 | ctx->timestamp = perf_clock(); |
53cfbf59 | 882 | |
3cbed429 | 883 | flags = hw_perf_save_disable(); |
3b6f9e5c PM |
884 | |
885 | /* | |
886 | * First go through the list and put on any pinned groups | |
887 | * in order to give them the best chance of going on. | |
888 | */ | |
889 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
890 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
891 | !counter->hw_event.pinned) | |
892 | continue; | |
893 | if (counter->cpu != -1 && counter->cpu != cpu) | |
894 | continue; | |
895 | ||
896 | if (group_can_go_on(counter, cpuctx, 1)) | |
897 | group_sched_in(counter, cpuctx, ctx, cpu); | |
898 | ||
899 | /* | |
900 | * If this pinned group hasn't been scheduled, | |
901 | * put it in error state. | |
902 | */ | |
53cfbf59 PM |
903 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
904 | update_group_times(counter); | |
3b6f9e5c | 905 | counter->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 906 | } |
3b6f9e5c PM |
907 | } |
908 | ||
04289bb9 | 909 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
3b6f9e5c PM |
910 | /* |
911 | * Ignore counters in OFF or ERROR state, and | |
912 | * ignore pinned counters since we did them already. | |
913 | */ | |
914 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
915 | counter->hw_event.pinned) | |
916 | continue; | |
917 | ||
04289bb9 IM |
918 | /* |
919 | * Listen to the 'cpu' scheduling filter constraint | |
920 | * of counters: | |
921 | */ | |
0793a61d TG |
922 | if (counter->cpu != -1 && counter->cpu != cpu) |
923 | continue; | |
924 | ||
3b6f9e5c | 925 | if (group_can_go_on(counter, cpuctx, can_add_hw)) { |
dd0e6ba2 PM |
926 | if (group_sched_in(counter, cpuctx, ctx, cpu)) |
927 | can_add_hw = 0; | |
3b6f9e5c | 928 | } |
0793a61d | 929 | } |
3cbed429 | 930 | hw_perf_restore(flags); |
d859e29f | 931 | out: |
0793a61d | 932 | spin_unlock(&ctx->lock); |
235c7fc7 IM |
933 | } |
934 | ||
935 | /* | |
936 | * Called from scheduler to add the counters of the current task | |
937 | * with interrupts disabled. | |
938 | * | |
939 | * We restore the counter value and then enable it. | |
940 | * | |
941 | * This does not protect us against NMI, but enable() | |
942 | * sets the enabled bit in the control field of counter _before_ | |
943 | * accessing the counter control register. If a NMI hits, then it will | |
944 | * keep the counter running. | |
945 | */ | |
946 | void perf_counter_task_sched_in(struct task_struct *task, int cpu) | |
947 | { | |
948 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
949 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
04289bb9 | 950 | |
235c7fc7 | 951 | __perf_counter_sched_in(ctx, cpuctx, cpu); |
0793a61d TG |
952 | cpuctx->task_ctx = ctx; |
953 | } | |
954 | ||
235c7fc7 IM |
955 | static void perf_counter_cpu_sched_in(struct perf_cpu_context *cpuctx, int cpu) |
956 | { | |
957 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
958 | ||
959 | __perf_counter_sched_in(ctx, cpuctx, cpu); | |
960 | } | |
961 | ||
1d1c7ddb IM |
962 | int perf_counter_task_disable(void) |
963 | { | |
964 | struct task_struct *curr = current; | |
965 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
966 | struct perf_counter *counter; | |
aa9c4c0f | 967 | unsigned long flags; |
1d1c7ddb IM |
968 | u64 perf_flags; |
969 | int cpu; | |
970 | ||
971 | if (likely(!ctx->nr_counters)) | |
972 | return 0; | |
973 | ||
849691a6 | 974 | local_irq_save(flags); |
1d1c7ddb IM |
975 | cpu = smp_processor_id(); |
976 | ||
977 | perf_counter_task_sched_out(curr, cpu); | |
978 | ||
979 | spin_lock(&ctx->lock); | |
980 | ||
981 | /* | |
982 | * Disable all the counters: | |
983 | */ | |
984 | perf_flags = hw_perf_save_disable(); | |
985 | ||
3b6f9e5c | 986 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
53cfbf59 PM |
987 | if (counter->state != PERF_COUNTER_STATE_ERROR) { |
988 | update_group_times(counter); | |
3b6f9e5c | 989 | counter->state = PERF_COUNTER_STATE_OFF; |
53cfbf59 | 990 | } |
3b6f9e5c | 991 | } |
9b51f66d | 992 | |
1d1c7ddb IM |
993 | hw_perf_restore(perf_flags); |
994 | ||
849691a6 | 995 | spin_unlock_irqrestore(&ctx->lock, flags); |
1d1c7ddb IM |
996 | |
997 | return 0; | |
998 | } | |
999 | ||
1000 | int perf_counter_task_enable(void) | |
1001 | { | |
1002 | struct task_struct *curr = current; | |
1003 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
1004 | struct perf_counter *counter; | |
aa9c4c0f | 1005 | unsigned long flags; |
1d1c7ddb IM |
1006 | u64 perf_flags; |
1007 | int cpu; | |
1008 | ||
1009 | if (likely(!ctx->nr_counters)) | |
1010 | return 0; | |
1011 | ||
849691a6 | 1012 | local_irq_save(flags); |
1d1c7ddb IM |
1013 | cpu = smp_processor_id(); |
1014 | ||
235c7fc7 IM |
1015 | perf_counter_task_sched_out(curr, cpu); |
1016 | ||
1d1c7ddb IM |
1017 | spin_lock(&ctx->lock); |
1018 | ||
1019 | /* | |
1020 | * Disable all the counters: | |
1021 | */ | |
1022 | perf_flags = hw_perf_save_disable(); | |
1023 | ||
1024 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
3b6f9e5c | 1025 | if (counter->state > PERF_COUNTER_STATE_OFF) |
1d1c7ddb | 1026 | continue; |
6a930700 | 1027 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
4af4998b PZ |
1028 | counter->tstamp_enabled = |
1029 | ctx->time - counter->total_time_enabled; | |
aa9c4c0f | 1030 | counter->hw_event.disabled = 0; |
1d1c7ddb IM |
1031 | } |
1032 | hw_perf_restore(perf_flags); | |
1033 | ||
1034 | spin_unlock(&ctx->lock); | |
1035 | ||
1036 | perf_counter_task_sched_in(curr, cpu); | |
1037 | ||
849691a6 | 1038 | local_irq_restore(flags); |
1d1c7ddb IM |
1039 | |
1040 | return 0; | |
1041 | } | |
1042 | ||
235c7fc7 IM |
1043 | /* |
1044 | * Round-robin a context's counters: | |
1045 | */ | |
1046 | static void rotate_ctx(struct perf_counter_context *ctx) | |
0793a61d | 1047 | { |
0793a61d | 1048 | struct perf_counter *counter; |
5c92d124 | 1049 | u64 perf_flags; |
0793a61d | 1050 | |
235c7fc7 | 1051 | if (!ctx->nr_counters) |
0793a61d TG |
1052 | return; |
1053 | ||
0793a61d | 1054 | spin_lock(&ctx->lock); |
0793a61d | 1055 | /* |
04289bb9 | 1056 | * Rotate the first entry last (works just fine for group counters too): |
0793a61d | 1057 | */ |
01b2838c | 1058 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 1059 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
75564232 | 1060 | list_move_tail(&counter->list_entry, &ctx->counter_list); |
0793a61d TG |
1061 | break; |
1062 | } | |
01b2838c | 1063 | hw_perf_restore(perf_flags); |
0793a61d TG |
1064 | |
1065 | spin_unlock(&ctx->lock); | |
235c7fc7 IM |
1066 | } |
1067 | ||
1068 | void perf_counter_task_tick(struct task_struct *curr, int cpu) | |
1069 | { | |
1070 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1071 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
1072 | const int rotate_percpu = 0; | |
1073 | ||
1074 | if (rotate_percpu) | |
1075 | perf_counter_cpu_sched_out(cpuctx); | |
1076 | perf_counter_task_sched_out(curr, cpu); | |
0793a61d | 1077 | |
235c7fc7 IM |
1078 | if (rotate_percpu) |
1079 | rotate_ctx(&cpuctx->ctx); | |
1080 | rotate_ctx(ctx); | |
1081 | ||
1082 | if (rotate_percpu) | |
1083 | perf_counter_cpu_sched_in(cpuctx, cpu); | |
0793a61d TG |
1084 | perf_counter_task_sched_in(curr, cpu); |
1085 | } | |
1086 | ||
0793a61d TG |
1087 | /* |
1088 | * Cross CPU call to read the hardware counter | |
1089 | */ | |
7671581f | 1090 | static void __read(void *info) |
0793a61d | 1091 | { |
621a01ea | 1092 | struct perf_counter *counter = info; |
53cfbf59 | 1093 | struct perf_counter_context *ctx = counter->ctx; |
aa9c4c0f | 1094 | unsigned long flags; |
621a01ea | 1095 | |
849691a6 | 1096 | local_irq_save(flags); |
53cfbf59 | 1097 | if (ctx->is_active) |
4af4998b | 1098 | update_context_time(ctx); |
7671581f | 1099 | counter->hw_ops->read(counter); |
53cfbf59 | 1100 | update_counter_times(counter); |
849691a6 | 1101 | local_irq_restore(flags); |
0793a61d TG |
1102 | } |
1103 | ||
04289bb9 | 1104 | static u64 perf_counter_read(struct perf_counter *counter) |
0793a61d TG |
1105 | { |
1106 | /* | |
1107 | * If counter is enabled and currently active on a CPU, update the | |
1108 | * value in the counter structure: | |
1109 | */ | |
6a930700 | 1110 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { |
0793a61d | 1111 | smp_call_function_single(counter->oncpu, |
7671581f | 1112 | __read, counter, 1); |
53cfbf59 PM |
1113 | } else if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
1114 | update_counter_times(counter); | |
0793a61d TG |
1115 | } |
1116 | ||
ee06094f | 1117 | return atomic64_read(&counter->count); |
0793a61d TG |
1118 | } |
1119 | ||
0793a61d TG |
1120 | static void put_context(struct perf_counter_context *ctx) |
1121 | { | |
1122 | if (ctx->task) | |
1123 | put_task_struct(ctx->task); | |
1124 | } | |
1125 | ||
1126 | static struct perf_counter_context *find_get_context(pid_t pid, int cpu) | |
1127 | { | |
1128 | struct perf_cpu_context *cpuctx; | |
1129 | struct perf_counter_context *ctx; | |
1130 | struct task_struct *task; | |
1131 | ||
1132 | /* | |
1133 | * If cpu is not a wildcard then this is a percpu counter: | |
1134 | */ | |
1135 | if (cpu != -1) { | |
1136 | /* Must be root to operate on a CPU counter: */ | |
1ccd1549 | 1137 | if (sysctl_perf_counter_priv && !capable(CAP_SYS_ADMIN)) |
0793a61d TG |
1138 | return ERR_PTR(-EACCES); |
1139 | ||
1140 | if (cpu < 0 || cpu > num_possible_cpus()) | |
1141 | return ERR_PTR(-EINVAL); | |
1142 | ||
1143 | /* | |
1144 | * We could be clever and allow to attach a counter to an | |
1145 | * offline CPU and activate it when the CPU comes up, but | |
1146 | * that's for later. | |
1147 | */ | |
1148 | if (!cpu_isset(cpu, cpu_online_map)) | |
1149 | return ERR_PTR(-ENODEV); | |
1150 | ||
1151 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1152 | ctx = &cpuctx->ctx; | |
1153 | ||
0793a61d TG |
1154 | return ctx; |
1155 | } | |
1156 | ||
1157 | rcu_read_lock(); | |
1158 | if (!pid) | |
1159 | task = current; | |
1160 | else | |
1161 | task = find_task_by_vpid(pid); | |
1162 | if (task) | |
1163 | get_task_struct(task); | |
1164 | rcu_read_unlock(); | |
1165 | ||
1166 | if (!task) | |
1167 | return ERR_PTR(-ESRCH); | |
1168 | ||
1169 | ctx = &task->perf_counter_ctx; | |
1170 | ctx->task = task; | |
1171 | ||
1172 | /* Reuse ptrace permission checks for now. */ | |
1173 | if (!ptrace_may_access(task, PTRACE_MODE_READ)) { | |
1174 | put_context(ctx); | |
1175 | return ERR_PTR(-EACCES); | |
1176 | } | |
1177 | ||
1178 | return ctx; | |
1179 | } | |
1180 | ||
592903cd PZ |
1181 | static void free_counter_rcu(struct rcu_head *head) |
1182 | { | |
1183 | struct perf_counter *counter; | |
1184 | ||
1185 | counter = container_of(head, struct perf_counter, rcu_head); | |
1186 | kfree(counter); | |
1187 | } | |
1188 | ||
925d519a PZ |
1189 | static void perf_pending_sync(struct perf_counter *counter); |
1190 | ||
f1600952 PZ |
1191 | static void free_counter(struct perf_counter *counter) |
1192 | { | |
925d519a PZ |
1193 | perf_pending_sync(counter); |
1194 | ||
9ee318a7 PZ |
1195 | if (counter->hw_event.mmap) |
1196 | atomic_dec(&nr_mmap_tracking); | |
1197 | if (counter->hw_event.munmap) | |
1198 | atomic_dec(&nr_munmap_tracking); | |
1199 | if (counter->hw_event.comm) | |
1200 | atomic_dec(&nr_comm_tracking); | |
1201 | ||
e077df4f PZ |
1202 | if (counter->destroy) |
1203 | counter->destroy(counter); | |
1204 | ||
f1600952 PZ |
1205 | call_rcu(&counter->rcu_head, free_counter_rcu); |
1206 | } | |
1207 | ||
0793a61d TG |
1208 | /* |
1209 | * Called when the last reference to the file is gone. | |
1210 | */ | |
1211 | static int perf_release(struct inode *inode, struct file *file) | |
1212 | { | |
1213 | struct perf_counter *counter = file->private_data; | |
1214 | struct perf_counter_context *ctx = counter->ctx; | |
1215 | ||
1216 | file->private_data = NULL; | |
1217 | ||
d859e29f | 1218 | mutex_lock(&ctx->mutex); |
0793a61d TG |
1219 | mutex_lock(&counter->mutex); |
1220 | ||
04289bb9 | 1221 | perf_counter_remove_from_context(counter); |
0793a61d TG |
1222 | |
1223 | mutex_unlock(&counter->mutex); | |
d859e29f | 1224 | mutex_unlock(&ctx->mutex); |
0793a61d | 1225 | |
f1600952 | 1226 | free_counter(counter); |
5af75917 | 1227 | put_context(ctx); |
0793a61d TG |
1228 | |
1229 | return 0; | |
1230 | } | |
1231 | ||
1232 | /* | |
1233 | * Read the performance counter - simple non blocking version for now | |
1234 | */ | |
1235 | static ssize_t | |
1236 | perf_read_hw(struct perf_counter *counter, char __user *buf, size_t count) | |
1237 | { | |
53cfbf59 PM |
1238 | u64 values[3]; |
1239 | int n; | |
0793a61d | 1240 | |
3b6f9e5c PM |
1241 | /* |
1242 | * Return end-of-file for a read on a counter that is in | |
1243 | * error state (i.e. because it was pinned but it couldn't be | |
1244 | * scheduled on to the CPU at some point). | |
1245 | */ | |
1246 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
1247 | return 0; | |
1248 | ||
0793a61d | 1249 | mutex_lock(&counter->mutex); |
53cfbf59 PM |
1250 | values[0] = perf_counter_read(counter); |
1251 | n = 1; | |
1252 | if (counter->hw_event.read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) | |
1253 | values[n++] = counter->total_time_enabled + | |
1254 | atomic64_read(&counter->child_total_time_enabled); | |
1255 | if (counter->hw_event.read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) | |
1256 | values[n++] = counter->total_time_running + | |
1257 | atomic64_read(&counter->child_total_time_running); | |
0793a61d TG |
1258 | mutex_unlock(&counter->mutex); |
1259 | ||
53cfbf59 PM |
1260 | if (count < n * sizeof(u64)) |
1261 | return -EINVAL; | |
1262 | count = n * sizeof(u64); | |
1263 | ||
1264 | if (copy_to_user(buf, values, count)) | |
1265 | return -EFAULT; | |
1266 | ||
1267 | return count; | |
0793a61d TG |
1268 | } |
1269 | ||
0793a61d TG |
1270 | static ssize_t |
1271 | perf_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | |
1272 | { | |
1273 | struct perf_counter *counter = file->private_data; | |
1274 | ||
7b732a75 | 1275 | return perf_read_hw(counter, buf, count); |
0793a61d TG |
1276 | } |
1277 | ||
1278 | static unsigned int perf_poll(struct file *file, poll_table *wait) | |
1279 | { | |
1280 | struct perf_counter *counter = file->private_data; | |
c7138f37 PZ |
1281 | struct perf_mmap_data *data; |
1282 | unsigned int events; | |
1283 | ||
1284 | rcu_read_lock(); | |
1285 | data = rcu_dereference(counter->data); | |
1286 | if (data) | |
1287 | events = atomic_xchg(&data->wakeup, 0); | |
1288 | else | |
1289 | events = POLL_HUP; | |
1290 | rcu_read_unlock(); | |
0793a61d TG |
1291 | |
1292 | poll_wait(file, &counter->waitq, wait); | |
1293 | ||
0793a61d TG |
1294 | return events; |
1295 | } | |
1296 | ||
d859e29f PM |
1297 | static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
1298 | { | |
1299 | struct perf_counter *counter = file->private_data; | |
1300 | int err = 0; | |
1301 | ||
1302 | switch (cmd) { | |
1303 | case PERF_COUNTER_IOC_ENABLE: | |
1304 | perf_counter_enable_family(counter); | |
1305 | break; | |
1306 | case PERF_COUNTER_IOC_DISABLE: | |
1307 | perf_counter_disable_family(counter); | |
1308 | break; | |
79f14641 PZ |
1309 | case PERF_COUNTER_IOC_REFRESH: |
1310 | perf_counter_refresh(counter, arg); | |
1311 | break; | |
d859e29f PM |
1312 | default: |
1313 | err = -ENOTTY; | |
1314 | } | |
1315 | return err; | |
1316 | } | |
1317 | ||
38ff667b PZ |
1318 | /* |
1319 | * Callers need to ensure there can be no nesting of this function, otherwise | |
1320 | * the seqlock logic goes bad. We can not serialize this because the arch | |
1321 | * code calls this from NMI context. | |
1322 | */ | |
1323 | void perf_counter_update_userpage(struct perf_counter *counter) | |
37d81828 | 1324 | { |
38ff667b PZ |
1325 | struct perf_mmap_data *data; |
1326 | struct perf_counter_mmap_page *userpg; | |
1327 | ||
1328 | rcu_read_lock(); | |
1329 | data = rcu_dereference(counter->data); | |
1330 | if (!data) | |
1331 | goto unlock; | |
1332 | ||
1333 | userpg = data->user_page; | |
37d81828 | 1334 | |
7b732a75 PZ |
1335 | /* |
1336 | * Disable preemption so as to not let the corresponding user-space | |
1337 | * spin too long if we get preempted. | |
1338 | */ | |
1339 | preempt_disable(); | |
37d81828 | 1340 | ++userpg->lock; |
92f22a38 | 1341 | barrier(); |
37d81828 PM |
1342 | userpg->index = counter->hw.idx; |
1343 | userpg->offset = atomic64_read(&counter->count); | |
1344 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) | |
1345 | userpg->offset -= atomic64_read(&counter->hw.prev_count); | |
7b732a75 | 1346 | |
92f22a38 | 1347 | barrier(); |
37d81828 | 1348 | ++userpg->lock; |
7b732a75 | 1349 | preempt_enable(); |
38ff667b | 1350 | unlock: |
7b732a75 | 1351 | rcu_read_unlock(); |
37d81828 PM |
1352 | } |
1353 | ||
1354 | static int perf_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |
1355 | { | |
1356 | struct perf_counter *counter = vma->vm_file->private_data; | |
7b732a75 PZ |
1357 | struct perf_mmap_data *data; |
1358 | int ret = VM_FAULT_SIGBUS; | |
1359 | ||
1360 | rcu_read_lock(); | |
1361 | data = rcu_dereference(counter->data); | |
1362 | if (!data) | |
1363 | goto unlock; | |
1364 | ||
1365 | if (vmf->pgoff == 0) { | |
1366 | vmf->page = virt_to_page(data->user_page); | |
1367 | } else { | |
1368 | int nr = vmf->pgoff - 1; | |
37d81828 | 1369 | |
7b732a75 PZ |
1370 | if ((unsigned)nr > data->nr_pages) |
1371 | goto unlock; | |
37d81828 | 1372 | |
7b732a75 PZ |
1373 | vmf->page = virt_to_page(data->data_pages[nr]); |
1374 | } | |
37d81828 | 1375 | get_page(vmf->page); |
7b732a75 PZ |
1376 | ret = 0; |
1377 | unlock: | |
1378 | rcu_read_unlock(); | |
1379 | ||
1380 | return ret; | |
1381 | } | |
1382 | ||
1383 | static int perf_mmap_data_alloc(struct perf_counter *counter, int nr_pages) | |
1384 | { | |
1385 | struct perf_mmap_data *data; | |
1386 | unsigned long size; | |
1387 | int i; | |
1388 | ||
1389 | WARN_ON(atomic_read(&counter->mmap_count)); | |
1390 | ||
1391 | size = sizeof(struct perf_mmap_data); | |
1392 | size += nr_pages * sizeof(void *); | |
1393 | ||
1394 | data = kzalloc(size, GFP_KERNEL); | |
1395 | if (!data) | |
1396 | goto fail; | |
1397 | ||
1398 | data->user_page = (void *)get_zeroed_page(GFP_KERNEL); | |
1399 | if (!data->user_page) | |
1400 | goto fail_user_page; | |
1401 | ||
1402 | for (i = 0; i < nr_pages; i++) { | |
1403 | data->data_pages[i] = (void *)get_zeroed_page(GFP_KERNEL); | |
1404 | if (!data->data_pages[i]) | |
1405 | goto fail_data_pages; | |
1406 | } | |
1407 | ||
1408 | data->nr_pages = nr_pages; | |
1409 | ||
1410 | rcu_assign_pointer(counter->data, data); | |
1411 | ||
37d81828 | 1412 | return 0; |
7b732a75 PZ |
1413 | |
1414 | fail_data_pages: | |
1415 | for (i--; i >= 0; i--) | |
1416 | free_page((unsigned long)data->data_pages[i]); | |
1417 | ||
1418 | free_page((unsigned long)data->user_page); | |
1419 | ||
1420 | fail_user_page: | |
1421 | kfree(data); | |
1422 | ||
1423 | fail: | |
1424 | return -ENOMEM; | |
1425 | } | |
1426 | ||
1427 | static void __perf_mmap_data_free(struct rcu_head *rcu_head) | |
1428 | { | |
1429 | struct perf_mmap_data *data = container_of(rcu_head, | |
1430 | struct perf_mmap_data, rcu_head); | |
1431 | int i; | |
1432 | ||
1433 | free_page((unsigned long)data->user_page); | |
1434 | for (i = 0; i < data->nr_pages; i++) | |
1435 | free_page((unsigned long)data->data_pages[i]); | |
1436 | kfree(data); | |
1437 | } | |
1438 | ||
1439 | static void perf_mmap_data_free(struct perf_counter *counter) | |
1440 | { | |
1441 | struct perf_mmap_data *data = counter->data; | |
1442 | ||
1443 | WARN_ON(atomic_read(&counter->mmap_count)); | |
1444 | ||
1445 | rcu_assign_pointer(counter->data, NULL); | |
1446 | call_rcu(&data->rcu_head, __perf_mmap_data_free); | |
1447 | } | |
1448 | ||
1449 | static void perf_mmap_open(struct vm_area_struct *vma) | |
1450 | { | |
1451 | struct perf_counter *counter = vma->vm_file->private_data; | |
1452 | ||
1453 | atomic_inc(&counter->mmap_count); | |
1454 | } | |
1455 | ||
1456 | static void perf_mmap_close(struct vm_area_struct *vma) | |
1457 | { | |
1458 | struct perf_counter *counter = vma->vm_file->private_data; | |
1459 | ||
1460 | if (atomic_dec_and_mutex_lock(&counter->mmap_count, | |
1461 | &counter->mmap_mutex)) { | |
ebb3c4c4 | 1462 | vma->vm_mm->locked_vm -= counter->data->nr_pages + 1; |
7b732a75 PZ |
1463 | perf_mmap_data_free(counter); |
1464 | mutex_unlock(&counter->mmap_mutex); | |
1465 | } | |
37d81828 PM |
1466 | } |
1467 | ||
1468 | static struct vm_operations_struct perf_mmap_vmops = { | |
ebb3c4c4 | 1469 | .open = perf_mmap_open, |
7b732a75 | 1470 | .close = perf_mmap_close, |
37d81828 PM |
1471 | .fault = perf_mmap_fault, |
1472 | }; | |
1473 | ||
1474 | static int perf_mmap(struct file *file, struct vm_area_struct *vma) | |
1475 | { | |
1476 | struct perf_counter *counter = file->private_data; | |
7b732a75 PZ |
1477 | unsigned long vma_size; |
1478 | unsigned long nr_pages; | |
1479 | unsigned long locked, lock_limit; | |
1480 | int ret = 0; | |
37d81828 PM |
1481 | |
1482 | if (!(vma->vm_flags & VM_SHARED) || (vma->vm_flags & VM_WRITE)) | |
1483 | return -EINVAL; | |
7b732a75 PZ |
1484 | |
1485 | vma_size = vma->vm_end - vma->vm_start; | |
1486 | nr_pages = (vma_size / PAGE_SIZE) - 1; | |
1487 | ||
7730d865 PZ |
1488 | /* |
1489 | * If we have data pages ensure they're a power-of-two number, so we | |
1490 | * can do bitmasks instead of modulo. | |
1491 | */ | |
1492 | if (nr_pages != 0 && !is_power_of_2(nr_pages)) | |
37d81828 PM |
1493 | return -EINVAL; |
1494 | ||
7b732a75 | 1495 | if (vma_size != PAGE_SIZE * (1 + nr_pages)) |
37d81828 PM |
1496 | return -EINVAL; |
1497 | ||
7b732a75 PZ |
1498 | if (vma->vm_pgoff != 0) |
1499 | return -EINVAL; | |
37d81828 | 1500 | |
ebb3c4c4 PZ |
1501 | mutex_lock(&counter->mmap_mutex); |
1502 | if (atomic_inc_not_zero(&counter->mmap_count)) { | |
1503 | if (nr_pages != counter->data->nr_pages) | |
1504 | ret = -EINVAL; | |
1505 | goto unlock; | |
1506 | } | |
1507 | ||
1508 | locked = vma->vm_mm->locked_vm; | |
1509 | locked += nr_pages + 1; | |
7b732a75 PZ |
1510 | |
1511 | lock_limit = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur; | |
1512 | lock_limit >>= PAGE_SHIFT; | |
1513 | ||
ebb3c4c4 PZ |
1514 | if ((locked > lock_limit) && !capable(CAP_IPC_LOCK)) { |
1515 | ret = -EPERM; | |
1516 | goto unlock; | |
1517 | } | |
7b732a75 PZ |
1518 | |
1519 | WARN_ON(counter->data); | |
1520 | ret = perf_mmap_data_alloc(counter, nr_pages); | |
ebb3c4c4 PZ |
1521 | if (ret) |
1522 | goto unlock; | |
1523 | ||
1524 | atomic_set(&counter->mmap_count, 1); | |
1525 | vma->vm_mm->locked_vm += nr_pages + 1; | |
1526 | unlock: | |
7b732a75 | 1527 | mutex_unlock(&counter->mmap_mutex); |
37d81828 PM |
1528 | |
1529 | vma->vm_flags &= ~VM_MAYWRITE; | |
1530 | vma->vm_flags |= VM_RESERVED; | |
1531 | vma->vm_ops = &perf_mmap_vmops; | |
7b732a75 PZ |
1532 | |
1533 | return ret; | |
37d81828 PM |
1534 | } |
1535 | ||
3c446b3d PZ |
1536 | static int perf_fasync(int fd, struct file *filp, int on) |
1537 | { | |
1538 | struct perf_counter *counter = filp->private_data; | |
1539 | struct inode *inode = filp->f_path.dentry->d_inode; | |
1540 | int retval; | |
1541 | ||
1542 | mutex_lock(&inode->i_mutex); | |
1543 | retval = fasync_helper(fd, filp, on, &counter->fasync); | |
1544 | mutex_unlock(&inode->i_mutex); | |
1545 | ||
1546 | if (retval < 0) | |
1547 | return retval; | |
1548 | ||
1549 | return 0; | |
1550 | } | |
1551 | ||
0793a61d TG |
1552 | static const struct file_operations perf_fops = { |
1553 | .release = perf_release, | |
1554 | .read = perf_read, | |
1555 | .poll = perf_poll, | |
d859e29f PM |
1556 | .unlocked_ioctl = perf_ioctl, |
1557 | .compat_ioctl = perf_ioctl, | |
37d81828 | 1558 | .mmap = perf_mmap, |
3c446b3d | 1559 | .fasync = perf_fasync, |
0793a61d TG |
1560 | }; |
1561 | ||
925d519a PZ |
1562 | /* |
1563 | * Perf counter wakeup | |
1564 | * | |
1565 | * If there's data, ensure we set the poll() state and publish everything | |
1566 | * to user-space before waking everybody up. | |
1567 | */ | |
1568 | ||
1569 | void perf_counter_wakeup(struct perf_counter *counter) | |
1570 | { | |
1571 | struct perf_mmap_data *data; | |
1572 | ||
1573 | rcu_read_lock(); | |
1574 | data = rcu_dereference(counter->data); | |
1575 | if (data) { | |
3c446b3d | 1576 | atomic_set(&data->wakeup, POLL_IN); |
38ff667b PZ |
1577 | /* |
1578 | * Ensure all data writes are issued before updating the | |
1579 | * user-space data head information. The matching rmb() | |
1580 | * will be in userspace after reading this value. | |
1581 | */ | |
1582 | smp_wmb(); | |
1583 | data->user_page->data_head = atomic_read(&data->head); | |
925d519a PZ |
1584 | } |
1585 | rcu_read_unlock(); | |
1586 | ||
1587 | wake_up_all(&counter->waitq); | |
4c9e2542 PZ |
1588 | |
1589 | if (counter->pending_kill) { | |
1590 | kill_fasync(&counter->fasync, SIGIO, counter->pending_kill); | |
1591 | counter->pending_kill = 0; | |
1592 | } | |
925d519a PZ |
1593 | } |
1594 | ||
1595 | /* | |
1596 | * Pending wakeups | |
1597 | * | |
1598 | * Handle the case where we need to wakeup up from NMI (or rq->lock) context. | |
1599 | * | |
1600 | * The NMI bit means we cannot possibly take locks. Therefore, maintain a | |
1601 | * single linked list and use cmpxchg() to add entries lockless. | |
1602 | */ | |
1603 | ||
79f14641 PZ |
1604 | static void perf_pending_counter(struct perf_pending_entry *entry) |
1605 | { | |
1606 | struct perf_counter *counter = container_of(entry, | |
1607 | struct perf_counter, pending); | |
1608 | ||
1609 | if (counter->pending_disable) { | |
1610 | counter->pending_disable = 0; | |
1611 | perf_counter_disable(counter); | |
1612 | } | |
1613 | ||
1614 | if (counter->pending_wakeup) { | |
1615 | counter->pending_wakeup = 0; | |
1616 | perf_counter_wakeup(counter); | |
1617 | } | |
1618 | } | |
1619 | ||
671dec5d | 1620 | #define PENDING_TAIL ((struct perf_pending_entry *)-1UL) |
925d519a | 1621 | |
671dec5d | 1622 | static DEFINE_PER_CPU(struct perf_pending_entry *, perf_pending_head) = { |
925d519a PZ |
1623 | PENDING_TAIL, |
1624 | }; | |
1625 | ||
671dec5d PZ |
1626 | static void perf_pending_queue(struct perf_pending_entry *entry, |
1627 | void (*func)(struct perf_pending_entry *)) | |
925d519a | 1628 | { |
671dec5d | 1629 | struct perf_pending_entry **head; |
925d519a | 1630 | |
671dec5d | 1631 | if (cmpxchg(&entry->next, NULL, PENDING_TAIL) != NULL) |
925d519a PZ |
1632 | return; |
1633 | ||
671dec5d PZ |
1634 | entry->func = func; |
1635 | ||
1636 | head = &get_cpu_var(perf_pending_head); | |
925d519a PZ |
1637 | |
1638 | do { | |
671dec5d PZ |
1639 | entry->next = *head; |
1640 | } while (cmpxchg(head, entry->next, entry) != entry->next); | |
925d519a PZ |
1641 | |
1642 | set_perf_counter_pending(); | |
1643 | ||
671dec5d | 1644 | put_cpu_var(perf_pending_head); |
925d519a PZ |
1645 | } |
1646 | ||
1647 | static int __perf_pending_run(void) | |
1648 | { | |
671dec5d | 1649 | struct perf_pending_entry *list; |
925d519a PZ |
1650 | int nr = 0; |
1651 | ||
671dec5d | 1652 | list = xchg(&__get_cpu_var(perf_pending_head), PENDING_TAIL); |
925d519a | 1653 | while (list != PENDING_TAIL) { |
671dec5d PZ |
1654 | void (*func)(struct perf_pending_entry *); |
1655 | struct perf_pending_entry *entry = list; | |
925d519a PZ |
1656 | |
1657 | list = list->next; | |
1658 | ||
671dec5d PZ |
1659 | func = entry->func; |
1660 | entry->next = NULL; | |
925d519a PZ |
1661 | /* |
1662 | * Ensure we observe the unqueue before we issue the wakeup, | |
1663 | * so that we won't be waiting forever. | |
1664 | * -- see perf_not_pending(). | |
1665 | */ | |
1666 | smp_wmb(); | |
1667 | ||
671dec5d | 1668 | func(entry); |
925d519a PZ |
1669 | nr++; |
1670 | } | |
1671 | ||
1672 | return nr; | |
1673 | } | |
1674 | ||
1675 | static inline int perf_not_pending(struct perf_counter *counter) | |
1676 | { | |
1677 | /* | |
1678 | * If we flush on whatever cpu we run, there is a chance we don't | |
1679 | * need to wait. | |
1680 | */ | |
1681 | get_cpu(); | |
1682 | __perf_pending_run(); | |
1683 | put_cpu(); | |
1684 | ||
1685 | /* | |
1686 | * Ensure we see the proper queue state before going to sleep | |
1687 | * so that we do not miss the wakeup. -- see perf_pending_handle() | |
1688 | */ | |
1689 | smp_rmb(); | |
671dec5d | 1690 | return counter->pending.next == NULL; |
925d519a PZ |
1691 | } |
1692 | ||
1693 | static void perf_pending_sync(struct perf_counter *counter) | |
1694 | { | |
1695 | wait_event(counter->waitq, perf_not_pending(counter)); | |
1696 | } | |
1697 | ||
1698 | void perf_counter_do_pending(void) | |
1699 | { | |
1700 | __perf_pending_run(); | |
1701 | } | |
1702 | ||
394ee076 PZ |
1703 | /* |
1704 | * Callchain support -- arch specific | |
1705 | */ | |
1706 | ||
9c03d88e | 1707 | __weak struct perf_callchain_entry *perf_callchain(struct pt_regs *regs) |
394ee076 PZ |
1708 | { |
1709 | return NULL; | |
1710 | } | |
1711 | ||
0322cd6e PZ |
1712 | /* |
1713 | * Output | |
1714 | */ | |
1715 | ||
b9cacc7b PZ |
1716 | struct perf_output_handle { |
1717 | struct perf_counter *counter; | |
1718 | struct perf_mmap_data *data; | |
1719 | unsigned int offset; | |
63e35b25 | 1720 | unsigned int head; |
b9cacc7b | 1721 | int wakeup; |
78d613eb | 1722 | int nmi; |
4c9e2542 | 1723 | int overflow; |
b9cacc7b PZ |
1724 | }; |
1725 | ||
78d613eb PZ |
1726 | static inline void __perf_output_wakeup(struct perf_output_handle *handle) |
1727 | { | |
671dec5d | 1728 | if (handle->nmi) { |
79f14641 | 1729 | handle->counter->pending_wakeup = 1; |
671dec5d | 1730 | perf_pending_queue(&handle->counter->pending, |
79f14641 | 1731 | perf_pending_counter); |
671dec5d | 1732 | } else |
78d613eb PZ |
1733 | perf_counter_wakeup(handle->counter); |
1734 | } | |
1735 | ||
b9cacc7b | 1736 | static int perf_output_begin(struct perf_output_handle *handle, |
78d613eb | 1737 | struct perf_counter *counter, unsigned int size, |
4c9e2542 | 1738 | int nmi, int overflow) |
0322cd6e | 1739 | { |
7b732a75 | 1740 | struct perf_mmap_data *data; |
b9cacc7b | 1741 | unsigned int offset, head; |
0322cd6e | 1742 | |
7b732a75 | 1743 | rcu_read_lock(); |
7b732a75 PZ |
1744 | data = rcu_dereference(counter->data); |
1745 | if (!data) | |
1746 | goto out; | |
1747 | ||
4c9e2542 PZ |
1748 | handle->counter = counter; |
1749 | handle->nmi = nmi; | |
1750 | handle->overflow = overflow; | |
78d613eb | 1751 | |
7b732a75 | 1752 | if (!data->nr_pages) |
78d613eb | 1753 | goto fail; |
7b732a75 | 1754 | |
7b732a75 PZ |
1755 | do { |
1756 | offset = head = atomic_read(&data->head); | |
c7138f37 | 1757 | head += size; |
7b732a75 PZ |
1758 | } while (atomic_cmpxchg(&data->head, offset, head) != offset); |
1759 | ||
b9cacc7b PZ |
1760 | handle->data = data; |
1761 | handle->offset = offset; | |
63e35b25 | 1762 | handle->head = head; |
b9cacc7b | 1763 | handle->wakeup = (offset >> PAGE_SHIFT) != (head >> PAGE_SHIFT); |
0322cd6e | 1764 | |
b9cacc7b | 1765 | return 0; |
7b732a75 | 1766 | |
78d613eb PZ |
1767 | fail: |
1768 | __perf_output_wakeup(handle); | |
b9cacc7b PZ |
1769 | out: |
1770 | rcu_read_unlock(); | |
7b732a75 | 1771 | |
b9cacc7b PZ |
1772 | return -ENOSPC; |
1773 | } | |
7b732a75 | 1774 | |
b9cacc7b PZ |
1775 | static void perf_output_copy(struct perf_output_handle *handle, |
1776 | void *buf, unsigned int len) | |
1777 | { | |
1778 | unsigned int pages_mask; | |
1779 | unsigned int offset; | |
1780 | unsigned int size; | |
1781 | void **pages; | |
1782 | ||
1783 | offset = handle->offset; | |
1784 | pages_mask = handle->data->nr_pages - 1; | |
1785 | pages = handle->data->data_pages; | |
1786 | ||
1787 | do { | |
1788 | unsigned int page_offset; | |
1789 | int nr; | |
1790 | ||
1791 | nr = (offset >> PAGE_SHIFT) & pages_mask; | |
1792 | page_offset = offset & (PAGE_SIZE - 1); | |
1793 | size = min_t(unsigned int, PAGE_SIZE - page_offset, len); | |
1794 | ||
1795 | memcpy(pages[nr] + page_offset, buf, size); | |
1796 | ||
1797 | len -= size; | |
1798 | buf += size; | |
1799 | offset += size; | |
1800 | } while (len); | |
1801 | ||
1802 | handle->offset = offset; | |
63e35b25 PZ |
1803 | |
1804 | WARN_ON_ONCE(handle->offset > handle->head); | |
b9cacc7b PZ |
1805 | } |
1806 | ||
5c148194 PZ |
1807 | #define perf_output_put(handle, x) \ |
1808 | perf_output_copy((handle), &(x), sizeof(x)) | |
1809 | ||
78d613eb | 1810 | static void perf_output_end(struct perf_output_handle *handle) |
b9cacc7b | 1811 | { |
c457810a PZ |
1812 | int wakeup_events = handle->counter->hw_event.wakeup_events; |
1813 | ||
4c9e2542 | 1814 | if (handle->overflow && wakeup_events) { |
c457810a PZ |
1815 | int events = atomic_inc_return(&handle->data->events); |
1816 | if (events >= wakeup_events) { | |
1817 | atomic_sub(wakeup_events, &handle->data->events); | |
1818 | __perf_output_wakeup(handle); | |
1819 | } | |
1820 | } else if (handle->wakeup) | |
78d613eb | 1821 | __perf_output_wakeup(handle); |
7b732a75 | 1822 | rcu_read_unlock(); |
b9cacc7b PZ |
1823 | } |
1824 | ||
f6c7d5fe | 1825 | static void perf_counter_output(struct perf_counter *counter, |
78f13e95 | 1826 | int nmi, struct pt_regs *regs, u64 addr) |
7b732a75 | 1827 | { |
5ed00415 | 1828 | int ret; |
8a057d84 | 1829 | u64 record_type = counter->hw_event.record_type; |
5ed00415 PZ |
1830 | struct perf_output_handle handle; |
1831 | struct perf_event_header header; | |
1832 | u64 ip; | |
5c148194 | 1833 | struct { |
ea5d20cf | 1834 | u32 pid, tid; |
5ed00415 | 1835 | } tid_entry; |
8a057d84 PZ |
1836 | struct { |
1837 | u64 event; | |
1838 | u64 counter; | |
1839 | } group_entry; | |
394ee076 PZ |
1840 | struct perf_callchain_entry *callchain = NULL; |
1841 | int callchain_size = 0; | |
339f7c90 | 1842 | u64 time; |
7b732a75 | 1843 | |
6b6e5486 | 1844 | header.type = 0; |
5ed00415 | 1845 | header.size = sizeof(header); |
7b732a75 | 1846 | |
6b6e5486 PZ |
1847 | header.misc = PERF_EVENT_MISC_OVERFLOW; |
1848 | header.misc |= user_mode(regs) ? | |
6fab0192 PZ |
1849 | PERF_EVENT_MISC_USER : PERF_EVENT_MISC_KERNEL; |
1850 | ||
8a057d84 PZ |
1851 | if (record_type & PERF_RECORD_IP) { |
1852 | ip = instruction_pointer(regs); | |
6b6e5486 | 1853 | header.type |= PERF_RECORD_IP; |
8a057d84 PZ |
1854 | header.size += sizeof(ip); |
1855 | } | |
ea5d20cf | 1856 | |
8a057d84 | 1857 | if (record_type & PERF_RECORD_TID) { |
ea5d20cf | 1858 | /* namespace issues */ |
5ed00415 PZ |
1859 | tid_entry.pid = current->group_leader->pid; |
1860 | tid_entry.tid = current->pid; | |
1861 | ||
6b6e5486 | 1862 | header.type |= PERF_RECORD_TID; |
5ed00415 PZ |
1863 | header.size += sizeof(tid_entry); |
1864 | } | |
1865 | ||
4d855457 PZ |
1866 | if (record_type & PERF_RECORD_TIME) { |
1867 | /* | |
1868 | * Maybe do better on x86 and provide cpu_clock_nmi() | |
1869 | */ | |
1870 | time = sched_clock(); | |
1871 | ||
1872 | header.type |= PERF_RECORD_TIME; | |
1873 | header.size += sizeof(u64); | |
1874 | } | |
1875 | ||
78f13e95 PZ |
1876 | if (record_type & PERF_RECORD_ADDR) { |
1877 | header.type |= PERF_RECORD_ADDR; | |
1878 | header.size += sizeof(u64); | |
1879 | } | |
1880 | ||
8a057d84 | 1881 | if (record_type & PERF_RECORD_GROUP) { |
6b6e5486 | 1882 | header.type |= PERF_RECORD_GROUP; |
8a057d84 PZ |
1883 | header.size += sizeof(u64) + |
1884 | counter->nr_siblings * sizeof(group_entry); | |
1885 | } | |
1886 | ||
1887 | if (record_type & PERF_RECORD_CALLCHAIN) { | |
394ee076 PZ |
1888 | callchain = perf_callchain(regs); |
1889 | ||
1890 | if (callchain) { | |
9c03d88e | 1891 | callchain_size = (1 + callchain->nr) * sizeof(u64); |
394ee076 | 1892 | |
6b6e5486 | 1893 | header.type |= PERF_RECORD_CALLCHAIN; |
394ee076 PZ |
1894 | header.size += callchain_size; |
1895 | } | |
1896 | } | |
1897 | ||
4c9e2542 | 1898 | ret = perf_output_begin(&handle, counter, header.size, nmi, 1); |
5ed00415 PZ |
1899 | if (ret) |
1900 | return; | |
ea5d20cf | 1901 | |
5ed00415 | 1902 | perf_output_put(&handle, header); |
5c148194 | 1903 | |
8a057d84 PZ |
1904 | if (record_type & PERF_RECORD_IP) |
1905 | perf_output_put(&handle, ip); | |
5c148194 | 1906 | |
8a057d84 PZ |
1907 | if (record_type & PERF_RECORD_TID) |
1908 | perf_output_put(&handle, tid_entry); | |
5c148194 | 1909 | |
4d855457 PZ |
1910 | if (record_type & PERF_RECORD_TIME) |
1911 | perf_output_put(&handle, time); | |
1912 | ||
78f13e95 PZ |
1913 | if (record_type & PERF_RECORD_ADDR) |
1914 | perf_output_put(&handle, addr); | |
1915 | ||
8a057d84 PZ |
1916 | if (record_type & PERF_RECORD_GROUP) { |
1917 | struct perf_counter *leader, *sub; | |
1918 | u64 nr = counter->nr_siblings; | |
5c148194 | 1919 | |
8a057d84 | 1920 | perf_output_put(&handle, nr); |
0322cd6e | 1921 | |
8a057d84 PZ |
1922 | leader = counter->group_leader; |
1923 | list_for_each_entry(sub, &leader->sibling_list, list_entry) { | |
1924 | if (sub != counter) | |
1925 | sub->hw_ops->read(sub); | |
7b732a75 | 1926 | |
8a057d84 PZ |
1927 | group_entry.event = sub->hw_event.config; |
1928 | group_entry.counter = atomic64_read(&sub->count); | |
7b732a75 | 1929 | |
8a057d84 PZ |
1930 | perf_output_put(&handle, group_entry); |
1931 | } | |
0322cd6e | 1932 | } |
5c148194 | 1933 | |
8a057d84 PZ |
1934 | if (callchain) |
1935 | perf_output_copy(&handle, callchain, callchain_size); | |
0322cd6e | 1936 | |
8a057d84 | 1937 | perf_output_end(&handle); |
0322cd6e PZ |
1938 | } |
1939 | ||
8d1b2d93 PZ |
1940 | /* |
1941 | * comm tracking | |
1942 | */ | |
1943 | ||
1944 | struct perf_comm_event { | |
1945 | struct task_struct *task; | |
1946 | char *comm; | |
1947 | int comm_size; | |
1948 | ||
1949 | struct { | |
1950 | struct perf_event_header header; | |
1951 | ||
1952 | u32 pid; | |
1953 | u32 tid; | |
1954 | } event; | |
1955 | }; | |
1956 | ||
1957 | static void perf_counter_comm_output(struct perf_counter *counter, | |
1958 | struct perf_comm_event *comm_event) | |
1959 | { | |
1960 | struct perf_output_handle handle; | |
1961 | int size = comm_event->event.header.size; | |
1962 | int ret = perf_output_begin(&handle, counter, size, 0, 0); | |
1963 | ||
1964 | if (ret) | |
1965 | return; | |
1966 | ||
1967 | perf_output_put(&handle, comm_event->event); | |
1968 | perf_output_copy(&handle, comm_event->comm, | |
1969 | comm_event->comm_size); | |
1970 | perf_output_end(&handle); | |
1971 | } | |
1972 | ||
1973 | static int perf_counter_comm_match(struct perf_counter *counter, | |
1974 | struct perf_comm_event *comm_event) | |
1975 | { | |
1976 | if (counter->hw_event.comm && | |
1977 | comm_event->event.header.type == PERF_EVENT_COMM) | |
1978 | return 1; | |
1979 | ||
1980 | return 0; | |
1981 | } | |
1982 | ||
1983 | static void perf_counter_comm_ctx(struct perf_counter_context *ctx, | |
1984 | struct perf_comm_event *comm_event) | |
1985 | { | |
1986 | struct perf_counter *counter; | |
1987 | ||
1988 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) | |
1989 | return; | |
1990 | ||
1991 | rcu_read_lock(); | |
1992 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
1993 | if (perf_counter_comm_match(counter, comm_event)) | |
1994 | perf_counter_comm_output(counter, comm_event); | |
1995 | } | |
1996 | rcu_read_unlock(); | |
1997 | } | |
1998 | ||
1999 | static void perf_counter_comm_event(struct perf_comm_event *comm_event) | |
2000 | { | |
2001 | struct perf_cpu_context *cpuctx; | |
2002 | unsigned int size; | |
2003 | char *comm = comm_event->task->comm; | |
2004 | ||
888fcee0 | 2005 | size = ALIGN(strlen(comm)+1, sizeof(u64)); |
8d1b2d93 PZ |
2006 | |
2007 | comm_event->comm = comm; | |
2008 | comm_event->comm_size = size; | |
2009 | ||
2010 | comm_event->event.header.size = sizeof(comm_event->event) + size; | |
2011 | ||
2012 | cpuctx = &get_cpu_var(perf_cpu_context); | |
2013 | perf_counter_comm_ctx(&cpuctx->ctx, comm_event); | |
2014 | put_cpu_var(perf_cpu_context); | |
2015 | ||
2016 | perf_counter_comm_ctx(¤t->perf_counter_ctx, comm_event); | |
2017 | } | |
2018 | ||
2019 | void perf_counter_comm(struct task_struct *task) | |
2020 | { | |
9ee318a7 PZ |
2021 | struct perf_comm_event comm_event; |
2022 | ||
2023 | if (!atomic_read(&nr_comm_tracking)) | |
2024 | return; | |
2025 | ||
2026 | comm_event = (struct perf_comm_event){ | |
8d1b2d93 PZ |
2027 | .task = task, |
2028 | .event = { | |
2029 | .header = { .type = PERF_EVENT_COMM, }, | |
2030 | .pid = task->group_leader->pid, | |
2031 | .tid = task->pid, | |
2032 | }, | |
2033 | }; | |
2034 | ||
2035 | perf_counter_comm_event(&comm_event); | |
2036 | } | |
2037 | ||
0a4a9391 PZ |
2038 | /* |
2039 | * mmap tracking | |
2040 | */ | |
2041 | ||
2042 | struct perf_mmap_event { | |
2043 | struct file *file; | |
2044 | char *file_name; | |
2045 | int file_size; | |
2046 | ||
2047 | struct { | |
2048 | struct perf_event_header header; | |
2049 | ||
2050 | u32 pid; | |
2051 | u32 tid; | |
2052 | u64 start; | |
2053 | u64 len; | |
2054 | u64 pgoff; | |
2055 | } event; | |
2056 | }; | |
2057 | ||
2058 | static void perf_counter_mmap_output(struct perf_counter *counter, | |
2059 | struct perf_mmap_event *mmap_event) | |
2060 | { | |
2061 | struct perf_output_handle handle; | |
2062 | int size = mmap_event->event.header.size; | |
4c9e2542 | 2063 | int ret = perf_output_begin(&handle, counter, size, 0, 0); |
0a4a9391 PZ |
2064 | |
2065 | if (ret) | |
2066 | return; | |
2067 | ||
2068 | perf_output_put(&handle, mmap_event->event); | |
2069 | perf_output_copy(&handle, mmap_event->file_name, | |
2070 | mmap_event->file_size); | |
78d613eb | 2071 | perf_output_end(&handle); |
0a4a9391 PZ |
2072 | } |
2073 | ||
2074 | static int perf_counter_mmap_match(struct perf_counter *counter, | |
2075 | struct perf_mmap_event *mmap_event) | |
2076 | { | |
2077 | if (counter->hw_event.mmap && | |
2078 | mmap_event->event.header.type == PERF_EVENT_MMAP) | |
2079 | return 1; | |
2080 | ||
2081 | if (counter->hw_event.munmap && | |
2082 | mmap_event->event.header.type == PERF_EVENT_MUNMAP) | |
2083 | return 1; | |
2084 | ||
2085 | return 0; | |
2086 | } | |
2087 | ||
2088 | static void perf_counter_mmap_ctx(struct perf_counter_context *ctx, | |
2089 | struct perf_mmap_event *mmap_event) | |
2090 | { | |
2091 | struct perf_counter *counter; | |
2092 | ||
2093 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) | |
2094 | return; | |
2095 | ||
2096 | rcu_read_lock(); | |
2097 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
2098 | if (perf_counter_mmap_match(counter, mmap_event)) | |
2099 | perf_counter_mmap_output(counter, mmap_event); | |
2100 | } | |
2101 | rcu_read_unlock(); | |
2102 | } | |
2103 | ||
2104 | static void perf_counter_mmap_event(struct perf_mmap_event *mmap_event) | |
2105 | { | |
2106 | struct perf_cpu_context *cpuctx; | |
2107 | struct file *file = mmap_event->file; | |
2108 | unsigned int size; | |
2109 | char tmp[16]; | |
2110 | char *buf = NULL; | |
2111 | char *name; | |
2112 | ||
2113 | if (file) { | |
2114 | buf = kzalloc(PATH_MAX, GFP_KERNEL); | |
2115 | if (!buf) { | |
2116 | name = strncpy(tmp, "//enomem", sizeof(tmp)); | |
2117 | goto got_name; | |
2118 | } | |
2119 | name = dentry_path(file->f_dentry, buf, PATH_MAX); | |
2120 | if (IS_ERR(name)) { | |
2121 | name = strncpy(tmp, "//toolong", sizeof(tmp)); | |
2122 | goto got_name; | |
2123 | } | |
2124 | } else { | |
2125 | name = strncpy(tmp, "//anon", sizeof(tmp)); | |
2126 | goto got_name; | |
2127 | } | |
2128 | ||
2129 | got_name: | |
888fcee0 | 2130 | size = ALIGN(strlen(name)+1, sizeof(u64)); |
0a4a9391 PZ |
2131 | |
2132 | mmap_event->file_name = name; | |
2133 | mmap_event->file_size = size; | |
2134 | ||
2135 | mmap_event->event.header.size = sizeof(mmap_event->event) + size; | |
2136 | ||
2137 | cpuctx = &get_cpu_var(perf_cpu_context); | |
2138 | perf_counter_mmap_ctx(&cpuctx->ctx, mmap_event); | |
2139 | put_cpu_var(perf_cpu_context); | |
2140 | ||
2141 | perf_counter_mmap_ctx(¤t->perf_counter_ctx, mmap_event); | |
2142 | ||
2143 | kfree(buf); | |
2144 | } | |
2145 | ||
2146 | void perf_counter_mmap(unsigned long addr, unsigned long len, | |
2147 | unsigned long pgoff, struct file *file) | |
2148 | { | |
9ee318a7 PZ |
2149 | struct perf_mmap_event mmap_event; |
2150 | ||
2151 | if (!atomic_read(&nr_mmap_tracking)) | |
2152 | return; | |
2153 | ||
2154 | mmap_event = (struct perf_mmap_event){ | |
0a4a9391 PZ |
2155 | .file = file, |
2156 | .event = { | |
2157 | .header = { .type = PERF_EVENT_MMAP, }, | |
2158 | .pid = current->group_leader->pid, | |
2159 | .tid = current->pid, | |
2160 | .start = addr, | |
2161 | .len = len, | |
2162 | .pgoff = pgoff, | |
2163 | }, | |
2164 | }; | |
2165 | ||
2166 | perf_counter_mmap_event(&mmap_event); | |
2167 | } | |
2168 | ||
2169 | void perf_counter_munmap(unsigned long addr, unsigned long len, | |
2170 | unsigned long pgoff, struct file *file) | |
2171 | { | |
9ee318a7 PZ |
2172 | struct perf_mmap_event mmap_event; |
2173 | ||
2174 | if (!atomic_read(&nr_munmap_tracking)) | |
2175 | return; | |
2176 | ||
2177 | mmap_event = (struct perf_mmap_event){ | |
0a4a9391 PZ |
2178 | .file = file, |
2179 | .event = { | |
2180 | .header = { .type = PERF_EVENT_MUNMAP, }, | |
2181 | .pid = current->group_leader->pid, | |
2182 | .tid = current->pid, | |
2183 | .start = addr, | |
2184 | .len = len, | |
2185 | .pgoff = pgoff, | |
2186 | }, | |
2187 | }; | |
2188 | ||
2189 | perf_counter_mmap_event(&mmap_event); | |
2190 | } | |
2191 | ||
f6c7d5fe PZ |
2192 | /* |
2193 | * Generic counter overflow handling. | |
2194 | */ | |
2195 | ||
2196 | int perf_counter_overflow(struct perf_counter *counter, | |
78f13e95 | 2197 | int nmi, struct pt_regs *regs, u64 addr) |
f6c7d5fe | 2198 | { |
79f14641 PZ |
2199 | int events = atomic_read(&counter->event_limit); |
2200 | int ret = 0; | |
2201 | ||
4c9e2542 | 2202 | counter->pending_kill = POLL_IN; |
79f14641 PZ |
2203 | if (events && atomic_dec_and_test(&counter->event_limit)) { |
2204 | ret = 1; | |
4c9e2542 | 2205 | counter->pending_kill = POLL_HUP; |
79f14641 PZ |
2206 | if (nmi) { |
2207 | counter->pending_disable = 1; | |
2208 | perf_pending_queue(&counter->pending, | |
2209 | perf_pending_counter); | |
2210 | } else | |
2211 | perf_counter_disable(counter); | |
2212 | } | |
2213 | ||
78f13e95 | 2214 | perf_counter_output(counter, nmi, regs, addr); |
79f14641 | 2215 | return ret; |
f6c7d5fe PZ |
2216 | } |
2217 | ||
15dbf27c PZ |
2218 | /* |
2219 | * Generic software counter infrastructure | |
2220 | */ | |
2221 | ||
2222 | static void perf_swcounter_update(struct perf_counter *counter) | |
2223 | { | |
2224 | struct hw_perf_counter *hwc = &counter->hw; | |
2225 | u64 prev, now; | |
2226 | s64 delta; | |
2227 | ||
2228 | again: | |
2229 | prev = atomic64_read(&hwc->prev_count); | |
2230 | now = atomic64_read(&hwc->count); | |
2231 | if (atomic64_cmpxchg(&hwc->prev_count, prev, now) != prev) | |
2232 | goto again; | |
2233 | ||
2234 | delta = now - prev; | |
2235 | ||
2236 | atomic64_add(delta, &counter->count); | |
2237 | atomic64_sub(delta, &hwc->period_left); | |
2238 | } | |
2239 | ||
2240 | static void perf_swcounter_set_period(struct perf_counter *counter) | |
2241 | { | |
2242 | struct hw_perf_counter *hwc = &counter->hw; | |
2243 | s64 left = atomic64_read(&hwc->period_left); | |
2244 | s64 period = hwc->irq_period; | |
2245 | ||
2246 | if (unlikely(left <= -period)) { | |
2247 | left = period; | |
2248 | atomic64_set(&hwc->period_left, left); | |
2249 | } | |
2250 | ||
2251 | if (unlikely(left <= 0)) { | |
2252 | left += period; | |
2253 | atomic64_add(period, &hwc->period_left); | |
2254 | } | |
2255 | ||
2256 | atomic64_set(&hwc->prev_count, -left); | |
2257 | atomic64_set(&hwc->count, -left); | |
2258 | } | |
2259 | ||
d6d020e9 PZ |
2260 | static enum hrtimer_restart perf_swcounter_hrtimer(struct hrtimer *hrtimer) |
2261 | { | |
f6c7d5fe | 2262 | enum hrtimer_restart ret = HRTIMER_RESTART; |
d6d020e9 PZ |
2263 | struct perf_counter *counter; |
2264 | struct pt_regs *regs; | |
2265 | ||
2266 | counter = container_of(hrtimer, struct perf_counter, hw.hrtimer); | |
2267 | counter->hw_ops->read(counter); | |
2268 | ||
2269 | regs = get_irq_regs(); | |
2270 | /* | |
2271 | * In case we exclude kernel IPs or are somehow not in interrupt | |
2272 | * context, provide the next best thing, the user IP. | |
2273 | */ | |
2274 | if ((counter->hw_event.exclude_kernel || !regs) && | |
2275 | !counter->hw_event.exclude_user) | |
2276 | regs = task_pt_regs(current); | |
2277 | ||
f6c7d5fe | 2278 | if (regs) { |
78f13e95 | 2279 | if (perf_counter_overflow(counter, 0, regs, 0)) |
f6c7d5fe PZ |
2280 | ret = HRTIMER_NORESTART; |
2281 | } | |
d6d020e9 PZ |
2282 | |
2283 | hrtimer_forward_now(hrtimer, ns_to_ktime(counter->hw.irq_period)); | |
2284 | ||
f6c7d5fe | 2285 | return ret; |
d6d020e9 PZ |
2286 | } |
2287 | ||
2288 | static void perf_swcounter_overflow(struct perf_counter *counter, | |
78f13e95 | 2289 | int nmi, struct pt_regs *regs, u64 addr) |
d6d020e9 | 2290 | { |
b8e83514 PZ |
2291 | perf_swcounter_update(counter); |
2292 | perf_swcounter_set_period(counter); | |
78f13e95 | 2293 | if (perf_counter_overflow(counter, nmi, regs, addr)) |
f6c7d5fe PZ |
2294 | /* soft-disable the counter */ |
2295 | ; | |
2296 | ||
d6d020e9 PZ |
2297 | } |
2298 | ||
15dbf27c | 2299 | static int perf_swcounter_match(struct perf_counter *counter, |
b8e83514 PZ |
2300 | enum perf_event_types type, |
2301 | u32 event, struct pt_regs *regs) | |
15dbf27c PZ |
2302 | { |
2303 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
2304 | return 0; | |
2305 | ||
f4a2deb4 | 2306 | if (perf_event_raw(&counter->hw_event)) |
b8e83514 PZ |
2307 | return 0; |
2308 | ||
f4a2deb4 | 2309 | if (perf_event_type(&counter->hw_event) != type) |
15dbf27c PZ |
2310 | return 0; |
2311 | ||
f4a2deb4 | 2312 | if (perf_event_id(&counter->hw_event) != event) |
15dbf27c PZ |
2313 | return 0; |
2314 | ||
2315 | if (counter->hw_event.exclude_user && user_mode(regs)) | |
2316 | return 0; | |
2317 | ||
2318 | if (counter->hw_event.exclude_kernel && !user_mode(regs)) | |
2319 | return 0; | |
2320 | ||
2321 | return 1; | |
2322 | } | |
2323 | ||
d6d020e9 | 2324 | static void perf_swcounter_add(struct perf_counter *counter, u64 nr, |
78f13e95 | 2325 | int nmi, struct pt_regs *regs, u64 addr) |
d6d020e9 PZ |
2326 | { |
2327 | int neg = atomic64_add_negative(nr, &counter->hw.count); | |
2328 | if (counter->hw.irq_period && !neg) | |
78f13e95 | 2329 | perf_swcounter_overflow(counter, nmi, regs, addr); |
d6d020e9 PZ |
2330 | } |
2331 | ||
15dbf27c | 2332 | static void perf_swcounter_ctx_event(struct perf_counter_context *ctx, |
b8e83514 | 2333 | enum perf_event_types type, u32 event, |
78f13e95 PZ |
2334 | u64 nr, int nmi, struct pt_regs *regs, |
2335 | u64 addr) | |
15dbf27c PZ |
2336 | { |
2337 | struct perf_counter *counter; | |
15dbf27c | 2338 | |
01ef09d9 | 2339 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) |
15dbf27c PZ |
2340 | return; |
2341 | ||
592903cd PZ |
2342 | rcu_read_lock(); |
2343 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
b8e83514 | 2344 | if (perf_swcounter_match(counter, type, event, regs)) |
78f13e95 | 2345 | perf_swcounter_add(counter, nr, nmi, regs, addr); |
15dbf27c | 2346 | } |
592903cd | 2347 | rcu_read_unlock(); |
15dbf27c PZ |
2348 | } |
2349 | ||
96f6d444 PZ |
2350 | static int *perf_swcounter_recursion_context(struct perf_cpu_context *cpuctx) |
2351 | { | |
2352 | if (in_nmi()) | |
2353 | return &cpuctx->recursion[3]; | |
2354 | ||
2355 | if (in_irq()) | |
2356 | return &cpuctx->recursion[2]; | |
2357 | ||
2358 | if (in_softirq()) | |
2359 | return &cpuctx->recursion[1]; | |
2360 | ||
2361 | return &cpuctx->recursion[0]; | |
2362 | } | |
2363 | ||
b8e83514 | 2364 | static void __perf_swcounter_event(enum perf_event_types type, u32 event, |
78f13e95 PZ |
2365 | u64 nr, int nmi, struct pt_regs *regs, |
2366 | u64 addr) | |
15dbf27c PZ |
2367 | { |
2368 | struct perf_cpu_context *cpuctx = &get_cpu_var(perf_cpu_context); | |
96f6d444 PZ |
2369 | int *recursion = perf_swcounter_recursion_context(cpuctx); |
2370 | ||
2371 | if (*recursion) | |
2372 | goto out; | |
2373 | ||
2374 | (*recursion)++; | |
2375 | barrier(); | |
15dbf27c | 2376 | |
78f13e95 PZ |
2377 | perf_swcounter_ctx_event(&cpuctx->ctx, type, event, |
2378 | nr, nmi, regs, addr); | |
b8e83514 PZ |
2379 | if (cpuctx->task_ctx) { |
2380 | perf_swcounter_ctx_event(cpuctx->task_ctx, type, event, | |
78f13e95 | 2381 | nr, nmi, regs, addr); |
b8e83514 | 2382 | } |
15dbf27c | 2383 | |
96f6d444 PZ |
2384 | barrier(); |
2385 | (*recursion)--; | |
2386 | ||
2387 | out: | |
15dbf27c PZ |
2388 | put_cpu_var(perf_cpu_context); |
2389 | } | |
2390 | ||
78f13e95 PZ |
2391 | void |
2392 | perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs, u64 addr) | |
b8e83514 | 2393 | { |
78f13e95 | 2394 | __perf_swcounter_event(PERF_TYPE_SOFTWARE, event, nr, nmi, regs, addr); |
b8e83514 PZ |
2395 | } |
2396 | ||
15dbf27c PZ |
2397 | static void perf_swcounter_read(struct perf_counter *counter) |
2398 | { | |
2399 | perf_swcounter_update(counter); | |
2400 | } | |
2401 | ||
2402 | static int perf_swcounter_enable(struct perf_counter *counter) | |
2403 | { | |
2404 | perf_swcounter_set_period(counter); | |
2405 | return 0; | |
2406 | } | |
2407 | ||
2408 | static void perf_swcounter_disable(struct perf_counter *counter) | |
2409 | { | |
2410 | perf_swcounter_update(counter); | |
2411 | } | |
2412 | ||
ac17dc8e PZ |
2413 | static const struct hw_perf_counter_ops perf_ops_generic = { |
2414 | .enable = perf_swcounter_enable, | |
2415 | .disable = perf_swcounter_disable, | |
2416 | .read = perf_swcounter_read, | |
2417 | }; | |
2418 | ||
15dbf27c PZ |
2419 | /* |
2420 | * Software counter: cpu wall time clock | |
2421 | */ | |
2422 | ||
9abf8a08 PM |
2423 | static void cpu_clock_perf_counter_update(struct perf_counter *counter) |
2424 | { | |
2425 | int cpu = raw_smp_processor_id(); | |
2426 | s64 prev; | |
2427 | u64 now; | |
2428 | ||
2429 | now = cpu_clock(cpu); | |
2430 | prev = atomic64_read(&counter->hw.prev_count); | |
2431 | atomic64_set(&counter->hw.prev_count, now); | |
2432 | atomic64_add(now - prev, &counter->count); | |
2433 | } | |
2434 | ||
d6d020e9 PZ |
2435 | static int cpu_clock_perf_counter_enable(struct perf_counter *counter) |
2436 | { | |
2437 | struct hw_perf_counter *hwc = &counter->hw; | |
2438 | int cpu = raw_smp_processor_id(); | |
2439 | ||
2440 | atomic64_set(&hwc->prev_count, cpu_clock(cpu)); | |
039fc91e PZ |
2441 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
2442 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 2443 | if (hwc->irq_period) { |
d6d020e9 PZ |
2444 | __hrtimer_start_range_ns(&hwc->hrtimer, |
2445 | ns_to_ktime(hwc->irq_period), 0, | |
2446 | HRTIMER_MODE_REL, 0); | |
2447 | } | |
2448 | ||
2449 | return 0; | |
2450 | } | |
2451 | ||
5c92d124 IM |
2452 | static void cpu_clock_perf_counter_disable(struct perf_counter *counter) |
2453 | { | |
d6d020e9 | 2454 | hrtimer_cancel(&counter->hw.hrtimer); |
9abf8a08 | 2455 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
2456 | } |
2457 | ||
2458 | static void cpu_clock_perf_counter_read(struct perf_counter *counter) | |
2459 | { | |
9abf8a08 | 2460 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
2461 | } |
2462 | ||
2463 | static const struct hw_perf_counter_ops perf_ops_cpu_clock = { | |
7671581f IM |
2464 | .enable = cpu_clock_perf_counter_enable, |
2465 | .disable = cpu_clock_perf_counter_disable, | |
2466 | .read = cpu_clock_perf_counter_read, | |
5c92d124 IM |
2467 | }; |
2468 | ||
15dbf27c PZ |
2469 | /* |
2470 | * Software counter: task time clock | |
2471 | */ | |
2472 | ||
e30e08f6 | 2473 | static void task_clock_perf_counter_update(struct perf_counter *counter, u64 now) |
aa9c4c0f | 2474 | { |
e30e08f6 | 2475 | u64 prev; |
8cb391e8 IM |
2476 | s64 delta; |
2477 | ||
a39d6f25 | 2478 | prev = atomic64_xchg(&counter->hw.prev_count, now); |
8cb391e8 | 2479 | delta = now - prev; |
8cb391e8 | 2480 | atomic64_add(delta, &counter->count); |
bae43c99 IM |
2481 | } |
2482 | ||
95cdd2e7 | 2483 | static int task_clock_perf_counter_enable(struct perf_counter *counter) |
8cb391e8 | 2484 | { |
d6d020e9 | 2485 | struct hw_perf_counter *hwc = &counter->hw; |
a39d6f25 PZ |
2486 | u64 now; |
2487 | ||
a39d6f25 | 2488 | now = counter->ctx->time; |
d6d020e9 | 2489 | |
a39d6f25 | 2490 | atomic64_set(&hwc->prev_count, now); |
039fc91e PZ |
2491 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
2492 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 2493 | if (hwc->irq_period) { |
d6d020e9 PZ |
2494 | __hrtimer_start_range_ns(&hwc->hrtimer, |
2495 | ns_to_ktime(hwc->irq_period), 0, | |
2496 | HRTIMER_MODE_REL, 0); | |
2497 | } | |
95cdd2e7 IM |
2498 | |
2499 | return 0; | |
8cb391e8 IM |
2500 | } |
2501 | ||
2502 | static void task_clock_perf_counter_disable(struct perf_counter *counter) | |
bae43c99 | 2503 | { |
d6d020e9 | 2504 | hrtimer_cancel(&counter->hw.hrtimer); |
e30e08f6 PZ |
2505 | task_clock_perf_counter_update(counter, counter->ctx->time); |
2506 | ||
d6d020e9 | 2507 | } |
aa9c4c0f | 2508 | |
d6d020e9 PZ |
2509 | static void task_clock_perf_counter_read(struct perf_counter *counter) |
2510 | { | |
e30e08f6 PZ |
2511 | u64 time; |
2512 | ||
2513 | if (!in_nmi()) { | |
2514 | update_context_time(counter->ctx); | |
2515 | time = counter->ctx->time; | |
2516 | } else { | |
2517 | u64 now = perf_clock(); | |
2518 | u64 delta = now - counter->ctx->timestamp; | |
2519 | time = counter->ctx->time + delta; | |
2520 | } | |
2521 | ||
2522 | task_clock_perf_counter_update(counter, time); | |
bae43c99 IM |
2523 | } |
2524 | ||
2525 | static const struct hw_perf_counter_ops perf_ops_task_clock = { | |
7671581f IM |
2526 | .enable = task_clock_perf_counter_enable, |
2527 | .disable = task_clock_perf_counter_disable, | |
2528 | .read = task_clock_perf_counter_read, | |
bae43c99 IM |
2529 | }; |
2530 | ||
15dbf27c PZ |
2531 | /* |
2532 | * Software counter: cpu migrations | |
2533 | */ | |
2534 | ||
23a185ca | 2535 | static inline u64 get_cpu_migrations(struct perf_counter *counter) |
6c594c21 | 2536 | { |
23a185ca PM |
2537 | struct task_struct *curr = counter->ctx->task; |
2538 | ||
2539 | if (curr) | |
2540 | return curr->se.nr_migrations; | |
2541 | return cpu_nr_migrations(smp_processor_id()); | |
6c594c21 IM |
2542 | } |
2543 | ||
2544 | static void cpu_migrations_perf_counter_update(struct perf_counter *counter) | |
2545 | { | |
2546 | u64 prev, now; | |
2547 | s64 delta; | |
2548 | ||
2549 | prev = atomic64_read(&counter->hw.prev_count); | |
23a185ca | 2550 | now = get_cpu_migrations(counter); |
6c594c21 IM |
2551 | |
2552 | atomic64_set(&counter->hw.prev_count, now); | |
2553 | ||
2554 | delta = now - prev; | |
6c594c21 IM |
2555 | |
2556 | atomic64_add(delta, &counter->count); | |
2557 | } | |
2558 | ||
2559 | static void cpu_migrations_perf_counter_read(struct perf_counter *counter) | |
2560 | { | |
2561 | cpu_migrations_perf_counter_update(counter); | |
2562 | } | |
2563 | ||
95cdd2e7 | 2564 | static int cpu_migrations_perf_counter_enable(struct perf_counter *counter) |
6c594c21 | 2565 | { |
c07c99b6 PM |
2566 | if (counter->prev_state <= PERF_COUNTER_STATE_OFF) |
2567 | atomic64_set(&counter->hw.prev_count, | |
2568 | get_cpu_migrations(counter)); | |
95cdd2e7 | 2569 | return 0; |
6c594c21 IM |
2570 | } |
2571 | ||
2572 | static void cpu_migrations_perf_counter_disable(struct perf_counter *counter) | |
2573 | { | |
2574 | cpu_migrations_perf_counter_update(counter); | |
2575 | } | |
2576 | ||
2577 | static const struct hw_perf_counter_ops perf_ops_cpu_migrations = { | |
7671581f IM |
2578 | .enable = cpu_migrations_perf_counter_enable, |
2579 | .disable = cpu_migrations_perf_counter_disable, | |
2580 | .read = cpu_migrations_perf_counter_read, | |
6c594c21 IM |
2581 | }; |
2582 | ||
e077df4f PZ |
2583 | #ifdef CONFIG_EVENT_PROFILE |
2584 | void perf_tpcounter_event(int event_id) | |
2585 | { | |
b8e83514 PZ |
2586 | struct pt_regs *regs = get_irq_regs(); |
2587 | ||
2588 | if (!regs) | |
2589 | regs = task_pt_regs(current); | |
2590 | ||
78f13e95 | 2591 | __perf_swcounter_event(PERF_TYPE_TRACEPOINT, event_id, 1, 1, regs, 0); |
e077df4f PZ |
2592 | } |
2593 | ||
2594 | extern int ftrace_profile_enable(int); | |
2595 | extern void ftrace_profile_disable(int); | |
2596 | ||
2597 | static void tp_perf_counter_destroy(struct perf_counter *counter) | |
2598 | { | |
f4a2deb4 | 2599 | ftrace_profile_disable(perf_event_id(&counter->hw_event)); |
e077df4f PZ |
2600 | } |
2601 | ||
2602 | static const struct hw_perf_counter_ops * | |
2603 | tp_perf_counter_init(struct perf_counter *counter) | |
2604 | { | |
f4a2deb4 | 2605 | int event_id = perf_event_id(&counter->hw_event); |
e077df4f PZ |
2606 | int ret; |
2607 | ||
2608 | ret = ftrace_profile_enable(event_id); | |
2609 | if (ret) | |
2610 | return NULL; | |
2611 | ||
2612 | counter->destroy = tp_perf_counter_destroy; | |
b8e83514 | 2613 | counter->hw.irq_period = counter->hw_event.irq_period; |
e077df4f PZ |
2614 | |
2615 | return &perf_ops_generic; | |
2616 | } | |
2617 | #else | |
2618 | static const struct hw_perf_counter_ops * | |
2619 | tp_perf_counter_init(struct perf_counter *counter) | |
2620 | { | |
2621 | return NULL; | |
2622 | } | |
2623 | #endif | |
2624 | ||
5c92d124 IM |
2625 | static const struct hw_perf_counter_ops * |
2626 | sw_perf_counter_init(struct perf_counter *counter) | |
2627 | { | |
15dbf27c | 2628 | struct perf_counter_hw_event *hw_event = &counter->hw_event; |
5c92d124 | 2629 | const struct hw_perf_counter_ops *hw_ops = NULL; |
15dbf27c | 2630 | struct hw_perf_counter *hwc = &counter->hw; |
5c92d124 | 2631 | |
0475f9ea PM |
2632 | /* |
2633 | * Software counters (currently) can't in general distinguish | |
2634 | * between user, kernel and hypervisor events. | |
2635 | * However, context switches and cpu migrations are considered | |
2636 | * to be kernel events, and page faults are never hypervisor | |
2637 | * events. | |
2638 | */ | |
f4a2deb4 | 2639 | switch (perf_event_id(&counter->hw_event)) { |
5c92d124 | 2640 | case PERF_COUNT_CPU_CLOCK: |
d6d020e9 PZ |
2641 | hw_ops = &perf_ops_cpu_clock; |
2642 | ||
2643 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
2644 | hw_event->irq_period = 10000; | |
5c92d124 | 2645 | break; |
bae43c99 | 2646 | case PERF_COUNT_TASK_CLOCK: |
23a185ca PM |
2647 | /* |
2648 | * If the user instantiates this as a per-cpu counter, | |
2649 | * use the cpu_clock counter instead. | |
2650 | */ | |
2651 | if (counter->ctx->task) | |
2652 | hw_ops = &perf_ops_task_clock; | |
2653 | else | |
2654 | hw_ops = &perf_ops_cpu_clock; | |
d6d020e9 PZ |
2655 | |
2656 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
2657 | hw_event->irq_period = 10000; | |
bae43c99 | 2658 | break; |
e06c61a8 | 2659 | case PERF_COUNT_PAGE_FAULTS: |
ac17dc8e PZ |
2660 | case PERF_COUNT_PAGE_FAULTS_MIN: |
2661 | case PERF_COUNT_PAGE_FAULTS_MAJ: | |
5d6a27d8 | 2662 | case PERF_COUNT_CONTEXT_SWITCHES: |
4a0deca6 | 2663 | hw_ops = &perf_ops_generic; |
5d6a27d8 | 2664 | break; |
6c594c21 | 2665 | case PERF_COUNT_CPU_MIGRATIONS: |
0475f9ea PM |
2666 | if (!counter->hw_event.exclude_kernel) |
2667 | hw_ops = &perf_ops_cpu_migrations; | |
6c594c21 | 2668 | break; |
5c92d124 | 2669 | } |
15dbf27c PZ |
2670 | |
2671 | if (hw_ops) | |
2672 | hwc->irq_period = hw_event->irq_period; | |
2673 | ||
5c92d124 IM |
2674 | return hw_ops; |
2675 | } | |
2676 | ||
0793a61d TG |
2677 | /* |
2678 | * Allocate and initialize a counter structure | |
2679 | */ | |
2680 | static struct perf_counter * | |
04289bb9 IM |
2681 | perf_counter_alloc(struct perf_counter_hw_event *hw_event, |
2682 | int cpu, | |
23a185ca | 2683 | struct perf_counter_context *ctx, |
9b51f66d IM |
2684 | struct perf_counter *group_leader, |
2685 | gfp_t gfpflags) | |
0793a61d | 2686 | { |
5c92d124 | 2687 | const struct hw_perf_counter_ops *hw_ops; |
621a01ea | 2688 | struct perf_counter *counter; |
d5d2bc0d | 2689 | long err; |
0793a61d | 2690 | |
9b51f66d | 2691 | counter = kzalloc(sizeof(*counter), gfpflags); |
0793a61d | 2692 | if (!counter) |
d5d2bc0d | 2693 | return ERR_PTR(-ENOMEM); |
0793a61d | 2694 | |
04289bb9 IM |
2695 | /* |
2696 | * Single counters are their own group leaders, with an | |
2697 | * empty sibling list: | |
2698 | */ | |
2699 | if (!group_leader) | |
2700 | group_leader = counter; | |
2701 | ||
0793a61d | 2702 | mutex_init(&counter->mutex); |
04289bb9 | 2703 | INIT_LIST_HEAD(&counter->list_entry); |
592903cd | 2704 | INIT_LIST_HEAD(&counter->event_entry); |
04289bb9 | 2705 | INIT_LIST_HEAD(&counter->sibling_list); |
0793a61d TG |
2706 | init_waitqueue_head(&counter->waitq); |
2707 | ||
7b732a75 PZ |
2708 | mutex_init(&counter->mmap_mutex); |
2709 | ||
d859e29f PM |
2710 | INIT_LIST_HEAD(&counter->child_list); |
2711 | ||
9f66a381 IM |
2712 | counter->cpu = cpu; |
2713 | counter->hw_event = *hw_event; | |
04289bb9 | 2714 | counter->group_leader = group_leader; |
621a01ea | 2715 | counter->hw_ops = NULL; |
23a185ca | 2716 | counter->ctx = ctx; |
621a01ea | 2717 | |
235c7fc7 | 2718 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
a86ed508 IM |
2719 | if (hw_event->disabled) |
2720 | counter->state = PERF_COUNTER_STATE_OFF; | |
2721 | ||
5c92d124 | 2722 | hw_ops = NULL; |
b8e83514 | 2723 | |
f4a2deb4 | 2724 | if (perf_event_raw(hw_event)) { |
b8e83514 | 2725 | hw_ops = hw_perf_counter_init(counter); |
f4a2deb4 PZ |
2726 | goto done; |
2727 | } | |
2728 | ||
2729 | switch (perf_event_type(hw_event)) { | |
b8e83514 | 2730 | case PERF_TYPE_HARDWARE: |
5c92d124 | 2731 | hw_ops = hw_perf_counter_init(counter); |
b8e83514 PZ |
2732 | break; |
2733 | ||
2734 | case PERF_TYPE_SOFTWARE: | |
2735 | hw_ops = sw_perf_counter_init(counter); | |
2736 | break; | |
2737 | ||
2738 | case PERF_TYPE_TRACEPOINT: | |
2739 | hw_ops = tp_perf_counter_init(counter); | |
2740 | break; | |
2741 | } | |
d5d2bc0d PM |
2742 | done: |
2743 | err = 0; | |
2744 | if (!hw_ops) | |
2745 | err = -EINVAL; | |
2746 | else if (IS_ERR(hw_ops)) | |
2747 | err = PTR_ERR(hw_ops); | |
5c92d124 | 2748 | |
d5d2bc0d | 2749 | if (err) { |
621a01ea | 2750 | kfree(counter); |
d5d2bc0d | 2751 | return ERR_PTR(err); |
621a01ea | 2752 | } |
d5d2bc0d | 2753 | |
621a01ea | 2754 | counter->hw_ops = hw_ops; |
0793a61d | 2755 | |
9ee318a7 PZ |
2756 | if (counter->hw_event.mmap) |
2757 | atomic_inc(&nr_mmap_tracking); | |
2758 | if (counter->hw_event.munmap) | |
2759 | atomic_inc(&nr_munmap_tracking); | |
2760 | if (counter->hw_event.comm) | |
2761 | atomic_inc(&nr_comm_tracking); | |
2762 | ||
0793a61d TG |
2763 | return counter; |
2764 | } | |
2765 | ||
2766 | /** | |
2743a5b0 | 2767 | * sys_perf_counter_open - open a performance counter, associate it to a task/cpu |
9f66a381 IM |
2768 | * |
2769 | * @hw_event_uptr: event type attributes for monitoring/sampling | |
0793a61d | 2770 | * @pid: target pid |
9f66a381 IM |
2771 | * @cpu: target cpu |
2772 | * @group_fd: group leader counter fd | |
0793a61d | 2773 | */ |
2743a5b0 | 2774 | SYSCALL_DEFINE5(perf_counter_open, |
f3dfd265 | 2775 | const struct perf_counter_hw_event __user *, hw_event_uptr, |
2743a5b0 | 2776 | pid_t, pid, int, cpu, int, group_fd, unsigned long, flags) |
0793a61d | 2777 | { |
04289bb9 | 2778 | struct perf_counter *counter, *group_leader; |
9f66a381 | 2779 | struct perf_counter_hw_event hw_event; |
04289bb9 | 2780 | struct perf_counter_context *ctx; |
9b51f66d | 2781 | struct file *counter_file = NULL; |
04289bb9 IM |
2782 | struct file *group_file = NULL; |
2783 | int fput_needed = 0; | |
9b51f66d | 2784 | int fput_needed2 = 0; |
0793a61d TG |
2785 | int ret; |
2786 | ||
2743a5b0 PM |
2787 | /* for future expandability... */ |
2788 | if (flags) | |
2789 | return -EINVAL; | |
2790 | ||
9f66a381 | 2791 | if (copy_from_user(&hw_event, hw_event_uptr, sizeof(hw_event)) != 0) |
eab656ae TG |
2792 | return -EFAULT; |
2793 | ||
04289bb9 | 2794 | /* |
ccff286d IM |
2795 | * Get the target context (task or percpu): |
2796 | */ | |
2797 | ctx = find_get_context(pid, cpu); | |
2798 | if (IS_ERR(ctx)) | |
2799 | return PTR_ERR(ctx); | |
2800 | ||
2801 | /* | |
2802 | * Look up the group leader (we will attach this counter to it): | |
04289bb9 IM |
2803 | */ |
2804 | group_leader = NULL; | |
2805 | if (group_fd != -1) { | |
2806 | ret = -EINVAL; | |
2807 | group_file = fget_light(group_fd, &fput_needed); | |
2808 | if (!group_file) | |
ccff286d | 2809 | goto err_put_context; |
04289bb9 | 2810 | if (group_file->f_op != &perf_fops) |
ccff286d | 2811 | goto err_put_context; |
04289bb9 IM |
2812 | |
2813 | group_leader = group_file->private_data; | |
2814 | /* | |
ccff286d IM |
2815 | * Do not allow a recursive hierarchy (this new sibling |
2816 | * becoming part of another group-sibling): | |
2817 | */ | |
2818 | if (group_leader->group_leader != group_leader) | |
2819 | goto err_put_context; | |
2820 | /* | |
2821 | * Do not allow to attach to a group in a different | |
2822 | * task or CPU context: | |
04289bb9 | 2823 | */ |
ccff286d IM |
2824 | if (group_leader->ctx != ctx) |
2825 | goto err_put_context; | |
3b6f9e5c PM |
2826 | /* |
2827 | * Only a group leader can be exclusive or pinned | |
2828 | */ | |
2829 | if (hw_event.exclusive || hw_event.pinned) | |
2830 | goto err_put_context; | |
04289bb9 IM |
2831 | } |
2832 | ||
23a185ca PM |
2833 | counter = perf_counter_alloc(&hw_event, cpu, ctx, group_leader, |
2834 | GFP_KERNEL); | |
d5d2bc0d PM |
2835 | ret = PTR_ERR(counter); |
2836 | if (IS_ERR(counter)) | |
0793a61d TG |
2837 | goto err_put_context; |
2838 | ||
0793a61d TG |
2839 | ret = anon_inode_getfd("[perf_counter]", &perf_fops, counter, 0); |
2840 | if (ret < 0) | |
9b51f66d IM |
2841 | goto err_free_put_context; |
2842 | ||
2843 | counter_file = fget_light(ret, &fput_needed2); | |
2844 | if (!counter_file) | |
2845 | goto err_free_put_context; | |
2846 | ||
2847 | counter->filp = counter_file; | |
d859e29f | 2848 | mutex_lock(&ctx->mutex); |
9b51f66d | 2849 | perf_install_in_context(ctx, counter, cpu); |
d859e29f | 2850 | mutex_unlock(&ctx->mutex); |
9b51f66d IM |
2851 | |
2852 | fput_light(counter_file, fput_needed2); | |
0793a61d | 2853 | |
04289bb9 IM |
2854 | out_fput: |
2855 | fput_light(group_file, fput_needed); | |
2856 | ||
0793a61d TG |
2857 | return ret; |
2858 | ||
9b51f66d | 2859 | err_free_put_context: |
0793a61d TG |
2860 | kfree(counter); |
2861 | ||
2862 | err_put_context: | |
2863 | put_context(ctx); | |
2864 | ||
04289bb9 | 2865 | goto out_fput; |
0793a61d TG |
2866 | } |
2867 | ||
9b51f66d IM |
2868 | /* |
2869 | * Initialize the perf_counter context in a task_struct: | |
2870 | */ | |
2871 | static void | |
2872 | __perf_counter_init_context(struct perf_counter_context *ctx, | |
2873 | struct task_struct *task) | |
2874 | { | |
2875 | memset(ctx, 0, sizeof(*ctx)); | |
2876 | spin_lock_init(&ctx->lock); | |
d859e29f | 2877 | mutex_init(&ctx->mutex); |
9b51f66d | 2878 | INIT_LIST_HEAD(&ctx->counter_list); |
592903cd | 2879 | INIT_LIST_HEAD(&ctx->event_list); |
9b51f66d IM |
2880 | ctx->task = task; |
2881 | } | |
2882 | ||
2883 | /* | |
2884 | * inherit a counter from parent task to child task: | |
2885 | */ | |
d859e29f | 2886 | static struct perf_counter * |
9b51f66d IM |
2887 | inherit_counter(struct perf_counter *parent_counter, |
2888 | struct task_struct *parent, | |
2889 | struct perf_counter_context *parent_ctx, | |
2890 | struct task_struct *child, | |
d859e29f | 2891 | struct perf_counter *group_leader, |
9b51f66d IM |
2892 | struct perf_counter_context *child_ctx) |
2893 | { | |
2894 | struct perf_counter *child_counter; | |
2895 | ||
d859e29f PM |
2896 | /* |
2897 | * Instead of creating recursive hierarchies of counters, | |
2898 | * we link inherited counters back to the original parent, | |
2899 | * which has a filp for sure, which we use as the reference | |
2900 | * count: | |
2901 | */ | |
2902 | if (parent_counter->parent) | |
2903 | parent_counter = parent_counter->parent; | |
2904 | ||
9b51f66d | 2905 | child_counter = perf_counter_alloc(&parent_counter->hw_event, |
23a185ca PM |
2906 | parent_counter->cpu, child_ctx, |
2907 | group_leader, GFP_KERNEL); | |
d5d2bc0d PM |
2908 | if (IS_ERR(child_counter)) |
2909 | return child_counter; | |
9b51f66d IM |
2910 | |
2911 | /* | |
2912 | * Link it up in the child's context: | |
2913 | */ | |
9b51f66d | 2914 | child_counter->task = child; |
53cfbf59 | 2915 | add_counter_to_ctx(child_counter, child_ctx); |
9b51f66d IM |
2916 | |
2917 | child_counter->parent = parent_counter; | |
9b51f66d IM |
2918 | /* |
2919 | * inherit into child's child as well: | |
2920 | */ | |
2921 | child_counter->hw_event.inherit = 1; | |
2922 | ||
2923 | /* | |
2924 | * Get a reference to the parent filp - we will fput it | |
2925 | * when the child counter exits. This is safe to do because | |
2926 | * we are in the parent and we know that the filp still | |
2927 | * exists and has a nonzero count: | |
2928 | */ | |
2929 | atomic_long_inc(&parent_counter->filp->f_count); | |
2930 | ||
d859e29f PM |
2931 | /* |
2932 | * Link this into the parent counter's child list | |
2933 | */ | |
2934 | mutex_lock(&parent_counter->mutex); | |
2935 | list_add_tail(&child_counter->child_list, &parent_counter->child_list); | |
2936 | ||
2937 | /* | |
2938 | * Make the child state follow the state of the parent counter, | |
2939 | * not its hw_event.disabled bit. We hold the parent's mutex, | |
2940 | * so we won't race with perf_counter_{en,dis}able_family. | |
2941 | */ | |
2942 | if (parent_counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
2943 | child_counter->state = PERF_COUNTER_STATE_INACTIVE; | |
2944 | else | |
2945 | child_counter->state = PERF_COUNTER_STATE_OFF; | |
2946 | ||
2947 | mutex_unlock(&parent_counter->mutex); | |
2948 | ||
2949 | return child_counter; | |
2950 | } | |
2951 | ||
2952 | static int inherit_group(struct perf_counter *parent_counter, | |
2953 | struct task_struct *parent, | |
2954 | struct perf_counter_context *parent_ctx, | |
2955 | struct task_struct *child, | |
2956 | struct perf_counter_context *child_ctx) | |
2957 | { | |
2958 | struct perf_counter *leader; | |
2959 | struct perf_counter *sub; | |
d5d2bc0d | 2960 | struct perf_counter *child_ctr; |
d859e29f PM |
2961 | |
2962 | leader = inherit_counter(parent_counter, parent, parent_ctx, | |
2963 | child, NULL, child_ctx); | |
d5d2bc0d PM |
2964 | if (IS_ERR(leader)) |
2965 | return PTR_ERR(leader); | |
d859e29f | 2966 | list_for_each_entry(sub, &parent_counter->sibling_list, list_entry) { |
d5d2bc0d PM |
2967 | child_ctr = inherit_counter(sub, parent, parent_ctx, |
2968 | child, leader, child_ctx); | |
2969 | if (IS_ERR(child_ctr)) | |
2970 | return PTR_ERR(child_ctr); | |
d859e29f | 2971 | } |
9b51f66d IM |
2972 | return 0; |
2973 | } | |
2974 | ||
d859e29f PM |
2975 | static void sync_child_counter(struct perf_counter *child_counter, |
2976 | struct perf_counter *parent_counter) | |
2977 | { | |
2978 | u64 parent_val, child_val; | |
2979 | ||
2980 | parent_val = atomic64_read(&parent_counter->count); | |
2981 | child_val = atomic64_read(&child_counter->count); | |
2982 | ||
2983 | /* | |
2984 | * Add back the child's count to the parent's count: | |
2985 | */ | |
2986 | atomic64_add(child_val, &parent_counter->count); | |
53cfbf59 PM |
2987 | atomic64_add(child_counter->total_time_enabled, |
2988 | &parent_counter->child_total_time_enabled); | |
2989 | atomic64_add(child_counter->total_time_running, | |
2990 | &parent_counter->child_total_time_running); | |
d859e29f PM |
2991 | |
2992 | /* | |
2993 | * Remove this counter from the parent's list | |
2994 | */ | |
2995 | mutex_lock(&parent_counter->mutex); | |
2996 | list_del_init(&child_counter->child_list); | |
2997 | mutex_unlock(&parent_counter->mutex); | |
2998 | ||
2999 | /* | |
3000 | * Release the parent counter, if this was the last | |
3001 | * reference to it. | |
3002 | */ | |
3003 | fput(parent_counter->filp); | |
3004 | } | |
3005 | ||
9b51f66d IM |
3006 | static void |
3007 | __perf_counter_exit_task(struct task_struct *child, | |
3008 | struct perf_counter *child_counter, | |
3009 | struct perf_counter_context *child_ctx) | |
3010 | { | |
3011 | struct perf_counter *parent_counter; | |
d859e29f | 3012 | struct perf_counter *sub, *tmp; |
9b51f66d IM |
3013 | |
3014 | /* | |
235c7fc7 IM |
3015 | * If we do not self-reap then we have to wait for the |
3016 | * child task to unschedule (it will happen for sure), | |
3017 | * so that its counter is at its final count. (This | |
3018 | * condition triggers rarely - child tasks usually get | |
3019 | * off their CPU before the parent has a chance to | |
3020 | * get this far into the reaping action) | |
9b51f66d | 3021 | */ |
235c7fc7 IM |
3022 | if (child != current) { |
3023 | wait_task_inactive(child, 0); | |
3024 | list_del_init(&child_counter->list_entry); | |
53cfbf59 | 3025 | update_counter_times(child_counter); |
235c7fc7 | 3026 | } else { |
0cc0c027 | 3027 | struct perf_cpu_context *cpuctx; |
235c7fc7 IM |
3028 | unsigned long flags; |
3029 | u64 perf_flags; | |
3030 | ||
3031 | /* | |
3032 | * Disable and unlink this counter. | |
3033 | * | |
3034 | * Be careful about zapping the list - IRQ/NMI context | |
3035 | * could still be processing it: | |
3036 | */ | |
849691a6 | 3037 | local_irq_save(flags); |
235c7fc7 | 3038 | perf_flags = hw_perf_save_disable(); |
0cc0c027 IM |
3039 | |
3040 | cpuctx = &__get_cpu_var(perf_cpu_context); | |
3041 | ||
d859e29f | 3042 | group_sched_out(child_counter, cpuctx, child_ctx); |
53cfbf59 | 3043 | update_counter_times(child_counter); |
0cc0c027 | 3044 | |
235c7fc7 | 3045 | list_del_init(&child_counter->list_entry); |
0cc0c027 | 3046 | |
235c7fc7 | 3047 | child_ctx->nr_counters--; |
9b51f66d | 3048 | |
235c7fc7 | 3049 | hw_perf_restore(perf_flags); |
849691a6 | 3050 | local_irq_restore(flags); |
235c7fc7 | 3051 | } |
9b51f66d IM |
3052 | |
3053 | parent_counter = child_counter->parent; | |
3054 | /* | |
3055 | * It can happen that parent exits first, and has counters | |
3056 | * that are still around due to the child reference. These | |
3057 | * counters need to be zapped - but otherwise linger. | |
3058 | */ | |
d859e29f PM |
3059 | if (parent_counter) { |
3060 | sync_child_counter(child_counter, parent_counter); | |
3061 | list_for_each_entry_safe(sub, tmp, &child_counter->sibling_list, | |
3062 | list_entry) { | |
4bcf349a | 3063 | if (sub->parent) { |
d859e29f | 3064 | sync_child_counter(sub, sub->parent); |
f1600952 | 3065 | free_counter(sub); |
4bcf349a | 3066 | } |
d859e29f | 3067 | } |
f1600952 | 3068 | free_counter(child_counter); |
4bcf349a | 3069 | } |
9b51f66d IM |
3070 | } |
3071 | ||
3072 | /* | |
d859e29f | 3073 | * When a child task exits, feed back counter values to parent counters. |
9b51f66d | 3074 | * |
d859e29f | 3075 | * Note: we may be running in child context, but the PID is not hashed |
9b51f66d IM |
3076 | * anymore so new counters will not be added. |
3077 | */ | |
3078 | void perf_counter_exit_task(struct task_struct *child) | |
3079 | { | |
3080 | struct perf_counter *child_counter, *tmp; | |
3081 | struct perf_counter_context *child_ctx; | |
3082 | ||
3083 | child_ctx = &child->perf_counter_ctx; | |
3084 | ||
3085 | if (likely(!child_ctx->nr_counters)) | |
3086 | return; | |
3087 | ||
3088 | list_for_each_entry_safe(child_counter, tmp, &child_ctx->counter_list, | |
3089 | list_entry) | |
3090 | __perf_counter_exit_task(child, child_counter, child_ctx); | |
3091 | } | |
3092 | ||
3093 | /* | |
3094 | * Initialize the perf_counter context in task_struct | |
3095 | */ | |
3096 | void perf_counter_init_task(struct task_struct *child) | |
3097 | { | |
3098 | struct perf_counter_context *child_ctx, *parent_ctx; | |
d859e29f | 3099 | struct perf_counter *counter; |
9b51f66d | 3100 | struct task_struct *parent = current; |
9b51f66d IM |
3101 | |
3102 | child_ctx = &child->perf_counter_ctx; | |
3103 | parent_ctx = &parent->perf_counter_ctx; | |
3104 | ||
3105 | __perf_counter_init_context(child_ctx, child); | |
3106 | ||
3107 | /* | |
3108 | * This is executed from the parent task context, so inherit | |
3109 | * counters that have been marked for cloning: | |
3110 | */ | |
3111 | ||
3112 | if (likely(!parent_ctx->nr_counters)) | |
3113 | return; | |
3114 | ||
3115 | /* | |
3116 | * Lock the parent list. No need to lock the child - not PID | |
3117 | * hashed yet and not running, so nobody can access it. | |
3118 | */ | |
d859e29f | 3119 | mutex_lock(&parent_ctx->mutex); |
9b51f66d IM |
3120 | |
3121 | /* | |
3122 | * We dont have to disable NMIs - we are only looking at | |
3123 | * the list, not manipulating it: | |
3124 | */ | |
3125 | list_for_each_entry(counter, &parent_ctx->counter_list, list_entry) { | |
d859e29f | 3126 | if (!counter->hw_event.inherit) |
9b51f66d IM |
3127 | continue; |
3128 | ||
d859e29f | 3129 | if (inherit_group(counter, parent, |
9b51f66d IM |
3130 | parent_ctx, child, child_ctx)) |
3131 | break; | |
3132 | } | |
3133 | ||
d859e29f | 3134 | mutex_unlock(&parent_ctx->mutex); |
9b51f66d IM |
3135 | } |
3136 | ||
04289bb9 | 3137 | static void __cpuinit perf_counter_init_cpu(int cpu) |
0793a61d | 3138 | { |
04289bb9 | 3139 | struct perf_cpu_context *cpuctx; |
0793a61d | 3140 | |
04289bb9 IM |
3141 | cpuctx = &per_cpu(perf_cpu_context, cpu); |
3142 | __perf_counter_init_context(&cpuctx->ctx, NULL); | |
0793a61d TG |
3143 | |
3144 | mutex_lock(&perf_resource_mutex); | |
04289bb9 | 3145 | cpuctx->max_pertask = perf_max_counters - perf_reserved_percpu; |
0793a61d | 3146 | mutex_unlock(&perf_resource_mutex); |
04289bb9 | 3147 | |
01d0287f | 3148 | hw_perf_counter_setup(cpu); |
0793a61d TG |
3149 | } |
3150 | ||
3151 | #ifdef CONFIG_HOTPLUG_CPU | |
04289bb9 | 3152 | static void __perf_counter_exit_cpu(void *info) |
0793a61d TG |
3153 | { |
3154 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
3155 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
3156 | struct perf_counter *counter, *tmp; | |
3157 | ||
04289bb9 IM |
3158 | list_for_each_entry_safe(counter, tmp, &ctx->counter_list, list_entry) |
3159 | __perf_counter_remove_from_context(counter); | |
0793a61d | 3160 | } |
04289bb9 | 3161 | static void perf_counter_exit_cpu(int cpu) |
0793a61d | 3162 | { |
d859e29f PM |
3163 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); |
3164 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
3165 | ||
3166 | mutex_lock(&ctx->mutex); | |
04289bb9 | 3167 | smp_call_function_single(cpu, __perf_counter_exit_cpu, NULL, 1); |
d859e29f | 3168 | mutex_unlock(&ctx->mutex); |
0793a61d TG |
3169 | } |
3170 | #else | |
04289bb9 | 3171 | static inline void perf_counter_exit_cpu(int cpu) { } |
0793a61d TG |
3172 | #endif |
3173 | ||
3174 | static int __cpuinit | |
3175 | perf_cpu_notify(struct notifier_block *self, unsigned long action, void *hcpu) | |
3176 | { | |
3177 | unsigned int cpu = (long)hcpu; | |
3178 | ||
3179 | switch (action) { | |
3180 | ||
3181 | case CPU_UP_PREPARE: | |
3182 | case CPU_UP_PREPARE_FROZEN: | |
04289bb9 | 3183 | perf_counter_init_cpu(cpu); |
0793a61d TG |
3184 | break; |
3185 | ||
3186 | case CPU_DOWN_PREPARE: | |
3187 | case CPU_DOWN_PREPARE_FROZEN: | |
04289bb9 | 3188 | perf_counter_exit_cpu(cpu); |
0793a61d TG |
3189 | break; |
3190 | ||
3191 | default: | |
3192 | break; | |
3193 | } | |
3194 | ||
3195 | return NOTIFY_OK; | |
3196 | } | |
3197 | ||
3198 | static struct notifier_block __cpuinitdata perf_cpu_nb = { | |
3199 | .notifier_call = perf_cpu_notify, | |
3200 | }; | |
3201 | ||
3202 | static int __init perf_counter_init(void) | |
3203 | { | |
3204 | perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_UP_PREPARE, | |
3205 | (void *)(long)smp_processor_id()); | |
3206 | register_cpu_notifier(&perf_cpu_nb); | |
3207 | ||
3208 | return 0; | |
3209 | } | |
3210 | early_initcall(perf_counter_init); | |
3211 | ||
3212 | static ssize_t perf_show_reserve_percpu(struct sysdev_class *class, char *buf) | |
3213 | { | |
3214 | return sprintf(buf, "%d\n", perf_reserved_percpu); | |
3215 | } | |
3216 | ||
3217 | static ssize_t | |
3218 | perf_set_reserve_percpu(struct sysdev_class *class, | |
3219 | const char *buf, | |
3220 | size_t count) | |
3221 | { | |
3222 | struct perf_cpu_context *cpuctx; | |
3223 | unsigned long val; | |
3224 | int err, cpu, mpt; | |
3225 | ||
3226 | err = strict_strtoul(buf, 10, &val); | |
3227 | if (err) | |
3228 | return err; | |
3229 | if (val > perf_max_counters) | |
3230 | return -EINVAL; | |
3231 | ||
3232 | mutex_lock(&perf_resource_mutex); | |
3233 | perf_reserved_percpu = val; | |
3234 | for_each_online_cpu(cpu) { | |
3235 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
3236 | spin_lock_irq(&cpuctx->ctx.lock); | |
3237 | mpt = min(perf_max_counters - cpuctx->ctx.nr_counters, | |
3238 | perf_max_counters - perf_reserved_percpu); | |
3239 | cpuctx->max_pertask = mpt; | |
3240 | spin_unlock_irq(&cpuctx->ctx.lock); | |
3241 | } | |
3242 | mutex_unlock(&perf_resource_mutex); | |
3243 | ||
3244 | return count; | |
3245 | } | |
3246 | ||
3247 | static ssize_t perf_show_overcommit(struct sysdev_class *class, char *buf) | |
3248 | { | |
3249 | return sprintf(buf, "%d\n", perf_overcommit); | |
3250 | } | |
3251 | ||
3252 | static ssize_t | |
3253 | perf_set_overcommit(struct sysdev_class *class, const char *buf, size_t count) | |
3254 | { | |
3255 | unsigned long val; | |
3256 | int err; | |
3257 | ||
3258 | err = strict_strtoul(buf, 10, &val); | |
3259 | if (err) | |
3260 | return err; | |
3261 | if (val > 1) | |
3262 | return -EINVAL; | |
3263 | ||
3264 | mutex_lock(&perf_resource_mutex); | |
3265 | perf_overcommit = val; | |
3266 | mutex_unlock(&perf_resource_mutex); | |
3267 | ||
3268 | return count; | |
3269 | } | |
3270 | ||
3271 | static SYSDEV_CLASS_ATTR( | |
3272 | reserve_percpu, | |
3273 | 0644, | |
3274 | perf_show_reserve_percpu, | |
3275 | perf_set_reserve_percpu | |
3276 | ); | |
3277 | ||
3278 | static SYSDEV_CLASS_ATTR( | |
3279 | overcommit, | |
3280 | 0644, | |
3281 | perf_show_overcommit, | |
3282 | perf_set_overcommit | |
3283 | ); | |
3284 | ||
3285 | static struct attribute *perfclass_attrs[] = { | |
3286 | &attr_reserve_percpu.attr, | |
3287 | &attr_overcommit.attr, | |
3288 | NULL | |
3289 | }; | |
3290 | ||
3291 | static struct attribute_group perfclass_attr_group = { | |
3292 | .attrs = perfclass_attrs, | |
3293 | .name = "perf_counters", | |
3294 | }; | |
3295 | ||
3296 | static int __init perf_counter_sysfs_init(void) | |
3297 | { | |
3298 | return sysfs_create_group(&cpu_sysdev_class.kset.kobj, | |
3299 | &perfclass_attr_group); | |
3300 | } | |
3301 | device_initcall(perf_counter_sysfs_init); |