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Commit | Line | Data |
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0793a61d TG |
1 | /* |
2 | * Performance counter core code | |
3 | * | |
4 | * Copyright(C) 2008 Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008 Red Hat, Inc., Ingo Molnar | |
6 | * | |
7 | * For licencing details see kernel-base/COPYING | |
8 | */ | |
9 | ||
10 | #include <linux/fs.h> | |
11 | #include <linux/cpu.h> | |
12 | #include <linux/smp.h> | |
04289bb9 | 13 | #include <linux/file.h> |
0793a61d TG |
14 | #include <linux/poll.h> |
15 | #include <linux/sysfs.h> | |
16 | #include <linux/ptrace.h> | |
17 | #include <linux/percpu.h> | |
18 | #include <linux/uaccess.h> | |
19 | #include <linux/syscalls.h> | |
20 | #include <linux/anon_inodes.h> | |
aa9c4c0f | 21 | #include <linux/kernel_stat.h> |
0793a61d | 22 | #include <linux/perf_counter.h> |
23a185ca PM |
23 | #include <linux/mm.h> |
24 | #include <linux/vmstat.h> | |
592903cd | 25 | #include <linux/rculist.h> |
0793a61d | 26 | |
4e193bd4 TB |
27 | #include <asm/irq_regs.h> |
28 | ||
0793a61d TG |
29 | /* |
30 | * Each CPU has a list of per CPU counters: | |
31 | */ | |
32 | DEFINE_PER_CPU(struct perf_cpu_context, perf_cpu_context); | |
33 | ||
088e2852 | 34 | int perf_max_counters __read_mostly = 1; |
0793a61d TG |
35 | static int perf_reserved_percpu __read_mostly; |
36 | static int perf_overcommit __read_mostly = 1; | |
37 | ||
38 | /* | |
39 | * Mutex for (sysadmin-configurable) counter reservations: | |
40 | */ | |
41 | static DEFINE_MUTEX(perf_resource_mutex); | |
42 | ||
43 | /* | |
44 | * Architecture provided APIs - weak aliases: | |
45 | */ | |
5c92d124 | 46 | extern __weak const struct hw_perf_counter_ops * |
621a01ea | 47 | hw_perf_counter_init(struct perf_counter *counter) |
0793a61d | 48 | { |
ff6f0541 | 49 | return NULL; |
0793a61d TG |
50 | } |
51 | ||
01b2838c | 52 | u64 __weak hw_perf_save_disable(void) { return 0; } |
01ea1cca | 53 | void __weak hw_perf_restore(u64 ctrl) { barrier(); } |
01d0287f | 54 | void __weak hw_perf_counter_setup(int cpu) { barrier(); } |
3cbed429 PM |
55 | int __weak hw_perf_group_sched_in(struct perf_counter *group_leader, |
56 | struct perf_cpu_context *cpuctx, | |
57 | struct perf_counter_context *ctx, int cpu) | |
58 | { | |
59 | return 0; | |
60 | } | |
0793a61d | 61 | |
4eb96fcf PM |
62 | void __weak perf_counter_print_debug(void) { } |
63 | ||
04289bb9 IM |
64 | static void |
65 | list_add_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
66 | { | |
67 | struct perf_counter *group_leader = counter->group_leader; | |
68 | ||
69 | /* | |
70 | * Depending on whether it is a standalone or sibling counter, | |
71 | * add it straight to the context's counter list, or to the group | |
72 | * leader's sibling list: | |
73 | */ | |
74 | if (counter->group_leader == counter) | |
75 | list_add_tail(&counter->list_entry, &ctx->counter_list); | |
76 | else | |
77 | list_add_tail(&counter->list_entry, &group_leader->sibling_list); | |
592903cd PZ |
78 | |
79 | list_add_rcu(&counter->event_entry, &ctx->event_list); | |
04289bb9 IM |
80 | } |
81 | ||
82 | static void | |
83 | list_del_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
84 | { | |
85 | struct perf_counter *sibling, *tmp; | |
86 | ||
87 | list_del_init(&counter->list_entry); | |
592903cd | 88 | list_del_rcu(&counter->event_entry); |
04289bb9 | 89 | |
04289bb9 IM |
90 | /* |
91 | * If this was a group counter with sibling counters then | |
92 | * upgrade the siblings to singleton counters by adding them | |
93 | * to the context list directly: | |
94 | */ | |
95 | list_for_each_entry_safe(sibling, tmp, | |
96 | &counter->sibling_list, list_entry) { | |
97 | ||
75564232 | 98 | list_move_tail(&sibling->list_entry, &ctx->counter_list); |
04289bb9 IM |
99 | sibling->group_leader = sibling; |
100 | } | |
101 | } | |
102 | ||
3b6f9e5c PM |
103 | static void |
104 | counter_sched_out(struct perf_counter *counter, | |
105 | struct perf_cpu_context *cpuctx, | |
106 | struct perf_counter_context *ctx) | |
107 | { | |
108 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
109 | return; | |
110 | ||
111 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
112 | counter->hw_ops->disable(counter); | |
113 | counter->oncpu = -1; | |
114 | ||
115 | if (!is_software_counter(counter)) | |
116 | cpuctx->active_oncpu--; | |
117 | ctx->nr_active--; | |
118 | if (counter->hw_event.exclusive || !cpuctx->active_oncpu) | |
119 | cpuctx->exclusive = 0; | |
120 | } | |
121 | ||
d859e29f PM |
122 | static void |
123 | group_sched_out(struct perf_counter *group_counter, | |
124 | struct perf_cpu_context *cpuctx, | |
125 | struct perf_counter_context *ctx) | |
126 | { | |
127 | struct perf_counter *counter; | |
128 | ||
129 | if (group_counter->state != PERF_COUNTER_STATE_ACTIVE) | |
130 | return; | |
131 | ||
132 | counter_sched_out(group_counter, cpuctx, ctx); | |
133 | ||
134 | /* | |
135 | * Schedule out siblings (if any): | |
136 | */ | |
137 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) | |
138 | counter_sched_out(counter, cpuctx, ctx); | |
139 | ||
140 | if (group_counter->hw_event.exclusive) | |
141 | cpuctx->exclusive = 0; | |
142 | } | |
143 | ||
0793a61d TG |
144 | /* |
145 | * Cross CPU call to remove a performance counter | |
146 | * | |
147 | * We disable the counter on the hardware level first. After that we | |
148 | * remove it from the context list. | |
149 | */ | |
04289bb9 | 150 | static void __perf_counter_remove_from_context(void *info) |
0793a61d TG |
151 | { |
152 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
153 | struct perf_counter *counter = info; | |
154 | struct perf_counter_context *ctx = counter->ctx; | |
9b51f66d | 155 | unsigned long flags; |
5c92d124 | 156 | u64 perf_flags; |
0793a61d TG |
157 | |
158 | /* | |
159 | * If this is a task context, we need to check whether it is | |
160 | * the current task context of this cpu. If not it has been | |
161 | * scheduled out before the smp call arrived. | |
162 | */ | |
163 | if (ctx->task && cpuctx->task_ctx != ctx) | |
164 | return; | |
165 | ||
aa9c4c0f IM |
166 | curr_rq_lock_irq_save(&flags); |
167 | spin_lock(&ctx->lock); | |
0793a61d | 168 | |
3b6f9e5c PM |
169 | counter_sched_out(counter, cpuctx, ctx); |
170 | ||
171 | counter->task = NULL; | |
0793a61d TG |
172 | ctx->nr_counters--; |
173 | ||
174 | /* | |
175 | * Protect the list operation against NMI by disabling the | |
176 | * counters on a global level. NOP for non NMI based counters. | |
177 | */ | |
01b2838c | 178 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 179 | list_del_counter(counter, ctx); |
01b2838c | 180 | hw_perf_restore(perf_flags); |
0793a61d TG |
181 | |
182 | if (!ctx->task) { | |
183 | /* | |
184 | * Allow more per task counters with respect to the | |
185 | * reservation: | |
186 | */ | |
187 | cpuctx->max_pertask = | |
188 | min(perf_max_counters - ctx->nr_counters, | |
189 | perf_max_counters - perf_reserved_percpu); | |
190 | } | |
191 | ||
aa9c4c0f IM |
192 | spin_unlock(&ctx->lock); |
193 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
194 | } |
195 | ||
196 | ||
197 | /* | |
198 | * Remove the counter from a task's (or a CPU's) list of counters. | |
199 | * | |
d859e29f | 200 | * Must be called with counter->mutex and ctx->mutex held. |
0793a61d TG |
201 | * |
202 | * CPU counters are removed with a smp call. For task counters we only | |
203 | * call when the task is on a CPU. | |
204 | */ | |
04289bb9 | 205 | static void perf_counter_remove_from_context(struct perf_counter *counter) |
0793a61d TG |
206 | { |
207 | struct perf_counter_context *ctx = counter->ctx; | |
208 | struct task_struct *task = ctx->task; | |
209 | ||
210 | if (!task) { | |
211 | /* | |
212 | * Per cpu counters are removed via an smp call and | |
213 | * the removal is always sucessful. | |
214 | */ | |
215 | smp_call_function_single(counter->cpu, | |
04289bb9 | 216 | __perf_counter_remove_from_context, |
0793a61d TG |
217 | counter, 1); |
218 | return; | |
219 | } | |
220 | ||
221 | retry: | |
04289bb9 | 222 | task_oncpu_function_call(task, __perf_counter_remove_from_context, |
0793a61d TG |
223 | counter); |
224 | ||
225 | spin_lock_irq(&ctx->lock); | |
226 | /* | |
227 | * If the context is active we need to retry the smp call. | |
228 | */ | |
04289bb9 | 229 | if (ctx->nr_active && !list_empty(&counter->list_entry)) { |
0793a61d TG |
230 | spin_unlock_irq(&ctx->lock); |
231 | goto retry; | |
232 | } | |
233 | ||
234 | /* | |
235 | * The lock prevents that this context is scheduled in so we | |
04289bb9 | 236 | * can remove the counter safely, if the call above did not |
0793a61d TG |
237 | * succeed. |
238 | */ | |
04289bb9 | 239 | if (!list_empty(&counter->list_entry)) { |
0793a61d | 240 | ctx->nr_counters--; |
04289bb9 | 241 | list_del_counter(counter, ctx); |
0793a61d TG |
242 | counter->task = NULL; |
243 | } | |
244 | spin_unlock_irq(&ctx->lock); | |
245 | } | |
246 | ||
d859e29f PM |
247 | /* |
248 | * Cross CPU call to disable a performance counter | |
249 | */ | |
250 | static void __perf_counter_disable(void *info) | |
251 | { | |
252 | struct perf_counter *counter = info; | |
253 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
254 | struct perf_counter_context *ctx = counter->ctx; | |
255 | unsigned long flags; | |
256 | ||
257 | /* | |
258 | * If this is a per-task counter, need to check whether this | |
259 | * counter's task is the current task on this cpu. | |
260 | */ | |
261 | if (ctx->task && cpuctx->task_ctx != ctx) | |
262 | return; | |
263 | ||
264 | curr_rq_lock_irq_save(&flags); | |
265 | spin_lock(&ctx->lock); | |
266 | ||
267 | /* | |
268 | * If the counter is on, turn it off. | |
269 | * If it is in error state, leave it in error state. | |
270 | */ | |
271 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) { | |
272 | if (counter == counter->group_leader) | |
273 | group_sched_out(counter, cpuctx, ctx); | |
274 | else | |
275 | counter_sched_out(counter, cpuctx, ctx); | |
276 | counter->state = PERF_COUNTER_STATE_OFF; | |
277 | } | |
278 | ||
279 | spin_unlock(&ctx->lock); | |
280 | curr_rq_unlock_irq_restore(&flags); | |
281 | } | |
282 | ||
283 | /* | |
284 | * Disable a counter. | |
285 | */ | |
286 | static void perf_counter_disable(struct perf_counter *counter) | |
287 | { | |
288 | struct perf_counter_context *ctx = counter->ctx; | |
289 | struct task_struct *task = ctx->task; | |
290 | ||
291 | if (!task) { | |
292 | /* | |
293 | * Disable the counter on the cpu that it's on | |
294 | */ | |
295 | smp_call_function_single(counter->cpu, __perf_counter_disable, | |
296 | counter, 1); | |
297 | return; | |
298 | } | |
299 | ||
300 | retry: | |
301 | task_oncpu_function_call(task, __perf_counter_disable, counter); | |
302 | ||
303 | spin_lock_irq(&ctx->lock); | |
304 | /* | |
305 | * If the counter is still active, we need to retry the cross-call. | |
306 | */ | |
307 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { | |
308 | spin_unlock_irq(&ctx->lock); | |
309 | goto retry; | |
310 | } | |
311 | ||
312 | /* | |
313 | * Since we have the lock this context can't be scheduled | |
314 | * in, so we can change the state safely. | |
315 | */ | |
316 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
317 | counter->state = PERF_COUNTER_STATE_OFF; | |
318 | ||
319 | spin_unlock_irq(&ctx->lock); | |
320 | } | |
321 | ||
322 | /* | |
323 | * Disable a counter and all its children. | |
324 | */ | |
325 | static void perf_counter_disable_family(struct perf_counter *counter) | |
326 | { | |
327 | struct perf_counter *child; | |
328 | ||
329 | perf_counter_disable(counter); | |
330 | ||
331 | /* | |
332 | * Lock the mutex to protect the list of children | |
333 | */ | |
334 | mutex_lock(&counter->mutex); | |
335 | list_for_each_entry(child, &counter->child_list, child_list) | |
336 | perf_counter_disable(child); | |
337 | mutex_unlock(&counter->mutex); | |
338 | } | |
339 | ||
235c7fc7 IM |
340 | static int |
341 | counter_sched_in(struct perf_counter *counter, | |
342 | struct perf_cpu_context *cpuctx, | |
343 | struct perf_counter_context *ctx, | |
344 | int cpu) | |
345 | { | |
3b6f9e5c | 346 | if (counter->state <= PERF_COUNTER_STATE_OFF) |
235c7fc7 IM |
347 | return 0; |
348 | ||
349 | counter->state = PERF_COUNTER_STATE_ACTIVE; | |
350 | counter->oncpu = cpu; /* TODO: put 'cpu' into cpuctx->cpu */ | |
351 | /* | |
352 | * The new state must be visible before we turn it on in the hardware: | |
353 | */ | |
354 | smp_wmb(); | |
355 | ||
356 | if (counter->hw_ops->enable(counter)) { | |
357 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
358 | counter->oncpu = -1; | |
359 | return -EAGAIN; | |
360 | } | |
361 | ||
3b6f9e5c PM |
362 | if (!is_software_counter(counter)) |
363 | cpuctx->active_oncpu++; | |
235c7fc7 IM |
364 | ctx->nr_active++; |
365 | ||
3b6f9e5c PM |
366 | if (counter->hw_event.exclusive) |
367 | cpuctx->exclusive = 1; | |
368 | ||
235c7fc7 IM |
369 | return 0; |
370 | } | |
371 | ||
3b6f9e5c PM |
372 | /* |
373 | * Return 1 for a group consisting entirely of software counters, | |
374 | * 0 if the group contains any hardware counters. | |
375 | */ | |
376 | static int is_software_only_group(struct perf_counter *leader) | |
377 | { | |
378 | struct perf_counter *counter; | |
379 | ||
380 | if (!is_software_counter(leader)) | |
381 | return 0; | |
382 | list_for_each_entry(counter, &leader->sibling_list, list_entry) | |
383 | if (!is_software_counter(counter)) | |
384 | return 0; | |
385 | return 1; | |
386 | } | |
387 | ||
388 | /* | |
389 | * Work out whether we can put this counter group on the CPU now. | |
390 | */ | |
391 | static int group_can_go_on(struct perf_counter *counter, | |
392 | struct perf_cpu_context *cpuctx, | |
393 | int can_add_hw) | |
394 | { | |
395 | /* | |
396 | * Groups consisting entirely of software counters can always go on. | |
397 | */ | |
398 | if (is_software_only_group(counter)) | |
399 | return 1; | |
400 | /* | |
401 | * If an exclusive group is already on, no other hardware | |
402 | * counters can go on. | |
403 | */ | |
404 | if (cpuctx->exclusive) | |
405 | return 0; | |
406 | /* | |
407 | * If this group is exclusive and there are already | |
408 | * counters on the CPU, it can't go on. | |
409 | */ | |
410 | if (counter->hw_event.exclusive && cpuctx->active_oncpu) | |
411 | return 0; | |
412 | /* | |
413 | * Otherwise, try to add it if all previous groups were able | |
414 | * to go on. | |
415 | */ | |
416 | return can_add_hw; | |
417 | } | |
418 | ||
0793a61d | 419 | /* |
235c7fc7 | 420 | * Cross CPU call to install and enable a performance counter |
0793a61d TG |
421 | */ |
422 | static void __perf_install_in_context(void *info) | |
423 | { | |
424 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
425 | struct perf_counter *counter = info; | |
426 | struct perf_counter_context *ctx = counter->ctx; | |
d859e29f | 427 | struct perf_counter *leader = counter->group_leader; |
0793a61d | 428 | int cpu = smp_processor_id(); |
9b51f66d | 429 | unsigned long flags; |
5c92d124 | 430 | u64 perf_flags; |
3b6f9e5c | 431 | int err; |
0793a61d TG |
432 | |
433 | /* | |
434 | * If this is a task context, we need to check whether it is | |
435 | * the current task context of this cpu. If not it has been | |
436 | * scheduled out before the smp call arrived. | |
437 | */ | |
438 | if (ctx->task && cpuctx->task_ctx != ctx) | |
439 | return; | |
440 | ||
aa9c4c0f IM |
441 | curr_rq_lock_irq_save(&flags); |
442 | spin_lock(&ctx->lock); | |
0793a61d TG |
443 | |
444 | /* | |
445 | * Protect the list operation against NMI by disabling the | |
446 | * counters on a global level. NOP for non NMI based counters. | |
447 | */ | |
01b2838c | 448 | perf_flags = hw_perf_save_disable(); |
0793a61d | 449 | |
235c7fc7 | 450 | list_add_counter(counter, ctx); |
0793a61d | 451 | ctx->nr_counters++; |
c07c99b6 | 452 | counter->prev_state = PERF_COUNTER_STATE_OFF; |
0793a61d | 453 | |
d859e29f PM |
454 | /* |
455 | * Don't put the counter on if it is disabled or if | |
456 | * it is in a group and the group isn't on. | |
457 | */ | |
458 | if (counter->state != PERF_COUNTER_STATE_INACTIVE || | |
459 | (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE)) | |
460 | goto unlock; | |
461 | ||
3b6f9e5c PM |
462 | /* |
463 | * An exclusive counter can't go on if there are already active | |
464 | * hardware counters, and no hardware counter can go on if there | |
465 | * is already an exclusive counter on. | |
466 | */ | |
d859e29f | 467 | if (!group_can_go_on(counter, cpuctx, 1)) |
3b6f9e5c PM |
468 | err = -EEXIST; |
469 | else | |
470 | err = counter_sched_in(counter, cpuctx, ctx, cpu); | |
471 | ||
d859e29f PM |
472 | if (err) { |
473 | /* | |
474 | * This counter couldn't go on. If it is in a group | |
475 | * then we have to pull the whole group off. | |
476 | * If the counter group is pinned then put it in error state. | |
477 | */ | |
478 | if (leader != counter) | |
479 | group_sched_out(leader, cpuctx, ctx); | |
480 | if (leader->hw_event.pinned) | |
481 | leader->state = PERF_COUNTER_STATE_ERROR; | |
482 | } | |
0793a61d | 483 | |
3b6f9e5c | 484 | if (!err && !ctx->task && cpuctx->max_pertask) |
0793a61d TG |
485 | cpuctx->max_pertask--; |
486 | ||
d859e29f | 487 | unlock: |
235c7fc7 IM |
488 | hw_perf_restore(perf_flags); |
489 | ||
aa9c4c0f IM |
490 | spin_unlock(&ctx->lock); |
491 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
492 | } |
493 | ||
494 | /* | |
495 | * Attach a performance counter to a context | |
496 | * | |
497 | * First we add the counter to the list with the hardware enable bit | |
498 | * in counter->hw_config cleared. | |
499 | * | |
500 | * If the counter is attached to a task which is on a CPU we use a smp | |
501 | * call to enable it in the task context. The task might have been | |
502 | * scheduled away, but we check this in the smp call again. | |
d859e29f PM |
503 | * |
504 | * Must be called with ctx->mutex held. | |
0793a61d TG |
505 | */ |
506 | static void | |
507 | perf_install_in_context(struct perf_counter_context *ctx, | |
508 | struct perf_counter *counter, | |
509 | int cpu) | |
510 | { | |
511 | struct task_struct *task = ctx->task; | |
512 | ||
0793a61d TG |
513 | if (!task) { |
514 | /* | |
515 | * Per cpu counters are installed via an smp call and | |
516 | * the install is always sucessful. | |
517 | */ | |
518 | smp_call_function_single(cpu, __perf_install_in_context, | |
519 | counter, 1); | |
520 | return; | |
521 | } | |
522 | ||
523 | counter->task = task; | |
524 | retry: | |
525 | task_oncpu_function_call(task, __perf_install_in_context, | |
526 | counter); | |
527 | ||
528 | spin_lock_irq(&ctx->lock); | |
529 | /* | |
0793a61d TG |
530 | * we need to retry the smp call. |
531 | */ | |
d859e29f | 532 | if (ctx->is_active && list_empty(&counter->list_entry)) { |
0793a61d TG |
533 | spin_unlock_irq(&ctx->lock); |
534 | goto retry; | |
535 | } | |
536 | ||
537 | /* | |
538 | * The lock prevents that this context is scheduled in so we | |
539 | * can add the counter safely, if it the call above did not | |
540 | * succeed. | |
541 | */ | |
04289bb9 IM |
542 | if (list_empty(&counter->list_entry)) { |
543 | list_add_counter(counter, ctx); | |
0793a61d TG |
544 | ctx->nr_counters++; |
545 | } | |
546 | spin_unlock_irq(&ctx->lock); | |
547 | } | |
548 | ||
d859e29f PM |
549 | /* |
550 | * Cross CPU call to enable a performance counter | |
551 | */ | |
552 | static void __perf_counter_enable(void *info) | |
04289bb9 | 553 | { |
d859e29f PM |
554 | struct perf_counter *counter = info; |
555 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
556 | struct perf_counter_context *ctx = counter->ctx; | |
557 | struct perf_counter *leader = counter->group_leader; | |
558 | unsigned long flags; | |
559 | int err; | |
04289bb9 | 560 | |
d859e29f PM |
561 | /* |
562 | * If this is a per-task counter, need to check whether this | |
563 | * counter's task is the current task on this cpu. | |
564 | */ | |
565 | if (ctx->task && cpuctx->task_ctx != ctx) | |
3cbed429 PM |
566 | return; |
567 | ||
d859e29f PM |
568 | curr_rq_lock_irq_save(&flags); |
569 | spin_lock(&ctx->lock); | |
570 | ||
c07c99b6 | 571 | counter->prev_state = counter->state; |
d859e29f PM |
572 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) |
573 | goto unlock; | |
574 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
04289bb9 IM |
575 | |
576 | /* | |
d859e29f PM |
577 | * If the counter is in a group and isn't the group leader, |
578 | * then don't put it on unless the group is on. | |
04289bb9 | 579 | */ |
d859e29f PM |
580 | if (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE) |
581 | goto unlock; | |
3b6f9e5c | 582 | |
d859e29f PM |
583 | if (!group_can_go_on(counter, cpuctx, 1)) |
584 | err = -EEXIST; | |
585 | else | |
586 | err = counter_sched_in(counter, cpuctx, ctx, | |
587 | smp_processor_id()); | |
588 | ||
589 | if (err) { | |
590 | /* | |
591 | * If this counter can't go on and it's part of a | |
592 | * group, then the whole group has to come off. | |
593 | */ | |
594 | if (leader != counter) | |
595 | group_sched_out(leader, cpuctx, ctx); | |
596 | if (leader->hw_event.pinned) | |
597 | leader->state = PERF_COUNTER_STATE_ERROR; | |
598 | } | |
599 | ||
600 | unlock: | |
601 | spin_unlock(&ctx->lock); | |
602 | curr_rq_unlock_irq_restore(&flags); | |
603 | } | |
604 | ||
605 | /* | |
606 | * Enable a counter. | |
607 | */ | |
608 | static void perf_counter_enable(struct perf_counter *counter) | |
609 | { | |
610 | struct perf_counter_context *ctx = counter->ctx; | |
611 | struct task_struct *task = ctx->task; | |
612 | ||
613 | if (!task) { | |
614 | /* | |
615 | * Enable the counter on the cpu that it's on | |
616 | */ | |
617 | smp_call_function_single(counter->cpu, __perf_counter_enable, | |
618 | counter, 1); | |
619 | return; | |
620 | } | |
621 | ||
622 | spin_lock_irq(&ctx->lock); | |
623 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
624 | goto out; | |
625 | ||
626 | /* | |
627 | * If the counter is in error state, clear that first. | |
628 | * That way, if we see the counter in error state below, we | |
629 | * know that it has gone back into error state, as distinct | |
630 | * from the task having been scheduled away before the | |
631 | * cross-call arrived. | |
632 | */ | |
633 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
634 | counter->state = PERF_COUNTER_STATE_OFF; | |
635 | ||
636 | retry: | |
637 | spin_unlock_irq(&ctx->lock); | |
638 | task_oncpu_function_call(task, __perf_counter_enable, counter); | |
639 | ||
640 | spin_lock_irq(&ctx->lock); | |
641 | ||
642 | /* | |
643 | * If the context is active and the counter is still off, | |
644 | * we need to retry the cross-call. | |
645 | */ | |
646 | if (ctx->is_active && counter->state == PERF_COUNTER_STATE_OFF) | |
647 | goto retry; | |
648 | ||
649 | /* | |
650 | * Since we have the lock this context can't be scheduled | |
651 | * in, so we can change the state safely. | |
652 | */ | |
653 | if (counter->state == PERF_COUNTER_STATE_OFF) | |
654 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
655 | out: | |
656 | spin_unlock_irq(&ctx->lock); | |
657 | } | |
658 | ||
659 | /* | |
660 | * Enable a counter and all its children. | |
661 | */ | |
662 | static void perf_counter_enable_family(struct perf_counter *counter) | |
663 | { | |
664 | struct perf_counter *child; | |
665 | ||
666 | perf_counter_enable(counter); | |
667 | ||
668 | /* | |
669 | * Lock the mutex to protect the list of children | |
670 | */ | |
671 | mutex_lock(&counter->mutex); | |
672 | list_for_each_entry(child, &counter->child_list, child_list) | |
673 | perf_counter_enable(child); | |
674 | mutex_unlock(&counter->mutex); | |
04289bb9 IM |
675 | } |
676 | ||
235c7fc7 IM |
677 | void __perf_counter_sched_out(struct perf_counter_context *ctx, |
678 | struct perf_cpu_context *cpuctx) | |
679 | { | |
680 | struct perf_counter *counter; | |
3cbed429 | 681 | u64 flags; |
235c7fc7 | 682 | |
d859e29f PM |
683 | spin_lock(&ctx->lock); |
684 | ctx->is_active = 0; | |
235c7fc7 | 685 | if (likely(!ctx->nr_counters)) |
d859e29f | 686 | goto out; |
235c7fc7 | 687 | |
3cbed429 | 688 | flags = hw_perf_save_disable(); |
235c7fc7 IM |
689 | if (ctx->nr_active) { |
690 | list_for_each_entry(counter, &ctx->counter_list, list_entry) | |
691 | group_sched_out(counter, cpuctx, ctx); | |
692 | } | |
3cbed429 | 693 | hw_perf_restore(flags); |
d859e29f | 694 | out: |
235c7fc7 IM |
695 | spin_unlock(&ctx->lock); |
696 | } | |
697 | ||
0793a61d TG |
698 | /* |
699 | * Called from scheduler to remove the counters of the current task, | |
700 | * with interrupts disabled. | |
701 | * | |
702 | * We stop each counter and update the counter value in counter->count. | |
703 | * | |
7671581f | 704 | * This does not protect us against NMI, but disable() |
0793a61d TG |
705 | * sets the disabled bit in the control field of counter _before_ |
706 | * accessing the counter control register. If a NMI hits, then it will | |
707 | * not restart the counter. | |
708 | */ | |
709 | void perf_counter_task_sched_out(struct task_struct *task, int cpu) | |
710 | { | |
711 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
712 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
4a0deca6 | 713 | struct pt_regs *regs; |
0793a61d TG |
714 | |
715 | if (likely(!cpuctx->task_ctx)) | |
716 | return; | |
717 | ||
4a0deca6 PZ |
718 | regs = task_pt_regs(task); |
719 | perf_swcounter_event(PERF_COUNT_CONTEXT_SWITCHES, 1, 1, regs); | |
235c7fc7 IM |
720 | __perf_counter_sched_out(ctx, cpuctx); |
721 | ||
0793a61d TG |
722 | cpuctx->task_ctx = NULL; |
723 | } | |
724 | ||
235c7fc7 | 725 | static void perf_counter_cpu_sched_out(struct perf_cpu_context *cpuctx) |
04289bb9 | 726 | { |
235c7fc7 | 727 | __perf_counter_sched_out(&cpuctx->ctx, cpuctx); |
04289bb9 IM |
728 | } |
729 | ||
7995888f | 730 | static int |
04289bb9 IM |
731 | group_sched_in(struct perf_counter *group_counter, |
732 | struct perf_cpu_context *cpuctx, | |
733 | struct perf_counter_context *ctx, | |
734 | int cpu) | |
735 | { | |
95cdd2e7 | 736 | struct perf_counter *counter, *partial_group; |
3cbed429 PM |
737 | int ret; |
738 | ||
739 | if (group_counter->state == PERF_COUNTER_STATE_OFF) | |
740 | return 0; | |
741 | ||
742 | ret = hw_perf_group_sched_in(group_counter, cpuctx, ctx, cpu); | |
743 | if (ret) | |
744 | return ret < 0 ? ret : 0; | |
04289bb9 | 745 | |
c07c99b6 | 746 | group_counter->prev_state = group_counter->state; |
95cdd2e7 IM |
747 | if (counter_sched_in(group_counter, cpuctx, ctx, cpu)) |
748 | return -EAGAIN; | |
04289bb9 IM |
749 | |
750 | /* | |
751 | * Schedule in siblings as one group (if any): | |
752 | */ | |
7995888f | 753 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { |
c07c99b6 | 754 | counter->prev_state = counter->state; |
95cdd2e7 IM |
755 | if (counter_sched_in(counter, cpuctx, ctx, cpu)) { |
756 | partial_group = counter; | |
757 | goto group_error; | |
758 | } | |
95cdd2e7 IM |
759 | } |
760 | ||
3cbed429 | 761 | return 0; |
95cdd2e7 IM |
762 | |
763 | group_error: | |
764 | /* | |
765 | * Groups can be scheduled in as one unit only, so undo any | |
766 | * partial group before returning: | |
767 | */ | |
768 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { | |
769 | if (counter == partial_group) | |
770 | break; | |
771 | counter_sched_out(counter, cpuctx, ctx); | |
7995888f | 772 | } |
95cdd2e7 | 773 | counter_sched_out(group_counter, cpuctx, ctx); |
7995888f | 774 | |
95cdd2e7 | 775 | return -EAGAIN; |
04289bb9 IM |
776 | } |
777 | ||
235c7fc7 IM |
778 | static void |
779 | __perf_counter_sched_in(struct perf_counter_context *ctx, | |
780 | struct perf_cpu_context *cpuctx, int cpu) | |
0793a61d | 781 | { |
0793a61d | 782 | struct perf_counter *counter; |
3cbed429 | 783 | u64 flags; |
dd0e6ba2 | 784 | int can_add_hw = 1; |
0793a61d | 785 | |
d859e29f PM |
786 | spin_lock(&ctx->lock); |
787 | ctx->is_active = 1; | |
0793a61d | 788 | if (likely(!ctx->nr_counters)) |
d859e29f | 789 | goto out; |
0793a61d | 790 | |
3cbed429 | 791 | flags = hw_perf_save_disable(); |
3b6f9e5c PM |
792 | |
793 | /* | |
794 | * First go through the list and put on any pinned groups | |
795 | * in order to give them the best chance of going on. | |
796 | */ | |
797 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
798 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
799 | !counter->hw_event.pinned) | |
800 | continue; | |
801 | if (counter->cpu != -1 && counter->cpu != cpu) | |
802 | continue; | |
803 | ||
804 | if (group_can_go_on(counter, cpuctx, 1)) | |
805 | group_sched_in(counter, cpuctx, ctx, cpu); | |
806 | ||
807 | /* | |
808 | * If this pinned group hasn't been scheduled, | |
809 | * put it in error state. | |
810 | */ | |
811 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
812 | counter->state = PERF_COUNTER_STATE_ERROR; | |
813 | } | |
814 | ||
04289bb9 | 815 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
3b6f9e5c PM |
816 | /* |
817 | * Ignore counters in OFF or ERROR state, and | |
818 | * ignore pinned counters since we did them already. | |
819 | */ | |
820 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
821 | counter->hw_event.pinned) | |
822 | continue; | |
823 | ||
04289bb9 IM |
824 | /* |
825 | * Listen to the 'cpu' scheduling filter constraint | |
826 | * of counters: | |
827 | */ | |
0793a61d TG |
828 | if (counter->cpu != -1 && counter->cpu != cpu) |
829 | continue; | |
830 | ||
3b6f9e5c | 831 | if (group_can_go_on(counter, cpuctx, can_add_hw)) { |
dd0e6ba2 PM |
832 | if (group_sched_in(counter, cpuctx, ctx, cpu)) |
833 | can_add_hw = 0; | |
3b6f9e5c | 834 | } |
0793a61d | 835 | } |
3cbed429 | 836 | hw_perf_restore(flags); |
d859e29f | 837 | out: |
0793a61d | 838 | spin_unlock(&ctx->lock); |
235c7fc7 IM |
839 | } |
840 | ||
841 | /* | |
842 | * Called from scheduler to add the counters of the current task | |
843 | * with interrupts disabled. | |
844 | * | |
845 | * We restore the counter value and then enable it. | |
846 | * | |
847 | * This does not protect us against NMI, but enable() | |
848 | * sets the enabled bit in the control field of counter _before_ | |
849 | * accessing the counter control register. If a NMI hits, then it will | |
850 | * keep the counter running. | |
851 | */ | |
852 | void perf_counter_task_sched_in(struct task_struct *task, int cpu) | |
853 | { | |
854 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
855 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
04289bb9 | 856 | |
235c7fc7 | 857 | __perf_counter_sched_in(ctx, cpuctx, cpu); |
0793a61d TG |
858 | cpuctx->task_ctx = ctx; |
859 | } | |
860 | ||
235c7fc7 IM |
861 | static void perf_counter_cpu_sched_in(struct perf_cpu_context *cpuctx, int cpu) |
862 | { | |
863 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
864 | ||
865 | __perf_counter_sched_in(ctx, cpuctx, cpu); | |
866 | } | |
867 | ||
1d1c7ddb IM |
868 | int perf_counter_task_disable(void) |
869 | { | |
870 | struct task_struct *curr = current; | |
871 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
872 | struct perf_counter *counter; | |
aa9c4c0f | 873 | unsigned long flags; |
1d1c7ddb IM |
874 | u64 perf_flags; |
875 | int cpu; | |
876 | ||
877 | if (likely(!ctx->nr_counters)) | |
878 | return 0; | |
879 | ||
aa9c4c0f | 880 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
881 | cpu = smp_processor_id(); |
882 | ||
aa9c4c0f IM |
883 | /* force the update of the task clock: */ |
884 | __task_delta_exec(curr, 1); | |
885 | ||
1d1c7ddb IM |
886 | perf_counter_task_sched_out(curr, cpu); |
887 | ||
888 | spin_lock(&ctx->lock); | |
889 | ||
890 | /* | |
891 | * Disable all the counters: | |
892 | */ | |
893 | perf_flags = hw_perf_save_disable(); | |
894 | ||
3b6f9e5c PM |
895 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
896 | if (counter->state != PERF_COUNTER_STATE_ERROR) | |
897 | counter->state = PERF_COUNTER_STATE_OFF; | |
898 | } | |
9b51f66d | 899 | |
1d1c7ddb IM |
900 | hw_perf_restore(perf_flags); |
901 | ||
902 | spin_unlock(&ctx->lock); | |
903 | ||
aa9c4c0f | 904 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
905 | |
906 | return 0; | |
907 | } | |
908 | ||
909 | int perf_counter_task_enable(void) | |
910 | { | |
911 | struct task_struct *curr = current; | |
912 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
913 | struct perf_counter *counter; | |
aa9c4c0f | 914 | unsigned long flags; |
1d1c7ddb IM |
915 | u64 perf_flags; |
916 | int cpu; | |
917 | ||
918 | if (likely(!ctx->nr_counters)) | |
919 | return 0; | |
920 | ||
aa9c4c0f | 921 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
922 | cpu = smp_processor_id(); |
923 | ||
aa9c4c0f IM |
924 | /* force the update of the task clock: */ |
925 | __task_delta_exec(curr, 1); | |
926 | ||
235c7fc7 IM |
927 | perf_counter_task_sched_out(curr, cpu); |
928 | ||
1d1c7ddb IM |
929 | spin_lock(&ctx->lock); |
930 | ||
931 | /* | |
932 | * Disable all the counters: | |
933 | */ | |
934 | perf_flags = hw_perf_save_disable(); | |
935 | ||
936 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
3b6f9e5c | 937 | if (counter->state > PERF_COUNTER_STATE_OFF) |
1d1c7ddb | 938 | continue; |
6a930700 | 939 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
aa9c4c0f | 940 | counter->hw_event.disabled = 0; |
1d1c7ddb IM |
941 | } |
942 | hw_perf_restore(perf_flags); | |
943 | ||
944 | spin_unlock(&ctx->lock); | |
945 | ||
946 | perf_counter_task_sched_in(curr, cpu); | |
947 | ||
aa9c4c0f | 948 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
949 | |
950 | return 0; | |
951 | } | |
952 | ||
235c7fc7 IM |
953 | /* |
954 | * Round-robin a context's counters: | |
955 | */ | |
956 | static void rotate_ctx(struct perf_counter_context *ctx) | |
0793a61d | 957 | { |
0793a61d | 958 | struct perf_counter *counter; |
5c92d124 | 959 | u64 perf_flags; |
0793a61d | 960 | |
235c7fc7 | 961 | if (!ctx->nr_counters) |
0793a61d TG |
962 | return; |
963 | ||
0793a61d | 964 | spin_lock(&ctx->lock); |
0793a61d | 965 | /* |
04289bb9 | 966 | * Rotate the first entry last (works just fine for group counters too): |
0793a61d | 967 | */ |
01b2838c | 968 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 969 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
75564232 | 970 | list_move_tail(&counter->list_entry, &ctx->counter_list); |
0793a61d TG |
971 | break; |
972 | } | |
01b2838c | 973 | hw_perf_restore(perf_flags); |
0793a61d TG |
974 | |
975 | spin_unlock(&ctx->lock); | |
235c7fc7 IM |
976 | } |
977 | ||
978 | void perf_counter_task_tick(struct task_struct *curr, int cpu) | |
979 | { | |
980 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
981 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
982 | const int rotate_percpu = 0; | |
983 | ||
984 | if (rotate_percpu) | |
985 | perf_counter_cpu_sched_out(cpuctx); | |
986 | perf_counter_task_sched_out(curr, cpu); | |
0793a61d | 987 | |
235c7fc7 IM |
988 | if (rotate_percpu) |
989 | rotate_ctx(&cpuctx->ctx); | |
990 | rotate_ctx(ctx); | |
991 | ||
992 | if (rotate_percpu) | |
993 | perf_counter_cpu_sched_in(cpuctx, cpu); | |
0793a61d TG |
994 | perf_counter_task_sched_in(curr, cpu); |
995 | } | |
996 | ||
0793a61d TG |
997 | /* |
998 | * Cross CPU call to read the hardware counter | |
999 | */ | |
7671581f | 1000 | static void __read(void *info) |
0793a61d | 1001 | { |
621a01ea | 1002 | struct perf_counter *counter = info; |
aa9c4c0f | 1003 | unsigned long flags; |
621a01ea | 1004 | |
aa9c4c0f | 1005 | curr_rq_lock_irq_save(&flags); |
7671581f | 1006 | counter->hw_ops->read(counter); |
aa9c4c0f | 1007 | curr_rq_unlock_irq_restore(&flags); |
0793a61d TG |
1008 | } |
1009 | ||
04289bb9 | 1010 | static u64 perf_counter_read(struct perf_counter *counter) |
0793a61d TG |
1011 | { |
1012 | /* | |
1013 | * If counter is enabled and currently active on a CPU, update the | |
1014 | * value in the counter structure: | |
1015 | */ | |
6a930700 | 1016 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { |
0793a61d | 1017 | smp_call_function_single(counter->oncpu, |
7671581f | 1018 | __read, counter, 1); |
0793a61d TG |
1019 | } |
1020 | ||
ee06094f | 1021 | return atomic64_read(&counter->count); |
0793a61d TG |
1022 | } |
1023 | ||
1024 | /* | |
1025 | * Cross CPU call to switch performance data pointers | |
1026 | */ | |
1027 | static void __perf_switch_irq_data(void *info) | |
1028 | { | |
1029 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
1030 | struct perf_counter *counter = info; | |
1031 | struct perf_counter_context *ctx = counter->ctx; | |
1032 | struct perf_data *oldirqdata = counter->irqdata; | |
1033 | ||
1034 | /* | |
1035 | * If this is a task context, we need to check whether it is | |
1036 | * the current task context of this cpu. If not it has been | |
1037 | * scheduled out before the smp call arrived. | |
1038 | */ | |
1039 | if (ctx->task) { | |
1040 | if (cpuctx->task_ctx != ctx) | |
1041 | return; | |
1042 | spin_lock(&ctx->lock); | |
1043 | } | |
1044 | ||
1045 | /* Change the pointer NMI safe */ | |
1046 | atomic_long_set((atomic_long_t *)&counter->irqdata, | |
1047 | (unsigned long) counter->usrdata); | |
1048 | counter->usrdata = oldirqdata; | |
1049 | ||
1050 | if (ctx->task) | |
1051 | spin_unlock(&ctx->lock); | |
1052 | } | |
1053 | ||
1054 | static struct perf_data *perf_switch_irq_data(struct perf_counter *counter) | |
1055 | { | |
1056 | struct perf_counter_context *ctx = counter->ctx; | |
1057 | struct perf_data *oldirqdata = counter->irqdata; | |
1058 | struct task_struct *task = ctx->task; | |
1059 | ||
1060 | if (!task) { | |
1061 | smp_call_function_single(counter->cpu, | |
1062 | __perf_switch_irq_data, | |
1063 | counter, 1); | |
1064 | return counter->usrdata; | |
1065 | } | |
1066 | ||
1067 | retry: | |
1068 | spin_lock_irq(&ctx->lock); | |
6a930700 | 1069 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) { |
0793a61d TG |
1070 | counter->irqdata = counter->usrdata; |
1071 | counter->usrdata = oldirqdata; | |
1072 | spin_unlock_irq(&ctx->lock); | |
1073 | return oldirqdata; | |
1074 | } | |
1075 | spin_unlock_irq(&ctx->lock); | |
1076 | task_oncpu_function_call(task, __perf_switch_irq_data, counter); | |
1077 | /* Might have failed, because task was scheduled out */ | |
1078 | if (counter->irqdata == oldirqdata) | |
1079 | goto retry; | |
1080 | ||
1081 | return counter->usrdata; | |
1082 | } | |
1083 | ||
1084 | static void put_context(struct perf_counter_context *ctx) | |
1085 | { | |
1086 | if (ctx->task) | |
1087 | put_task_struct(ctx->task); | |
1088 | } | |
1089 | ||
1090 | static struct perf_counter_context *find_get_context(pid_t pid, int cpu) | |
1091 | { | |
1092 | struct perf_cpu_context *cpuctx; | |
1093 | struct perf_counter_context *ctx; | |
1094 | struct task_struct *task; | |
1095 | ||
1096 | /* | |
1097 | * If cpu is not a wildcard then this is a percpu counter: | |
1098 | */ | |
1099 | if (cpu != -1) { | |
1100 | /* Must be root to operate on a CPU counter: */ | |
1101 | if (!capable(CAP_SYS_ADMIN)) | |
1102 | return ERR_PTR(-EACCES); | |
1103 | ||
1104 | if (cpu < 0 || cpu > num_possible_cpus()) | |
1105 | return ERR_PTR(-EINVAL); | |
1106 | ||
1107 | /* | |
1108 | * We could be clever and allow to attach a counter to an | |
1109 | * offline CPU and activate it when the CPU comes up, but | |
1110 | * that's for later. | |
1111 | */ | |
1112 | if (!cpu_isset(cpu, cpu_online_map)) | |
1113 | return ERR_PTR(-ENODEV); | |
1114 | ||
1115 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1116 | ctx = &cpuctx->ctx; | |
1117 | ||
0793a61d TG |
1118 | return ctx; |
1119 | } | |
1120 | ||
1121 | rcu_read_lock(); | |
1122 | if (!pid) | |
1123 | task = current; | |
1124 | else | |
1125 | task = find_task_by_vpid(pid); | |
1126 | if (task) | |
1127 | get_task_struct(task); | |
1128 | rcu_read_unlock(); | |
1129 | ||
1130 | if (!task) | |
1131 | return ERR_PTR(-ESRCH); | |
1132 | ||
1133 | ctx = &task->perf_counter_ctx; | |
1134 | ctx->task = task; | |
1135 | ||
1136 | /* Reuse ptrace permission checks for now. */ | |
1137 | if (!ptrace_may_access(task, PTRACE_MODE_READ)) { | |
1138 | put_context(ctx); | |
1139 | return ERR_PTR(-EACCES); | |
1140 | } | |
1141 | ||
1142 | return ctx; | |
1143 | } | |
1144 | ||
592903cd PZ |
1145 | static void free_counter_rcu(struct rcu_head *head) |
1146 | { | |
1147 | struct perf_counter *counter; | |
1148 | ||
1149 | counter = container_of(head, struct perf_counter, rcu_head); | |
1150 | kfree(counter); | |
1151 | } | |
1152 | ||
0793a61d TG |
1153 | /* |
1154 | * Called when the last reference to the file is gone. | |
1155 | */ | |
1156 | static int perf_release(struct inode *inode, struct file *file) | |
1157 | { | |
1158 | struct perf_counter *counter = file->private_data; | |
1159 | struct perf_counter_context *ctx = counter->ctx; | |
1160 | ||
1161 | file->private_data = NULL; | |
1162 | ||
d859e29f | 1163 | mutex_lock(&ctx->mutex); |
0793a61d TG |
1164 | mutex_lock(&counter->mutex); |
1165 | ||
04289bb9 | 1166 | perf_counter_remove_from_context(counter); |
0793a61d TG |
1167 | |
1168 | mutex_unlock(&counter->mutex); | |
d859e29f | 1169 | mutex_unlock(&ctx->mutex); |
0793a61d | 1170 | |
592903cd | 1171 | call_rcu(&counter->rcu_head, free_counter_rcu); |
5af75917 | 1172 | put_context(ctx); |
0793a61d TG |
1173 | |
1174 | return 0; | |
1175 | } | |
1176 | ||
1177 | /* | |
1178 | * Read the performance counter - simple non blocking version for now | |
1179 | */ | |
1180 | static ssize_t | |
1181 | perf_read_hw(struct perf_counter *counter, char __user *buf, size_t count) | |
1182 | { | |
1183 | u64 cntval; | |
1184 | ||
1185 | if (count != sizeof(cntval)) | |
1186 | return -EINVAL; | |
1187 | ||
3b6f9e5c PM |
1188 | /* |
1189 | * Return end-of-file for a read on a counter that is in | |
1190 | * error state (i.e. because it was pinned but it couldn't be | |
1191 | * scheduled on to the CPU at some point). | |
1192 | */ | |
1193 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
1194 | return 0; | |
1195 | ||
0793a61d | 1196 | mutex_lock(&counter->mutex); |
04289bb9 | 1197 | cntval = perf_counter_read(counter); |
0793a61d TG |
1198 | mutex_unlock(&counter->mutex); |
1199 | ||
1200 | return put_user(cntval, (u64 __user *) buf) ? -EFAULT : sizeof(cntval); | |
1201 | } | |
1202 | ||
1203 | static ssize_t | |
1204 | perf_copy_usrdata(struct perf_data *usrdata, char __user *buf, size_t count) | |
1205 | { | |
1206 | if (!usrdata->len) | |
1207 | return 0; | |
1208 | ||
1209 | count = min(count, (size_t)usrdata->len); | |
1210 | if (copy_to_user(buf, usrdata->data + usrdata->rd_idx, count)) | |
1211 | return -EFAULT; | |
1212 | ||
1213 | /* Adjust the counters */ | |
1214 | usrdata->len -= count; | |
1215 | if (!usrdata->len) | |
1216 | usrdata->rd_idx = 0; | |
1217 | else | |
1218 | usrdata->rd_idx += count; | |
1219 | ||
1220 | return count; | |
1221 | } | |
1222 | ||
1223 | static ssize_t | |
1224 | perf_read_irq_data(struct perf_counter *counter, | |
1225 | char __user *buf, | |
1226 | size_t count, | |
1227 | int nonblocking) | |
1228 | { | |
1229 | struct perf_data *irqdata, *usrdata; | |
1230 | DECLARE_WAITQUEUE(wait, current); | |
3b6f9e5c | 1231 | ssize_t res, res2; |
0793a61d TG |
1232 | |
1233 | irqdata = counter->irqdata; | |
1234 | usrdata = counter->usrdata; | |
1235 | ||
1236 | if (usrdata->len + irqdata->len >= count) | |
1237 | goto read_pending; | |
1238 | ||
1239 | if (nonblocking) | |
1240 | return -EAGAIN; | |
1241 | ||
1242 | spin_lock_irq(&counter->waitq.lock); | |
1243 | __add_wait_queue(&counter->waitq, &wait); | |
1244 | for (;;) { | |
1245 | set_current_state(TASK_INTERRUPTIBLE); | |
1246 | if (usrdata->len + irqdata->len >= count) | |
1247 | break; | |
1248 | ||
1249 | if (signal_pending(current)) | |
1250 | break; | |
1251 | ||
3b6f9e5c PM |
1252 | if (counter->state == PERF_COUNTER_STATE_ERROR) |
1253 | break; | |
1254 | ||
0793a61d TG |
1255 | spin_unlock_irq(&counter->waitq.lock); |
1256 | schedule(); | |
1257 | spin_lock_irq(&counter->waitq.lock); | |
1258 | } | |
1259 | __remove_wait_queue(&counter->waitq, &wait); | |
1260 | __set_current_state(TASK_RUNNING); | |
1261 | spin_unlock_irq(&counter->waitq.lock); | |
1262 | ||
3b6f9e5c PM |
1263 | if (usrdata->len + irqdata->len < count && |
1264 | counter->state != PERF_COUNTER_STATE_ERROR) | |
0793a61d TG |
1265 | return -ERESTARTSYS; |
1266 | read_pending: | |
1267 | mutex_lock(&counter->mutex); | |
1268 | ||
1269 | /* Drain pending data first: */ | |
1270 | res = perf_copy_usrdata(usrdata, buf, count); | |
1271 | if (res < 0 || res == count) | |
1272 | goto out; | |
1273 | ||
1274 | /* Switch irq buffer: */ | |
1275 | usrdata = perf_switch_irq_data(counter); | |
3b6f9e5c PM |
1276 | res2 = perf_copy_usrdata(usrdata, buf + res, count - res); |
1277 | if (res2 < 0) { | |
0793a61d TG |
1278 | if (!res) |
1279 | res = -EFAULT; | |
1280 | } else { | |
3b6f9e5c | 1281 | res += res2; |
0793a61d TG |
1282 | } |
1283 | out: | |
1284 | mutex_unlock(&counter->mutex); | |
1285 | ||
1286 | return res; | |
1287 | } | |
1288 | ||
1289 | static ssize_t | |
1290 | perf_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | |
1291 | { | |
1292 | struct perf_counter *counter = file->private_data; | |
1293 | ||
9f66a381 | 1294 | switch (counter->hw_event.record_type) { |
0793a61d TG |
1295 | case PERF_RECORD_SIMPLE: |
1296 | return perf_read_hw(counter, buf, count); | |
1297 | ||
1298 | case PERF_RECORD_IRQ: | |
1299 | case PERF_RECORD_GROUP: | |
1300 | return perf_read_irq_data(counter, buf, count, | |
1301 | file->f_flags & O_NONBLOCK); | |
1302 | } | |
1303 | return -EINVAL; | |
1304 | } | |
1305 | ||
1306 | static unsigned int perf_poll(struct file *file, poll_table *wait) | |
1307 | { | |
1308 | struct perf_counter *counter = file->private_data; | |
1309 | unsigned int events = 0; | |
1310 | unsigned long flags; | |
1311 | ||
1312 | poll_wait(file, &counter->waitq, wait); | |
1313 | ||
1314 | spin_lock_irqsave(&counter->waitq.lock, flags); | |
1315 | if (counter->usrdata->len || counter->irqdata->len) | |
1316 | events |= POLLIN; | |
1317 | spin_unlock_irqrestore(&counter->waitq.lock, flags); | |
1318 | ||
1319 | return events; | |
1320 | } | |
1321 | ||
d859e29f PM |
1322 | static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
1323 | { | |
1324 | struct perf_counter *counter = file->private_data; | |
1325 | int err = 0; | |
1326 | ||
1327 | switch (cmd) { | |
1328 | case PERF_COUNTER_IOC_ENABLE: | |
1329 | perf_counter_enable_family(counter); | |
1330 | break; | |
1331 | case PERF_COUNTER_IOC_DISABLE: | |
1332 | perf_counter_disable_family(counter); | |
1333 | break; | |
1334 | default: | |
1335 | err = -ENOTTY; | |
1336 | } | |
1337 | return err; | |
1338 | } | |
1339 | ||
0793a61d TG |
1340 | static const struct file_operations perf_fops = { |
1341 | .release = perf_release, | |
1342 | .read = perf_read, | |
1343 | .poll = perf_poll, | |
d859e29f PM |
1344 | .unlocked_ioctl = perf_ioctl, |
1345 | .compat_ioctl = perf_ioctl, | |
0793a61d TG |
1346 | }; |
1347 | ||
15dbf27c PZ |
1348 | /* |
1349 | * Generic software counter infrastructure | |
1350 | */ | |
1351 | ||
1352 | static void perf_swcounter_update(struct perf_counter *counter) | |
1353 | { | |
1354 | struct hw_perf_counter *hwc = &counter->hw; | |
1355 | u64 prev, now; | |
1356 | s64 delta; | |
1357 | ||
1358 | again: | |
1359 | prev = atomic64_read(&hwc->prev_count); | |
1360 | now = atomic64_read(&hwc->count); | |
1361 | if (atomic64_cmpxchg(&hwc->prev_count, prev, now) != prev) | |
1362 | goto again; | |
1363 | ||
1364 | delta = now - prev; | |
1365 | ||
1366 | atomic64_add(delta, &counter->count); | |
1367 | atomic64_sub(delta, &hwc->period_left); | |
1368 | } | |
1369 | ||
1370 | static void perf_swcounter_set_period(struct perf_counter *counter) | |
1371 | { | |
1372 | struct hw_perf_counter *hwc = &counter->hw; | |
1373 | s64 left = atomic64_read(&hwc->period_left); | |
1374 | s64 period = hwc->irq_period; | |
1375 | ||
1376 | if (unlikely(left <= -period)) { | |
1377 | left = period; | |
1378 | atomic64_set(&hwc->period_left, left); | |
1379 | } | |
1380 | ||
1381 | if (unlikely(left <= 0)) { | |
1382 | left += period; | |
1383 | atomic64_add(period, &hwc->period_left); | |
1384 | } | |
1385 | ||
1386 | atomic64_set(&hwc->prev_count, -left); | |
1387 | atomic64_set(&hwc->count, -left); | |
1388 | } | |
1389 | ||
1390 | static void perf_swcounter_save_and_restart(struct perf_counter *counter) | |
1391 | { | |
1392 | perf_swcounter_update(counter); | |
1393 | perf_swcounter_set_period(counter); | |
1394 | } | |
1395 | ||
1396 | static void perf_swcounter_store_irq(struct perf_counter *counter, u64 data) | |
1397 | { | |
1398 | struct perf_data *irqdata = counter->irqdata; | |
1399 | ||
1400 | if (irqdata->len > PERF_DATA_BUFLEN - sizeof(u64)) { | |
1401 | irqdata->overrun++; | |
1402 | } else { | |
1403 | u64 *p = (u64 *) &irqdata->data[irqdata->len]; | |
1404 | ||
1405 | *p = data; | |
1406 | irqdata->len += sizeof(u64); | |
1407 | } | |
1408 | } | |
1409 | ||
1410 | static void perf_swcounter_handle_group(struct perf_counter *sibling) | |
1411 | { | |
1412 | struct perf_counter *counter, *group_leader = sibling->group_leader; | |
1413 | ||
1414 | list_for_each_entry(counter, &group_leader->sibling_list, list_entry) { | |
d6d020e9 | 1415 | counter->hw_ops->read(counter); |
15dbf27c PZ |
1416 | perf_swcounter_store_irq(sibling, counter->hw_event.type); |
1417 | perf_swcounter_store_irq(sibling, atomic64_read(&counter->count)); | |
1418 | } | |
1419 | } | |
1420 | ||
1421 | static void perf_swcounter_interrupt(struct perf_counter *counter, | |
1422 | int nmi, struct pt_regs *regs) | |
1423 | { | |
15dbf27c PZ |
1424 | switch (counter->hw_event.record_type) { |
1425 | case PERF_RECORD_SIMPLE: | |
1426 | break; | |
1427 | ||
1428 | case PERF_RECORD_IRQ: | |
1429 | perf_swcounter_store_irq(counter, instruction_pointer(regs)); | |
1430 | break; | |
1431 | ||
1432 | case PERF_RECORD_GROUP: | |
1433 | perf_swcounter_handle_group(counter); | |
1434 | break; | |
1435 | } | |
1436 | ||
1437 | if (nmi) { | |
1438 | counter->wakeup_pending = 1; | |
b6c5a71d | 1439 | set_perf_counter_pending(); |
15dbf27c PZ |
1440 | } else |
1441 | wake_up(&counter->waitq); | |
1442 | } | |
1443 | ||
d6d020e9 PZ |
1444 | static enum hrtimer_restart perf_swcounter_hrtimer(struct hrtimer *hrtimer) |
1445 | { | |
1446 | struct perf_counter *counter; | |
1447 | struct pt_regs *regs; | |
1448 | ||
1449 | counter = container_of(hrtimer, struct perf_counter, hw.hrtimer); | |
1450 | counter->hw_ops->read(counter); | |
1451 | ||
1452 | regs = get_irq_regs(); | |
1453 | /* | |
1454 | * In case we exclude kernel IPs or are somehow not in interrupt | |
1455 | * context, provide the next best thing, the user IP. | |
1456 | */ | |
1457 | if ((counter->hw_event.exclude_kernel || !regs) && | |
1458 | !counter->hw_event.exclude_user) | |
1459 | regs = task_pt_regs(current); | |
1460 | ||
1461 | if (regs) | |
1462 | perf_swcounter_interrupt(counter, 0, regs); | |
1463 | ||
1464 | hrtimer_forward_now(hrtimer, ns_to_ktime(counter->hw.irq_period)); | |
1465 | ||
1466 | return HRTIMER_RESTART; | |
1467 | } | |
1468 | ||
1469 | static void perf_swcounter_overflow(struct perf_counter *counter, | |
1470 | int nmi, struct pt_regs *regs) | |
1471 | { | |
1472 | perf_swcounter_save_and_restart(counter); | |
1473 | perf_swcounter_interrupt(counter, nmi, regs); | |
1474 | } | |
1475 | ||
15dbf27c PZ |
1476 | static int perf_swcounter_match(struct perf_counter *counter, |
1477 | enum hw_event_types event, | |
1478 | struct pt_regs *regs) | |
1479 | { | |
1480 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
1481 | return 0; | |
1482 | ||
1483 | if (counter->hw_event.raw) | |
1484 | return 0; | |
1485 | ||
1486 | if (counter->hw_event.type != event) | |
1487 | return 0; | |
1488 | ||
1489 | if (counter->hw_event.exclude_user && user_mode(regs)) | |
1490 | return 0; | |
1491 | ||
1492 | if (counter->hw_event.exclude_kernel && !user_mode(regs)) | |
1493 | return 0; | |
1494 | ||
1495 | return 1; | |
1496 | } | |
1497 | ||
d6d020e9 PZ |
1498 | static void perf_swcounter_add(struct perf_counter *counter, u64 nr, |
1499 | int nmi, struct pt_regs *regs) | |
1500 | { | |
1501 | int neg = atomic64_add_negative(nr, &counter->hw.count); | |
1502 | if (counter->hw.irq_period && !neg) | |
1503 | perf_swcounter_overflow(counter, nmi, regs); | |
1504 | } | |
1505 | ||
15dbf27c PZ |
1506 | static void perf_swcounter_ctx_event(struct perf_counter_context *ctx, |
1507 | enum hw_event_types event, u64 nr, | |
1508 | int nmi, struct pt_regs *regs) | |
1509 | { | |
1510 | struct perf_counter *counter; | |
15dbf27c | 1511 | |
01ef09d9 | 1512 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) |
15dbf27c PZ |
1513 | return; |
1514 | ||
592903cd PZ |
1515 | rcu_read_lock(); |
1516 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
d6d020e9 PZ |
1517 | if (perf_swcounter_match(counter, event, regs)) |
1518 | perf_swcounter_add(counter, nr, nmi, regs); | |
15dbf27c | 1519 | } |
592903cd | 1520 | rcu_read_unlock(); |
15dbf27c PZ |
1521 | } |
1522 | ||
1523 | void perf_swcounter_event(enum hw_event_types event, u64 nr, | |
1524 | int nmi, struct pt_regs *regs) | |
1525 | { | |
1526 | struct perf_cpu_context *cpuctx = &get_cpu_var(perf_cpu_context); | |
1527 | ||
1528 | perf_swcounter_ctx_event(&cpuctx->ctx, event, nr, nmi, regs); | |
1529 | if (cpuctx->task_ctx) | |
1530 | perf_swcounter_ctx_event(cpuctx->task_ctx, event, nr, nmi, regs); | |
1531 | ||
1532 | put_cpu_var(perf_cpu_context); | |
1533 | } | |
1534 | ||
1535 | static void perf_swcounter_read(struct perf_counter *counter) | |
1536 | { | |
1537 | perf_swcounter_update(counter); | |
1538 | } | |
1539 | ||
1540 | static int perf_swcounter_enable(struct perf_counter *counter) | |
1541 | { | |
1542 | perf_swcounter_set_period(counter); | |
1543 | return 0; | |
1544 | } | |
1545 | ||
1546 | static void perf_swcounter_disable(struct perf_counter *counter) | |
1547 | { | |
1548 | perf_swcounter_update(counter); | |
1549 | } | |
1550 | ||
ac17dc8e PZ |
1551 | static const struct hw_perf_counter_ops perf_ops_generic = { |
1552 | .enable = perf_swcounter_enable, | |
1553 | .disable = perf_swcounter_disable, | |
1554 | .read = perf_swcounter_read, | |
1555 | }; | |
1556 | ||
15dbf27c PZ |
1557 | /* |
1558 | * Software counter: cpu wall time clock | |
1559 | */ | |
1560 | ||
9abf8a08 PM |
1561 | static void cpu_clock_perf_counter_update(struct perf_counter *counter) |
1562 | { | |
1563 | int cpu = raw_smp_processor_id(); | |
1564 | s64 prev; | |
1565 | u64 now; | |
1566 | ||
1567 | now = cpu_clock(cpu); | |
1568 | prev = atomic64_read(&counter->hw.prev_count); | |
1569 | atomic64_set(&counter->hw.prev_count, now); | |
1570 | atomic64_add(now - prev, &counter->count); | |
1571 | } | |
1572 | ||
d6d020e9 PZ |
1573 | static int cpu_clock_perf_counter_enable(struct perf_counter *counter) |
1574 | { | |
1575 | struct hw_perf_counter *hwc = &counter->hw; | |
1576 | int cpu = raw_smp_processor_id(); | |
1577 | ||
1578 | atomic64_set(&hwc->prev_count, cpu_clock(cpu)); | |
039fc91e PZ |
1579 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
1580 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 1581 | if (hwc->irq_period) { |
d6d020e9 PZ |
1582 | __hrtimer_start_range_ns(&hwc->hrtimer, |
1583 | ns_to_ktime(hwc->irq_period), 0, | |
1584 | HRTIMER_MODE_REL, 0); | |
1585 | } | |
1586 | ||
1587 | return 0; | |
1588 | } | |
1589 | ||
5c92d124 IM |
1590 | static void cpu_clock_perf_counter_disable(struct perf_counter *counter) |
1591 | { | |
d6d020e9 | 1592 | hrtimer_cancel(&counter->hw.hrtimer); |
9abf8a08 | 1593 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
1594 | } |
1595 | ||
1596 | static void cpu_clock_perf_counter_read(struct perf_counter *counter) | |
1597 | { | |
9abf8a08 | 1598 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
1599 | } |
1600 | ||
1601 | static const struct hw_perf_counter_ops perf_ops_cpu_clock = { | |
7671581f IM |
1602 | .enable = cpu_clock_perf_counter_enable, |
1603 | .disable = cpu_clock_perf_counter_disable, | |
1604 | .read = cpu_clock_perf_counter_read, | |
5c92d124 IM |
1605 | }; |
1606 | ||
15dbf27c PZ |
1607 | /* |
1608 | * Software counter: task time clock | |
1609 | */ | |
1610 | ||
aa9c4c0f IM |
1611 | /* |
1612 | * Called from within the scheduler: | |
1613 | */ | |
1614 | static u64 task_clock_perf_counter_val(struct perf_counter *counter, int update) | |
bae43c99 | 1615 | { |
aa9c4c0f IM |
1616 | struct task_struct *curr = counter->task; |
1617 | u64 delta; | |
1618 | ||
aa9c4c0f IM |
1619 | delta = __task_delta_exec(curr, update); |
1620 | ||
1621 | return curr->se.sum_exec_runtime + delta; | |
1622 | } | |
1623 | ||
1624 | static void task_clock_perf_counter_update(struct perf_counter *counter, u64 now) | |
1625 | { | |
1626 | u64 prev; | |
8cb391e8 IM |
1627 | s64 delta; |
1628 | ||
1629 | prev = atomic64_read(&counter->hw.prev_count); | |
8cb391e8 IM |
1630 | |
1631 | atomic64_set(&counter->hw.prev_count, now); | |
1632 | ||
1633 | delta = now - prev; | |
8cb391e8 IM |
1634 | |
1635 | atomic64_add(delta, &counter->count); | |
bae43c99 IM |
1636 | } |
1637 | ||
95cdd2e7 | 1638 | static int task_clock_perf_counter_enable(struct perf_counter *counter) |
8cb391e8 | 1639 | { |
d6d020e9 PZ |
1640 | struct hw_perf_counter *hwc = &counter->hw; |
1641 | ||
1642 | atomic64_set(&hwc->prev_count, task_clock_perf_counter_val(counter, 0)); | |
039fc91e PZ |
1643 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
1644 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 1645 | if (hwc->irq_period) { |
d6d020e9 PZ |
1646 | __hrtimer_start_range_ns(&hwc->hrtimer, |
1647 | ns_to_ktime(hwc->irq_period), 0, | |
1648 | HRTIMER_MODE_REL, 0); | |
1649 | } | |
95cdd2e7 IM |
1650 | |
1651 | return 0; | |
8cb391e8 IM |
1652 | } |
1653 | ||
1654 | static void task_clock_perf_counter_disable(struct perf_counter *counter) | |
bae43c99 | 1655 | { |
d6d020e9 PZ |
1656 | hrtimer_cancel(&counter->hw.hrtimer); |
1657 | task_clock_perf_counter_update(counter, | |
1658 | task_clock_perf_counter_val(counter, 0)); | |
1659 | } | |
aa9c4c0f | 1660 | |
d6d020e9 PZ |
1661 | static void task_clock_perf_counter_read(struct perf_counter *counter) |
1662 | { | |
1663 | task_clock_perf_counter_update(counter, | |
1664 | task_clock_perf_counter_val(counter, 1)); | |
bae43c99 IM |
1665 | } |
1666 | ||
1667 | static const struct hw_perf_counter_ops perf_ops_task_clock = { | |
7671581f IM |
1668 | .enable = task_clock_perf_counter_enable, |
1669 | .disable = task_clock_perf_counter_disable, | |
1670 | .read = task_clock_perf_counter_read, | |
bae43c99 IM |
1671 | }; |
1672 | ||
15dbf27c PZ |
1673 | /* |
1674 | * Software counter: cpu migrations | |
1675 | */ | |
1676 | ||
23a185ca | 1677 | static inline u64 get_cpu_migrations(struct perf_counter *counter) |
6c594c21 | 1678 | { |
23a185ca PM |
1679 | struct task_struct *curr = counter->ctx->task; |
1680 | ||
1681 | if (curr) | |
1682 | return curr->se.nr_migrations; | |
1683 | return cpu_nr_migrations(smp_processor_id()); | |
6c594c21 IM |
1684 | } |
1685 | ||
1686 | static void cpu_migrations_perf_counter_update(struct perf_counter *counter) | |
1687 | { | |
1688 | u64 prev, now; | |
1689 | s64 delta; | |
1690 | ||
1691 | prev = atomic64_read(&counter->hw.prev_count); | |
23a185ca | 1692 | now = get_cpu_migrations(counter); |
6c594c21 IM |
1693 | |
1694 | atomic64_set(&counter->hw.prev_count, now); | |
1695 | ||
1696 | delta = now - prev; | |
6c594c21 IM |
1697 | |
1698 | atomic64_add(delta, &counter->count); | |
1699 | } | |
1700 | ||
1701 | static void cpu_migrations_perf_counter_read(struct perf_counter *counter) | |
1702 | { | |
1703 | cpu_migrations_perf_counter_update(counter); | |
1704 | } | |
1705 | ||
95cdd2e7 | 1706 | static int cpu_migrations_perf_counter_enable(struct perf_counter *counter) |
6c594c21 | 1707 | { |
c07c99b6 PM |
1708 | if (counter->prev_state <= PERF_COUNTER_STATE_OFF) |
1709 | atomic64_set(&counter->hw.prev_count, | |
1710 | get_cpu_migrations(counter)); | |
95cdd2e7 | 1711 | return 0; |
6c594c21 IM |
1712 | } |
1713 | ||
1714 | static void cpu_migrations_perf_counter_disable(struct perf_counter *counter) | |
1715 | { | |
1716 | cpu_migrations_perf_counter_update(counter); | |
1717 | } | |
1718 | ||
1719 | static const struct hw_perf_counter_ops perf_ops_cpu_migrations = { | |
7671581f IM |
1720 | .enable = cpu_migrations_perf_counter_enable, |
1721 | .disable = cpu_migrations_perf_counter_disable, | |
1722 | .read = cpu_migrations_perf_counter_read, | |
6c594c21 IM |
1723 | }; |
1724 | ||
5c92d124 IM |
1725 | static const struct hw_perf_counter_ops * |
1726 | sw_perf_counter_init(struct perf_counter *counter) | |
1727 | { | |
15dbf27c | 1728 | struct perf_counter_hw_event *hw_event = &counter->hw_event; |
5c92d124 | 1729 | const struct hw_perf_counter_ops *hw_ops = NULL; |
15dbf27c | 1730 | struct hw_perf_counter *hwc = &counter->hw; |
5c92d124 | 1731 | |
0475f9ea PM |
1732 | /* |
1733 | * Software counters (currently) can't in general distinguish | |
1734 | * between user, kernel and hypervisor events. | |
1735 | * However, context switches and cpu migrations are considered | |
1736 | * to be kernel events, and page faults are never hypervisor | |
1737 | * events. | |
1738 | */ | |
5c92d124 IM |
1739 | switch (counter->hw_event.type) { |
1740 | case PERF_COUNT_CPU_CLOCK: | |
d6d020e9 PZ |
1741 | hw_ops = &perf_ops_cpu_clock; |
1742 | ||
1743 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
1744 | hw_event->irq_period = 10000; | |
5c92d124 | 1745 | break; |
bae43c99 | 1746 | case PERF_COUNT_TASK_CLOCK: |
23a185ca PM |
1747 | /* |
1748 | * If the user instantiates this as a per-cpu counter, | |
1749 | * use the cpu_clock counter instead. | |
1750 | */ | |
1751 | if (counter->ctx->task) | |
1752 | hw_ops = &perf_ops_task_clock; | |
1753 | else | |
1754 | hw_ops = &perf_ops_cpu_clock; | |
d6d020e9 PZ |
1755 | |
1756 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
1757 | hw_event->irq_period = 10000; | |
bae43c99 | 1758 | break; |
e06c61a8 | 1759 | case PERF_COUNT_PAGE_FAULTS: |
ac17dc8e PZ |
1760 | case PERF_COUNT_PAGE_FAULTS_MIN: |
1761 | case PERF_COUNT_PAGE_FAULTS_MAJ: | |
5d6a27d8 | 1762 | case PERF_COUNT_CONTEXT_SWITCHES: |
4a0deca6 | 1763 | hw_ops = &perf_ops_generic; |
5d6a27d8 | 1764 | break; |
6c594c21 | 1765 | case PERF_COUNT_CPU_MIGRATIONS: |
0475f9ea PM |
1766 | if (!counter->hw_event.exclude_kernel) |
1767 | hw_ops = &perf_ops_cpu_migrations; | |
6c594c21 | 1768 | break; |
5c92d124 IM |
1769 | default: |
1770 | break; | |
1771 | } | |
15dbf27c PZ |
1772 | |
1773 | if (hw_ops) | |
1774 | hwc->irq_period = hw_event->irq_period; | |
1775 | ||
5c92d124 IM |
1776 | return hw_ops; |
1777 | } | |
1778 | ||
0793a61d TG |
1779 | /* |
1780 | * Allocate and initialize a counter structure | |
1781 | */ | |
1782 | static struct perf_counter * | |
04289bb9 IM |
1783 | perf_counter_alloc(struct perf_counter_hw_event *hw_event, |
1784 | int cpu, | |
23a185ca | 1785 | struct perf_counter_context *ctx, |
9b51f66d IM |
1786 | struct perf_counter *group_leader, |
1787 | gfp_t gfpflags) | |
0793a61d | 1788 | { |
5c92d124 | 1789 | const struct hw_perf_counter_ops *hw_ops; |
621a01ea | 1790 | struct perf_counter *counter; |
0793a61d | 1791 | |
9b51f66d | 1792 | counter = kzalloc(sizeof(*counter), gfpflags); |
0793a61d TG |
1793 | if (!counter) |
1794 | return NULL; | |
1795 | ||
04289bb9 IM |
1796 | /* |
1797 | * Single counters are their own group leaders, with an | |
1798 | * empty sibling list: | |
1799 | */ | |
1800 | if (!group_leader) | |
1801 | group_leader = counter; | |
1802 | ||
0793a61d | 1803 | mutex_init(&counter->mutex); |
04289bb9 | 1804 | INIT_LIST_HEAD(&counter->list_entry); |
592903cd | 1805 | INIT_LIST_HEAD(&counter->event_entry); |
04289bb9 | 1806 | INIT_LIST_HEAD(&counter->sibling_list); |
0793a61d TG |
1807 | init_waitqueue_head(&counter->waitq); |
1808 | ||
d859e29f PM |
1809 | INIT_LIST_HEAD(&counter->child_list); |
1810 | ||
9f66a381 IM |
1811 | counter->irqdata = &counter->data[0]; |
1812 | counter->usrdata = &counter->data[1]; | |
1813 | counter->cpu = cpu; | |
1814 | counter->hw_event = *hw_event; | |
1815 | counter->wakeup_pending = 0; | |
04289bb9 | 1816 | counter->group_leader = group_leader; |
621a01ea | 1817 | counter->hw_ops = NULL; |
23a185ca | 1818 | counter->ctx = ctx; |
621a01ea | 1819 | |
235c7fc7 | 1820 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
a86ed508 IM |
1821 | if (hw_event->disabled) |
1822 | counter->state = PERF_COUNTER_STATE_OFF; | |
1823 | ||
5c92d124 IM |
1824 | hw_ops = NULL; |
1825 | if (!hw_event->raw && hw_event->type < 0) | |
1826 | hw_ops = sw_perf_counter_init(counter); | |
23a185ca | 1827 | else |
5c92d124 | 1828 | hw_ops = hw_perf_counter_init(counter); |
5c92d124 | 1829 | |
621a01ea IM |
1830 | if (!hw_ops) { |
1831 | kfree(counter); | |
1832 | return NULL; | |
1833 | } | |
1834 | counter->hw_ops = hw_ops; | |
0793a61d TG |
1835 | |
1836 | return counter; | |
1837 | } | |
1838 | ||
1839 | /** | |
2743a5b0 | 1840 | * sys_perf_counter_open - open a performance counter, associate it to a task/cpu |
9f66a381 IM |
1841 | * |
1842 | * @hw_event_uptr: event type attributes for monitoring/sampling | |
0793a61d | 1843 | * @pid: target pid |
9f66a381 IM |
1844 | * @cpu: target cpu |
1845 | * @group_fd: group leader counter fd | |
0793a61d | 1846 | */ |
2743a5b0 | 1847 | SYSCALL_DEFINE5(perf_counter_open, |
f3dfd265 | 1848 | const struct perf_counter_hw_event __user *, hw_event_uptr, |
2743a5b0 | 1849 | pid_t, pid, int, cpu, int, group_fd, unsigned long, flags) |
0793a61d | 1850 | { |
04289bb9 | 1851 | struct perf_counter *counter, *group_leader; |
9f66a381 | 1852 | struct perf_counter_hw_event hw_event; |
04289bb9 | 1853 | struct perf_counter_context *ctx; |
9b51f66d | 1854 | struct file *counter_file = NULL; |
04289bb9 IM |
1855 | struct file *group_file = NULL; |
1856 | int fput_needed = 0; | |
9b51f66d | 1857 | int fput_needed2 = 0; |
0793a61d TG |
1858 | int ret; |
1859 | ||
2743a5b0 PM |
1860 | /* for future expandability... */ |
1861 | if (flags) | |
1862 | return -EINVAL; | |
1863 | ||
9f66a381 | 1864 | if (copy_from_user(&hw_event, hw_event_uptr, sizeof(hw_event)) != 0) |
eab656ae TG |
1865 | return -EFAULT; |
1866 | ||
04289bb9 | 1867 | /* |
ccff286d IM |
1868 | * Get the target context (task or percpu): |
1869 | */ | |
1870 | ctx = find_get_context(pid, cpu); | |
1871 | if (IS_ERR(ctx)) | |
1872 | return PTR_ERR(ctx); | |
1873 | ||
1874 | /* | |
1875 | * Look up the group leader (we will attach this counter to it): | |
04289bb9 IM |
1876 | */ |
1877 | group_leader = NULL; | |
1878 | if (group_fd != -1) { | |
1879 | ret = -EINVAL; | |
1880 | group_file = fget_light(group_fd, &fput_needed); | |
1881 | if (!group_file) | |
ccff286d | 1882 | goto err_put_context; |
04289bb9 | 1883 | if (group_file->f_op != &perf_fops) |
ccff286d | 1884 | goto err_put_context; |
04289bb9 IM |
1885 | |
1886 | group_leader = group_file->private_data; | |
1887 | /* | |
ccff286d IM |
1888 | * Do not allow a recursive hierarchy (this new sibling |
1889 | * becoming part of another group-sibling): | |
1890 | */ | |
1891 | if (group_leader->group_leader != group_leader) | |
1892 | goto err_put_context; | |
1893 | /* | |
1894 | * Do not allow to attach to a group in a different | |
1895 | * task or CPU context: | |
04289bb9 | 1896 | */ |
ccff286d IM |
1897 | if (group_leader->ctx != ctx) |
1898 | goto err_put_context; | |
3b6f9e5c PM |
1899 | /* |
1900 | * Only a group leader can be exclusive or pinned | |
1901 | */ | |
1902 | if (hw_event.exclusive || hw_event.pinned) | |
1903 | goto err_put_context; | |
04289bb9 IM |
1904 | } |
1905 | ||
5c92d124 | 1906 | ret = -EINVAL; |
23a185ca PM |
1907 | counter = perf_counter_alloc(&hw_event, cpu, ctx, group_leader, |
1908 | GFP_KERNEL); | |
0793a61d TG |
1909 | if (!counter) |
1910 | goto err_put_context; | |
1911 | ||
0793a61d TG |
1912 | ret = anon_inode_getfd("[perf_counter]", &perf_fops, counter, 0); |
1913 | if (ret < 0) | |
9b51f66d IM |
1914 | goto err_free_put_context; |
1915 | ||
1916 | counter_file = fget_light(ret, &fput_needed2); | |
1917 | if (!counter_file) | |
1918 | goto err_free_put_context; | |
1919 | ||
1920 | counter->filp = counter_file; | |
d859e29f | 1921 | mutex_lock(&ctx->mutex); |
9b51f66d | 1922 | perf_install_in_context(ctx, counter, cpu); |
d859e29f | 1923 | mutex_unlock(&ctx->mutex); |
9b51f66d IM |
1924 | |
1925 | fput_light(counter_file, fput_needed2); | |
0793a61d | 1926 | |
04289bb9 IM |
1927 | out_fput: |
1928 | fput_light(group_file, fput_needed); | |
1929 | ||
0793a61d TG |
1930 | return ret; |
1931 | ||
9b51f66d | 1932 | err_free_put_context: |
0793a61d TG |
1933 | kfree(counter); |
1934 | ||
1935 | err_put_context: | |
1936 | put_context(ctx); | |
1937 | ||
04289bb9 | 1938 | goto out_fput; |
0793a61d TG |
1939 | } |
1940 | ||
9b51f66d IM |
1941 | /* |
1942 | * Initialize the perf_counter context in a task_struct: | |
1943 | */ | |
1944 | static void | |
1945 | __perf_counter_init_context(struct perf_counter_context *ctx, | |
1946 | struct task_struct *task) | |
1947 | { | |
1948 | memset(ctx, 0, sizeof(*ctx)); | |
1949 | spin_lock_init(&ctx->lock); | |
d859e29f | 1950 | mutex_init(&ctx->mutex); |
9b51f66d | 1951 | INIT_LIST_HEAD(&ctx->counter_list); |
592903cd | 1952 | INIT_LIST_HEAD(&ctx->event_list); |
9b51f66d IM |
1953 | ctx->task = task; |
1954 | } | |
1955 | ||
1956 | /* | |
1957 | * inherit a counter from parent task to child task: | |
1958 | */ | |
d859e29f | 1959 | static struct perf_counter * |
9b51f66d IM |
1960 | inherit_counter(struct perf_counter *parent_counter, |
1961 | struct task_struct *parent, | |
1962 | struct perf_counter_context *parent_ctx, | |
1963 | struct task_struct *child, | |
d859e29f | 1964 | struct perf_counter *group_leader, |
9b51f66d IM |
1965 | struct perf_counter_context *child_ctx) |
1966 | { | |
1967 | struct perf_counter *child_counter; | |
1968 | ||
d859e29f PM |
1969 | /* |
1970 | * Instead of creating recursive hierarchies of counters, | |
1971 | * we link inherited counters back to the original parent, | |
1972 | * which has a filp for sure, which we use as the reference | |
1973 | * count: | |
1974 | */ | |
1975 | if (parent_counter->parent) | |
1976 | parent_counter = parent_counter->parent; | |
1977 | ||
9b51f66d | 1978 | child_counter = perf_counter_alloc(&parent_counter->hw_event, |
23a185ca PM |
1979 | parent_counter->cpu, child_ctx, |
1980 | group_leader, GFP_KERNEL); | |
9b51f66d | 1981 | if (!child_counter) |
d859e29f | 1982 | return NULL; |
9b51f66d IM |
1983 | |
1984 | /* | |
1985 | * Link it up in the child's context: | |
1986 | */ | |
9b51f66d IM |
1987 | child_counter->task = child; |
1988 | list_add_counter(child_counter, child_ctx); | |
1989 | child_ctx->nr_counters++; | |
1990 | ||
1991 | child_counter->parent = parent_counter; | |
9b51f66d IM |
1992 | /* |
1993 | * inherit into child's child as well: | |
1994 | */ | |
1995 | child_counter->hw_event.inherit = 1; | |
1996 | ||
1997 | /* | |
1998 | * Get a reference to the parent filp - we will fput it | |
1999 | * when the child counter exits. This is safe to do because | |
2000 | * we are in the parent and we know that the filp still | |
2001 | * exists and has a nonzero count: | |
2002 | */ | |
2003 | atomic_long_inc(&parent_counter->filp->f_count); | |
2004 | ||
d859e29f PM |
2005 | /* |
2006 | * Link this into the parent counter's child list | |
2007 | */ | |
2008 | mutex_lock(&parent_counter->mutex); | |
2009 | list_add_tail(&child_counter->child_list, &parent_counter->child_list); | |
2010 | ||
2011 | /* | |
2012 | * Make the child state follow the state of the parent counter, | |
2013 | * not its hw_event.disabled bit. We hold the parent's mutex, | |
2014 | * so we won't race with perf_counter_{en,dis}able_family. | |
2015 | */ | |
2016 | if (parent_counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
2017 | child_counter->state = PERF_COUNTER_STATE_INACTIVE; | |
2018 | else | |
2019 | child_counter->state = PERF_COUNTER_STATE_OFF; | |
2020 | ||
2021 | mutex_unlock(&parent_counter->mutex); | |
2022 | ||
2023 | return child_counter; | |
2024 | } | |
2025 | ||
2026 | static int inherit_group(struct perf_counter *parent_counter, | |
2027 | struct task_struct *parent, | |
2028 | struct perf_counter_context *parent_ctx, | |
2029 | struct task_struct *child, | |
2030 | struct perf_counter_context *child_ctx) | |
2031 | { | |
2032 | struct perf_counter *leader; | |
2033 | struct perf_counter *sub; | |
2034 | ||
2035 | leader = inherit_counter(parent_counter, parent, parent_ctx, | |
2036 | child, NULL, child_ctx); | |
2037 | if (!leader) | |
2038 | return -ENOMEM; | |
2039 | list_for_each_entry(sub, &parent_counter->sibling_list, list_entry) { | |
2040 | if (!inherit_counter(sub, parent, parent_ctx, | |
2041 | child, leader, child_ctx)) | |
2042 | return -ENOMEM; | |
2043 | } | |
9b51f66d IM |
2044 | return 0; |
2045 | } | |
2046 | ||
d859e29f PM |
2047 | static void sync_child_counter(struct perf_counter *child_counter, |
2048 | struct perf_counter *parent_counter) | |
2049 | { | |
2050 | u64 parent_val, child_val; | |
2051 | ||
2052 | parent_val = atomic64_read(&parent_counter->count); | |
2053 | child_val = atomic64_read(&child_counter->count); | |
2054 | ||
2055 | /* | |
2056 | * Add back the child's count to the parent's count: | |
2057 | */ | |
2058 | atomic64_add(child_val, &parent_counter->count); | |
2059 | ||
2060 | /* | |
2061 | * Remove this counter from the parent's list | |
2062 | */ | |
2063 | mutex_lock(&parent_counter->mutex); | |
2064 | list_del_init(&child_counter->child_list); | |
2065 | mutex_unlock(&parent_counter->mutex); | |
2066 | ||
2067 | /* | |
2068 | * Release the parent counter, if this was the last | |
2069 | * reference to it. | |
2070 | */ | |
2071 | fput(parent_counter->filp); | |
2072 | } | |
2073 | ||
9b51f66d IM |
2074 | static void |
2075 | __perf_counter_exit_task(struct task_struct *child, | |
2076 | struct perf_counter *child_counter, | |
2077 | struct perf_counter_context *child_ctx) | |
2078 | { | |
2079 | struct perf_counter *parent_counter; | |
d859e29f | 2080 | struct perf_counter *sub, *tmp; |
9b51f66d IM |
2081 | |
2082 | /* | |
235c7fc7 IM |
2083 | * If we do not self-reap then we have to wait for the |
2084 | * child task to unschedule (it will happen for sure), | |
2085 | * so that its counter is at its final count. (This | |
2086 | * condition triggers rarely - child tasks usually get | |
2087 | * off their CPU before the parent has a chance to | |
2088 | * get this far into the reaping action) | |
9b51f66d | 2089 | */ |
235c7fc7 IM |
2090 | if (child != current) { |
2091 | wait_task_inactive(child, 0); | |
2092 | list_del_init(&child_counter->list_entry); | |
2093 | } else { | |
0cc0c027 | 2094 | struct perf_cpu_context *cpuctx; |
235c7fc7 IM |
2095 | unsigned long flags; |
2096 | u64 perf_flags; | |
2097 | ||
2098 | /* | |
2099 | * Disable and unlink this counter. | |
2100 | * | |
2101 | * Be careful about zapping the list - IRQ/NMI context | |
2102 | * could still be processing it: | |
2103 | */ | |
2104 | curr_rq_lock_irq_save(&flags); | |
2105 | perf_flags = hw_perf_save_disable(); | |
0cc0c027 IM |
2106 | |
2107 | cpuctx = &__get_cpu_var(perf_cpu_context); | |
2108 | ||
d859e29f | 2109 | group_sched_out(child_counter, cpuctx, child_ctx); |
0cc0c027 | 2110 | |
235c7fc7 | 2111 | list_del_init(&child_counter->list_entry); |
0cc0c027 | 2112 | |
235c7fc7 | 2113 | child_ctx->nr_counters--; |
9b51f66d | 2114 | |
235c7fc7 IM |
2115 | hw_perf_restore(perf_flags); |
2116 | curr_rq_unlock_irq_restore(&flags); | |
2117 | } | |
9b51f66d IM |
2118 | |
2119 | parent_counter = child_counter->parent; | |
2120 | /* | |
2121 | * It can happen that parent exits first, and has counters | |
2122 | * that are still around due to the child reference. These | |
2123 | * counters need to be zapped - but otherwise linger. | |
2124 | */ | |
d859e29f PM |
2125 | if (parent_counter) { |
2126 | sync_child_counter(child_counter, parent_counter); | |
2127 | list_for_each_entry_safe(sub, tmp, &child_counter->sibling_list, | |
2128 | list_entry) { | |
4bcf349a | 2129 | if (sub->parent) { |
d859e29f | 2130 | sync_child_counter(sub, sub->parent); |
4bcf349a PM |
2131 | kfree(sub); |
2132 | } | |
d859e29f | 2133 | } |
65d37086 | 2134 | kfree(child_counter); |
4bcf349a | 2135 | } |
9b51f66d IM |
2136 | } |
2137 | ||
2138 | /* | |
d859e29f | 2139 | * When a child task exits, feed back counter values to parent counters. |
9b51f66d | 2140 | * |
d859e29f | 2141 | * Note: we may be running in child context, but the PID is not hashed |
9b51f66d IM |
2142 | * anymore so new counters will not be added. |
2143 | */ | |
2144 | void perf_counter_exit_task(struct task_struct *child) | |
2145 | { | |
2146 | struct perf_counter *child_counter, *tmp; | |
2147 | struct perf_counter_context *child_ctx; | |
2148 | ||
2149 | child_ctx = &child->perf_counter_ctx; | |
2150 | ||
2151 | if (likely(!child_ctx->nr_counters)) | |
2152 | return; | |
2153 | ||
2154 | list_for_each_entry_safe(child_counter, tmp, &child_ctx->counter_list, | |
2155 | list_entry) | |
2156 | __perf_counter_exit_task(child, child_counter, child_ctx); | |
2157 | } | |
2158 | ||
2159 | /* | |
2160 | * Initialize the perf_counter context in task_struct | |
2161 | */ | |
2162 | void perf_counter_init_task(struct task_struct *child) | |
2163 | { | |
2164 | struct perf_counter_context *child_ctx, *parent_ctx; | |
d859e29f | 2165 | struct perf_counter *counter; |
9b51f66d | 2166 | struct task_struct *parent = current; |
9b51f66d IM |
2167 | |
2168 | child_ctx = &child->perf_counter_ctx; | |
2169 | parent_ctx = &parent->perf_counter_ctx; | |
2170 | ||
2171 | __perf_counter_init_context(child_ctx, child); | |
2172 | ||
2173 | /* | |
2174 | * This is executed from the parent task context, so inherit | |
2175 | * counters that have been marked for cloning: | |
2176 | */ | |
2177 | ||
2178 | if (likely(!parent_ctx->nr_counters)) | |
2179 | return; | |
2180 | ||
2181 | /* | |
2182 | * Lock the parent list. No need to lock the child - not PID | |
2183 | * hashed yet and not running, so nobody can access it. | |
2184 | */ | |
d859e29f | 2185 | mutex_lock(&parent_ctx->mutex); |
9b51f66d IM |
2186 | |
2187 | /* | |
2188 | * We dont have to disable NMIs - we are only looking at | |
2189 | * the list, not manipulating it: | |
2190 | */ | |
2191 | list_for_each_entry(counter, &parent_ctx->counter_list, list_entry) { | |
d859e29f | 2192 | if (!counter->hw_event.inherit) |
9b51f66d IM |
2193 | continue; |
2194 | ||
d859e29f | 2195 | if (inherit_group(counter, parent, |
9b51f66d IM |
2196 | parent_ctx, child, child_ctx)) |
2197 | break; | |
2198 | } | |
2199 | ||
d859e29f | 2200 | mutex_unlock(&parent_ctx->mutex); |
9b51f66d IM |
2201 | } |
2202 | ||
04289bb9 | 2203 | static void __cpuinit perf_counter_init_cpu(int cpu) |
0793a61d | 2204 | { |
04289bb9 | 2205 | struct perf_cpu_context *cpuctx; |
0793a61d | 2206 | |
04289bb9 IM |
2207 | cpuctx = &per_cpu(perf_cpu_context, cpu); |
2208 | __perf_counter_init_context(&cpuctx->ctx, NULL); | |
0793a61d TG |
2209 | |
2210 | mutex_lock(&perf_resource_mutex); | |
04289bb9 | 2211 | cpuctx->max_pertask = perf_max_counters - perf_reserved_percpu; |
0793a61d | 2212 | mutex_unlock(&perf_resource_mutex); |
04289bb9 | 2213 | |
01d0287f | 2214 | hw_perf_counter_setup(cpu); |
0793a61d TG |
2215 | } |
2216 | ||
2217 | #ifdef CONFIG_HOTPLUG_CPU | |
04289bb9 | 2218 | static void __perf_counter_exit_cpu(void *info) |
0793a61d TG |
2219 | { |
2220 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
2221 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
2222 | struct perf_counter *counter, *tmp; | |
2223 | ||
04289bb9 IM |
2224 | list_for_each_entry_safe(counter, tmp, &ctx->counter_list, list_entry) |
2225 | __perf_counter_remove_from_context(counter); | |
0793a61d | 2226 | } |
04289bb9 | 2227 | static void perf_counter_exit_cpu(int cpu) |
0793a61d | 2228 | { |
d859e29f PM |
2229 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); |
2230 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
2231 | ||
2232 | mutex_lock(&ctx->mutex); | |
04289bb9 | 2233 | smp_call_function_single(cpu, __perf_counter_exit_cpu, NULL, 1); |
d859e29f | 2234 | mutex_unlock(&ctx->mutex); |
0793a61d TG |
2235 | } |
2236 | #else | |
04289bb9 | 2237 | static inline void perf_counter_exit_cpu(int cpu) { } |
0793a61d TG |
2238 | #endif |
2239 | ||
2240 | static int __cpuinit | |
2241 | perf_cpu_notify(struct notifier_block *self, unsigned long action, void *hcpu) | |
2242 | { | |
2243 | unsigned int cpu = (long)hcpu; | |
2244 | ||
2245 | switch (action) { | |
2246 | ||
2247 | case CPU_UP_PREPARE: | |
2248 | case CPU_UP_PREPARE_FROZEN: | |
04289bb9 | 2249 | perf_counter_init_cpu(cpu); |
0793a61d TG |
2250 | break; |
2251 | ||
2252 | case CPU_DOWN_PREPARE: | |
2253 | case CPU_DOWN_PREPARE_FROZEN: | |
04289bb9 | 2254 | perf_counter_exit_cpu(cpu); |
0793a61d TG |
2255 | break; |
2256 | ||
2257 | default: | |
2258 | break; | |
2259 | } | |
2260 | ||
2261 | return NOTIFY_OK; | |
2262 | } | |
2263 | ||
2264 | static struct notifier_block __cpuinitdata perf_cpu_nb = { | |
2265 | .notifier_call = perf_cpu_notify, | |
2266 | }; | |
2267 | ||
2268 | static int __init perf_counter_init(void) | |
2269 | { | |
2270 | perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_UP_PREPARE, | |
2271 | (void *)(long)smp_processor_id()); | |
2272 | register_cpu_notifier(&perf_cpu_nb); | |
2273 | ||
2274 | return 0; | |
2275 | } | |
2276 | early_initcall(perf_counter_init); | |
2277 | ||
2278 | static ssize_t perf_show_reserve_percpu(struct sysdev_class *class, char *buf) | |
2279 | { | |
2280 | return sprintf(buf, "%d\n", perf_reserved_percpu); | |
2281 | } | |
2282 | ||
2283 | static ssize_t | |
2284 | perf_set_reserve_percpu(struct sysdev_class *class, | |
2285 | const char *buf, | |
2286 | size_t count) | |
2287 | { | |
2288 | struct perf_cpu_context *cpuctx; | |
2289 | unsigned long val; | |
2290 | int err, cpu, mpt; | |
2291 | ||
2292 | err = strict_strtoul(buf, 10, &val); | |
2293 | if (err) | |
2294 | return err; | |
2295 | if (val > perf_max_counters) | |
2296 | return -EINVAL; | |
2297 | ||
2298 | mutex_lock(&perf_resource_mutex); | |
2299 | perf_reserved_percpu = val; | |
2300 | for_each_online_cpu(cpu) { | |
2301 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
2302 | spin_lock_irq(&cpuctx->ctx.lock); | |
2303 | mpt = min(perf_max_counters - cpuctx->ctx.nr_counters, | |
2304 | perf_max_counters - perf_reserved_percpu); | |
2305 | cpuctx->max_pertask = mpt; | |
2306 | spin_unlock_irq(&cpuctx->ctx.lock); | |
2307 | } | |
2308 | mutex_unlock(&perf_resource_mutex); | |
2309 | ||
2310 | return count; | |
2311 | } | |
2312 | ||
2313 | static ssize_t perf_show_overcommit(struct sysdev_class *class, char *buf) | |
2314 | { | |
2315 | return sprintf(buf, "%d\n", perf_overcommit); | |
2316 | } | |
2317 | ||
2318 | static ssize_t | |
2319 | perf_set_overcommit(struct sysdev_class *class, const char *buf, size_t count) | |
2320 | { | |
2321 | unsigned long val; | |
2322 | int err; | |
2323 | ||
2324 | err = strict_strtoul(buf, 10, &val); | |
2325 | if (err) | |
2326 | return err; | |
2327 | if (val > 1) | |
2328 | return -EINVAL; | |
2329 | ||
2330 | mutex_lock(&perf_resource_mutex); | |
2331 | perf_overcommit = val; | |
2332 | mutex_unlock(&perf_resource_mutex); | |
2333 | ||
2334 | return count; | |
2335 | } | |
2336 | ||
2337 | static SYSDEV_CLASS_ATTR( | |
2338 | reserve_percpu, | |
2339 | 0644, | |
2340 | perf_show_reserve_percpu, | |
2341 | perf_set_reserve_percpu | |
2342 | ); | |
2343 | ||
2344 | static SYSDEV_CLASS_ATTR( | |
2345 | overcommit, | |
2346 | 0644, | |
2347 | perf_show_overcommit, | |
2348 | perf_set_overcommit | |
2349 | ); | |
2350 | ||
2351 | static struct attribute *perfclass_attrs[] = { | |
2352 | &attr_reserve_percpu.attr, | |
2353 | &attr_overcommit.attr, | |
2354 | NULL | |
2355 | }; | |
2356 | ||
2357 | static struct attribute_group perfclass_attr_group = { | |
2358 | .attrs = perfclass_attrs, | |
2359 | .name = "perf_counters", | |
2360 | }; | |
2361 | ||
2362 | static int __init perf_counter_sysfs_init(void) | |
2363 | { | |
2364 | return sysfs_create_group(&cpu_sysdev_class.kset.kobj, | |
2365 | &perfclass_attr_group); | |
2366 | } | |
2367 | device_initcall(perf_counter_sysfs_init); |