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b2441318 1// SPDX-License-Identifier: GPL-2.0
f2cb1360
IM
2/*
3 * Scheduler topology setup/handling methods
4 */
f2cb1360
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5#include "sched.h"
6
7DEFINE_MUTEX(sched_domains_mutex);
8
9/* Protected by sched_domains_mutex: */
ace80310 10static cpumask_var_t sched_domains_tmpmask;
11static cpumask_var_t sched_domains_tmpmask2;
f2cb1360
IM
12
13#ifdef CONFIG_SCHED_DEBUG
14
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IM
15static int __init sched_debug_setup(char *str)
16{
9406415f 17 sched_debug_verbose = true;
f2cb1360
IM
18
19 return 0;
20}
9406415f 21early_param("sched_verbose", sched_debug_setup);
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22
23static inline bool sched_debug(void)
24{
9406415f 25 return sched_debug_verbose;
f2cb1360
IM
26}
27
848785df
VS
28#define SD_FLAG(_name, mflags) [__##_name] = { .meta_flags = mflags, .name = #_name },
29const struct sd_flag_debug sd_flag_debug[] = {
30#include <linux/sched/sd_flags.h>
31};
32#undef SD_FLAG
33
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IM
34static int sched_domain_debug_one(struct sched_domain *sd, int cpu, int level,
35 struct cpumask *groupmask)
36{
37 struct sched_group *group = sd->groups;
65c5e253
VS
38 unsigned long flags = sd->flags;
39 unsigned int idx;
f2cb1360
IM
40
41 cpumask_clear(groupmask);
42
005f874d 43 printk(KERN_DEBUG "%*s domain-%d: ", level, "", level);
005f874d 44 printk(KERN_CONT "span=%*pbl level=%s\n",
f2cb1360
IM
45 cpumask_pr_args(sched_domain_span(sd)), sd->name);
46
47 if (!cpumask_test_cpu(cpu, sched_domain_span(sd))) {
97fb7a0a 48 printk(KERN_ERR "ERROR: domain->span does not contain CPU%d\n", cpu);
f2cb1360 49 }
6cd0c583 50 if (group && !cpumask_test_cpu(cpu, sched_group_span(group))) {
97fb7a0a 51 printk(KERN_ERR "ERROR: domain->groups does not contain CPU%d\n", cpu);
f2cb1360
IM
52 }
53
65c5e253
VS
54 for_each_set_bit(idx, &flags, __SD_FLAG_CNT) {
55 unsigned int flag = BIT(idx);
56 unsigned int meta_flags = sd_flag_debug[idx].meta_flags;
57
58 if ((meta_flags & SDF_SHARED_CHILD) && sd->child &&
59 !(sd->child->flags & flag))
60 printk(KERN_ERR "ERROR: flag %s set here but not in child\n",
61 sd_flag_debug[idx].name);
62
63 if ((meta_flags & SDF_SHARED_PARENT) && sd->parent &&
64 !(sd->parent->flags & flag))
65 printk(KERN_ERR "ERROR: flag %s set here but not in parent\n",
66 sd_flag_debug[idx].name);
67 }
68
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IM
69 printk(KERN_DEBUG "%*s groups:", level + 1, "");
70 do {
71 if (!group) {
72 printk("\n");
73 printk(KERN_ERR "ERROR: group is NULL\n");
74 break;
75 }
76
ae4df9d6 77 if (!cpumask_weight(sched_group_span(group))) {
f2cb1360
IM
78 printk(KERN_CONT "\n");
79 printk(KERN_ERR "ERROR: empty group\n");
80 break;
81 }
82
83 if (!(sd->flags & SD_OVERLAP) &&
ae4df9d6 84 cpumask_intersects(groupmask, sched_group_span(group))) {
f2cb1360
IM
85 printk(KERN_CONT "\n");
86 printk(KERN_ERR "ERROR: repeated CPUs\n");
87 break;
88 }
89
ae4df9d6 90 cpumask_or(groupmask, groupmask, sched_group_span(group));
f2cb1360 91
005f874d
PZ
92 printk(KERN_CONT " %d:{ span=%*pbl",
93 group->sgc->id,
ae4df9d6 94 cpumask_pr_args(sched_group_span(group)));
b0151c25 95
af218122 96 if ((sd->flags & SD_OVERLAP) &&
ae4df9d6 97 !cpumask_equal(group_balance_mask(group), sched_group_span(group))) {
005f874d 98 printk(KERN_CONT " mask=%*pbl",
e5c14b1f 99 cpumask_pr_args(group_balance_mask(group)));
b0151c25
PZ
100 }
101
005f874d
PZ
102 if (group->sgc->capacity != SCHED_CAPACITY_SCALE)
103 printk(KERN_CONT " cap=%lu", group->sgc->capacity);
f2cb1360 104
a420b063
PZ
105 if (group == sd->groups && sd->child &&
106 !cpumask_equal(sched_domain_span(sd->child),
ae4df9d6 107 sched_group_span(group))) {
a420b063
PZ
108 printk(KERN_ERR "ERROR: domain->groups does not match domain->child\n");
109 }
110
005f874d
PZ
111 printk(KERN_CONT " }");
112
f2cb1360 113 group = group->next;
b0151c25
PZ
114
115 if (group != sd->groups)
116 printk(KERN_CONT ",");
117
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IM
118 } while (group != sd->groups);
119 printk(KERN_CONT "\n");
120
121 if (!cpumask_equal(sched_domain_span(sd), groupmask))
122 printk(KERN_ERR "ERROR: groups don't span domain->span\n");
123
124 if (sd->parent &&
125 !cpumask_subset(groupmask, sched_domain_span(sd->parent)))
97fb7a0a 126 printk(KERN_ERR "ERROR: parent span is not a superset of domain->span\n");
f2cb1360
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127 return 0;
128}
129
130static void sched_domain_debug(struct sched_domain *sd, int cpu)
131{
132 int level = 0;
133
9406415f 134 if (!sched_debug_verbose)
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IM
135 return;
136
137 if (!sd) {
138 printk(KERN_DEBUG "CPU%d attaching NULL sched-domain.\n", cpu);
139 return;
140 }
141
005f874d 142 printk(KERN_DEBUG "CPU%d attaching sched-domain(s):\n", cpu);
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143
144 for (;;) {
145 if (sched_domain_debug_one(sd, cpu, level, sched_domains_tmpmask))
146 break;
147 level++;
148 sd = sd->parent;
149 if (!sd)
150 break;
151 }
152}
153#else /* !CONFIG_SCHED_DEBUG */
154
9406415f 155# define sched_debug_verbose 0
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156# define sched_domain_debug(sd, cpu) do { } while (0)
157static inline bool sched_debug(void)
158{
159 return false;
160}
161#endif /* CONFIG_SCHED_DEBUG */
162
4fc472f1
VS
163/* Generate a mask of SD flags with the SDF_NEEDS_GROUPS metaflag */
164#define SD_FLAG(name, mflags) (name * !!((mflags) & SDF_NEEDS_GROUPS)) |
165static const unsigned int SD_DEGENERATE_GROUPS_MASK =
166#include <linux/sched/sd_flags.h>
1670;
168#undef SD_FLAG
169
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170static int sd_degenerate(struct sched_domain *sd)
171{
172 if (cpumask_weight(sched_domain_span(sd)) == 1)
173 return 1;
174
175 /* Following flags need at least 2 groups */
6f349818
VS
176 if ((sd->flags & SD_DEGENERATE_GROUPS_MASK) &&
177 (sd->groups != sd->groups->next))
178 return 0;
f2cb1360
IM
179
180 /* Following flags don't use groups */
181 if (sd->flags & (SD_WAKE_AFFINE))
182 return 0;
183
184 return 1;
185}
186
187static int
188sd_parent_degenerate(struct sched_domain *sd, struct sched_domain *parent)
189{
190 unsigned long cflags = sd->flags, pflags = parent->flags;
191
192 if (sd_degenerate(parent))
193 return 1;
194
195 if (!cpumask_equal(sched_domain_span(sd), sched_domain_span(parent)))
196 return 0;
197
198 /* Flags needing groups don't count if only 1 group in parent */
ab65afb0 199 if (parent->groups == parent->groups->next)
3a6712c7 200 pflags &= ~SD_DEGENERATE_GROUPS_MASK;
ab65afb0 201
f2cb1360
IM
202 if (~cflags & pflags)
203 return 0;
204
205 return 1;
206}
207
531b5c9f 208#if defined(CONFIG_ENERGY_MODEL) && defined(CONFIG_CPU_FREQ_GOV_SCHEDUTIL)
f8a696f2 209DEFINE_STATIC_KEY_FALSE(sched_energy_present);
8d5d0cfb 210unsigned int sysctl_sched_energy_aware = 1;
531b5c9f
QP
211DEFINE_MUTEX(sched_energy_mutex);
212bool sched_energy_update;
213
31f6a8c0
IV
214void rebuild_sched_domains_energy(void)
215{
216 mutex_lock(&sched_energy_mutex);
217 sched_energy_update = true;
218 rebuild_sched_domains();
219 sched_energy_update = false;
220 mutex_unlock(&sched_energy_mutex);
221}
222
8d5d0cfb
QP
223#ifdef CONFIG_PROC_SYSCTL
224int sched_energy_aware_handler(struct ctl_table *table, int write,
32927393 225 void *buffer, size_t *lenp, loff_t *ppos)
8d5d0cfb
QP
226{
227 int ret, state;
228
229 if (write && !capable(CAP_SYS_ADMIN))
230 return -EPERM;
231
232 ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
233 if (!ret && write) {
234 state = static_branch_unlikely(&sched_energy_present);
31f6a8c0
IV
235 if (state != sysctl_sched_energy_aware)
236 rebuild_sched_domains_energy();
8d5d0cfb
QP
237 }
238
239 return ret;
240}
241#endif
242
6aa140fa
QP
243static void free_pd(struct perf_domain *pd)
244{
245 struct perf_domain *tmp;
246
247 while (pd) {
248 tmp = pd->next;
249 kfree(pd);
250 pd = tmp;
251 }
252}
253
254static struct perf_domain *find_pd(struct perf_domain *pd, int cpu)
255{
256 while (pd) {
257 if (cpumask_test_cpu(cpu, perf_domain_span(pd)))
258 return pd;
259 pd = pd->next;
260 }
261
262 return NULL;
263}
264
265static struct perf_domain *pd_init(int cpu)
266{
267 struct em_perf_domain *obj = em_cpu_get(cpu);
268 struct perf_domain *pd;
269
270 if (!obj) {
271 if (sched_debug())
272 pr_info("%s: no EM found for CPU%d\n", __func__, cpu);
273 return NULL;
274 }
275
276 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
277 if (!pd)
278 return NULL;
279 pd->em_pd = obj;
280
281 return pd;
282}
283
284static void perf_domain_debug(const struct cpumask *cpu_map,
285 struct perf_domain *pd)
286{
287 if (!sched_debug() || !pd)
288 return;
289
290 printk(KERN_DEBUG "root_domain %*pbl:", cpumask_pr_args(cpu_map));
291
292 while (pd) {
521b512b 293 printk(KERN_CONT " pd%d:{ cpus=%*pbl nr_pstate=%d }",
6aa140fa
QP
294 cpumask_first(perf_domain_span(pd)),
295 cpumask_pr_args(perf_domain_span(pd)),
521b512b 296 em_pd_nr_perf_states(pd->em_pd));
6aa140fa
QP
297 pd = pd->next;
298 }
299
300 printk(KERN_CONT "\n");
301}
302
303static void destroy_perf_domain_rcu(struct rcu_head *rp)
304{
305 struct perf_domain *pd;
306
307 pd = container_of(rp, struct perf_domain, rcu);
308 free_pd(pd);
309}
310
1f74de87
QP
311static void sched_energy_set(bool has_eas)
312{
313 if (!has_eas && static_branch_unlikely(&sched_energy_present)) {
314 if (sched_debug())
315 pr_info("%s: stopping EAS\n", __func__);
316 static_branch_disable_cpuslocked(&sched_energy_present);
317 } else if (has_eas && !static_branch_unlikely(&sched_energy_present)) {
318 if (sched_debug())
319 pr_info("%s: starting EAS\n", __func__);
320 static_branch_enable_cpuslocked(&sched_energy_present);
321 }
322}
323
b68a4c0d
QP
324/*
325 * EAS can be used on a root domain if it meets all the following conditions:
326 * 1. an Energy Model (EM) is available;
327 * 2. the SD_ASYM_CPUCAPACITY flag is set in the sched_domain hierarchy.
38502ab4
VS
328 * 3. no SMT is detected.
329 * 4. the EM complexity is low enough to keep scheduling overheads low;
330 * 5. schedutil is driving the frequency of all CPUs of the rd;
fa50e2b4 331 * 6. frequency invariance support is present;
b68a4c0d
QP
332 *
333 * The complexity of the Energy Model is defined as:
334 *
521b512b 335 * C = nr_pd * (nr_cpus + nr_ps)
b68a4c0d
QP
336 *
337 * with parameters defined as:
338 * - nr_pd: the number of performance domains
339 * - nr_cpus: the number of CPUs
521b512b 340 * - nr_ps: the sum of the number of performance states of all performance
b68a4c0d 341 * domains (for example, on a system with 2 performance domains,
521b512b 342 * with 10 performance states each, nr_ps = 2 * 10 = 20).
b68a4c0d
QP
343 *
344 * It is generally not a good idea to use such a model in the wake-up path on
345 * very complex platforms because of the associated scheduling overheads. The
346 * arbitrary constraint below prevents that. It makes EAS usable up to 16 CPUs
521b512b 347 * with per-CPU DVFS and less than 8 performance states each, for example.
b68a4c0d
QP
348 */
349#define EM_MAX_COMPLEXITY 2048
350
531b5c9f 351extern struct cpufreq_governor schedutil_gov;
1f74de87 352static bool build_perf_domains(const struct cpumask *cpu_map)
6aa140fa 353{
521b512b 354 int i, nr_pd = 0, nr_ps = 0, nr_cpus = cpumask_weight(cpu_map);
6aa140fa
QP
355 struct perf_domain *pd = NULL, *tmp;
356 int cpu = cpumask_first(cpu_map);
357 struct root_domain *rd = cpu_rq(cpu)->rd;
531b5c9f
QP
358 struct cpufreq_policy *policy;
359 struct cpufreq_governor *gov;
b68a4c0d 360
8d5d0cfb
QP
361 if (!sysctl_sched_energy_aware)
362 goto free;
363
b68a4c0d
QP
364 /* EAS is enabled for asymmetric CPU capacity topologies. */
365 if (!per_cpu(sd_asym_cpucapacity, cpu)) {
366 if (sched_debug()) {
367 pr_info("rd %*pbl: CPUs do not have asymmetric capacities\n",
368 cpumask_pr_args(cpu_map));
369 }
370 goto free;
371 }
6aa140fa 372
38502ab4
VS
373 /* EAS definitely does *not* handle SMT */
374 if (sched_smt_active()) {
375 pr_warn("rd %*pbl: Disabling EAS, SMT is not supported\n",
376 cpumask_pr_args(cpu_map));
377 goto free;
378 }
379
fa50e2b4
IV
380 if (!arch_scale_freq_invariant()) {
381 if (sched_debug()) {
382 pr_warn("rd %*pbl: Disabling EAS: frequency-invariant load tracking not yet supported",
383 cpumask_pr_args(cpu_map));
384 }
385 goto free;
386 }
387
6aa140fa
QP
388 for_each_cpu(i, cpu_map) {
389 /* Skip already covered CPUs. */
390 if (find_pd(pd, i))
391 continue;
392
531b5c9f
QP
393 /* Do not attempt EAS if schedutil is not being used. */
394 policy = cpufreq_cpu_get(i);
395 if (!policy)
396 goto free;
397 gov = policy->governor;
398 cpufreq_cpu_put(policy);
399 if (gov != &schedutil_gov) {
400 if (rd->pd)
401 pr_warn("rd %*pbl: Disabling EAS, schedutil is mandatory\n",
402 cpumask_pr_args(cpu_map));
403 goto free;
404 }
405
6aa140fa
QP
406 /* Create the new pd and add it to the local list. */
407 tmp = pd_init(i);
408 if (!tmp)
409 goto free;
410 tmp->next = pd;
411 pd = tmp;
b68a4c0d
QP
412
413 /*
521b512b 414 * Count performance domains and performance states for the
b68a4c0d
QP
415 * complexity check.
416 */
417 nr_pd++;
521b512b 418 nr_ps += em_pd_nr_perf_states(pd->em_pd);
b68a4c0d
QP
419 }
420
421 /* Bail out if the Energy Model complexity is too high. */
521b512b 422 if (nr_pd * (nr_ps + nr_cpus) > EM_MAX_COMPLEXITY) {
b68a4c0d
QP
423 WARN(1, "rd %*pbl: Failed to start EAS, EM complexity is too high\n",
424 cpumask_pr_args(cpu_map));
425 goto free;
6aa140fa
QP
426 }
427
428 perf_domain_debug(cpu_map, pd);
429
430 /* Attach the new list of performance domains to the root domain. */
431 tmp = rd->pd;
432 rcu_assign_pointer(rd->pd, pd);
433 if (tmp)
434 call_rcu(&tmp->rcu, destroy_perf_domain_rcu);
435
1f74de87 436 return !!pd;
6aa140fa
QP
437
438free:
439 free_pd(pd);
440 tmp = rd->pd;
441 rcu_assign_pointer(rd->pd, NULL);
442 if (tmp)
443 call_rcu(&tmp->rcu, destroy_perf_domain_rcu);
1f74de87
QP
444
445 return false;
6aa140fa
QP
446}
447#else
448static void free_pd(struct perf_domain *pd) { }
531b5c9f 449#endif /* CONFIG_ENERGY_MODEL && CONFIG_CPU_FREQ_GOV_SCHEDUTIL*/
6aa140fa 450
f2cb1360
IM
451static void free_rootdomain(struct rcu_head *rcu)
452{
453 struct root_domain *rd = container_of(rcu, struct root_domain, rcu);
454
455 cpupri_cleanup(&rd->cpupri);
456 cpudl_cleanup(&rd->cpudl);
457 free_cpumask_var(rd->dlo_mask);
458 free_cpumask_var(rd->rto_mask);
459 free_cpumask_var(rd->online);
460 free_cpumask_var(rd->span);
6aa140fa 461 free_pd(rd->pd);
f2cb1360
IM
462 kfree(rd);
463}
464
465void rq_attach_root(struct rq *rq, struct root_domain *rd)
466{
467 struct root_domain *old_rd = NULL;
468 unsigned long flags;
469
5cb9eaa3 470 raw_spin_rq_lock_irqsave(rq, flags);
f2cb1360
IM
471
472 if (rq->rd) {
473 old_rd = rq->rd;
474
475 if (cpumask_test_cpu(rq->cpu, old_rd->online))
476 set_rq_offline(rq);
477
478 cpumask_clear_cpu(rq->cpu, old_rd->span);
479
480 /*
481 * If we dont want to free the old_rd yet then
482 * set old_rd to NULL to skip the freeing later
483 * in this function:
484 */
485 if (!atomic_dec_and_test(&old_rd->refcount))
486 old_rd = NULL;
487 }
488
489 atomic_inc(&rd->refcount);
490 rq->rd = rd;
491
492 cpumask_set_cpu(rq->cpu, rd->span);
493 if (cpumask_test_cpu(rq->cpu, cpu_active_mask))
494 set_rq_online(rq);
495
5cb9eaa3 496 raw_spin_rq_unlock_irqrestore(rq, flags);
f2cb1360
IM
497
498 if (old_rd)
337e9b07 499 call_rcu(&old_rd->rcu, free_rootdomain);
f2cb1360
IM
500}
501
364f5665
SRV
502void sched_get_rd(struct root_domain *rd)
503{
504 atomic_inc(&rd->refcount);
505}
506
507void sched_put_rd(struct root_domain *rd)
508{
509 if (!atomic_dec_and_test(&rd->refcount))
510 return;
511
337e9b07 512 call_rcu(&rd->rcu, free_rootdomain);
364f5665
SRV
513}
514
f2cb1360
IM
515static int init_rootdomain(struct root_domain *rd)
516{
f2cb1360
IM
517 if (!zalloc_cpumask_var(&rd->span, GFP_KERNEL))
518 goto out;
519 if (!zalloc_cpumask_var(&rd->online, GFP_KERNEL))
520 goto free_span;
521 if (!zalloc_cpumask_var(&rd->dlo_mask, GFP_KERNEL))
522 goto free_online;
523 if (!zalloc_cpumask_var(&rd->rto_mask, GFP_KERNEL))
524 goto free_dlo_mask;
525
4bdced5c
SRRH
526#ifdef HAVE_RT_PUSH_IPI
527 rd->rto_cpu = -1;
528 raw_spin_lock_init(&rd->rto_lock);
529 init_irq_work(&rd->rto_push_work, rto_push_irq_work_func);
530#endif
531
26762423 532 rd->visit_gen = 0;
f2cb1360
IM
533 init_dl_bw(&rd->dl_bw);
534 if (cpudl_init(&rd->cpudl) != 0)
535 goto free_rto_mask;
536
537 if (cpupri_init(&rd->cpupri) != 0)
538 goto free_cpudl;
539 return 0;
540
541free_cpudl:
542 cpudl_cleanup(&rd->cpudl);
543free_rto_mask:
544 free_cpumask_var(rd->rto_mask);
545free_dlo_mask:
546 free_cpumask_var(rd->dlo_mask);
547free_online:
548 free_cpumask_var(rd->online);
549free_span:
550 free_cpumask_var(rd->span);
551out:
552 return -ENOMEM;
553}
554
555/*
556 * By default the system creates a single root-domain with all CPUs as
557 * members (mimicking the global state we have today).
558 */
559struct root_domain def_root_domain;
560
561void init_defrootdomain(void)
562{
563 init_rootdomain(&def_root_domain);
564
565 atomic_set(&def_root_domain.refcount, 1);
566}
567
568static struct root_domain *alloc_rootdomain(void)
569{
570 struct root_domain *rd;
571
4d13a06d 572 rd = kzalloc(sizeof(*rd), GFP_KERNEL);
f2cb1360
IM
573 if (!rd)
574 return NULL;
575
576 if (init_rootdomain(rd) != 0) {
577 kfree(rd);
578 return NULL;
579 }
580
581 return rd;
582}
583
584static void free_sched_groups(struct sched_group *sg, int free_sgc)
585{
586 struct sched_group *tmp, *first;
587
588 if (!sg)
589 return;
590
591 first = sg;
592 do {
593 tmp = sg->next;
594
595 if (free_sgc && atomic_dec_and_test(&sg->sgc->ref))
596 kfree(sg->sgc);
597
213c5a45
SW
598 if (atomic_dec_and_test(&sg->ref))
599 kfree(sg);
f2cb1360
IM
600 sg = tmp;
601 } while (sg != first);
602}
603
604static void destroy_sched_domain(struct sched_domain *sd)
605{
606 /*
a090c4f2
PZ
607 * A normal sched domain may have multiple group references, an
608 * overlapping domain, having private groups, only one. Iterate,
609 * dropping group/capacity references, freeing where none remain.
f2cb1360 610 */
213c5a45
SW
611 free_sched_groups(sd->groups, 1);
612
f2cb1360
IM
613 if (sd->shared && atomic_dec_and_test(&sd->shared->ref))
614 kfree(sd->shared);
615 kfree(sd);
616}
617
618static void destroy_sched_domains_rcu(struct rcu_head *rcu)
619{
620 struct sched_domain *sd = container_of(rcu, struct sched_domain, rcu);
621
622 while (sd) {
623 struct sched_domain *parent = sd->parent;
624 destroy_sched_domain(sd);
625 sd = parent;
626 }
627}
628
629static void destroy_sched_domains(struct sched_domain *sd)
630{
631 if (sd)
632 call_rcu(&sd->rcu, destroy_sched_domains_rcu);
633}
634
635/*
636 * Keep a special pointer to the highest sched_domain that has
637 * SD_SHARE_PKG_RESOURCE set (Last Level Cache Domain) for this
638 * allows us to avoid some pointer chasing select_idle_sibling().
639 *
640 * Also keep a unique ID per domain (we use the first CPU number in
641 * the cpumask of the domain), this allows us to quickly tell if
642 * two CPUs are in the same cache domain, see cpus_share_cache().
643 */
994aeb7a 644DEFINE_PER_CPU(struct sched_domain __rcu *, sd_llc);
f2cb1360
IM
645DEFINE_PER_CPU(int, sd_llc_size);
646DEFINE_PER_CPU(int, sd_llc_id);
994aeb7a
JFG
647DEFINE_PER_CPU(struct sched_domain_shared __rcu *, sd_llc_shared);
648DEFINE_PER_CPU(struct sched_domain __rcu *, sd_numa);
649DEFINE_PER_CPU(struct sched_domain __rcu *, sd_asym_packing);
650DEFINE_PER_CPU(struct sched_domain __rcu *, sd_asym_cpucapacity);
df054e84 651DEFINE_STATIC_KEY_FALSE(sched_asym_cpucapacity);
f2cb1360
IM
652
653static void update_top_cache_domain(int cpu)
654{
655 struct sched_domain_shared *sds = NULL;
656 struct sched_domain *sd;
657 int id = cpu;
658 int size = 1;
659
660 sd = highest_flag_domain(cpu, SD_SHARE_PKG_RESOURCES);
661 if (sd) {
662 id = cpumask_first(sched_domain_span(sd));
663 size = cpumask_weight(sched_domain_span(sd));
664 sds = sd->shared;
665 }
666
667 rcu_assign_pointer(per_cpu(sd_llc, cpu), sd);
668 per_cpu(sd_llc_size, cpu) = size;
669 per_cpu(sd_llc_id, cpu) = id;
670 rcu_assign_pointer(per_cpu(sd_llc_shared, cpu), sds);
671
672 sd = lowest_flag_domain(cpu, SD_NUMA);
673 rcu_assign_pointer(per_cpu(sd_numa, cpu), sd);
674
675 sd = highest_flag_domain(cpu, SD_ASYM_PACKING);
011b27bb
QP
676 rcu_assign_pointer(per_cpu(sd_asym_packing, cpu), sd);
677
c744dc4a 678 sd = lowest_flag_domain(cpu, SD_ASYM_CPUCAPACITY_FULL);
011b27bb 679 rcu_assign_pointer(per_cpu(sd_asym_cpucapacity, cpu), sd);
f2cb1360
IM
680}
681
682/*
683 * Attach the domain 'sd' to 'cpu' as its base domain. Callers must
684 * hold the hotplug lock.
685 */
686static void
687cpu_attach_domain(struct sched_domain *sd, struct root_domain *rd, int cpu)
688{
689 struct rq *rq = cpu_rq(cpu);
690 struct sched_domain *tmp;
b5b21734 691 int numa_distance = 0;
f2cb1360
IM
692
693 /* Remove the sched domains which do not contribute to scheduling. */
694 for (tmp = sd; tmp; ) {
695 struct sched_domain *parent = tmp->parent;
696 if (!parent)
697 break;
698
699 if (sd_parent_degenerate(tmp, parent)) {
700 tmp->parent = parent->parent;
701 if (parent->parent)
702 parent->parent->child = tmp;
703 /*
704 * Transfer SD_PREFER_SIBLING down in case of a
705 * degenerate parent; the spans match for this
706 * so the property transfers.
707 */
708 if (parent->flags & SD_PREFER_SIBLING)
709 tmp->flags |= SD_PREFER_SIBLING;
710 destroy_sched_domain(parent);
711 } else
712 tmp = tmp->parent;
713 }
714
715 if (sd && sd_degenerate(sd)) {
716 tmp = sd;
717 sd = sd->parent;
718 destroy_sched_domain(tmp);
d26a585d
RN
719 if (sd) {
720 struct sched_group *sg = sd->groups;
721
722 /*
723 * sched groups hold the flags of the child sched
724 * domain for convenience. Clear such flags since
725 * the child is being destroyed.
726 */
727 do {
728 sg->flags = 0;
729 } while (sg != sd->groups);
730
f2cb1360 731 sd->child = NULL;
d26a585d 732 }
f2cb1360
IM
733 }
734
b5b21734
VS
735 for (tmp = sd; tmp; tmp = tmp->parent)
736 numa_distance += !!(tmp->flags & SD_NUMA);
737
f2cb1360
IM
738 sched_domain_debug(sd, cpu);
739
740 rq_attach_root(rq, rd);
741 tmp = rq->sd;
742 rcu_assign_pointer(rq->sd, sd);
bbdacdfe 743 dirty_sched_domain_sysctl(cpu);
f2cb1360
IM
744 destroy_sched_domains(tmp);
745
746 update_top_cache_domain(cpu);
747}
748
f2cb1360 749struct s_data {
99687cdb 750 struct sched_domain * __percpu *sd;
f2cb1360
IM
751 struct root_domain *rd;
752};
753
754enum s_alloc {
755 sa_rootdomain,
756 sa_sd,
757 sa_sd_storage,
758 sa_none,
759};
760
35a566e6
PZ
761/*
762 * Return the canonical balance CPU for this group, this is the first CPU
e5c14b1f 763 * of this group that's also in the balance mask.
35a566e6 764 *
e5c14b1f
PZ
765 * The balance mask are all those CPUs that could actually end up at this
766 * group. See build_balance_mask().
35a566e6
PZ
767 *
768 * Also see should_we_balance().
769 */
770int group_balance_cpu(struct sched_group *sg)
771{
e5c14b1f 772 return cpumask_first(group_balance_mask(sg));
35a566e6
PZ
773}
774
775
776/*
777 * NUMA topology (first read the regular topology blurb below)
778 *
779 * Given a node-distance table, for example:
780 *
781 * node 0 1 2 3
782 * 0: 10 20 30 20
783 * 1: 20 10 20 30
784 * 2: 30 20 10 20
785 * 3: 20 30 20 10
786 *
787 * which represents a 4 node ring topology like:
788 *
789 * 0 ----- 1
790 * | |
791 * | |
792 * | |
793 * 3 ----- 2
794 *
795 * We want to construct domains and groups to represent this. The way we go
796 * about doing this is to build the domains on 'hops'. For each NUMA level we
797 * construct the mask of all nodes reachable in @level hops.
798 *
799 * For the above NUMA topology that gives 3 levels:
800 *
801 * NUMA-2 0-3 0-3 0-3 0-3
802 * groups: {0-1,3},{1-3} {0-2},{0,2-3} {1-3},{0-1,3} {0,2-3},{0-2}
803 *
804 * NUMA-1 0-1,3 0-2 1-3 0,2-3
805 * groups: {0},{1},{3} {0},{1},{2} {1},{2},{3} {0},{2},{3}
806 *
807 * NUMA-0 0 1 2 3
808 *
809 *
810 * As can be seen; things don't nicely line up as with the regular topology.
811 * When we iterate a domain in child domain chunks some nodes can be
812 * represented multiple times -- hence the "overlap" naming for this part of
813 * the topology.
814 *
815 * In order to minimize this overlap, we only build enough groups to cover the
816 * domain. For instance Node-0 NUMA-2 would only get groups: 0-1,3 and 1-3.
817 *
818 * Because:
819 *
820 * - the first group of each domain is its child domain; this
821 * gets us the first 0-1,3
822 * - the only uncovered node is 2, who's child domain is 1-3.
823 *
824 * However, because of the overlap, computing a unique CPU for each group is
825 * more complicated. Consider for instance the groups of NODE-1 NUMA-2, both
826 * groups include the CPUs of Node-0, while those CPUs would not in fact ever
827 * end up at those groups (they would end up in group: 0-1,3).
828 *
e5c14b1f 829 * To correct this we have to introduce the group balance mask. This mask
35a566e6
PZ
830 * will contain those CPUs in the group that can reach this group given the
831 * (child) domain tree.
832 *
833 * With this we can once again compute balance_cpu and sched_group_capacity
834 * relations.
835 *
836 * XXX include words on how balance_cpu is unique and therefore can be
837 * used for sched_group_capacity links.
838 *
839 *
840 * Another 'interesting' topology is:
841 *
842 * node 0 1 2 3
843 * 0: 10 20 20 30
844 * 1: 20 10 20 20
845 * 2: 20 20 10 20
846 * 3: 30 20 20 10
847 *
848 * Which looks a little like:
849 *
850 * 0 ----- 1
851 * | / |
852 * | / |
853 * | / |
854 * 2 ----- 3
855 *
856 * This topology is asymmetric, nodes 1,2 are fully connected, but nodes 0,3
857 * are not.
858 *
859 * This leads to a few particularly weird cases where the sched_domain's are
97fb7a0a 860 * not of the same number for each CPU. Consider:
35a566e6
PZ
861 *
862 * NUMA-2 0-3 0-3
863 * groups: {0-2},{1-3} {1-3},{0-2}
864 *
865 * NUMA-1 0-2 0-3 0-3 1-3
866 *
867 * NUMA-0 0 1 2 3
868 *
869 */
870
871
f2cb1360 872/*
e5c14b1f
PZ
873 * Build the balance mask; it contains only those CPUs that can arrive at this
874 * group and should be considered to continue balancing.
35a566e6
PZ
875 *
876 * We do this during the group creation pass, therefore the group information
877 * isn't complete yet, however since each group represents a (child) domain we
878 * can fully construct this using the sched_domain bits (which are already
879 * complete).
f2cb1360 880 */
1676330e 881static void
e5c14b1f 882build_balance_mask(struct sched_domain *sd, struct sched_group *sg, struct cpumask *mask)
f2cb1360 883{
ae4df9d6 884 const struct cpumask *sg_span = sched_group_span(sg);
f2cb1360
IM
885 struct sd_data *sdd = sd->private;
886 struct sched_domain *sibling;
887 int i;
888
1676330e
PZ
889 cpumask_clear(mask);
890
f32d782e 891 for_each_cpu(i, sg_span) {
f2cb1360 892 sibling = *per_cpu_ptr(sdd->sd, i);
73bb059f
PZ
893
894 /*
895 * Can happen in the asymmetric case, where these siblings are
896 * unused. The mask will not be empty because those CPUs that
897 * do have the top domain _should_ span the domain.
898 */
899 if (!sibling->child)
900 continue;
901
902 /* If we would not end up here, we can't continue from here */
903 if (!cpumask_equal(sg_span, sched_domain_span(sibling->child)))
f2cb1360
IM
904 continue;
905
1676330e 906 cpumask_set_cpu(i, mask);
f2cb1360 907 }
73bb059f
PZ
908
909 /* We must not have empty masks here */
1676330e 910 WARN_ON_ONCE(cpumask_empty(mask));
f2cb1360
IM
911}
912
913/*
35a566e6
PZ
914 * XXX: This creates per-node group entries; since the load-balancer will
915 * immediately access remote memory to construct this group's load-balance
916 * statistics having the groups node local is of dubious benefit.
f2cb1360 917 */
8c033469
LRV
918static struct sched_group *
919build_group_from_child_sched_domain(struct sched_domain *sd, int cpu)
920{
921 struct sched_group *sg;
922 struct cpumask *sg_span;
923
924 sg = kzalloc_node(sizeof(struct sched_group) + cpumask_size(),
925 GFP_KERNEL, cpu_to_node(cpu));
926
927 if (!sg)
928 return NULL;
929
ae4df9d6 930 sg_span = sched_group_span(sg);
d26a585d 931 if (sd->child) {
8c033469 932 cpumask_copy(sg_span, sched_domain_span(sd->child));
d26a585d
RN
933 sg->flags = sd->child->flags;
934 } else {
8c033469 935 cpumask_copy(sg_span, sched_domain_span(sd));
d26a585d 936 }
8c033469 937
213c5a45 938 atomic_inc(&sg->ref);
8c033469
LRV
939 return sg;
940}
941
942static void init_overlap_sched_group(struct sched_domain *sd,
1676330e 943 struct sched_group *sg)
8c033469 944{
1676330e 945 struct cpumask *mask = sched_domains_tmpmask2;
8c033469
LRV
946 struct sd_data *sdd = sd->private;
947 struct cpumask *sg_span;
1676330e
PZ
948 int cpu;
949
e5c14b1f 950 build_balance_mask(sd, sg, mask);
0a2b65c0 951 cpu = cpumask_first(mask);
8c033469
LRV
952
953 sg->sgc = *per_cpu_ptr(sdd->sgc, cpu);
954 if (atomic_inc_return(&sg->sgc->ref) == 1)
e5c14b1f 955 cpumask_copy(group_balance_mask(sg), mask);
35a566e6 956 else
e5c14b1f 957 WARN_ON_ONCE(!cpumask_equal(group_balance_mask(sg), mask));
8c033469
LRV
958
959 /*
960 * Initialize sgc->capacity such that even if we mess up the
961 * domains and no possible iteration will get us here, we won't
962 * die on a /0 trap.
963 */
ae4df9d6 964 sg_span = sched_group_span(sg);
8c033469
LRV
965 sg->sgc->capacity = SCHED_CAPACITY_SCALE * cpumask_weight(sg_span);
966 sg->sgc->min_capacity = SCHED_CAPACITY_SCALE;
e3d6d0cb 967 sg->sgc->max_capacity = SCHED_CAPACITY_SCALE;
8c033469
LRV
968}
969
585b6d27
BS
970static struct sched_domain *
971find_descended_sibling(struct sched_domain *sd, struct sched_domain *sibling)
972{
973 /*
974 * The proper descendant would be the one whose child won't span out
975 * of sd
976 */
977 while (sibling->child &&
978 !cpumask_subset(sched_domain_span(sibling->child),
979 sched_domain_span(sd)))
980 sibling = sibling->child;
981
982 /*
983 * As we are referencing sgc across different topology level, we need
984 * to go down to skip those sched_domains which don't contribute to
985 * scheduling because they will be degenerated in cpu_attach_domain
986 */
987 while (sibling->child &&
988 cpumask_equal(sched_domain_span(sibling->child),
989 sched_domain_span(sibling)))
990 sibling = sibling->child;
991
992 return sibling;
993}
994
f2cb1360
IM
995static int
996build_overlap_sched_groups(struct sched_domain *sd, int cpu)
997{
91eaed0d 998 struct sched_group *first = NULL, *last = NULL, *sg;
f2cb1360
IM
999 const struct cpumask *span = sched_domain_span(sd);
1000 struct cpumask *covered = sched_domains_tmpmask;
1001 struct sd_data *sdd = sd->private;
1002 struct sched_domain *sibling;
1003 int i;
1004
1005 cpumask_clear(covered);
1006
0372dd27 1007 for_each_cpu_wrap(i, span, cpu) {
f2cb1360
IM
1008 struct cpumask *sg_span;
1009
1010 if (cpumask_test_cpu(i, covered))
1011 continue;
1012
1013 sibling = *per_cpu_ptr(sdd->sd, i);
1014
c20e1ea4
LRV
1015 /*
1016 * Asymmetric node setups can result in situations where the
1017 * domain tree is of unequal depth, make sure to skip domains
1018 * that already cover the entire range.
1019 *
1020 * In that case build_sched_domains() will have terminated the
1021 * iteration early and our sibling sd spans will be empty.
1022 * Domains should always include the CPU they're built on, so
1023 * check that.
1024 */
f2cb1360
IM
1025 if (!cpumask_test_cpu(i, sched_domain_span(sibling)))
1026 continue;
1027
585b6d27
BS
1028 /*
1029 * Usually we build sched_group by sibling's child sched_domain
1030 * But for machines whose NUMA diameter are 3 or above, we move
1031 * to build sched_group by sibling's proper descendant's child
1032 * domain because sibling's child sched_domain will span out of
1033 * the sched_domain being built as below.
1034 *
1035 * Smallest diameter=3 topology is:
1036 *
1037 * node 0 1 2 3
1038 * 0: 10 20 30 40
1039 * 1: 20 10 20 30
1040 * 2: 30 20 10 20
1041 * 3: 40 30 20 10
1042 *
1043 * 0 --- 1 --- 2 --- 3
1044 *
1045 * NUMA-3 0-3 N/A N/A 0-3
1046 * groups: {0-2},{1-3} {1-3},{0-2}
1047 *
1048 * NUMA-2 0-2 0-3 0-3 1-3
1049 * groups: {0-1},{1-3} {0-2},{2-3} {1-3},{0-1} {2-3},{0-2}
1050 *
1051 * NUMA-1 0-1 0-2 1-3 2-3
1052 * groups: {0},{1} {1},{2},{0} {2},{3},{1} {3},{2}
1053 *
1054 * NUMA-0 0 1 2 3
1055 *
1056 * The NUMA-2 groups for nodes 0 and 3 are obviously buggered, as the
1057 * group span isn't a subset of the domain span.
1058 */
1059 if (sibling->child &&
1060 !cpumask_subset(sched_domain_span(sibling->child), span))
1061 sibling = find_descended_sibling(sd, sibling);
1062
8c033469 1063 sg = build_group_from_child_sched_domain(sibling, cpu);
f2cb1360
IM
1064 if (!sg)
1065 goto fail;
1066
ae4df9d6 1067 sg_span = sched_group_span(sg);
f2cb1360
IM
1068 cpumask_or(covered, covered, sg_span);
1069
585b6d27 1070 init_overlap_sched_group(sibling, sg);
f2cb1360 1071
f2cb1360
IM
1072 if (!first)
1073 first = sg;
1074 if (last)
1075 last->next = sg;
1076 last = sg;
1077 last->next = first;
1078 }
91eaed0d 1079 sd->groups = first;
f2cb1360
IM
1080
1081 return 0;
1082
1083fail:
1084 free_sched_groups(first, 0);
1085
1086 return -ENOMEM;
1087}
1088
35a566e6
PZ
1089
1090/*
1091 * Package topology (also see the load-balance blurb in fair.c)
1092 *
1093 * The scheduler builds a tree structure to represent a number of important
1094 * topology features. By default (default_topology[]) these include:
1095 *
1096 * - Simultaneous multithreading (SMT)
1097 * - Multi-Core Cache (MC)
1098 * - Package (DIE)
1099 *
1100 * Where the last one more or less denotes everything up to a NUMA node.
1101 *
1102 * The tree consists of 3 primary data structures:
1103 *
1104 * sched_domain -> sched_group -> sched_group_capacity
1105 * ^ ^ ^ ^
1106 * `-' `-'
1107 *
97fb7a0a 1108 * The sched_domains are per-CPU and have a two way link (parent & child) and
35a566e6
PZ
1109 * denote the ever growing mask of CPUs belonging to that level of topology.
1110 *
1111 * Each sched_domain has a circular (double) linked list of sched_group's, each
1112 * denoting the domains of the level below (or individual CPUs in case of the
1113 * first domain level). The sched_group linked by a sched_domain includes the
1114 * CPU of that sched_domain [*].
1115 *
1116 * Take for instance a 2 threaded, 2 core, 2 cache cluster part:
1117 *
1118 * CPU 0 1 2 3 4 5 6 7
1119 *
1120 * DIE [ ]
1121 * MC [ ] [ ]
1122 * SMT [ ] [ ] [ ] [ ]
1123 *
1124 * - or -
1125 *
1126 * DIE 0-7 0-7 0-7 0-7 0-7 0-7 0-7 0-7
1127 * MC 0-3 0-3 0-3 0-3 4-7 4-7 4-7 4-7
1128 * SMT 0-1 0-1 2-3 2-3 4-5 4-5 6-7 6-7
1129 *
1130 * CPU 0 1 2 3 4 5 6 7
1131 *
1132 * One way to think about it is: sched_domain moves you up and down among these
1133 * topology levels, while sched_group moves you sideways through it, at child
1134 * domain granularity.
1135 *
1136 * sched_group_capacity ensures each unique sched_group has shared storage.
1137 *
1138 * There are two related construction problems, both require a CPU that
1139 * uniquely identify each group (for a given domain):
1140 *
1141 * - The first is the balance_cpu (see should_we_balance() and the
1142 * load-balance blub in fair.c); for each group we only want 1 CPU to
1143 * continue balancing at a higher domain.
1144 *
1145 * - The second is the sched_group_capacity; we want all identical groups
1146 * to share a single sched_group_capacity.
1147 *
1148 * Since these topologies are exclusive by construction. That is, its
1149 * impossible for an SMT thread to belong to multiple cores, and cores to
1150 * be part of multiple caches. There is a very clear and unique location
1151 * for each CPU in the hierarchy.
1152 *
1153 * Therefore computing a unique CPU for each group is trivial (the iteration
1154 * mask is redundant and set all 1s; all CPUs in a group will end up at _that_
1155 * group), we can simply pick the first CPU in each group.
1156 *
1157 *
1158 * [*] in other words, the first group of each domain is its child domain.
1159 */
1160
0c0e776a 1161static struct sched_group *get_group(int cpu, struct sd_data *sdd)
f2cb1360
IM
1162{
1163 struct sched_domain *sd = *per_cpu_ptr(sdd->sd, cpu);
1164 struct sched_domain *child = sd->child;
0c0e776a 1165 struct sched_group *sg;
67d4f6ff 1166 bool already_visited;
f2cb1360
IM
1167
1168 if (child)
1169 cpu = cpumask_first(sched_domain_span(child));
1170
0c0e776a
PZ
1171 sg = *per_cpu_ptr(sdd->sg, cpu);
1172 sg->sgc = *per_cpu_ptr(sdd->sgc, cpu);
1173
67d4f6ff
VS
1174 /* Increase refcounts for claim_allocations: */
1175 already_visited = atomic_inc_return(&sg->ref) > 1;
1176 /* sgc visits should follow a similar trend as sg */
1177 WARN_ON(already_visited != (atomic_inc_return(&sg->sgc->ref) > 1));
1178
1179 /* If we have already visited that group, it's already initialized. */
1180 if (already_visited)
1181 return sg;
f2cb1360 1182
0c0e776a 1183 if (child) {
ae4df9d6
PZ
1184 cpumask_copy(sched_group_span(sg), sched_domain_span(child));
1185 cpumask_copy(group_balance_mask(sg), sched_group_span(sg));
d26a585d 1186 sg->flags = child->flags;
0c0e776a 1187 } else {
ae4df9d6 1188 cpumask_set_cpu(cpu, sched_group_span(sg));
e5c14b1f 1189 cpumask_set_cpu(cpu, group_balance_mask(sg));
f2cb1360
IM
1190 }
1191
ae4df9d6 1192 sg->sgc->capacity = SCHED_CAPACITY_SCALE * cpumask_weight(sched_group_span(sg));
0c0e776a 1193 sg->sgc->min_capacity = SCHED_CAPACITY_SCALE;
e3d6d0cb 1194 sg->sgc->max_capacity = SCHED_CAPACITY_SCALE;
0c0e776a
PZ
1195
1196 return sg;
f2cb1360
IM
1197}
1198
1199/*
1200 * build_sched_groups will build a circular linked list of the groups
d8743230
VS
1201 * covered by the given span, will set each group's ->cpumask correctly,
1202 * and will initialize their ->sgc.
f2cb1360
IM
1203 *
1204 * Assumes the sched_domain tree is fully constructed
1205 */
1206static int
1207build_sched_groups(struct sched_domain *sd, int cpu)
1208{
1209 struct sched_group *first = NULL, *last = NULL;
1210 struct sd_data *sdd = sd->private;
1211 const struct cpumask *span = sched_domain_span(sd);
1212 struct cpumask *covered;
1213 int i;
1214
f2cb1360
IM
1215 lockdep_assert_held(&sched_domains_mutex);
1216 covered = sched_domains_tmpmask;
1217
1218 cpumask_clear(covered);
1219
0c0e776a 1220 for_each_cpu_wrap(i, span, cpu) {
f2cb1360 1221 struct sched_group *sg;
f2cb1360
IM
1222
1223 if (cpumask_test_cpu(i, covered))
1224 continue;
1225
0c0e776a 1226 sg = get_group(i, sdd);
f2cb1360 1227
ae4df9d6 1228 cpumask_or(covered, covered, sched_group_span(sg));
f2cb1360
IM
1229
1230 if (!first)
1231 first = sg;
1232 if (last)
1233 last->next = sg;
1234 last = sg;
1235 }
1236 last->next = first;
0c0e776a 1237 sd->groups = first;
f2cb1360
IM
1238
1239 return 0;
1240}
1241
1242/*
1243 * Initialize sched groups cpu_capacity.
1244 *
1245 * cpu_capacity indicates the capacity of sched group, which is used while
1246 * distributing the load between different sched groups in a sched domain.
1247 * Typically cpu_capacity for all the groups in a sched domain will be same
1248 * unless there are asymmetries in the topology. If there are asymmetries,
1249 * group having more cpu_capacity will pickup more load compared to the
1250 * group having less cpu_capacity.
1251 */
1252static void init_sched_groups_capacity(int cpu, struct sched_domain *sd)
1253{
1254 struct sched_group *sg = sd->groups;
1255
1256 WARN_ON(!sg);
1257
1258 do {
1259 int cpu, max_cpu = -1;
1260
ae4df9d6 1261 sg->group_weight = cpumask_weight(sched_group_span(sg));
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IM
1262
1263 if (!(sd->flags & SD_ASYM_PACKING))
1264 goto next;
1265
ae4df9d6 1266 for_each_cpu(cpu, sched_group_span(sg)) {
f2cb1360
IM
1267 if (max_cpu < 0)
1268 max_cpu = cpu;
1269 else if (sched_asym_prefer(cpu, max_cpu))
1270 max_cpu = cpu;
1271 }
1272 sg->asym_prefer_cpu = max_cpu;
1273
1274next:
1275 sg = sg->next;
1276 } while (sg != sd->groups);
1277
1278 if (cpu != group_balance_cpu(sg))
1279 return;
1280
1281 update_group_capacity(sd, cpu);
1282}
1283
c744dc4a
BM
1284/*
1285 * Asymmetric CPU capacity bits
1286 */
1287struct asym_cap_data {
1288 struct list_head link;
1289 unsigned long capacity;
1290 unsigned long cpus[];
1291};
1292
1293/*
1294 * Set of available CPUs grouped by their corresponding capacities
1295 * Each list entry contains a CPU mask reflecting CPUs that share the same
1296 * capacity.
1297 * The lifespan of data is unlimited.
1298 */
1299static LIST_HEAD(asym_cap_list);
1300
1301#define cpu_capacity_span(asym_data) to_cpumask((asym_data)->cpus)
1302
1303/*
1304 * Verify whether there is any CPU capacity asymmetry in a given sched domain.
1305 * Provides sd_flags reflecting the asymmetry scope.
1306 */
1307static inline int
1308asym_cpu_capacity_classify(const struct cpumask *sd_span,
1309 const struct cpumask *cpu_map)
1310{
1311 struct asym_cap_data *entry;
1312 int count = 0, miss = 0;
1313
1314 /*
1315 * Count how many unique CPU capacities this domain spans across
1316 * (compare sched_domain CPUs mask with ones representing available
1317 * CPUs capacities). Take into account CPUs that might be offline:
1318 * skip those.
1319 */
1320 list_for_each_entry(entry, &asym_cap_list, link) {
1321 if (cpumask_intersects(sd_span, cpu_capacity_span(entry)))
1322 ++count;
1323 else if (cpumask_intersects(cpu_map, cpu_capacity_span(entry)))
1324 ++miss;
1325 }
1326
1327 WARN_ON_ONCE(!count && !list_empty(&asym_cap_list));
1328
1329 /* No asymmetry detected */
1330 if (count < 2)
1331 return 0;
1332 /* Some of the available CPU capacity values have not been detected */
1333 if (miss)
1334 return SD_ASYM_CPUCAPACITY;
1335
1336 /* Full asymmetry */
1337 return SD_ASYM_CPUCAPACITY | SD_ASYM_CPUCAPACITY_FULL;
1338
1339}
1340
1341static inline void asym_cpu_capacity_update_data(int cpu)
1342{
1343 unsigned long capacity = arch_scale_cpu_capacity(cpu);
1344 struct asym_cap_data *entry = NULL;
1345
1346 list_for_each_entry(entry, &asym_cap_list, link) {
1347 if (capacity == entry->capacity)
1348 goto done;
1349 }
1350
1351 entry = kzalloc(sizeof(*entry) + cpumask_size(), GFP_KERNEL);
1352 if (WARN_ONCE(!entry, "Failed to allocate memory for asymmetry data\n"))
1353 return;
1354 entry->capacity = capacity;
1355 list_add(&entry->link, &asym_cap_list);
1356done:
1357 __cpumask_set_cpu(cpu, cpu_capacity_span(entry));
1358}
1359
1360/*
1361 * Build-up/update list of CPUs grouped by their capacities
1362 * An update requires explicit request to rebuild sched domains
1363 * with state indicating CPU topology changes.
1364 */
1365static void asym_cpu_capacity_scan(void)
1366{
1367 struct asym_cap_data *entry, *next;
1368 int cpu;
1369
1370 list_for_each_entry(entry, &asym_cap_list, link)
1371 cpumask_clear(cpu_capacity_span(entry));
1372
1373 for_each_cpu_and(cpu, cpu_possible_mask, housekeeping_cpumask(HK_FLAG_DOMAIN))
1374 asym_cpu_capacity_update_data(cpu);
1375
1376 list_for_each_entry_safe(entry, next, &asym_cap_list, link) {
1377 if (cpumask_empty(cpu_capacity_span(entry))) {
1378 list_del(&entry->link);
1379 kfree(entry);
1380 }
1381 }
1382
1383 /*
1384 * Only one capacity value has been detected i.e. this system is symmetric.
1385 * No need to keep this data around.
1386 */
1387 if (list_is_singular(&asym_cap_list)) {
1388 entry = list_first_entry(&asym_cap_list, typeof(*entry), link);
1389 list_del(&entry->link);
1390 kfree(entry);
1391 }
1392}
1393
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IM
1394/*
1395 * Initializers for schedule domains
1396 * Non-inlined to reduce accumulated stack pressure in build_sched_domains()
1397 */
1398
1399static int default_relax_domain_level = -1;
1400int sched_domain_level_max;
1401
1402static int __init setup_relax_domain_level(char *str)
1403{
1404 if (kstrtoint(str, 0, &default_relax_domain_level))
1405 pr_warn("Unable to set relax_domain_level\n");
1406
1407 return 1;
1408}
1409__setup("relax_domain_level=", setup_relax_domain_level);
1410
1411static void set_domain_attribute(struct sched_domain *sd,
1412 struct sched_domain_attr *attr)
1413{
1414 int request;
1415
1416 if (!attr || attr->relax_domain_level < 0) {
1417 if (default_relax_domain_level < 0)
1418 return;
9ae7ab20 1419 request = default_relax_domain_level;
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IM
1420 } else
1421 request = attr->relax_domain_level;
9ae7ab20
VS
1422
1423 if (sd->level > request) {
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IM
1424 /* Turn off idle balance on this domain: */
1425 sd->flags &= ~(SD_BALANCE_WAKE|SD_BALANCE_NEWIDLE);
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IM
1426 }
1427}
1428
1429static void __sdt_free(const struct cpumask *cpu_map);
1430static int __sdt_alloc(const struct cpumask *cpu_map);
1431
1432static void __free_domain_allocs(struct s_data *d, enum s_alloc what,
1433 const struct cpumask *cpu_map)
1434{
1435 switch (what) {
1436 case sa_rootdomain:
1437 if (!atomic_read(&d->rd->refcount))
1438 free_rootdomain(&d->rd->rcu);
df561f66 1439 fallthrough;
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IM
1440 case sa_sd:
1441 free_percpu(d->sd);
df561f66 1442 fallthrough;
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IM
1443 case sa_sd_storage:
1444 __sdt_free(cpu_map);
df561f66 1445 fallthrough;
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IM
1446 case sa_none:
1447 break;
1448 }
1449}
1450
1451static enum s_alloc
1452__visit_domain_allocation_hell(struct s_data *d, const struct cpumask *cpu_map)
1453{
1454 memset(d, 0, sizeof(*d));
1455
1456 if (__sdt_alloc(cpu_map))
1457 return sa_sd_storage;
1458 d->sd = alloc_percpu(struct sched_domain *);
1459 if (!d->sd)
1460 return sa_sd_storage;
1461 d->rd = alloc_rootdomain();
1462 if (!d->rd)
1463 return sa_sd;
97fb7a0a 1464
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IM
1465 return sa_rootdomain;
1466}
1467
1468/*
1469 * NULL the sd_data elements we've used to build the sched_domain and
1470 * sched_group structure so that the subsequent __free_domain_allocs()
1471 * will not free the data we're using.
1472 */
1473static void claim_allocations(int cpu, struct sched_domain *sd)
1474{
1475 struct sd_data *sdd = sd->private;
1476
1477 WARN_ON_ONCE(*per_cpu_ptr(sdd->sd, cpu) != sd);
1478 *per_cpu_ptr(sdd->sd, cpu) = NULL;
1479
1480 if (atomic_read(&(*per_cpu_ptr(sdd->sds, cpu))->ref))
1481 *per_cpu_ptr(sdd->sds, cpu) = NULL;
1482
1483 if (atomic_read(&(*per_cpu_ptr(sdd->sg, cpu))->ref))
1484 *per_cpu_ptr(sdd->sg, cpu) = NULL;
1485
1486 if (atomic_read(&(*per_cpu_ptr(sdd->sgc, cpu))->ref))
1487 *per_cpu_ptr(sdd->sgc, cpu) = NULL;
1488}
1489
1490#ifdef CONFIG_NUMA
f2cb1360 1491enum numa_topology_type sched_numa_topology_type;
97fb7a0a
IM
1492
1493static int sched_domains_numa_levels;
1494static int sched_domains_curr_level;
1495
1496int sched_max_numa_distance;
1497static int *sched_domains_numa_distance;
1498static struct cpumask ***sched_domains_numa_masks;
a55c7454 1499int __read_mostly node_reclaim_distance = RECLAIM_DISTANCE;
0083242c
VS
1500
1501static unsigned long __read_mostly *sched_numa_onlined_nodes;
f2cb1360
IM
1502#endif
1503
1504/*
1505 * SD_flags allowed in topology descriptions.
1506 *
1507 * These flags are purely descriptive of the topology and do not prescribe
1508 * behaviour. Behaviour is artificial and mapped in the below sd_init()
1509 * function:
1510 *
1511 * SD_SHARE_CPUCAPACITY - describes SMT topologies
1512 * SD_SHARE_PKG_RESOURCES - describes shared caches
1513 * SD_NUMA - describes NUMA topologies
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IM
1514 *
1515 * Odd one out, which beside describing the topology has a quirk also
1516 * prescribes the desired behaviour that goes along with it:
1517 *
1518 * SD_ASYM_PACKING - describes SMT quirks
1519 */
1520#define TOPOLOGY_SD_FLAGS \
97fb7a0a 1521 (SD_SHARE_CPUCAPACITY | \
f2cb1360 1522 SD_SHARE_PKG_RESOURCES | \
97fb7a0a 1523 SD_NUMA | \
cfe7ddcb 1524 SD_ASYM_PACKING)
f2cb1360
IM
1525
1526static struct sched_domain *
1527sd_init(struct sched_domain_topology_level *tl,
1528 const struct cpumask *cpu_map,
c744dc4a 1529 struct sched_domain *child, int cpu)
f2cb1360
IM
1530{
1531 struct sd_data *sdd = &tl->data;
1532 struct sched_domain *sd = *per_cpu_ptr(sdd->sd, cpu);
1533 int sd_id, sd_weight, sd_flags = 0;
c744dc4a 1534 struct cpumask *sd_span;
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IM
1535
1536#ifdef CONFIG_NUMA
1537 /*
1538 * Ugly hack to pass state to sd_numa_mask()...
1539 */
1540 sched_domains_curr_level = tl->numa_level;
1541#endif
1542
1543 sd_weight = cpumask_weight(tl->mask(cpu));
1544
1545 if (tl->sd_flags)
1546 sd_flags = (*tl->sd_flags)();
1547 if (WARN_ONCE(sd_flags & ~TOPOLOGY_SD_FLAGS,
1548 "wrong sd_flags in topology description\n"))
9b1b234b 1549 sd_flags &= TOPOLOGY_SD_FLAGS;
f2cb1360
IM
1550
1551 *sd = (struct sched_domain){
1552 .min_interval = sd_weight,
1553 .max_interval = 2*sd_weight,
6e749913 1554 .busy_factor = 16,
2208cdaa 1555 .imbalance_pct = 117,
f2cb1360
IM
1556
1557 .cache_nice_tries = 0,
f2cb1360 1558
36c5bdc4 1559 .flags = 1*SD_BALANCE_NEWIDLE
f2cb1360
IM
1560 | 1*SD_BALANCE_EXEC
1561 | 1*SD_BALANCE_FORK
1562 | 0*SD_BALANCE_WAKE
1563 | 1*SD_WAKE_AFFINE
1564 | 0*SD_SHARE_CPUCAPACITY
1565 | 0*SD_SHARE_PKG_RESOURCES
1566 | 0*SD_SERIALIZE
9c63e84d 1567 | 1*SD_PREFER_SIBLING
f2cb1360
IM
1568 | 0*SD_NUMA
1569 | sd_flags
1570 ,
1571
1572 .last_balance = jiffies,
1573 .balance_interval = sd_weight,
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IM
1574 .max_newidle_lb_cost = 0,
1575 .next_decay_max_lb_cost = jiffies,
1576 .child = child,
1577#ifdef CONFIG_SCHED_DEBUG
1578 .name = tl->name,
1579#endif
1580 };
1581
c744dc4a
BM
1582 sd_span = sched_domain_span(sd);
1583 cpumask_and(sd_span, cpu_map, tl->mask(cpu));
1584 sd_id = cpumask_first(sd_span);
1585
1586 sd->flags |= asym_cpu_capacity_classify(sd_span, cpu_map);
1587
1588 WARN_ONCE((sd->flags & (SD_SHARE_CPUCAPACITY | SD_ASYM_CPUCAPACITY)) ==
1589 (SD_SHARE_CPUCAPACITY | SD_ASYM_CPUCAPACITY),
1590 "CPU capacity asymmetry not supported on SMT\n");
f2cb1360
IM
1591
1592 /*
1593 * Convert topological properties into behaviour.
1594 */
a526d466
MR
1595 /* Don't attempt to spread across CPUs of different capacities. */
1596 if ((sd->flags & SD_ASYM_CPUCAPACITY) && sd->child)
1597 sd->child->flags &= ~SD_PREFER_SIBLING;
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IM
1598
1599 if (sd->flags & SD_SHARE_CPUCAPACITY) {
f2cb1360 1600 sd->imbalance_pct = 110;
f2cb1360
IM
1601
1602 } else if (sd->flags & SD_SHARE_PKG_RESOURCES) {
1603 sd->imbalance_pct = 117;
1604 sd->cache_nice_tries = 1;
f2cb1360
IM
1605
1606#ifdef CONFIG_NUMA
1607 } else if (sd->flags & SD_NUMA) {
1608 sd->cache_nice_tries = 2;
f2cb1360 1609
9c63e84d 1610 sd->flags &= ~SD_PREFER_SIBLING;
f2cb1360 1611 sd->flags |= SD_SERIALIZE;
a55c7454 1612 if (sched_domains_numa_distance[tl->numa_level] > node_reclaim_distance) {
f2cb1360
IM
1613 sd->flags &= ~(SD_BALANCE_EXEC |
1614 SD_BALANCE_FORK |
1615 SD_WAKE_AFFINE);
1616 }
1617
1618#endif
1619 } else {
f2cb1360 1620 sd->cache_nice_tries = 1;
f2cb1360
IM
1621 }
1622
1623 /*
1624 * For all levels sharing cache; connect a sched_domain_shared
1625 * instance.
1626 */
1627 if (sd->flags & SD_SHARE_PKG_RESOURCES) {
1628 sd->shared = *per_cpu_ptr(sdd->sds, sd_id);
1629 atomic_inc(&sd->shared->ref);
1630 atomic_set(&sd->shared->nr_busy_cpus, sd_weight);
1631 }
1632
1633 sd->private = sdd;
1634
1635 return sd;
1636}
1637
1638/*
1639 * Topology list, bottom-up.
1640 */
1641static struct sched_domain_topology_level default_topology[] = {
1642#ifdef CONFIG_SCHED_SMT
1643 { cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
1644#endif
1645#ifdef CONFIG_SCHED_MC
1646 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
1647#endif
1648 { cpu_cpu_mask, SD_INIT_NAME(DIE) },
1649 { NULL, },
1650};
1651
1652static struct sched_domain_topology_level *sched_domain_topology =
1653 default_topology;
1654
1655#define for_each_sd_topology(tl) \
1656 for (tl = sched_domain_topology; tl->mask; tl++)
1657
1658void set_sched_topology(struct sched_domain_topology_level *tl)
1659{
1660 if (WARN_ON_ONCE(sched_smp_initialized))
1661 return;
1662
1663 sched_domain_topology = tl;
1664}
1665
1666#ifdef CONFIG_NUMA
1667
1668static const struct cpumask *sd_numa_mask(int cpu)
1669{
1670 return sched_domains_numa_masks[sched_domains_curr_level][cpu_to_node(cpu)];
1671}
1672
1673static void sched_numa_warn(const char *str)
1674{
1675 static int done = false;
1676 int i,j;
1677
1678 if (done)
1679 return;
1680
1681 done = true;
1682
1683 printk(KERN_WARNING "ERROR: %s\n\n", str);
1684
1685 for (i = 0; i < nr_node_ids; i++) {
1686 printk(KERN_WARNING " ");
1687 for (j = 0; j < nr_node_ids; j++)
1688 printk(KERN_CONT "%02d ", node_distance(i,j));
1689 printk(KERN_CONT "\n");
1690 }
1691 printk(KERN_WARNING "\n");
1692}
1693
1694bool find_numa_distance(int distance)
1695{
1696 int i;
1697
1698 if (distance == node_distance(0, 0))
1699 return true;
1700
1701 for (i = 0; i < sched_domains_numa_levels; i++) {
1702 if (sched_domains_numa_distance[i] == distance)
1703 return true;
1704 }
1705
1706 return false;
1707}
1708
1709/*
1710 * A system can have three types of NUMA topology:
1711 * NUMA_DIRECT: all nodes are directly connected, or not a NUMA system
1712 * NUMA_GLUELESS_MESH: some nodes reachable through intermediary nodes
1713 * NUMA_BACKPLANE: nodes can reach other nodes through a backplane
1714 *
1715 * The difference between a glueless mesh topology and a backplane
1716 * topology lies in whether communication between not directly
1717 * connected nodes goes through intermediary nodes (where programs
1718 * could run), or through backplane controllers. This affects
1719 * placement of programs.
1720 *
1721 * The type of topology can be discerned with the following tests:
1722 * - If the maximum distance between any nodes is 1 hop, the system
1723 * is directly connected.
1724 * - If for two nodes A and B, located N > 1 hops away from each other,
1725 * there is an intermediary node C, which is < N hops away from both
1726 * nodes A and B, the system is a glueless mesh.
1727 */
1728static void init_numa_topology_type(void)
1729{
1730 int a, b, c, n;
1731
1732 n = sched_max_numa_distance;
1733
e5e96faf 1734 if (sched_domains_numa_levels <= 2) {
f2cb1360
IM
1735 sched_numa_topology_type = NUMA_DIRECT;
1736 return;
1737 }
1738
1739 for_each_online_node(a) {
1740 for_each_online_node(b) {
1741 /* Find two nodes furthest removed from each other. */
1742 if (node_distance(a, b) < n)
1743 continue;
1744
1745 /* Is there an intermediary node between a and b? */
1746 for_each_online_node(c) {
1747 if (node_distance(a, c) < n &&
1748 node_distance(b, c) < n) {
1749 sched_numa_topology_type =
1750 NUMA_GLUELESS_MESH;
1751 return;
1752 }
1753 }
1754
1755 sched_numa_topology_type = NUMA_BACKPLANE;
1756 return;
1757 }
1758 }
1759}
1760
620a6dc4
VS
1761
1762#define NR_DISTANCE_VALUES (1 << DISTANCE_BITS)
1763
f2cb1360
IM
1764void sched_init_numa(void)
1765{
f2cb1360 1766 struct sched_domain_topology_level *tl;
620a6dc4
VS
1767 unsigned long *distance_map;
1768 int nr_levels = 0;
1769 int i, j;
051f3ca0 1770
f2cb1360
IM
1771 /*
1772 * O(nr_nodes^2) deduplicating selection sort -- in order to find the
1773 * unique distances in the node_distance() table.
f2cb1360 1774 */
620a6dc4
VS
1775 distance_map = bitmap_alloc(NR_DISTANCE_VALUES, GFP_KERNEL);
1776 if (!distance_map)
1777 return;
1778
1779 bitmap_zero(distance_map, NR_DISTANCE_VALUES);
f2cb1360
IM
1780 for (i = 0; i < nr_node_ids; i++) {
1781 for (j = 0; j < nr_node_ids; j++) {
620a6dc4 1782 int distance = node_distance(i, j);
f2cb1360 1783
620a6dc4
VS
1784 if (distance < LOCAL_DISTANCE || distance >= NR_DISTANCE_VALUES) {
1785 sched_numa_warn("Invalid distance value range");
1786 return;
f2cb1360 1787 }
620a6dc4
VS
1788
1789 bitmap_set(distance_map, distance, 1);
f2cb1360 1790 }
620a6dc4
VS
1791 }
1792 /*
1793 * We can now figure out how many unique distance values there are and
1794 * allocate memory accordingly.
1795 */
1796 nr_levels = bitmap_weight(distance_map, NR_DISTANCE_VALUES);
f2cb1360 1797
620a6dc4
VS
1798 sched_domains_numa_distance = kcalloc(nr_levels, sizeof(int), GFP_KERNEL);
1799 if (!sched_domains_numa_distance) {
1800 bitmap_free(distance_map);
1801 return;
f2cb1360
IM
1802 }
1803
620a6dc4
VS
1804 for (i = 0, j = 0; i < nr_levels; i++, j++) {
1805 j = find_next_bit(distance_map, NR_DISTANCE_VALUES, j);
1806 sched_domains_numa_distance[i] = j;
1807 }
1808
1809 bitmap_free(distance_map);
1810
f2cb1360 1811 /*
620a6dc4 1812 * 'nr_levels' contains the number of unique distances
f2cb1360
IM
1813 *
1814 * The sched_domains_numa_distance[] array includes the actual distance
1815 * numbers.
1816 */
1817
1818 /*
1819 * Here, we should temporarily reset sched_domains_numa_levels to 0.
1820 * If it fails to allocate memory for array sched_domains_numa_masks[][],
620a6dc4 1821 * the array will contain less then 'nr_levels' members. This could be
f2cb1360
IM
1822 * dangerous when we use it to iterate array sched_domains_numa_masks[][]
1823 * in other functions.
1824 *
620a6dc4 1825 * We reset it to 'nr_levels' at the end of this function.
f2cb1360
IM
1826 */
1827 sched_domains_numa_levels = 0;
1828
620a6dc4 1829 sched_domains_numa_masks = kzalloc(sizeof(void *) * nr_levels, GFP_KERNEL);
f2cb1360
IM
1830 if (!sched_domains_numa_masks)
1831 return;
1832
1833 /*
1834 * Now for each level, construct a mask per node which contains all
1835 * CPUs of nodes that are that many hops away from us.
1836 */
620a6dc4 1837 for (i = 0; i < nr_levels; i++) {
f2cb1360
IM
1838 sched_domains_numa_masks[i] =
1839 kzalloc(nr_node_ids * sizeof(void *), GFP_KERNEL);
1840 if (!sched_domains_numa_masks[i])
1841 return;
1842
1843 for (j = 0; j < nr_node_ids; j++) {
1844 struct cpumask *mask = kzalloc(cpumask_size(), GFP_KERNEL);
620a6dc4
VS
1845 int k;
1846
f2cb1360
IM
1847 if (!mask)
1848 return;
1849
1850 sched_domains_numa_masks[i][j] = mask;
1851
1852 for_each_node(k) {
0083242c
VS
1853 /*
1854 * Distance information can be unreliable for
1855 * offline nodes, defer building the node
1856 * masks to its bringup.
1857 * This relies on all unique distance values
1858 * still being visible at init time.
1859 */
1860 if (!node_online(j))
1861 continue;
1862
620a6dc4
VS
1863 if (sched_debug() && (node_distance(j, k) != node_distance(k, j)))
1864 sched_numa_warn("Node-distance not symmetric");
1865
f2cb1360
IM
1866 if (node_distance(j, k) > sched_domains_numa_distance[i])
1867 continue;
1868
1869 cpumask_or(mask, mask, cpumask_of_node(k));
1870 }
1871 }
1872 }
1873
1874 /* Compute default topology size */
1875 for (i = 0; sched_domain_topology[i].mask; i++);
1876
71e5f664 1877 tl = kzalloc((i + nr_levels + 1) *
f2cb1360
IM
1878 sizeof(struct sched_domain_topology_level), GFP_KERNEL);
1879 if (!tl)
1880 return;
1881
1882 /*
1883 * Copy the default topology bits..
1884 */
1885 for (i = 0; sched_domain_topology[i].mask; i++)
1886 tl[i] = sched_domain_topology[i];
1887
051f3ca0
SS
1888 /*
1889 * Add the NUMA identity distance, aka single NODE.
1890 */
1891 tl[i++] = (struct sched_domain_topology_level){
1892 .mask = sd_numa_mask,
1893 .numa_level = 0,
1894 SD_INIT_NAME(NODE)
1895 };
1896
f2cb1360
IM
1897 /*
1898 * .. and append 'j' levels of NUMA goodness.
1899 */
620a6dc4 1900 for (j = 1; j < nr_levels; i++, j++) {
f2cb1360
IM
1901 tl[i] = (struct sched_domain_topology_level){
1902 .mask = sd_numa_mask,
1903 .sd_flags = cpu_numa_flags,
1904 .flags = SDTL_OVERLAP,
1905 .numa_level = j,
1906 SD_INIT_NAME(NUMA)
1907 };
1908 }
1909
1910 sched_domain_topology = tl;
1911
620a6dc4
VS
1912 sched_domains_numa_levels = nr_levels;
1913 sched_max_numa_distance = sched_domains_numa_distance[nr_levels - 1];
f2cb1360
IM
1914
1915 init_numa_topology_type();
0083242c
VS
1916
1917 sched_numa_onlined_nodes = bitmap_alloc(nr_node_ids, GFP_KERNEL);
1918 if (!sched_numa_onlined_nodes)
1919 return;
1920
1921 bitmap_zero(sched_numa_onlined_nodes, nr_node_ids);
1922 for_each_online_node(i)
1923 bitmap_set(sched_numa_onlined_nodes, i, 1);
1924}
1925
1926static void __sched_domains_numa_masks_set(unsigned int node)
1927{
1928 int i, j;
1929
1930 /*
1931 * NUMA masks are not built for offline nodes in sched_init_numa().
1932 * Thus, when a CPU of a never-onlined-before node gets plugged in,
1933 * adding that new CPU to the right NUMA masks is not sufficient: the
1934 * masks of that CPU's node must also be updated.
1935 */
1936 if (test_bit(node, sched_numa_onlined_nodes))
1937 return;
1938
1939 bitmap_set(sched_numa_onlined_nodes, node, 1);
1940
1941 for (i = 0; i < sched_domains_numa_levels; i++) {
1942 for (j = 0; j < nr_node_ids; j++) {
1943 if (!node_online(j) || node == j)
1944 continue;
1945
1946 if (node_distance(j, node) > sched_domains_numa_distance[i])
1947 continue;
1948
1949 /* Add remote nodes in our masks */
1950 cpumask_or(sched_domains_numa_masks[i][node],
1951 sched_domains_numa_masks[i][node],
1952 sched_domains_numa_masks[0][j]);
1953 }
1954 }
1955
1956 /*
1957 * A new node has been brought up, potentially changing the topology
1958 * classification.
1959 *
1960 * Note that this is racy vs any use of sched_numa_topology_type :/
1961 */
1962 init_numa_topology_type();
f2cb1360
IM
1963}
1964
1965void sched_domains_numa_masks_set(unsigned int cpu)
1966{
1967 int node = cpu_to_node(cpu);
1968 int i, j;
1969
0083242c
VS
1970 __sched_domains_numa_masks_set(node);
1971
f2cb1360
IM
1972 for (i = 0; i < sched_domains_numa_levels; i++) {
1973 for (j = 0; j < nr_node_ids; j++) {
0083242c
VS
1974 if (!node_online(j))
1975 continue;
1976
1977 /* Set ourselves in the remote node's masks */
f2cb1360
IM
1978 if (node_distance(j, node) <= sched_domains_numa_distance[i])
1979 cpumask_set_cpu(cpu, sched_domains_numa_masks[i][j]);
1980 }
1981 }
1982}
1983
1984void sched_domains_numa_masks_clear(unsigned int cpu)
1985{
1986 int i, j;
1987
1988 for (i = 0; i < sched_domains_numa_levels; i++) {
1989 for (j = 0; j < nr_node_ids; j++)
1990 cpumask_clear_cpu(cpu, sched_domains_numa_masks[i][j]);
1991 }
1992}
1993
e0e8d491
WL
1994/*
1995 * sched_numa_find_closest() - given the NUMA topology, find the cpu
1996 * closest to @cpu from @cpumask.
1997 * cpumask: cpumask to find a cpu from
1998 * cpu: cpu to be close to
1999 *
2000 * returns: cpu, or nr_cpu_ids when nothing found.
2001 */
2002int sched_numa_find_closest(const struct cpumask *cpus, int cpu)
2003{
2004 int i, j = cpu_to_node(cpu);
2005
2006 for (i = 0; i < sched_domains_numa_levels; i++) {
2007 cpu = cpumask_any_and(cpus, sched_domains_numa_masks[i][j]);
2008 if (cpu < nr_cpu_ids)
2009 return cpu;
2010 }
2011 return nr_cpu_ids;
2012}
2013
f2cb1360
IM
2014#endif /* CONFIG_NUMA */
2015
2016static int __sdt_alloc(const struct cpumask *cpu_map)
2017{
2018 struct sched_domain_topology_level *tl;
2019 int j;
2020
2021 for_each_sd_topology(tl) {
2022 struct sd_data *sdd = &tl->data;
2023
2024 sdd->sd = alloc_percpu(struct sched_domain *);
2025 if (!sdd->sd)
2026 return -ENOMEM;
2027
2028 sdd->sds = alloc_percpu(struct sched_domain_shared *);
2029 if (!sdd->sds)
2030 return -ENOMEM;
2031
2032 sdd->sg = alloc_percpu(struct sched_group *);
2033 if (!sdd->sg)
2034 return -ENOMEM;
2035
2036 sdd->sgc = alloc_percpu(struct sched_group_capacity *);
2037 if (!sdd->sgc)
2038 return -ENOMEM;
2039
2040 for_each_cpu(j, cpu_map) {
2041 struct sched_domain *sd;
2042 struct sched_domain_shared *sds;
2043 struct sched_group *sg;
2044 struct sched_group_capacity *sgc;
2045
2046 sd = kzalloc_node(sizeof(struct sched_domain) + cpumask_size(),
2047 GFP_KERNEL, cpu_to_node(j));
2048 if (!sd)
2049 return -ENOMEM;
2050
2051 *per_cpu_ptr(sdd->sd, j) = sd;
2052
2053 sds = kzalloc_node(sizeof(struct sched_domain_shared),
2054 GFP_KERNEL, cpu_to_node(j));
2055 if (!sds)
2056 return -ENOMEM;
2057
2058 *per_cpu_ptr(sdd->sds, j) = sds;
2059
2060 sg = kzalloc_node(sizeof(struct sched_group) + cpumask_size(),
2061 GFP_KERNEL, cpu_to_node(j));
2062 if (!sg)
2063 return -ENOMEM;
2064
2065 sg->next = sg;
2066
2067 *per_cpu_ptr(sdd->sg, j) = sg;
2068
2069 sgc = kzalloc_node(sizeof(struct sched_group_capacity) + cpumask_size(),
2070 GFP_KERNEL, cpu_to_node(j));
2071 if (!sgc)
2072 return -ENOMEM;
2073
005f874d
PZ
2074#ifdef CONFIG_SCHED_DEBUG
2075 sgc->id = j;
2076#endif
2077
f2cb1360
IM
2078 *per_cpu_ptr(sdd->sgc, j) = sgc;
2079 }
2080 }
2081
2082 return 0;
2083}
2084
2085static void __sdt_free(const struct cpumask *cpu_map)
2086{
2087 struct sched_domain_topology_level *tl;
2088 int j;
2089
2090 for_each_sd_topology(tl) {
2091 struct sd_data *sdd = &tl->data;
2092
2093 for_each_cpu(j, cpu_map) {
2094 struct sched_domain *sd;
2095
2096 if (sdd->sd) {
2097 sd = *per_cpu_ptr(sdd->sd, j);
2098 if (sd && (sd->flags & SD_OVERLAP))
2099 free_sched_groups(sd->groups, 0);
2100 kfree(*per_cpu_ptr(sdd->sd, j));
2101 }
2102
2103 if (sdd->sds)
2104 kfree(*per_cpu_ptr(sdd->sds, j));
2105 if (sdd->sg)
2106 kfree(*per_cpu_ptr(sdd->sg, j));
2107 if (sdd->sgc)
2108 kfree(*per_cpu_ptr(sdd->sgc, j));
2109 }
2110 free_percpu(sdd->sd);
2111 sdd->sd = NULL;
2112 free_percpu(sdd->sds);
2113 sdd->sds = NULL;
2114 free_percpu(sdd->sg);
2115 sdd->sg = NULL;
2116 free_percpu(sdd->sgc);
2117 sdd->sgc = NULL;
2118 }
2119}
2120
181a80d1 2121static struct sched_domain *build_sched_domain(struct sched_domain_topology_level *tl,
f2cb1360 2122 const struct cpumask *cpu_map, struct sched_domain_attr *attr,
c744dc4a 2123 struct sched_domain *child, int cpu)
f2cb1360 2124{
c744dc4a 2125 struct sched_domain *sd = sd_init(tl, cpu_map, child, cpu);
f2cb1360
IM
2126
2127 if (child) {
2128 sd->level = child->level + 1;
2129 sched_domain_level_max = max(sched_domain_level_max, sd->level);
2130 child->parent = sd;
2131
2132 if (!cpumask_subset(sched_domain_span(child),
2133 sched_domain_span(sd))) {
2134 pr_err("BUG: arch topology borken\n");
2135#ifdef CONFIG_SCHED_DEBUG
2136 pr_err(" the %s domain not a subset of the %s domain\n",
2137 child->name, sd->name);
2138#endif
97fb7a0a 2139 /* Fixup, ensure @sd has at least @child CPUs. */
f2cb1360
IM
2140 cpumask_or(sched_domain_span(sd),
2141 sched_domain_span(sd),
2142 sched_domain_span(child));
2143 }
2144
2145 }
2146 set_domain_attribute(sd, attr);
2147
2148 return sd;
2149}
2150
ccf74128
VS
2151/*
2152 * Ensure topology masks are sane, i.e. there are no conflicts (overlaps) for
2153 * any two given CPUs at this (non-NUMA) topology level.
2154 */
2155static bool topology_span_sane(struct sched_domain_topology_level *tl,
2156 const struct cpumask *cpu_map, int cpu)
2157{
2158 int i;
2159
2160 /* NUMA levels are allowed to overlap */
2161 if (tl->flags & SDTL_OVERLAP)
2162 return true;
2163
2164 /*
2165 * Non-NUMA levels cannot partially overlap - they must be either
2166 * completely equal or completely disjoint. Otherwise we can end up
2167 * breaking the sched_group lists - i.e. a later get_group() pass
2168 * breaks the linking done for an earlier span.
2169 */
2170 for_each_cpu(i, cpu_map) {
2171 if (i == cpu)
2172 continue;
2173 /*
2174 * We should 'and' all those masks with 'cpu_map' to exactly
2175 * match the topology we're about to build, but that can only
2176 * remove CPUs, which only lessens our ability to detect
2177 * overlaps
2178 */
2179 if (!cpumask_equal(tl->mask(cpu), tl->mask(i)) &&
2180 cpumask_intersects(tl->mask(cpu), tl->mask(i)))
2181 return false;
2182 }
2183
2184 return true;
2185}
2186
f2cb1360
IM
2187/*
2188 * Build sched domains for a given set of CPUs and attach the sched domains
2189 * to the individual CPUs
2190 */
2191static int
2192build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *attr)
2193{
cd1cb335 2194 enum s_alloc alloc_state = sa_none;
f2cb1360
IM
2195 struct sched_domain *sd;
2196 struct s_data d;
2197 struct rq *rq = NULL;
2198 int i, ret = -ENOMEM;
df054e84 2199 bool has_asym = false;
f2cb1360 2200
cd1cb335
VS
2201 if (WARN_ON(cpumask_empty(cpu_map)))
2202 goto error;
2203
f2cb1360
IM
2204 alloc_state = __visit_domain_allocation_hell(&d, cpu_map);
2205 if (alloc_state != sa_rootdomain)
2206 goto error;
2207
2208 /* Set up domains for CPUs specified by the cpu_map: */
2209 for_each_cpu(i, cpu_map) {
2210 struct sched_domain_topology_level *tl;
2211
2212 sd = NULL;
2213 for_each_sd_topology(tl) {
05484e09 2214
ccf74128
VS
2215 if (WARN_ON(!topology_span_sane(tl, cpu_map, i)))
2216 goto error;
2217
c744dc4a
BM
2218 sd = build_sched_domain(tl, cpu_map, attr, sd, i);
2219
2220 has_asym |= sd->flags & SD_ASYM_CPUCAPACITY;
05484e09 2221
f2cb1360
IM
2222 if (tl == sched_domain_topology)
2223 *per_cpu_ptr(d.sd, i) = sd;
af85596c 2224 if (tl->flags & SDTL_OVERLAP)
f2cb1360
IM
2225 sd->flags |= SD_OVERLAP;
2226 if (cpumask_equal(cpu_map, sched_domain_span(sd)))
2227 break;
2228 }
2229 }
2230
2231 /* Build the groups for the domains */
2232 for_each_cpu(i, cpu_map) {
2233 for (sd = *per_cpu_ptr(d.sd, i); sd; sd = sd->parent) {
2234 sd->span_weight = cpumask_weight(sched_domain_span(sd));
2235 if (sd->flags & SD_OVERLAP) {
2236 if (build_overlap_sched_groups(sd, i))
2237 goto error;
2238 } else {
2239 if (build_sched_groups(sd, i))
2240 goto error;
2241 }
2242 }
2243 }
2244
2245 /* Calculate CPU capacity for physical packages and nodes */
2246 for (i = nr_cpumask_bits-1; i >= 0; i--) {
2247 if (!cpumask_test_cpu(i, cpu_map))
2248 continue;
2249
2250 for (sd = *per_cpu_ptr(d.sd, i); sd; sd = sd->parent) {
2251 claim_allocations(i, sd);
2252 init_sched_groups_capacity(i, sd);
2253 }
2254 }
2255
2256 /* Attach the domains */
2257 rcu_read_lock();
2258 for_each_cpu(i, cpu_map) {
2259 rq = cpu_rq(i);
2260 sd = *per_cpu_ptr(d.sd, i);
2261
2262 /* Use READ_ONCE()/WRITE_ONCE() to avoid load/store tearing: */
2263 if (rq->cpu_capacity_orig > READ_ONCE(d.rd->max_cpu_capacity))
2264 WRITE_ONCE(d.rd->max_cpu_capacity, rq->cpu_capacity_orig);
2265
2266 cpu_attach_domain(sd, d.rd, i);
2267 }
2268 rcu_read_unlock();
2269
df054e84 2270 if (has_asym)
e284df70 2271 static_branch_inc_cpuslocked(&sched_asym_cpucapacity);
df054e84 2272
9406415f 2273 if (rq && sched_debug_verbose) {
bf5015a5 2274 pr_info("root domain span: %*pbl (max cpu_capacity = %lu)\n",
f2cb1360
IM
2275 cpumask_pr_args(cpu_map), rq->rd->max_cpu_capacity);
2276 }
2277
2278 ret = 0;
2279error:
2280 __free_domain_allocs(&d, alloc_state, cpu_map);
97fb7a0a 2281
f2cb1360
IM
2282 return ret;
2283}
2284
2285/* Current sched domains: */
2286static cpumask_var_t *doms_cur;
2287
2288/* Number of sched domains in 'doms_cur': */
2289static int ndoms_cur;
2290
3b03706f 2291/* Attributes of custom domains in 'doms_cur' */
f2cb1360
IM
2292static struct sched_domain_attr *dattr_cur;
2293
2294/*
2295 * Special case: If a kmalloc() of a doms_cur partition (array of
2296 * cpumask) fails, then fallback to a single sched domain,
2297 * as determined by the single cpumask fallback_doms.
2298 */
8d5dc512 2299static cpumask_var_t fallback_doms;
f2cb1360
IM
2300
2301/*
2302 * arch_update_cpu_topology lets virtualized architectures update the
2303 * CPU core maps. It is supposed to return 1 if the topology changed
2304 * or 0 if it stayed the same.
2305 */
2306int __weak arch_update_cpu_topology(void)
2307{
2308 return 0;
2309}
2310
2311cpumask_var_t *alloc_sched_domains(unsigned int ndoms)
2312{
2313 int i;
2314 cpumask_var_t *doms;
2315
6da2ec56 2316 doms = kmalloc_array(ndoms, sizeof(*doms), GFP_KERNEL);
f2cb1360
IM
2317 if (!doms)
2318 return NULL;
2319 for (i = 0; i < ndoms; i++) {
2320 if (!alloc_cpumask_var(&doms[i], GFP_KERNEL)) {
2321 free_sched_domains(doms, i);
2322 return NULL;
2323 }
2324 }
2325 return doms;
2326}
2327
2328void free_sched_domains(cpumask_var_t doms[], unsigned int ndoms)
2329{
2330 unsigned int i;
2331 for (i = 0; i < ndoms; i++)
2332 free_cpumask_var(doms[i]);
2333 kfree(doms);
2334}
2335
2336/*
cb0c0414
JL
2337 * Set up scheduler domains and groups. For now this just excludes isolated
2338 * CPUs, but could be used to exclude other special cases in the future.
f2cb1360 2339 */
8d5dc512 2340int sched_init_domains(const struct cpumask *cpu_map)
f2cb1360
IM
2341{
2342 int err;
2343
8d5dc512 2344 zalloc_cpumask_var(&sched_domains_tmpmask, GFP_KERNEL);
1676330e 2345 zalloc_cpumask_var(&sched_domains_tmpmask2, GFP_KERNEL);
8d5dc512
PZ
2346 zalloc_cpumask_var(&fallback_doms, GFP_KERNEL);
2347
f2cb1360 2348 arch_update_cpu_topology();
c744dc4a 2349 asym_cpu_capacity_scan();
f2cb1360
IM
2350 ndoms_cur = 1;
2351 doms_cur = alloc_sched_domains(ndoms_cur);
2352 if (!doms_cur)
2353 doms_cur = &fallback_doms;
edb93821 2354 cpumask_and(doms_cur[0], cpu_map, housekeeping_cpumask(HK_FLAG_DOMAIN));
f2cb1360 2355 err = build_sched_domains(doms_cur[0], NULL);
f2cb1360
IM
2356
2357 return err;
2358}
2359
2360/*
2361 * Detach sched domains from a group of CPUs specified in cpu_map
2362 * These CPUs will now be attached to the NULL domain
2363 */
2364static void detach_destroy_domains(const struct cpumask *cpu_map)
2365{
e284df70 2366 unsigned int cpu = cpumask_any(cpu_map);
f2cb1360
IM
2367 int i;
2368
e284df70
VS
2369 if (rcu_access_pointer(per_cpu(sd_asym_cpucapacity, cpu)))
2370 static_branch_dec_cpuslocked(&sched_asym_cpucapacity);
2371
f2cb1360
IM
2372 rcu_read_lock();
2373 for_each_cpu(i, cpu_map)
2374 cpu_attach_domain(NULL, &def_root_domain, i);
2375 rcu_read_unlock();
2376}
2377
2378/* handle null as "default" */
2379static int dattrs_equal(struct sched_domain_attr *cur, int idx_cur,
2380 struct sched_domain_attr *new, int idx_new)
2381{
2382 struct sched_domain_attr tmp;
2383
2384 /* Fast path: */
2385 if (!new && !cur)
2386 return 1;
2387
2388 tmp = SD_ATTR_INIT;
97fb7a0a 2389
f2cb1360
IM
2390 return !memcmp(cur ? (cur + idx_cur) : &tmp,
2391 new ? (new + idx_new) : &tmp,
2392 sizeof(struct sched_domain_attr));
2393}
2394
2395/*
2396 * Partition sched domains as specified by the 'ndoms_new'
2397 * cpumasks in the array doms_new[] of cpumasks. This compares
2398 * doms_new[] to the current sched domain partitioning, doms_cur[].
2399 * It destroys each deleted domain and builds each new domain.
2400 *
2401 * 'doms_new' is an array of cpumask_var_t's of length 'ndoms_new'.
2402 * The masks don't intersect (don't overlap.) We should setup one
2403 * sched domain for each mask. CPUs not in any of the cpumasks will
2404 * not be load balanced. If the same cpumask appears both in the
2405 * current 'doms_cur' domains and in the new 'doms_new', we can leave
2406 * it as it is.
2407 *
2408 * The passed in 'doms_new' should be allocated using
2409 * alloc_sched_domains. This routine takes ownership of it and will
2410 * free_sched_domains it when done with it. If the caller failed the
2411 * alloc call, then it can pass in doms_new == NULL && ndoms_new == 1,
2412 * and partition_sched_domains() will fallback to the single partition
2413 * 'fallback_doms', it also forces the domains to be rebuilt.
2414 *
2415 * If doms_new == NULL it will be replaced with cpu_online_mask.
2416 * ndoms_new == 0 is a special case for destroying existing domains,
2417 * and it will not create the default domain.
2418 *
c22645f4 2419 * Call with hotplug lock and sched_domains_mutex held
f2cb1360 2420 */
c22645f4
MP
2421void partition_sched_domains_locked(int ndoms_new, cpumask_var_t doms_new[],
2422 struct sched_domain_attr *dattr_new)
f2cb1360 2423{
1f74de87 2424 bool __maybe_unused has_eas = false;
f2cb1360
IM
2425 int i, j, n;
2426 int new_topology;
2427
c22645f4 2428 lockdep_assert_held(&sched_domains_mutex);
f2cb1360 2429
f2cb1360
IM
2430 /* Let the architecture update CPU core mappings: */
2431 new_topology = arch_update_cpu_topology();
c744dc4a
BM
2432 /* Trigger rebuilding CPU capacity asymmetry data */
2433 if (new_topology)
2434 asym_cpu_capacity_scan();
f2cb1360 2435
09e0dd8e
PZ
2436 if (!doms_new) {
2437 WARN_ON_ONCE(dattr_new);
2438 n = 0;
2439 doms_new = alloc_sched_domains(1);
2440 if (doms_new) {
2441 n = 1;
edb93821
FW
2442 cpumask_and(doms_new[0], cpu_active_mask,
2443 housekeeping_cpumask(HK_FLAG_DOMAIN));
09e0dd8e
PZ
2444 }
2445 } else {
2446 n = ndoms_new;
2447 }
f2cb1360
IM
2448
2449 /* Destroy deleted domains: */
2450 for (i = 0; i < ndoms_cur; i++) {
2451 for (j = 0; j < n && !new_topology; j++) {
6aa140fa 2452 if (cpumask_equal(doms_cur[i], doms_new[j]) &&
f9a25f77
MP
2453 dattrs_equal(dattr_cur, i, dattr_new, j)) {
2454 struct root_domain *rd;
2455
2456 /*
2457 * This domain won't be destroyed and as such
2458 * its dl_bw->total_bw needs to be cleared. It
2459 * will be recomputed in function
2460 * update_tasks_root_domain().
2461 */
2462 rd = cpu_rq(cpumask_any(doms_cur[i]))->rd;
2463 dl_clear_root_domain(rd);
f2cb1360 2464 goto match1;
f9a25f77 2465 }
f2cb1360
IM
2466 }
2467 /* No match - a current sched domain not in new doms_new[] */
2468 detach_destroy_domains(doms_cur[i]);
2469match1:
2470 ;
2471 }
2472
2473 n = ndoms_cur;
09e0dd8e 2474 if (!doms_new) {
f2cb1360
IM
2475 n = 0;
2476 doms_new = &fallback_doms;
edb93821
FW
2477 cpumask_and(doms_new[0], cpu_active_mask,
2478 housekeeping_cpumask(HK_FLAG_DOMAIN));
f2cb1360
IM
2479 }
2480
2481 /* Build new domains: */
2482 for (i = 0; i < ndoms_new; i++) {
2483 for (j = 0; j < n && !new_topology; j++) {
6aa140fa
QP
2484 if (cpumask_equal(doms_new[i], doms_cur[j]) &&
2485 dattrs_equal(dattr_new, i, dattr_cur, j))
f2cb1360
IM
2486 goto match2;
2487 }
2488 /* No match - add a new doms_new */
2489 build_sched_domains(doms_new[i], dattr_new ? dattr_new + i : NULL);
2490match2:
2491 ;
2492 }
2493
531b5c9f 2494#if defined(CONFIG_ENERGY_MODEL) && defined(CONFIG_CPU_FREQ_GOV_SCHEDUTIL)
6aa140fa
QP
2495 /* Build perf. domains: */
2496 for (i = 0; i < ndoms_new; i++) {
531b5c9f 2497 for (j = 0; j < n && !sched_energy_update; j++) {
6aa140fa 2498 if (cpumask_equal(doms_new[i], doms_cur[j]) &&
1f74de87
QP
2499 cpu_rq(cpumask_first(doms_cur[j]))->rd->pd) {
2500 has_eas = true;
6aa140fa 2501 goto match3;
1f74de87 2502 }
6aa140fa
QP
2503 }
2504 /* No match - add perf. domains for a new rd */
1f74de87 2505 has_eas |= build_perf_domains(doms_new[i]);
6aa140fa
QP
2506match3:
2507 ;
2508 }
1f74de87 2509 sched_energy_set(has_eas);
6aa140fa
QP
2510#endif
2511
f2cb1360
IM
2512 /* Remember the new sched domains: */
2513 if (doms_cur != &fallback_doms)
2514 free_sched_domains(doms_cur, ndoms_cur);
2515
2516 kfree(dattr_cur);
2517 doms_cur = doms_new;
2518 dattr_cur = dattr_new;
2519 ndoms_cur = ndoms_new;
2520
3b87f136 2521 update_sched_domain_debugfs();
c22645f4 2522}
f2cb1360 2523
c22645f4
MP
2524/*
2525 * Call with hotplug lock held
2526 */
2527void partition_sched_domains(int ndoms_new, cpumask_var_t doms_new[],
2528 struct sched_domain_attr *dattr_new)
2529{
2530 mutex_lock(&sched_domains_mutex);
2531 partition_sched_domains_locked(ndoms_new, doms_new, dattr_new);
f2cb1360
IM
2532 mutex_unlock(&sched_domains_mutex);
2533}