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Commit | Line | Data |
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f8381cba TG |
1 | /* |
2 | * linux/kernel/time/tick-broadcast.c | |
3 | * | |
4 | * This file contains functions which emulate a local clock-event | |
5 | * device via a broadcast event source. | |
6 | * | |
7 | * Copyright(C) 2005-2006, Thomas Gleixner <tglx@linutronix.de> | |
8 | * Copyright(C) 2005-2007, Red Hat, Inc., Ingo Molnar | |
9 | * Copyright(C) 2006-2007, Timesys Corp., Thomas Gleixner | |
10 | * | |
11 | * This code is licenced under the GPL version 2. For details see | |
12 | * kernel-base/COPYING. | |
13 | */ | |
14 | #include <linux/cpu.h> | |
15 | #include <linux/err.h> | |
16 | #include <linux/hrtimer.h> | |
d7b90689 | 17 | #include <linux/interrupt.h> |
f8381cba TG |
18 | #include <linux/percpu.h> |
19 | #include <linux/profile.h> | |
20 | #include <linux/sched.h> | |
21 | #include <linux/tick.h> | |
22 | ||
23 | #include "tick-internal.h" | |
24 | ||
25 | /* | |
26 | * Broadcast support for broken x86 hardware, where the local apic | |
27 | * timer stops in C3 state. | |
28 | */ | |
29 | ||
30 | struct tick_device tick_broadcast_device; | |
31 | static cpumask_t tick_broadcast_mask; | |
79bf2bb3 | 32 | static DEFINE_SPINLOCK(tick_broadcast_lock); |
aa276e1c | 33 | static int tick_broadcast_force; |
f8381cba | 34 | |
5590a536 TG |
35 | #ifdef CONFIG_TICK_ONESHOT |
36 | static void tick_broadcast_clear_oneshot(int cpu); | |
37 | #else | |
38 | static inline void tick_broadcast_clear_oneshot(int cpu) { } | |
39 | #endif | |
40 | ||
289f480a IM |
41 | /* |
42 | * Debugging: see timer_list.c | |
43 | */ | |
44 | struct tick_device *tick_get_broadcast_device(void) | |
45 | { | |
46 | return &tick_broadcast_device; | |
47 | } | |
48 | ||
49 | cpumask_t *tick_get_broadcast_mask(void) | |
50 | { | |
51 | return &tick_broadcast_mask; | |
52 | } | |
53 | ||
f8381cba TG |
54 | /* |
55 | * Start the device in periodic mode | |
56 | */ | |
57 | static void tick_broadcast_start_periodic(struct clock_event_device *bc) | |
58 | { | |
18de5bc4 | 59 | if (bc) |
f8381cba TG |
60 | tick_setup_periodic(bc, 1); |
61 | } | |
62 | ||
63 | /* | |
64 | * Check, if the device can be utilized as broadcast device: | |
65 | */ | |
66 | int tick_check_broadcast_device(struct clock_event_device *dev) | |
67 | { | |
4a93232d VP |
68 | if ((tick_broadcast_device.evtdev && |
69 | tick_broadcast_device.evtdev->rating >= dev->rating) || | |
70 | (dev->features & CLOCK_EVT_FEAT_C3STOP)) | |
f8381cba TG |
71 | return 0; |
72 | ||
73 | clockevents_exchange_device(NULL, dev); | |
74 | tick_broadcast_device.evtdev = dev; | |
75 | if (!cpus_empty(tick_broadcast_mask)) | |
76 | tick_broadcast_start_periodic(dev); | |
77 | return 1; | |
78 | } | |
79 | ||
80 | /* | |
81 | * Check, if the device is the broadcast device | |
82 | */ | |
83 | int tick_is_broadcast_device(struct clock_event_device *dev) | |
84 | { | |
85 | return (dev && tick_broadcast_device.evtdev == dev); | |
86 | } | |
87 | ||
88 | /* | |
89 | * Check, if the device is disfunctional and a place holder, which | |
90 | * needs to be handled by the broadcast device. | |
91 | */ | |
92 | int tick_device_uses_broadcast(struct clock_event_device *dev, int cpu) | |
93 | { | |
94 | unsigned long flags; | |
95 | int ret = 0; | |
96 | ||
97 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
98 | ||
99 | /* | |
100 | * Devices might be registered with both periodic and oneshot | |
101 | * mode disabled. This signals, that the device needs to be | |
102 | * operated from the broadcast device and is a placeholder for | |
103 | * the cpu local device. | |
104 | */ | |
105 | if (!tick_device_is_functional(dev)) { | |
106 | dev->event_handler = tick_handle_periodic; | |
107 | cpu_set(cpu, tick_broadcast_mask); | |
108 | tick_broadcast_start_periodic(tick_broadcast_device.evtdev); | |
109 | ret = 1; | |
5590a536 TG |
110 | } else { |
111 | /* | |
112 | * When the new device is not affected by the stop | |
113 | * feature and the cpu is marked in the broadcast mask | |
114 | * then clear the broadcast bit. | |
115 | */ | |
116 | if (!(dev->features & CLOCK_EVT_FEAT_C3STOP)) { | |
117 | int cpu = smp_processor_id(); | |
f8381cba | 118 | |
5590a536 TG |
119 | cpu_clear(cpu, tick_broadcast_mask); |
120 | tick_broadcast_clear_oneshot(cpu); | |
121 | } | |
122 | } | |
f8381cba TG |
123 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
124 | return ret; | |
125 | } | |
126 | ||
127 | /* | |
128 | * Broadcast the event to the cpus, which are set in the mask | |
129 | */ | |
186e3cb8 | 130 | static void tick_do_broadcast(cpumask_t mask) |
f8381cba | 131 | { |
186e3cb8 | 132 | int cpu = smp_processor_id(); |
f8381cba TG |
133 | struct tick_device *td; |
134 | ||
135 | /* | |
136 | * Check, if the current cpu is in the mask | |
137 | */ | |
138 | if (cpu_isset(cpu, mask)) { | |
139 | cpu_clear(cpu, mask); | |
140 | td = &per_cpu(tick_cpu_device, cpu); | |
141 | td->evtdev->event_handler(td->evtdev); | |
f8381cba TG |
142 | } |
143 | ||
144 | if (!cpus_empty(mask)) { | |
145 | /* | |
146 | * It might be necessary to actually check whether the devices | |
147 | * have different broadcast functions. For now, just use the | |
148 | * one of the first device. This works as long as we have this | |
149 | * misfeature only on x86 (lapic) | |
150 | */ | |
151 | cpu = first_cpu(mask); | |
152 | td = &per_cpu(tick_cpu_device, cpu); | |
153 | td->evtdev->broadcast(mask); | |
f8381cba | 154 | } |
f8381cba TG |
155 | } |
156 | ||
157 | /* | |
158 | * Periodic broadcast: | |
159 | * - invoke the broadcast handlers | |
160 | */ | |
161 | static void tick_do_periodic_broadcast(void) | |
162 | { | |
163 | cpumask_t mask; | |
164 | ||
165 | spin_lock(&tick_broadcast_lock); | |
166 | ||
167 | cpus_and(mask, cpu_online_map, tick_broadcast_mask); | |
168 | tick_do_broadcast(mask); | |
169 | ||
170 | spin_unlock(&tick_broadcast_lock); | |
171 | } | |
172 | ||
173 | /* | |
174 | * Event handler for periodic broadcast ticks | |
175 | */ | |
176 | static void tick_handle_periodic_broadcast(struct clock_event_device *dev) | |
177 | { | |
d4496b39 TG |
178 | ktime_t next; |
179 | ||
f8381cba TG |
180 | tick_do_periodic_broadcast(); |
181 | ||
182 | /* | |
183 | * The device is in periodic mode. No reprogramming necessary: | |
184 | */ | |
185 | if (dev->mode == CLOCK_EVT_MODE_PERIODIC) | |
186 | return; | |
187 | ||
188 | /* | |
189 | * Setup the next period for devices, which do not have | |
d4496b39 TG |
190 | * periodic mode. We read dev->next_event first and add to it |
191 | * when the event alrady expired. clockevents_program_event() | |
192 | * sets dev->next_event only when the event is really | |
193 | * programmed to the device. | |
f8381cba | 194 | */ |
d4496b39 TG |
195 | for (next = dev->next_event; ;) { |
196 | next = ktime_add(next, tick_period); | |
f8381cba TG |
197 | |
198 | if (!clockevents_program_event(dev, next, ktime_get())) | |
199 | return; | |
200 | tick_do_periodic_broadcast(); | |
201 | } | |
202 | } | |
203 | ||
204 | /* | |
205 | * Powerstate information: The system enters/leaves a state, where | |
206 | * affected devices might stop | |
207 | */ | |
208 | static void tick_do_broadcast_on_off(void *why) | |
209 | { | |
210 | struct clock_event_device *bc, *dev; | |
211 | struct tick_device *td; | |
212 | unsigned long flags, *reason = why; | |
9c17bcda | 213 | int cpu, bc_stopped; |
f8381cba TG |
214 | |
215 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
216 | ||
217 | cpu = smp_processor_id(); | |
218 | td = &per_cpu(tick_cpu_device, cpu); | |
219 | dev = td->evtdev; | |
220 | bc = tick_broadcast_device.evtdev; | |
221 | ||
222 | /* | |
1595f452 | 223 | * Is the device not affected by the powerstate ? |
f8381cba | 224 | */ |
1595f452 | 225 | if (!dev || !(dev->features & CLOCK_EVT_FEAT_C3STOP)) |
f8381cba TG |
226 | goto out; |
227 | ||
3dfbc884 TG |
228 | if (!tick_device_is_functional(dev)) |
229 | goto out; | |
1595f452 | 230 | |
9c17bcda TG |
231 | bc_stopped = cpus_empty(tick_broadcast_mask); |
232 | ||
1595f452 TG |
233 | switch (*reason) { |
234 | case CLOCK_EVT_NOTIFY_BROADCAST_ON: | |
235 | case CLOCK_EVT_NOTIFY_BROADCAST_FORCE: | |
f8381cba TG |
236 | if (!cpu_isset(cpu, tick_broadcast_mask)) { |
237 | cpu_set(cpu, tick_broadcast_mask); | |
238 | if (td->mode == TICKDEV_MODE_PERIODIC) | |
239 | clockevents_set_mode(dev, | |
240 | CLOCK_EVT_MODE_SHUTDOWN); | |
241 | } | |
3dfbc884 | 242 | if (*reason == CLOCK_EVT_NOTIFY_BROADCAST_FORCE) |
aa276e1c | 243 | tick_broadcast_force = 1; |
1595f452 TG |
244 | break; |
245 | case CLOCK_EVT_NOTIFY_BROADCAST_OFF: | |
aa276e1c TG |
246 | if (!tick_broadcast_force && |
247 | cpu_isset(cpu, tick_broadcast_mask)) { | |
f8381cba TG |
248 | cpu_clear(cpu, tick_broadcast_mask); |
249 | if (td->mode == TICKDEV_MODE_PERIODIC) | |
250 | tick_setup_periodic(dev, 0); | |
251 | } | |
1595f452 | 252 | break; |
f8381cba TG |
253 | } |
254 | ||
9c17bcda TG |
255 | if (cpus_empty(tick_broadcast_mask)) { |
256 | if (!bc_stopped) | |
257 | clockevents_set_mode(bc, CLOCK_EVT_MODE_SHUTDOWN); | |
258 | } else if (bc_stopped) { | |
f8381cba TG |
259 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) |
260 | tick_broadcast_start_periodic(bc); | |
79bf2bb3 TG |
261 | else |
262 | tick_broadcast_setup_oneshot(bc); | |
f8381cba TG |
263 | } |
264 | out: | |
265 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
266 | } | |
267 | ||
268 | /* | |
269 | * Powerstate information: The system enters/leaves a state, where | |
270 | * affected devices might stop. | |
271 | */ | |
272 | void tick_broadcast_on_off(unsigned long reason, int *oncpu) | |
273 | { | |
bf020cb7 | 274 | if (!cpu_isset(*oncpu, cpu_online_map)) |
833df317 | 275 | printk(KERN_ERR "tick-broadcast: ignoring broadcast for " |
72fcde96 | 276 | "offline CPU #%d\n", *oncpu); |
bf020cb7 AK |
277 | else |
278 | smp_call_function_single(*oncpu, tick_do_broadcast_on_off, | |
8691e5a8 | 279 | &reason, 1); |
f8381cba TG |
280 | } |
281 | ||
282 | /* | |
283 | * Set the periodic handler depending on broadcast on/off | |
284 | */ | |
285 | void tick_set_periodic_handler(struct clock_event_device *dev, int broadcast) | |
286 | { | |
287 | if (!broadcast) | |
288 | dev->event_handler = tick_handle_periodic; | |
289 | else | |
290 | dev->event_handler = tick_handle_periodic_broadcast; | |
291 | } | |
292 | ||
293 | /* | |
294 | * Remove a CPU from broadcasting | |
295 | */ | |
296 | void tick_shutdown_broadcast(unsigned int *cpup) | |
297 | { | |
298 | struct clock_event_device *bc; | |
299 | unsigned long flags; | |
300 | unsigned int cpu = *cpup; | |
301 | ||
302 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
303 | ||
304 | bc = tick_broadcast_device.evtdev; | |
305 | cpu_clear(cpu, tick_broadcast_mask); | |
306 | ||
307 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) { | |
308 | if (bc && cpus_empty(tick_broadcast_mask)) | |
309 | clockevents_set_mode(bc, CLOCK_EVT_MODE_SHUTDOWN); | |
310 | } | |
311 | ||
312 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
313 | } | |
79bf2bb3 | 314 | |
6321dd60 TG |
315 | void tick_suspend_broadcast(void) |
316 | { | |
317 | struct clock_event_device *bc; | |
318 | unsigned long flags; | |
319 | ||
320 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
321 | ||
322 | bc = tick_broadcast_device.evtdev; | |
18de5bc4 | 323 | if (bc) |
6321dd60 TG |
324 | clockevents_set_mode(bc, CLOCK_EVT_MODE_SHUTDOWN); |
325 | ||
326 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
327 | } | |
328 | ||
329 | int tick_resume_broadcast(void) | |
330 | { | |
331 | struct clock_event_device *bc; | |
332 | unsigned long flags; | |
333 | int broadcast = 0; | |
334 | ||
335 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
336 | ||
337 | bc = tick_broadcast_device.evtdev; | |
6321dd60 | 338 | |
cd05a1f8 | 339 | if (bc) { |
18de5bc4 TG |
340 | clockevents_set_mode(bc, CLOCK_EVT_MODE_RESUME); |
341 | ||
cd05a1f8 TG |
342 | switch (tick_broadcast_device.mode) { |
343 | case TICKDEV_MODE_PERIODIC: | |
344 | if(!cpus_empty(tick_broadcast_mask)) | |
345 | tick_broadcast_start_periodic(bc); | |
346 | broadcast = cpu_isset(smp_processor_id(), | |
347 | tick_broadcast_mask); | |
348 | break; | |
349 | case TICKDEV_MODE_ONESHOT: | |
350 | broadcast = tick_resume_broadcast_oneshot(bc); | |
351 | break; | |
352 | } | |
6321dd60 TG |
353 | } |
354 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
355 | ||
356 | return broadcast; | |
357 | } | |
358 | ||
359 | ||
79bf2bb3 TG |
360 | #ifdef CONFIG_TICK_ONESHOT |
361 | ||
362 | static cpumask_t tick_broadcast_oneshot_mask; | |
363 | ||
289f480a IM |
364 | /* |
365 | * Debugging: see timer_list.c | |
366 | */ | |
367 | cpumask_t *tick_get_broadcast_oneshot_mask(void) | |
368 | { | |
369 | return &tick_broadcast_oneshot_mask; | |
370 | } | |
371 | ||
79bf2bb3 TG |
372 | static int tick_broadcast_set_event(ktime_t expires, int force) |
373 | { | |
374 | struct clock_event_device *bc = tick_broadcast_device.evtdev; | |
1fb9b7d2 TG |
375 | |
376 | return tick_dev_program_event(bc, expires, force); | |
79bf2bb3 TG |
377 | } |
378 | ||
cd05a1f8 TG |
379 | int tick_resume_broadcast_oneshot(struct clock_event_device *bc) |
380 | { | |
381 | clockevents_set_mode(bc, CLOCK_EVT_MODE_ONESHOT); | |
b7e113dc | 382 | return 0; |
cd05a1f8 TG |
383 | } |
384 | ||
79bf2bb3 TG |
385 | /* |
386 | * Handle oneshot mode broadcasting | |
387 | */ | |
388 | static void tick_handle_oneshot_broadcast(struct clock_event_device *dev) | |
389 | { | |
390 | struct tick_device *td; | |
391 | cpumask_t mask; | |
cdc6f27d | 392 | ktime_t now, next_event; |
79bf2bb3 TG |
393 | int cpu; |
394 | ||
395 | spin_lock(&tick_broadcast_lock); | |
396 | again: | |
397 | dev->next_event.tv64 = KTIME_MAX; | |
cdc6f27d | 398 | next_event.tv64 = KTIME_MAX; |
79bf2bb3 TG |
399 | mask = CPU_MASK_NONE; |
400 | now = ktime_get(); | |
401 | /* Find all expired events */ | |
cad0e458 | 402 | for_each_cpu_mask_nr(cpu, tick_broadcast_oneshot_mask) { |
79bf2bb3 TG |
403 | td = &per_cpu(tick_cpu_device, cpu); |
404 | if (td->evtdev->next_event.tv64 <= now.tv64) | |
405 | cpu_set(cpu, mask); | |
cdc6f27d TG |
406 | else if (td->evtdev->next_event.tv64 < next_event.tv64) |
407 | next_event.tv64 = td->evtdev->next_event.tv64; | |
79bf2bb3 TG |
408 | } |
409 | ||
410 | /* | |
cdc6f27d TG |
411 | * Wakeup the cpus which have an expired event. |
412 | */ | |
413 | tick_do_broadcast(mask); | |
414 | ||
415 | /* | |
416 | * Two reasons for reprogram: | |
417 | * | |
418 | * - The global event did not expire any CPU local | |
419 | * events. This happens in dyntick mode, as the maximum PIT | |
420 | * delta is quite small. | |
421 | * | |
422 | * - There are pending events on sleeping CPUs which were not | |
423 | * in the event mask | |
79bf2bb3 | 424 | */ |
cdc6f27d | 425 | if (next_event.tv64 != KTIME_MAX) { |
79bf2bb3 | 426 | /* |
cdc6f27d TG |
427 | * Rearm the broadcast device. If event expired, |
428 | * repeat the above | |
79bf2bb3 | 429 | */ |
cdc6f27d | 430 | if (tick_broadcast_set_event(next_event, 0)) |
79bf2bb3 TG |
431 | goto again; |
432 | } | |
433 | spin_unlock(&tick_broadcast_lock); | |
434 | } | |
435 | ||
436 | /* | |
437 | * Powerstate information: The system enters/leaves a state, where | |
438 | * affected devices might stop | |
439 | */ | |
440 | void tick_broadcast_oneshot_control(unsigned long reason) | |
441 | { | |
442 | struct clock_event_device *bc, *dev; | |
443 | struct tick_device *td; | |
444 | unsigned long flags; | |
445 | int cpu; | |
446 | ||
447 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
448 | ||
449 | /* | |
450 | * Periodic mode does not care about the enter/exit of power | |
451 | * states | |
452 | */ | |
453 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) | |
454 | goto out; | |
455 | ||
456 | bc = tick_broadcast_device.evtdev; | |
457 | cpu = smp_processor_id(); | |
458 | td = &per_cpu(tick_cpu_device, cpu); | |
459 | dev = td->evtdev; | |
460 | ||
461 | if (!(dev->features & CLOCK_EVT_FEAT_C3STOP)) | |
462 | goto out; | |
463 | ||
464 | if (reason == CLOCK_EVT_NOTIFY_BROADCAST_ENTER) { | |
465 | if (!cpu_isset(cpu, tick_broadcast_oneshot_mask)) { | |
466 | cpu_set(cpu, tick_broadcast_oneshot_mask); | |
467 | clockevents_set_mode(dev, CLOCK_EVT_MODE_SHUTDOWN); | |
468 | if (dev->next_event.tv64 < bc->next_event.tv64) | |
469 | tick_broadcast_set_event(dev->next_event, 1); | |
470 | } | |
471 | } else { | |
472 | if (cpu_isset(cpu, tick_broadcast_oneshot_mask)) { | |
473 | cpu_clear(cpu, tick_broadcast_oneshot_mask); | |
474 | clockevents_set_mode(dev, CLOCK_EVT_MODE_ONESHOT); | |
475 | if (dev->next_event.tv64 != KTIME_MAX) | |
476 | tick_program_event(dev->next_event, 1); | |
477 | } | |
478 | } | |
479 | ||
480 | out: | |
481 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
482 | } | |
483 | ||
5590a536 TG |
484 | /* |
485 | * Reset the one shot broadcast for a cpu | |
486 | * | |
487 | * Called with tick_broadcast_lock held | |
488 | */ | |
489 | static void tick_broadcast_clear_oneshot(int cpu) | |
490 | { | |
491 | cpu_clear(cpu, tick_broadcast_oneshot_mask); | |
492 | } | |
493 | ||
7300711e TG |
494 | static void tick_broadcast_init_next_event(cpumask_t *mask, ktime_t expires) |
495 | { | |
496 | struct tick_device *td; | |
497 | int cpu; | |
498 | ||
499 | for_each_cpu_mask_nr(cpu, *mask) { | |
500 | td = &per_cpu(tick_cpu_device, cpu); | |
501 | if (td->evtdev) | |
502 | td->evtdev->next_event = expires; | |
503 | } | |
504 | } | |
505 | ||
79bf2bb3 | 506 | /** |
8dce39c2 | 507 | * tick_broadcast_setup_oneshot - setup the broadcast device |
79bf2bb3 TG |
508 | */ |
509 | void tick_broadcast_setup_oneshot(struct clock_event_device *bc) | |
510 | { | |
9c17bcda TG |
511 | /* Set it up only once ! */ |
512 | if (bc->event_handler != tick_handle_oneshot_broadcast) { | |
7300711e TG |
513 | int was_periodic = bc->mode == CLOCK_EVT_MODE_PERIODIC; |
514 | int cpu = smp_processor_id(); | |
515 | cpumask_t mask; | |
516 | ||
9c17bcda TG |
517 | bc->event_handler = tick_handle_oneshot_broadcast; |
518 | clockevents_set_mode(bc, CLOCK_EVT_MODE_ONESHOT); | |
7300711e TG |
519 | |
520 | /* Take the do_timer update */ | |
521 | tick_do_timer_cpu = cpu; | |
522 | ||
523 | /* | |
524 | * We must be careful here. There might be other CPUs | |
525 | * waiting for periodic broadcast. We need to set the | |
526 | * oneshot_mask bits for those and program the | |
527 | * broadcast device to fire. | |
528 | */ | |
529 | mask = tick_broadcast_mask; | |
530 | cpu_clear(cpu, mask); | |
531 | cpus_or(tick_broadcast_oneshot_mask, | |
532 | tick_broadcast_oneshot_mask, mask); | |
533 | ||
534 | if (was_periodic && !cpus_empty(mask)) { | |
535 | tick_broadcast_init_next_event(&mask, tick_next_period); | |
536 | tick_broadcast_set_event(tick_next_period, 1); | |
537 | } else | |
538 | bc->next_event.tv64 = KTIME_MAX; | |
9c17bcda | 539 | } |
79bf2bb3 TG |
540 | } |
541 | ||
542 | /* | |
543 | * Select oneshot operating mode for the broadcast device | |
544 | */ | |
545 | void tick_broadcast_switch_to_oneshot(void) | |
546 | { | |
547 | struct clock_event_device *bc; | |
548 | unsigned long flags; | |
549 | ||
550 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
551 | ||
552 | tick_broadcast_device.mode = TICKDEV_MODE_ONESHOT; | |
553 | bc = tick_broadcast_device.evtdev; | |
554 | if (bc) | |
555 | tick_broadcast_setup_oneshot(bc); | |
556 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
557 | } | |
558 | ||
559 | ||
560 | /* | |
561 | * Remove a dead CPU from broadcasting | |
562 | */ | |
563 | void tick_shutdown_broadcast_oneshot(unsigned int *cpup) | |
564 | { | |
79bf2bb3 TG |
565 | unsigned long flags; |
566 | unsigned int cpu = *cpup; | |
567 | ||
568 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
569 | ||
31d9b393 TG |
570 | /* |
571 | * Clear the broadcast mask flag for the dead cpu, but do not | |
572 | * stop the broadcast device! | |
573 | */ | |
79bf2bb3 TG |
574 | cpu_clear(cpu, tick_broadcast_oneshot_mask); |
575 | ||
79bf2bb3 TG |
576 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
577 | } | |
578 | ||
579 | #endif |