[mirror_ubuntu-artful-kernel.git] / lib / iomap.c

/*
 * Implement the default iomap interfaces
 *
 * (C) Copyright 2004 Linus Torvalds
 */
#include <linux/pci.h>
#include <linux/io.h>

#include <linux/module.h>

/*
 * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
 * access or a MMIO access, these functions don't care. The info is
 * encoded in the hardware mapping set up by the mapping functions
 * (or the cookie itself, depending on implementation and hw).
 *
 * The generic routines don't assume any hardware mappings, and just
 * encode the PIO/MMIO as part of the cookie. They coldly assume that
 * the MMIO IO mappings are not in the low address range.
 *
 * Architectures for which this is not true can't use this generic
 * implementation and should do their own copy.
 */

#ifndef HAVE_ARCH_PIO_SIZE
/*
 * We encode the physical PIO addresses (0-0xffff) into the
 * pointer by offsetting them with a constant (0x10000) and
 * assuming that all the low addresses are always PIO. That means
 * we can do some sanity checks on the low bits, and don't
 * need to just take things for granted.
 */
#define PIO_OFFSET	0x10000UL
#define PIO_MASK	0x0ffffUL
#define PIO_RESERVED	0x40000UL
#endif

/*
 * Ugly macros are a way of life.
 */
#define VERIFY_PIO(port) BUG_ON((port & ~PIO_MASK) != PIO_OFFSET)

#define IO_COND(addr, is_pio, is_mmio) do {			\
	unsigned long port = (unsigned long __force)addr;	\
	if (port < PIO_RESERVED) {				\
		VERIFY_PIO(port);				\
		port &= PIO_MASK;				\
		is_pio;						\
	} else {						\
		is_mmio;					\
	}							\
} while (0)

#ifndef pio_read16be
#define pio_read16be(port) swab16(inw(port))
#define pio_read32be(port) swab32(inl(port))
#endif

#ifndef mmio_read16be
#define mmio_read16be(addr) be16_to_cpu(__raw_readw(addr))
#define mmio_read32be(addr) be32_to_cpu(__raw_readl(addr))
#endif

unsigned int fastcall ioread8(void __iomem *addr)
{
	IO_COND(addr, return inb(port), return readb(addr));
}
unsigned int fastcall ioread16(void __iomem *addr)
{
	IO_COND(addr, return inw(port), return readw(addr));
}
unsigned int fastcall ioread16be(void __iomem *addr)
{
	IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr));
}
unsigned int fastcall ioread32(void __iomem *addr)
{
	IO_COND(addr, return inl(port), return readl(addr));
}
unsigned int fastcall ioread32be(void __iomem *addr)
{
	IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr));
}
EXPORT_SYMBOL(ioread8);
EXPORT_SYMBOL(ioread16);
EXPORT_SYMBOL(ioread16be);
EXPORT_SYMBOL(ioread32);
EXPORT_SYMBOL(ioread32be);

#ifndef pio_write16be
#define pio_write16be(val,port) outw(swab16(val),port)
#define pio_write32be(val,port) outl(swab32(val),port)
#endif

#ifndef mmio_write16be
#define mmio_write16be(val,port) __raw_writew(be16_to_cpu(val),port)
#define mmio_write32be(val,port) __raw_writel(be32_to_cpu(val),port)
#endif

void fastcall iowrite8(u8 val, void __iomem *addr)
{
	IO_COND(addr, outb(val,port), writeb(val, addr));
}
void fastcall iowrite16(u16 val, void __iomem *addr)
{
	IO_COND(addr, outw(val,port), writew(val, addr));
}
void fastcall iowrite16be(u16 val, void __iomem *addr)
{
	IO_COND(addr, pio_write16be(val,port), mmio_write16be(val, addr));
}
void fastcall iowrite32(u32 val, void __iomem *addr)
{
	IO_COND(addr, outl(val,port), writel(val, addr));
}
void fastcall iowrite32be(u32 val, void __iomem *addr)
{
	IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr));
}
EXPORT_SYMBOL(iowrite8);
EXPORT_SYMBOL(iowrite16);
EXPORT_SYMBOL(iowrite16be);
EXPORT_SYMBOL(iowrite32);
EXPORT_SYMBOL(iowrite32be);

/*
 * These are the "repeat MMIO read/write" functions.
 * Note the "__raw" accesses, since we don't want to
 * convert to CPU byte order. We write in "IO byte
 * order" (we also don't have IO barriers).
 */
#ifndef mmio_insb
static inline void mmio_insb(void __iomem *addr, u8 *dst, int count)
{
	while (--count >= 0) {
		u8 data = __raw_readb(addr);
		*dst = data;
		dst++;
	}
}
static inline void mmio_insw(void __iomem *addr, u16 *dst, int count)
{
	while (--count >= 0) {
		u16 data = __raw_readw(addr);
		*dst = data;
		dst++;
	}
}
static inline void mmio_insl(void __iomem *addr, u32 *dst, int count)
{
	while (--count >= 0) {
		u32 data = __raw_readl(addr);
		*dst = data;
		dst++;
	}
}
#endif

#ifndef mmio_outsb
static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count)
{
	while (--count >= 0) {
		__raw_writeb(*src, addr);
		src++;
	}
}
static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count)
{
	while (--count >= 0) {
		__raw_writew(*src, addr);
		src++;
	}
}
static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count)
{
	while (--count >= 0) {
		__raw_writel(*src, addr);
		src++;
	}
}
#endif

void fastcall ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
{
	IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count));
}
void fastcall ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
{
	IO_COND(addr, insw(port,dst,count), mmio_insw(addr, dst, count));
}
void fastcall ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
{
	IO_COND(addr, insl(port,dst,count), mmio_insl(addr, dst, count));
}
EXPORT_SYMBOL(ioread8_rep);
EXPORT_SYMBOL(ioread16_rep);
EXPORT_SYMBOL(ioread32_rep);

void fastcall iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
{
	IO_COND(addr, outsb(port, src, count), mmio_outsb(addr, src, count));
}
void fastcall iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
{
	IO_COND(addr, outsw(port, src, count), mmio_outsw(addr, src, count));
}
void fastcall iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
{
	IO_COND(addr, outsl(port, src,count), mmio_outsl(addr, src, count));
}
EXPORT_SYMBOL(iowrite8_rep);
EXPORT_SYMBOL(iowrite16_rep);
EXPORT_SYMBOL(iowrite32_rep);

/* Create a virtual mapping cookie for an IO port range */
void __iomem *ioport_map(unsigned long port, unsigned int nr)
{
	if (port > PIO_MASK)
		return NULL;
	return (void __iomem *) (unsigned long) (port + PIO_OFFSET);
}

void ioport_unmap(void __iomem *addr)
{
	/* Nothing to do */
}
EXPORT_SYMBOL(ioport_map);
EXPORT_SYMBOL(ioport_unmap);

/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
{
	unsigned long start = pci_resource_start(dev, bar);
	unsigned long len = pci_resource_len(dev, bar);
	unsigned long flags = pci_resource_flags(dev, bar);

	if (!len || !start)
		return NULL;
	if (maxlen && len > maxlen)
		len = maxlen;
	if (flags & IORESOURCE_IO)
		return ioport_map(start, len);
	if (flags & IORESOURCE_MEM) {
		if (flags & IORESOURCE_CACHEABLE)
			return ioremap(start, len);
		return ioremap_nocache(start, len);
	}
	/* What? */
	return NULL;
}

void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
{
	IO_COND(addr, /* nothing */, iounmap(addr));
}
EXPORT_SYMBOL(pci_iomap);
EXPORT_SYMBOL(pci_iounmap);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Implement the default iomap interfaces
	3	*
	4	* (C) Copyright 2004 Linus Torvalds
	5	*/
	6	#include <linux/pci.h>
9ac7849e TH	7	#include <linux/io.h>
9ac7849e TH	8
1da177e4	9	#include <linux/module.h>
1da177e4 LT	10
	11	/*
	12	* Read/write from/to an (offsettable) iomem cookie. It might be a PIO
	13	* access or a MMIO access, these functions don't care. The info is
	14	* encoded in the hardware mapping set up by the mapping functions
	15	* (or the cookie itself, depending on implementation and hw).
	16	*
	17	* The generic routines don't assume any hardware mappings, and just
	18	* encode the PIO/MMIO as part of the cookie. They coldly assume that
	19	* the MMIO IO mappings are not in the low address range.
	20	*
	21	* Architectures for which this is not true can't use this generic
	22	* implementation and should do their own copy.
	23	*/
	24
	25	#ifndef HAVE_ARCH_PIO_SIZE
	26	/*
	27	* We encode the physical PIO addresses (0-0xffff) into the
	28	* pointer by offsetting them with a constant (0x10000) and
	29	* assuming that all the low addresses are always PIO. That means
	30	* we can do some sanity checks on the low bits, and don't
	31	* need to just take things for granted.
	32	*/
	33	#define PIO_OFFSET 0x10000UL
	34	#define PIO_MASK 0x0ffffUL
	35	#define PIO_RESERVED 0x40000UL
	36	#endif
	37
	38	/*
	39	* Ugly macros are a way of life.
	40	*/
	41	#define VERIFY_PIO(port) BUG_ON((port & ~PIO_MASK) != PIO_OFFSET)
	42
	43	#define IO_COND(addr, is_pio, is_mmio) do { \
	44	unsigned long port = (unsigned long __force)addr; \
	45	if (port < PIO_RESERVED) { \
	46	VERIFY_PIO(port); \
	47	port &= PIO_MASK; \
	48	is_pio; \
	49	} else { \
	50	is_mmio; \
	51	} \
	52	} while (0)
	53
34ba8a5c LT	54	#ifndef pio_read16be
	55	#define pio_read16be(port) swab16(inw(port))
	56	#define pio_read32be(port) swab32(inl(port))
	57	#endif
	58
	59	#ifndef mmio_read16be
	60	#define mmio_read16be(addr) be16_to_cpu(__raw_readw(addr))
	61	#define mmio_read32be(addr) be32_to_cpu(__raw_readl(addr))
	62	#endif
	63
1da177e4 LT	64	unsigned int fastcall ioread8(void __iomem *addr)
	65	{
	66	IO_COND(addr, return inb(port), return readb(addr));
	67	}
	68	unsigned int fastcall ioread16(void __iomem *addr)
	69	{
	70	IO_COND(addr, return inw(port), return readw(addr));
	71	}
dae409a2 JB	72	unsigned int fastcall ioread16be(void __iomem *addr)
dae409a2 JB	73	{
34ba8a5c	74	IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr));
dae409a2	75	}
1da177e4 LT	76	unsigned int fastcall ioread32(void __iomem *addr)
	77	{
	78	IO_COND(addr, return inl(port), return readl(addr));
	79	}
dae409a2 JB	80	unsigned int fastcall ioread32be(void __iomem *addr)
dae409a2 JB	81	{
34ba8a5c	82	IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr));
dae409a2	83	}
1da177e4 LT	84	EXPORT_SYMBOL(ioread8);
1da177e4 LT	85	EXPORT_SYMBOL(ioread16);
dae409a2	86	EXPORT_SYMBOL(ioread16be);
1da177e4	87	EXPORT_SYMBOL(ioread32);
dae409a2	88	EXPORT_SYMBOL(ioread32be);
1da177e4	89
34ba8a5c LT	90	#ifndef pio_write16be
	91	#define pio_write16be(val,port) outw(swab16(val),port)
	92	#define pio_write32be(val,port) outl(swab32(val),port)
	93	#endif
	94
	95	#ifndef mmio_write16be
	96	#define mmio_write16be(val,port) __raw_writew(be16_to_cpu(val),port)
	97	#define mmio_write32be(val,port) __raw_writel(be32_to_cpu(val),port)
	98	#endif
	99
1da177e4 LT	100	void fastcall iowrite8(u8 val, void __iomem *addr)
	101	{
	102	IO_COND(addr, outb(val,port), writeb(val, addr));
	103	}
	104	void fastcall iowrite16(u16 val, void __iomem *addr)
	105	{
	106	IO_COND(addr, outw(val,port), writew(val, addr));
	107	}
dae409a2 JB	108	void fastcall iowrite16be(u16 val, void __iomem *addr)
dae409a2 JB	109	{
34ba8a5c	110	IO_COND(addr, pio_write16be(val,port), mmio_write16be(val, addr));
dae409a2	111	}
1da177e4 LT	112	void fastcall iowrite32(u32 val, void __iomem *addr)
	113	{
	114	IO_COND(addr, outl(val,port), writel(val, addr));
	115	}
dae409a2 JB	116	void fastcall iowrite32be(u32 val, void __iomem *addr)
dae409a2 JB	117	{
34ba8a5c	118	IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr));
dae409a2	119	}
1da177e4 LT	120	EXPORT_SYMBOL(iowrite8);
1da177e4 LT	121	EXPORT_SYMBOL(iowrite16);
dae409a2	122	EXPORT_SYMBOL(iowrite16be);
1da177e4	123	EXPORT_SYMBOL(iowrite32);
dae409a2	124	EXPORT_SYMBOL(iowrite32be);
1da177e4 LT	125
	126	/*
	127	* These are the "repeat MMIO read/write" functions.
	128	* Note the "__raw" accesses, since we don't want to
	129	* convert to CPU byte order. We write in "IO byte
	130	* order" (we also don't have IO barriers).
	131	*/
34ba8a5c	132	#ifndef mmio_insb
1da177e4 LT	133	static inline void mmio_insb(void __iomem addr, u8 dst, int count)
	134	{
	135	while (--count >= 0) {
	136	u8 data = __raw_readb(addr);
	137	*dst = data;
	138	dst++;
	139	}
	140	}
	141	static inline void mmio_insw(void __iomem addr, u16 dst, int count)
	142	{
	143	while (--count >= 0) {
	144	u16 data = __raw_readw(addr);
	145	*dst = data;
	146	dst++;
	147	}
	148	}
	149	static inline void mmio_insl(void __iomem addr, u32 dst, int count)
	150	{
	151	while (--count >= 0) {
	152	u32 data = __raw_readl(addr);
	153	*dst = data;
	154	dst++;
	155	}
	156	}
34ba8a5c	157	#endif
1da177e4	158
34ba8a5c	159	#ifndef mmio_outsb
1da177e4 LT	160	static inline void mmio_outsb(void __iomem addr, const u8 src, int count)
	161	{
	162	while (--count >= 0) {
	163	__raw_writeb(*src, addr);
	164	src++;
	165	}
	166	}
	167	static inline void mmio_outsw(void __iomem addr, const u16 src, int count)
	168	{
	169	while (--count >= 0) {
	170	__raw_writew(*src, addr);
	171	src++;
	172	}
	173	}
	174	static inline void mmio_outsl(void __iomem addr, const u32 src, int count)
	175	{
	176	while (--count >= 0) {
	177	__raw_writel(*src, addr);
	178	src++;
	179	}
	180	}
34ba8a5c	181	#endif
1da177e4 LT	182
	183	void fastcall ioread8_rep(void __iomem addr, void dst, unsigned long count)
	184	{
	185	IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count));
	186	}
	187	void fastcall ioread16_rep(void __iomem addr, void dst, unsigned long count)
	188	{
	189	IO_COND(addr, insw(port,dst,count), mmio_insw(addr, dst, count));
	190	}
	191	void fastcall ioread32_rep(void __iomem addr, void dst, unsigned long count)
	192	{
	193	IO_COND(addr, insl(port,dst,count), mmio_insl(addr, dst, count));
	194	}
	195	EXPORT_SYMBOL(ioread8_rep);
	196	EXPORT_SYMBOL(ioread16_rep);
	197	EXPORT_SYMBOL(ioread32_rep);
	198
	199	void fastcall iowrite8_rep(void __iomem addr, const void src, unsigned long count)
	200	{
	201	IO_COND(addr, outsb(port, src, count), mmio_outsb(addr, src, count));
	202	}
	203	void fastcall iowrite16_rep(void __iomem addr, const void src, unsigned long count)
	204	{
	205	IO_COND(addr, outsw(port, src, count), mmio_outsw(addr, src, count));
	206	}
	207	void fastcall iowrite32_rep(void __iomem addr, const void src, unsigned long count)
	208	{
	209	IO_COND(addr, outsl(port, src,count), mmio_outsl(addr, src, count));
	210	}
	211	EXPORT_SYMBOL(iowrite8_rep);
	212	EXPORT_SYMBOL(iowrite16_rep);
	213	EXPORT_SYMBOL(iowrite32_rep);
	214
	215	/* Create a virtual mapping cookie for an IO port range */
	216	void __iomem *ioport_map(unsigned long port, unsigned int nr)
	217	{
	218	if (port > PIO_MASK)
	219	return NULL;
	220	return (void __iomem *) (unsigned long) (port + PIO_OFFSET);
	221	}
	222
	223	void ioport_unmap(void __iomem *addr)
	224	{
	225	/* Nothing to do */
	226	}
	227	EXPORT_SYMBOL(ioport_map);
	228	EXPORT_SYMBOL(ioport_unmap);
	229
	230	/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
	231	void __iomem pci_iomap(struct pci_dev dev, int bar, unsigned long maxlen)
	232	{
	233	unsigned long start = pci_resource_start(dev, bar);
	234	unsigned long len = pci_resource_len(dev, bar);
	235	unsigned long flags = pci_resource_flags(dev, bar);
	236
	237	if (!len \|\| !start)
	238	return NULL;
	239	if (maxlen && len > maxlen)
	240	len = maxlen;
	241	if (flags & IORESOURCE_IO)
	242	return ioport_map(start, len);
	243	if (flags & IORESOURCE_MEM) {
	244	if (flags & IORESOURCE_CACHEABLE)
	245	return ioremap(start, len);
246	return ioremap_nocache(start, len);
247	}
248	/* What? */
249	return NULL;
250	}
251
252	void pci_iounmap(struct pci_dev dev, void __iomem addr)
253	{
254	IO_COND(addr, /* nothing */, iounmap(addr));
255	}
256	EXPORT_SYMBOL(pci_iomap);
257	EXPORT_SYMBOL(pci_iounmap);