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1da177e4 LT |
1 | /* |
2 | * Implement the default iomap interfaces | |
3 | * | |
4 | * (C) Copyright 2004 Linus Torvalds | |
5 | */ | |
6 | #include <linux/pci.h> | |
7 | #include <linux/module.h> | |
8 | #include <asm/io.h> | |
9 | ||
10 | /* | |
11 | * Read/write from/to an (offsettable) iomem cookie. It might be a PIO | |
12 | * access or a MMIO access, these functions don't care. The info is | |
13 | * encoded in the hardware mapping set up by the mapping functions | |
14 | * (or the cookie itself, depending on implementation and hw). | |
15 | * | |
16 | * The generic routines don't assume any hardware mappings, and just | |
17 | * encode the PIO/MMIO as part of the cookie. They coldly assume that | |
18 | * the MMIO IO mappings are not in the low address range. | |
19 | * | |
20 | * Architectures for which this is not true can't use this generic | |
21 | * implementation and should do their own copy. | |
22 | */ | |
23 | ||
24 | #ifndef HAVE_ARCH_PIO_SIZE | |
25 | /* | |
26 | * We encode the physical PIO addresses (0-0xffff) into the | |
27 | * pointer by offsetting them with a constant (0x10000) and | |
28 | * assuming that all the low addresses are always PIO. That means | |
29 | * we can do some sanity checks on the low bits, and don't | |
30 | * need to just take things for granted. | |
31 | */ | |
32 | #define PIO_OFFSET 0x10000UL | |
33 | #define PIO_MASK 0x0ffffUL | |
34 | #define PIO_RESERVED 0x40000UL | |
35 | #endif | |
36 | ||
37 | /* | |
38 | * Ugly macros are a way of life. | |
39 | */ | |
40 | #define VERIFY_PIO(port) BUG_ON((port & ~PIO_MASK) != PIO_OFFSET) | |
41 | ||
42 | #define IO_COND(addr, is_pio, is_mmio) do { \ | |
43 | unsigned long port = (unsigned long __force)addr; \ | |
44 | if (port < PIO_RESERVED) { \ | |
45 | VERIFY_PIO(port); \ | |
46 | port &= PIO_MASK; \ | |
47 | is_pio; \ | |
48 | } else { \ | |
49 | is_mmio; \ | |
50 | } \ | |
51 | } while (0) | |
52 | ||
53 | unsigned int fastcall ioread8(void __iomem *addr) | |
54 | { | |
55 | IO_COND(addr, return inb(port), return readb(addr)); | |
56 | } | |
57 | unsigned int fastcall ioread16(void __iomem *addr) | |
58 | { | |
59 | IO_COND(addr, return inw(port), return readw(addr)); | |
60 | } | |
61 | unsigned int fastcall ioread32(void __iomem *addr) | |
62 | { | |
63 | IO_COND(addr, return inl(port), return readl(addr)); | |
64 | } | |
65 | EXPORT_SYMBOL(ioread8); | |
66 | EXPORT_SYMBOL(ioread16); | |
67 | EXPORT_SYMBOL(ioread32); | |
68 | ||
69 | void fastcall iowrite8(u8 val, void __iomem *addr) | |
70 | { | |
71 | IO_COND(addr, outb(val,port), writeb(val, addr)); | |
72 | } | |
73 | void fastcall iowrite16(u16 val, void __iomem *addr) | |
74 | { | |
75 | IO_COND(addr, outw(val,port), writew(val, addr)); | |
76 | } | |
77 | void fastcall iowrite32(u32 val, void __iomem *addr) | |
78 | { | |
79 | IO_COND(addr, outl(val,port), writel(val, addr)); | |
80 | } | |
81 | EXPORT_SYMBOL(iowrite8); | |
82 | EXPORT_SYMBOL(iowrite16); | |
83 | EXPORT_SYMBOL(iowrite32); | |
84 | ||
85 | /* | |
86 | * These are the "repeat MMIO read/write" functions. | |
87 | * Note the "__raw" accesses, since we don't want to | |
88 | * convert to CPU byte order. We write in "IO byte | |
89 | * order" (we also don't have IO barriers). | |
90 | */ | |
91 | static inline void mmio_insb(void __iomem *addr, u8 *dst, int count) | |
92 | { | |
93 | while (--count >= 0) { | |
94 | u8 data = __raw_readb(addr); | |
95 | *dst = data; | |
96 | dst++; | |
97 | } | |
98 | } | |
99 | static inline void mmio_insw(void __iomem *addr, u16 *dst, int count) | |
100 | { | |
101 | while (--count >= 0) { | |
102 | u16 data = __raw_readw(addr); | |
103 | *dst = data; | |
104 | dst++; | |
105 | } | |
106 | } | |
107 | static inline void mmio_insl(void __iomem *addr, u32 *dst, int count) | |
108 | { | |
109 | while (--count >= 0) { | |
110 | u32 data = __raw_readl(addr); | |
111 | *dst = data; | |
112 | dst++; | |
113 | } | |
114 | } | |
115 | ||
116 | static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count) | |
117 | { | |
118 | while (--count >= 0) { | |
119 | __raw_writeb(*src, addr); | |
120 | src++; | |
121 | } | |
122 | } | |
123 | static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count) | |
124 | { | |
125 | while (--count >= 0) { | |
126 | __raw_writew(*src, addr); | |
127 | src++; | |
128 | } | |
129 | } | |
130 | static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count) | |
131 | { | |
132 | while (--count >= 0) { | |
133 | __raw_writel(*src, addr); | |
134 | src++; | |
135 | } | |
136 | } | |
137 | ||
138 | void fastcall ioread8_rep(void __iomem *addr, void *dst, unsigned long count) | |
139 | { | |
140 | IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count)); | |
141 | } | |
142 | void fastcall ioread16_rep(void __iomem *addr, void *dst, unsigned long count) | |
143 | { | |
144 | IO_COND(addr, insw(port,dst,count), mmio_insw(addr, dst, count)); | |
145 | } | |
146 | void fastcall ioread32_rep(void __iomem *addr, void *dst, unsigned long count) | |
147 | { | |
148 | IO_COND(addr, insl(port,dst,count), mmio_insl(addr, dst, count)); | |
149 | } | |
150 | EXPORT_SYMBOL(ioread8_rep); | |
151 | EXPORT_SYMBOL(ioread16_rep); | |
152 | EXPORT_SYMBOL(ioread32_rep); | |
153 | ||
154 | void fastcall iowrite8_rep(void __iomem *addr, const void *src, unsigned long count) | |
155 | { | |
156 | IO_COND(addr, outsb(port, src, count), mmio_outsb(addr, src, count)); | |
157 | } | |
158 | void fastcall iowrite16_rep(void __iomem *addr, const void *src, unsigned long count) | |
159 | { | |
160 | IO_COND(addr, outsw(port, src, count), mmio_outsw(addr, src, count)); | |
161 | } | |
162 | void fastcall iowrite32_rep(void __iomem *addr, const void *src, unsigned long count) | |
163 | { | |
164 | IO_COND(addr, outsl(port, src,count), mmio_outsl(addr, src, count)); | |
165 | } | |
166 | EXPORT_SYMBOL(iowrite8_rep); | |
167 | EXPORT_SYMBOL(iowrite16_rep); | |
168 | EXPORT_SYMBOL(iowrite32_rep); | |
169 | ||
170 | /* Create a virtual mapping cookie for an IO port range */ | |
171 | void __iomem *ioport_map(unsigned long port, unsigned int nr) | |
172 | { | |
173 | if (port > PIO_MASK) | |
174 | return NULL; | |
175 | return (void __iomem *) (unsigned long) (port + PIO_OFFSET); | |
176 | } | |
177 | ||
178 | void ioport_unmap(void __iomem *addr) | |
179 | { | |
180 | /* Nothing to do */ | |
181 | } | |
182 | EXPORT_SYMBOL(ioport_map); | |
183 | EXPORT_SYMBOL(ioport_unmap); | |
184 | ||
185 | /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ | |
186 | void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) | |
187 | { | |
188 | unsigned long start = pci_resource_start(dev, bar); | |
189 | unsigned long len = pci_resource_len(dev, bar); | |
190 | unsigned long flags = pci_resource_flags(dev, bar); | |
191 | ||
192 | if (!len || !start) | |
193 | return NULL; | |
194 | if (maxlen && len > maxlen) | |
195 | len = maxlen; | |
196 | if (flags & IORESOURCE_IO) | |
197 | return ioport_map(start, len); | |
198 | if (flags & IORESOURCE_MEM) { | |
199 | if (flags & IORESOURCE_CACHEABLE) | |
200 | return ioremap(start, len); | |
201 | return ioremap_nocache(start, len); | |
202 | } | |
203 | /* What? */ | |
204 | return NULL; | |
205 | } | |
206 | ||
207 | void pci_iounmap(struct pci_dev *dev, void __iomem * addr) | |
208 | { | |
209 | IO_COND(addr, /* nothing */, iounmap(addr)); | |
210 | } | |
211 | EXPORT_SYMBOL(pci_iomap); | |
212 | EXPORT_SYMBOL(pci_iounmap); |