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netdev-offload-tc: Use single 'once' variable for probing tc features
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31a3fc6e 1/*
7d53f6b0 2 * Copyright (c) 2013, 2014 Nicira, Inc.
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3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at:
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17/* This header implements atomic operation primitives on compilers that
18 * have built-in support for C11 <stdatomic.h> */
19#ifndef IN_OVS_ATOMIC_H
20#error "This header should only be included indirectly via ovs-atomic.h."
21#endif
22
23#include <stdatomic.h>
24
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25#define OMIT_STANDARD_ATOMIC_TYPES 1
26#define ATOMIC(TYPE) _Atomic(TYPE)
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27
28#define atomic_read(SRC, DST) \
29 atomic_read_explicit(SRC, DST, memory_order_seq_cst)
30#define atomic_read_explicit(SRC, DST, ORDER) \
31 (*(DST) = atomic_load_explicit(SRC, ORDER), \
32 (void) 0)
33
34#define atomic_add(RMW, ARG, ORIG) \
35 atomic_add_explicit(RMW, ARG, ORIG, memory_order_seq_cst)
36#define atomic_sub(RMW, ARG, ORIG) \
37 atomic_sub_explicit(RMW, ARG, ORIG, memory_order_seq_cst)
38#define atomic_or(RMW, ARG, ORIG) \
39 atomic_or_explicit(RMW, ARG, ORIG, memory_order_seq_cst)
40#define atomic_xor(RMW, ARG, ORIG) \
41 atomic_xor_explicit(RMW, ARG, ORIG, memory_order_seq_cst)
42#define atomic_and(RMW, ARG, ORIG) \
43 atomic_and_explicit(RMW, ARG, ORIG, memory_order_seq_cst)
44
45#define atomic_add_explicit(RMW, ARG, ORIG, ORDER) \
46 (*(ORIG) = atomic_fetch_add_explicit(RMW, ARG, ORDER), (void) 0)
47#define atomic_sub_explicit(RMW, ARG, ORIG, ORDER) \
48 (*(ORIG) = atomic_fetch_sub_explicit(RMW, ARG, ORDER), (void) 0)
49#define atomic_or_explicit(RMW, ARG, ORIG, ORDER) \
50 (*(ORIG) = atomic_fetch_or_explicit(RMW, ARG, ORDER), (void) 0)
51#define atomic_xor_explicit(RMW, ARG, ORIG, ORDER) \
52 (*(ORIG) = atomic_fetch_xor_explicit(RMW, ARG, ORDER), (void) 0)
53#define atomic_and_explicit(RMW, ARG, ORIG, ORDER) \
54 (*(ORIG) = atomic_fetch_and_explicit(RMW, ARG, ORDER), (void) 0)