]>
Commit | Line | Data |
---|---|---|
31a3fc6e | 1 | /* |
7d53f6b0 | 2 | * Copyright (c) 2013, 2014 Nicira, Inc. |
31a3fc6e BP |
3 | * |
4 | * Licensed under the Apache License, Version 2.0 (the "License"); | |
5 | * you may not use this file except in compliance with the License. | |
6 | * You may obtain a copy of the License at: | |
7 | * | |
8 | * http://www.apache.org/licenses/LICENSE-2.0 | |
9 | * | |
10 | * Unless required by applicable law or agreed to in writing, software | |
11 | * distributed under the License is distributed on an "AS IS" BASIS, | |
12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |
13 | * See the License for the specific language governing permissions and | |
14 | * limitations under the License. | |
15 | */ | |
16 | ||
17 | /* This header implements atomic operation primitives on GCC 4.7 and later. */ | |
18 | #ifndef IN_OVS_ATOMIC_H | |
19 | #error "This header should only be included indirectly via ovs-atomic.h." | |
20 | #endif | |
21 | ||
7d53f6b0 | 22 | #define ATOMIC(TYPE) TYPE |
31a3fc6e BP |
23 | |
24 | typedef enum { | |
25 | memory_order_relaxed = __ATOMIC_RELAXED, | |
26 | memory_order_consume = __ATOMIC_CONSUME, | |
27 | memory_order_acquire = __ATOMIC_ACQUIRE, | |
28 | memory_order_release = __ATOMIC_RELEASE, | |
29 | memory_order_acq_rel = __ATOMIC_ACQ_REL, | |
30 | memory_order_seq_cst = __ATOMIC_SEQ_CST | |
31 | } memory_order; | |
32 | ||
33 | #define ATOMIC_VAR_INIT(VALUE) (VALUE) | |
34 | #define atomic_init(OBJECT, VALUE) (*(OBJECT) = (VALUE), (void) 0) | |
35 | ||
36 | #define atomic_thread_fence __atomic_thread_fence | |
37 | #define atomic_signal_fence __atomic_signal_fence | |
38 | #define atomic_is_lock_free __atomic_is_lock_free | |
39 | ||
40 | #define atomic_store(DST, SRC) \ | |
41 | atomic_store_explicit(DST, SRC, memory_order_seq_cst) | |
42 | #define atomic_store_explicit __atomic_store_n | |
43 | ||
44 | #define atomic_read(SRC, DST) \ | |
45 | atomic_read_explicit(SRC, DST, memory_order_seq_cst) | |
46 | #define atomic_read_explicit(SRC, DST, ORDER) \ | |
47 | (*(DST) = __atomic_load_n(SRC, ORDER), \ | |
48 | (void) 0) | |
49 | ||
25045d75 JR |
50 | #define atomic_compare_exchange_strong(DST, EXP, SRC) \ |
51 | atomic_compare_exchange_strong_explicit(DST, EXP, SRC, \ | |
52 | memory_order_seq_cst, \ | |
53 | memory_order_seq_cst) | |
54 | #define atomic_compare_exchange_strong_explicit(DST, EXP, SRC, ORD1, ORD2) \ | |
55 | __atomic_compare_exchange_n(DST, EXP, SRC, false, ORD1, ORD2) | |
56 | ||
57 | #define atomic_compare_exchange_weak(DST, EXP, SRC) \ | |
58 | atomic_compare_exchange_weak_explicit(DST, EXP, SRC, \ | |
59 | memory_order_seq_cst, \ | |
60 | memory_order_seq_cst) | |
61 | #define atomic_compare_exchange_weak_explicit(DST, EXP, SRC, ORD1, ORD2) \ | |
62 | __atomic_compare_exchange_n(DST, EXP, SRC, true, ORD1, ORD2) | |
63 | ||
31a3fc6e BP |
64 | #define atomic_add(RMW, OPERAND, ORIG) \ |
65 | atomic_add_explicit(RMW, OPERAND, ORIG, memory_order_seq_cst) | |
66 | #define atomic_sub(RMW, OPERAND, ORIG) \ | |
67 | atomic_sub_explicit(RMW, OPERAND, ORIG, memory_order_seq_cst) | |
68 | #define atomic_or(RMW, OPERAND, ORIG) \ | |
69 | atomic_or_explicit(RMW, OPERAND, ORIG, memory_order_seq_cst) | |
70 | #define atomic_xor(RMW, OPERAND, ORIG) \ | |
71 | atomic_xor_explicit(RMW, OPERAND, ORIG, memory_order_seq_cst) | |
72 | #define atomic_and(RMW, OPERAND, ORIG) \ | |
73 | atomic_and_explicit(RMW, OPERAND, ORIG, memory_order_seq_cst) | |
74 | ||
75 | #define atomic_add_explicit(RMW, OPERAND, ORIG, ORDER) \ | |
76 | (*(ORIG) = __atomic_fetch_add(RMW, OPERAND, ORDER), (void) 0) | |
77 | #define atomic_sub_explicit(RMW, OPERAND, ORIG, ORDER) \ | |
78 | (*(ORIG) = __atomic_fetch_sub(RMW, OPERAND, ORDER), (void) 0) | |
79 | #define atomic_or_explicit(RMW, OPERAND, ORIG, ORDER) \ | |
80 | (*(ORIG) = __atomic_fetch_or(RMW, OPERAND, ORDER), (void) 0) | |
81 | #define atomic_xor_explicit(RMW, OPERAND, ORIG, ORDER) \ | |
82 | (*(ORIG) = __atomic_fetch_xor(RMW, OPERAND, ORDER), (void) 0) | |
83 | #define atomic_and_explicit(RMW, OPERAND, ORIG, ORDER) \ | |
84 | (*(ORIG) = __atomic_fetch_and(RMW, OPERAND, ORDER), (void) 0) | |
29ab0cf7 BP |
85 | |
86 | #include "ovs-atomic-flag-gcc4.7+.h" |