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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Dynamic DMA mapping support. | |
3 | * | |
563aaf06 | 4 | * This implementation is a fallback for platforms that do not support |
1da177e4 LT |
5 | * I/O TLBs (aka DMA address translation hardware). |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
569c8bf5 JL |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
fb05a379 | 17 | * 08/12/11 beckyb Add highmem support |
1da177e4 LT |
18 | */ |
19 | ||
20 | #include <linux/cache.h> | |
17e5ad6c | 21 | #include <linux/dma-mapping.h> |
1da177e4 LT |
22 | #include <linux/mm.h> |
23 | #include <linux/module.h> | |
1da177e4 LT |
24 | #include <linux/spinlock.h> |
25 | #include <linux/string.h> | |
0016fdee | 26 | #include <linux/swiotlb.h> |
fb05a379 | 27 | #include <linux/pfn.h> |
1da177e4 LT |
28 | #include <linux/types.h> |
29 | #include <linux/ctype.h> | |
ef9b1893 | 30 | #include <linux/highmem.h> |
5a0e3ad6 | 31 | #include <linux/gfp.h> |
1da177e4 LT |
32 | |
33 | #include <asm/io.h> | |
1da177e4 | 34 | #include <asm/dma.h> |
17e5ad6c | 35 | #include <asm/scatterlist.h> |
1da177e4 LT |
36 | |
37 | #include <linux/init.h> | |
38 | #include <linux/bootmem.h> | |
a8522509 | 39 | #include <linux/iommu-helper.h> |
1da177e4 LT |
40 | |
41 | #define OFFSET(val,align) ((unsigned long) \ | |
42 | ( (val) & ( (align) - 1))) | |
43 | ||
0b9afede AW |
44 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
45 | ||
46 | /* | |
47 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
48 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
49 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
50 | */ | |
51 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
52 | ||
de69e0f0 JL |
53 | /* |
54 | * Enumeration for sync targets | |
55 | */ | |
56 | enum dma_sync_target { | |
57 | SYNC_FOR_CPU = 0, | |
58 | SYNC_FOR_DEVICE = 1, | |
59 | }; | |
60 | ||
1da177e4 LT |
61 | int swiotlb_force; |
62 | ||
63 | /* | |
ceb5ac32 BB |
64 | * Used to do a quick range check in unmap_single and |
65 | * sync_single_*, to see if the memory was in fact allocated by this | |
1da177e4 LT |
66 | * API. |
67 | */ | |
68 | static char *io_tlb_start, *io_tlb_end; | |
69 | ||
70 | /* | |
71 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and | |
72 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
73 | */ | |
74 | static unsigned long io_tlb_nslabs; | |
75 | ||
76 | /* | |
77 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
78 | */ | |
79 | static unsigned long io_tlb_overflow = 32*1024; | |
80 | ||
81 | void *io_tlb_overflow_buffer; | |
82 | ||
83 | /* | |
84 | * This is a free list describing the number of free entries available from | |
85 | * each index | |
86 | */ | |
87 | static unsigned int *io_tlb_list; | |
88 | static unsigned int io_tlb_index; | |
89 | ||
90 | /* | |
91 | * We need to save away the original address corresponding to a mapped entry | |
92 | * for the sync operations. | |
93 | */ | |
bc40ac66 | 94 | static phys_addr_t *io_tlb_orig_addr; |
1da177e4 LT |
95 | |
96 | /* | |
97 | * Protect the above data structures in the map and unmap calls | |
98 | */ | |
99 | static DEFINE_SPINLOCK(io_tlb_lock); | |
100 | ||
5740afdb FT |
101 | static int late_alloc; |
102 | ||
1da177e4 LT |
103 | static int __init |
104 | setup_io_tlb_npages(char *str) | |
105 | { | |
106 | if (isdigit(*str)) { | |
e8579e72 | 107 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
1da177e4 LT |
108 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
109 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
110 | } | |
111 | if (*str == ',') | |
112 | ++str; | |
b18485e7 | 113 | if (!strcmp(str, "force")) |
1da177e4 | 114 | swiotlb_force = 1; |
b18485e7 | 115 | |
1da177e4 LT |
116 | return 1; |
117 | } | |
118 | __setup("swiotlb=", setup_io_tlb_npages); | |
119 | /* make io_tlb_overflow tunable too? */ | |
120 | ||
02ca646e | 121 | /* Note that this doesn't work with highmem page */ |
70a7d3cc JF |
122 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, |
123 | volatile void *address) | |
e08e1f7a | 124 | { |
862d196b | 125 | return phys_to_dma(hwdev, virt_to_phys(address)); |
e08e1f7a IC |
126 | } |
127 | ||
ad32e8cb | 128 | void swiotlb_print_info(void) |
2e5b2b86 | 129 | { |
ad32e8cb | 130 | unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
2e5b2b86 | 131 | phys_addr_t pstart, pend; |
2e5b2b86 IC |
132 | |
133 | pstart = virt_to_phys(io_tlb_start); | |
134 | pend = virt_to_phys(io_tlb_end); | |
135 | ||
2e5b2b86 IC |
136 | printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n", |
137 | bytes >> 20, io_tlb_start, io_tlb_end); | |
70a7d3cc JF |
138 | printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n", |
139 | (unsigned long long)pstart, | |
140 | (unsigned long long)pend); | |
2e5b2b86 IC |
141 | } |
142 | ||
1da177e4 LT |
143 | /* |
144 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
17e5ad6c | 145 | * structures for the software IO TLB used to implement the DMA API. |
1da177e4 | 146 | */ |
563aaf06 | 147 | void __init |
ad32e8cb | 148 | swiotlb_init_with_default_size(size_t default_size, int verbose) |
1da177e4 | 149 | { |
563aaf06 | 150 | unsigned long i, bytes; |
1da177e4 LT |
151 | |
152 | if (!io_tlb_nslabs) { | |
e8579e72 | 153 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
1da177e4 LT |
154 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
155 | } | |
156 | ||
563aaf06 JB |
157 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
158 | ||
1da177e4 LT |
159 | /* |
160 | * Get IO TLB memory from the low pages | |
161 | */ | |
3885123d | 162 | io_tlb_start = alloc_bootmem_low_pages(bytes); |
1da177e4 LT |
163 | if (!io_tlb_start) |
164 | panic("Cannot allocate SWIOTLB buffer"); | |
563aaf06 | 165 | io_tlb_end = io_tlb_start + bytes; |
1da177e4 LT |
166 | |
167 | /* | |
168 | * Allocate and initialize the free list array. This array is used | |
169 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
170 | * between io_tlb_start and io_tlb_end. | |
171 | */ | |
172 | io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); | |
25667d67 | 173 | for (i = 0; i < io_tlb_nslabs; i++) |
1da177e4 LT |
174 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
175 | io_tlb_index = 0; | |
bc40ac66 | 176 | io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t)); |
1da177e4 LT |
177 | |
178 | /* | |
179 | * Get the overflow emergency buffer | |
180 | */ | |
181 | io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); | |
563aaf06 JB |
182 | if (!io_tlb_overflow_buffer) |
183 | panic("Cannot allocate SWIOTLB overflow buffer!\n"); | |
ad32e8cb FT |
184 | if (verbose) |
185 | swiotlb_print_info(); | |
1da177e4 LT |
186 | } |
187 | ||
563aaf06 | 188 | void __init |
ad32e8cb | 189 | swiotlb_init(int verbose) |
1da177e4 | 190 | { |
ad32e8cb | 191 | swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */ |
1da177e4 LT |
192 | } |
193 | ||
0b9afede AW |
194 | /* |
195 | * Systems with larger DMA zones (those that don't support ISA) can | |
196 | * initialize the swiotlb later using the slab allocator if needed. | |
197 | * This should be just like above, but with some error catching. | |
198 | */ | |
199 | int | |
563aaf06 | 200 | swiotlb_late_init_with_default_size(size_t default_size) |
0b9afede | 201 | { |
563aaf06 | 202 | unsigned long i, bytes, req_nslabs = io_tlb_nslabs; |
0b9afede AW |
203 | unsigned int order; |
204 | ||
205 | if (!io_tlb_nslabs) { | |
206 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
207 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
208 | } | |
209 | ||
210 | /* | |
211 | * Get IO TLB memory from the low pages | |
212 | */ | |
563aaf06 | 213 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
0b9afede | 214 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
563aaf06 | 215 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede AW |
216 | |
217 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
bb52196b FT |
218 | io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, |
219 | order); | |
0b9afede AW |
220 | if (io_tlb_start) |
221 | break; | |
222 | order--; | |
223 | } | |
224 | ||
225 | if (!io_tlb_start) | |
226 | goto cleanup1; | |
227 | ||
563aaf06 | 228 | if (order != get_order(bytes)) { |
0b9afede AW |
229 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " |
230 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
231 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
563aaf06 | 232 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede | 233 | } |
563aaf06 JB |
234 | io_tlb_end = io_tlb_start + bytes; |
235 | memset(io_tlb_start, 0, bytes); | |
0b9afede AW |
236 | |
237 | /* | |
238 | * Allocate and initialize the free list array. This array is used | |
239 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
240 | * between io_tlb_start and io_tlb_end. | |
241 | */ | |
242 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
243 | get_order(io_tlb_nslabs * sizeof(int))); | |
244 | if (!io_tlb_list) | |
245 | goto cleanup2; | |
246 | ||
247 | for (i = 0; i < io_tlb_nslabs; i++) | |
248 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
249 | io_tlb_index = 0; | |
250 | ||
bc40ac66 BB |
251 | io_tlb_orig_addr = (phys_addr_t *) |
252 | __get_free_pages(GFP_KERNEL, | |
253 | get_order(io_tlb_nslabs * | |
254 | sizeof(phys_addr_t))); | |
0b9afede AW |
255 | if (!io_tlb_orig_addr) |
256 | goto cleanup3; | |
257 | ||
bc40ac66 | 258 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t)); |
0b9afede AW |
259 | |
260 | /* | |
261 | * Get the overflow emergency buffer | |
262 | */ | |
263 | io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
264 | get_order(io_tlb_overflow)); | |
265 | if (!io_tlb_overflow_buffer) | |
266 | goto cleanup4; | |
267 | ||
ad32e8cb | 268 | swiotlb_print_info(); |
0b9afede | 269 | |
5740afdb FT |
270 | late_alloc = 1; |
271 | ||
0b9afede AW |
272 | return 0; |
273 | ||
274 | cleanup4: | |
bc40ac66 BB |
275 | free_pages((unsigned long)io_tlb_orig_addr, |
276 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
0b9afede AW |
277 | io_tlb_orig_addr = NULL; |
278 | cleanup3: | |
25667d67 TL |
279 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
280 | sizeof(int))); | |
0b9afede | 281 | io_tlb_list = NULL; |
0b9afede | 282 | cleanup2: |
563aaf06 | 283 | io_tlb_end = NULL; |
0b9afede AW |
284 | free_pages((unsigned long)io_tlb_start, order); |
285 | io_tlb_start = NULL; | |
286 | cleanup1: | |
287 | io_tlb_nslabs = req_nslabs; | |
288 | return -ENOMEM; | |
289 | } | |
290 | ||
5740afdb FT |
291 | void __init swiotlb_free(void) |
292 | { | |
293 | if (!io_tlb_overflow_buffer) | |
294 | return; | |
295 | ||
296 | if (late_alloc) { | |
297 | free_pages((unsigned long)io_tlb_overflow_buffer, | |
298 | get_order(io_tlb_overflow)); | |
299 | free_pages((unsigned long)io_tlb_orig_addr, | |
300 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
301 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
302 | sizeof(int))); | |
303 | free_pages((unsigned long)io_tlb_start, | |
304 | get_order(io_tlb_nslabs << IO_TLB_SHIFT)); | |
305 | } else { | |
306 | free_bootmem_late(__pa(io_tlb_overflow_buffer), | |
307 | io_tlb_overflow); | |
308 | free_bootmem_late(__pa(io_tlb_orig_addr), | |
309 | io_tlb_nslabs * sizeof(phys_addr_t)); | |
310 | free_bootmem_late(__pa(io_tlb_list), | |
311 | io_tlb_nslabs * sizeof(int)); | |
312 | free_bootmem_late(__pa(io_tlb_start), | |
313 | io_tlb_nslabs << IO_TLB_SHIFT); | |
314 | } | |
315 | } | |
316 | ||
02ca646e | 317 | static int is_swiotlb_buffer(phys_addr_t paddr) |
640aebfe | 318 | { |
02ca646e FT |
319 | return paddr >= virt_to_phys(io_tlb_start) && |
320 | paddr < virt_to_phys(io_tlb_end); | |
640aebfe FT |
321 | } |
322 | ||
fb05a379 BB |
323 | /* |
324 | * Bounce: copy the swiotlb buffer back to the original dma location | |
325 | */ | |
326 | static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size, | |
327 | enum dma_data_direction dir) | |
328 | { | |
329 | unsigned long pfn = PFN_DOWN(phys); | |
330 | ||
331 | if (PageHighMem(pfn_to_page(pfn))) { | |
332 | /* The buffer does not have a mapping. Map it in and copy */ | |
333 | unsigned int offset = phys & ~PAGE_MASK; | |
334 | char *buffer; | |
335 | unsigned int sz = 0; | |
336 | unsigned long flags; | |
337 | ||
338 | while (size) { | |
67131ad0 | 339 | sz = min_t(size_t, PAGE_SIZE - offset, size); |
fb05a379 BB |
340 | |
341 | local_irq_save(flags); | |
342 | buffer = kmap_atomic(pfn_to_page(pfn), | |
343 | KM_BOUNCE_READ); | |
344 | if (dir == DMA_TO_DEVICE) | |
345 | memcpy(dma_addr, buffer + offset, sz); | |
ef9b1893 | 346 | else |
fb05a379 BB |
347 | memcpy(buffer + offset, dma_addr, sz); |
348 | kunmap_atomic(buffer, KM_BOUNCE_READ); | |
ef9b1893 | 349 | local_irq_restore(flags); |
fb05a379 BB |
350 | |
351 | size -= sz; | |
352 | pfn++; | |
353 | dma_addr += sz; | |
354 | offset = 0; | |
ef9b1893 JF |
355 | } |
356 | } else { | |
ef9b1893 | 357 | if (dir == DMA_TO_DEVICE) |
fb05a379 | 358 | memcpy(dma_addr, phys_to_virt(phys), size); |
ef9b1893 | 359 | else |
fb05a379 | 360 | memcpy(phys_to_virt(phys), dma_addr, size); |
ef9b1893 | 361 | } |
1b548f66 JF |
362 | } |
363 | ||
1da177e4 LT |
364 | /* |
365 | * Allocates bounce buffer and returns its kernel virtual address. | |
366 | */ | |
367 | static void * | |
bc40ac66 | 368 | map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir) |
1da177e4 LT |
369 | { |
370 | unsigned long flags; | |
371 | char *dma_addr; | |
372 | unsigned int nslots, stride, index, wrap; | |
373 | int i; | |
681cc5cd FT |
374 | unsigned long start_dma_addr; |
375 | unsigned long mask; | |
376 | unsigned long offset_slots; | |
377 | unsigned long max_slots; | |
378 | ||
379 | mask = dma_get_seg_boundary(hwdev); | |
70a7d3cc | 380 | start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask; |
681cc5cd FT |
381 | |
382 | offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
a5ddde4a IC |
383 | |
384 | /* | |
385 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
386 | */ | |
b15a3891 JB |
387 | max_slots = mask + 1 |
388 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
389 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
1da177e4 LT |
390 | |
391 | /* | |
392 | * For mappings greater than a page, we limit the stride (and | |
393 | * hence alignment) to a page size. | |
394 | */ | |
395 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
396 | if (size > PAGE_SIZE) | |
397 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
398 | else | |
399 | stride = 1; | |
400 | ||
34814545 | 401 | BUG_ON(!nslots); |
1da177e4 LT |
402 | |
403 | /* | |
404 | * Find suitable number of IO TLB entries size that will fit this | |
405 | * request and allocate a buffer from that IO TLB pool. | |
406 | */ | |
407 | spin_lock_irqsave(&io_tlb_lock, flags); | |
a7133a15 AM |
408 | index = ALIGN(io_tlb_index, stride); |
409 | if (index >= io_tlb_nslabs) | |
410 | index = 0; | |
411 | wrap = index; | |
412 | ||
413 | do { | |
a8522509 FT |
414 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
415 | max_slots)) { | |
b15a3891 JB |
416 | index += stride; |
417 | if (index >= io_tlb_nslabs) | |
418 | index = 0; | |
a7133a15 AM |
419 | if (index == wrap) |
420 | goto not_found; | |
421 | } | |
422 | ||
423 | /* | |
424 | * If we find a slot that indicates we have 'nslots' number of | |
425 | * contiguous buffers, we allocate the buffers from that slot | |
426 | * and mark the entries as '0' indicating unavailable. | |
427 | */ | |
428 | if (io_tlb_list[index] >= nslots) { | |
429 | int count = 0; | |
430 | ||
431 | for (i = index; i < (int) (index + nslots); i++) | |
432 | io_tlb_list[i] = 0; | |
433 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
434 | io_tlb_list[i] = ++count; | |
435 | dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
1da177e4 | 436 | |
a7133a15 AM |
437 | /* |
438 | * Update the indices to avoid searching in the next | |
439 | * round. | |
440 | */ | |
441 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
442 | ? (index + nslots) : 0); | |
443 | ||
444 | goto found; | |
445 | } | |
446 | index += stride; | |
447 | if (index >= io_tlb_nslabs) | |
448 | index = 0; | |
449 | } while (index != wrap); | |
450 | ||
451 | not_found: | |
452 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
453 | return NULL; | |
454 | found: | |
1da177e4 LT |
455 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
456 | ||
457 | /* | |
458 | * Save away the mapping from the original address to the DMA address. | |
459 | * This is needed when we sync the memory. Then we sync the buffer if | |
460 | * needed. | |
461 | */ | |
bc40ac66 BB |
462 | for (i = 0; i < nslots; i++) |
463 | io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT); | |
1da177e4 | 464 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
fb05a379 | 465 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
1da177e4 LT |
466 | |
467 | return dma_addr; | |
468 | } | |
469 | ||
470 | /* | |
471 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
472 | */ | |
473 | static void | |
7fcebbd2 | 474 | do_unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) |
1da177e4 LT |
475 | { |
476 | unsigned long flags; | |
477 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
478 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
bc40ac66 | 479 | phys_addr_t phys = io_tlb_orig_addr[index]; |
1da177e4 LT |
480 | |
481 | /* | |
482 | * First, sync the memory before unmapping the entry | |
483 | */ | |
bc40ac66 | 484 | if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
fb05a379 | 485 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
1da177e4 LT |
486 | |
487 | /* | |
488 | * Return the buffer to the free list by setting the corresponding | |
af901ca1 | 489 | * entries to indicate the number of contiguous entries available. |
1da177e4 LT |
490 | * While returning the entries to the free list, we merge the entries |
491 | * with slots below and above the pool being returned. | |
492 | */ | |
493 | spin_lock_irqsave(&io_tlb_lock, flags); | |
494 | { | |
495 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
496 | io_tlb_list[index + nslots] : 0); | |
497 | /* | |
498 | * Step 1: return the slots to the free list, merging the | |
499 | * slots with superceeding slots | |
500 | */ | |
501 | for (i = index + nslots - 1; i >= index; i--) | |
502 | io_tlb_list[i] = ++count; | |
503 | /* | |
504 | * Step 2: merge the returned slots with the preceding slots, | |
505 | * if available (non zero) | |
506 | */ | |
507 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
508 | io_tlb_list[i] = ++count; | |
509 | } | |
510 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
511 | } | |
512 | ||
513 | static void | |
de69e0f0 JL |
514 | sync_single(struct device *hwdev, char *dma_addr, size_t size, |
515 | int dir, int target) | |
1da177e4 | 516 | { |
bc40ac66 BB |
517 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; |
518 | phys_addr_t phys = io_tlb_orig_addr[index]; | |
519 | ||
520 | phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); | |
df336d1c | 521 | |
de69e0f0 JL |
522 | switch (target) { |
523 | case SYNC_FOR_CPU: | |
524 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 525 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
34814545 ES |
526 | else |
527 | BUG_ON(dir != DMA_TO_DEVICE); | |
de69e0f0 JL |
528 | break; |
529 | case SYNC_FOR_DEVICE: | |
530 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 531 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
34814545 ES |
532 | else |
533 | BUG_ON(dir != DMA_FROM_DEVICE); | |
de69e0f0 JL |
534 | break; |
535 | default: | |
1da177e4 | 536 | BUG(); |
de69e0f0 | 537 | } |
1da177e4 LT |
538 | } |
539 | ||
540 | void * | |
541 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
06a54497 | 542 | dma_addr_t *dma_handle, gfp_t flags) |
1da177e4 | 543 | { |
563aaf06 | 544 | dma_addr_t dev_addr; |
1da177e4 LT |
545 | void *ret; |
546 | int order = get_order(size); | |
284901a9 | 547 | u64 dma_mask = DMA_BIT_MASK(32); |
1e74f300 FT |
548 | |
549 | if (hwdev && hwdev->coherent_dma_mask) | |
550 | dma_mask = hwdev->coherent_dma_mask; | |
1da177e4 | 551 | |
25667d67 | 552 | ret = (void *)__get_free_pages(flags, order); |
ac2b3e67 | 553 | if (ret && swiotlb_virt_to_bus(hwdev, ret) + size - 1 > dma_mask) { |
1da177e4 LT |
554 | /* |
555 | * The allocated memory isn't reachable by the device. | |
1da177e4 LT |
556 | */ |
557 | free_pages((unsigned long) ret, order); | |
558 | ret = NULL; | |
559 | } | |
560 | if (!ret) { | |
561 | /* | |
562 | * We are either out of memory or the device can't DMA | |
ceb5ac32 BB |
563 | * to GFP_DMA memory; fall back on map_single(), which |
564 | * will grab memory from the lowest available address range. | |
1da177e4 | 565 | */ |
bc40ac66 | 566 | ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE); |
9dfda12b | 567 | if (!ret) |
1da177e4 | 568 | return NULL; |
1da177e4 LT |
569 | } |
570 | ||
571 | memset(ret, 0, size); | |
70a7d3cc | 572 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); |
1da177e4 LT |
573 | |
574 | /* Confirm address can be DMA'd by device */ | |
ac2b3e67 | 575 | if (dev_addr + size - 1 > dma_mask) { |
563aaf06 | 576 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", |
1e74f300 | 577 | (unsigned long long)dma_mask, |
563aaf06 | 578 | (unsigned long long)dev_addr); |
a2b89b59 FT |
579 | |
580 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
7fcebbd2 | 581 | do_unmap_single(hwdev, ret, size, DMA_TO_DEVICE); |
a2b89b59 | 582 | return NULL; |
1da177e4 LT |
583 | } |
584 | *dma_handle = dev_addr; | |
585 | return ret; | |
586 | } | |
874d6a95 | 587 | EXPORT_SYMBOL(swiotlb_alloc_coherent); |
1da177e4 LT |
588 | |
589 | void | |
590 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
02ca646e | 591 | dma_addr_t dev_addr) |
1da177e4 | 592 | { |
862d196b | 593 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
02ca646e | 594 | |
aa24886e | 595 | WARN_ON(irqs_disabled()); |
02ca646e FT |
596 | if (!is_swiotlb_buffer(paddr)) |
597 | free_pages((unsigned long)vaddr, get_order(size)); | |
1da177e4 LT |
598 | else |
599 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
7fcebbd2 | 600 | do_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); |
1da177e4 | 601 | } |
874d6a95 | 602 | EXPORT_SYMBOL(swiotlb_free_coherent); |
1da177e4 LT |
603 | |
604 | static void | |
605 | swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) | |
606 | { | |
607 | /* | |
608 | * Ran out of IOMMU space for this operation. This is very bad. | |
609 | * Unfortunately the drivers cannot handle this operation properly. | |
17e5ad6c | 610 | * unless they check for dma_mapping_error (most don't) |
1da177e4 LT |
611 | * When the mapping is small enough return a static buffer to limit |
612 | * the damage, or panic when the transfer is too big. | |
613 | */ | |
563aaf06 | 614 | printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " |
94b32486 | 615 | "device %s\n", size, dev ? dev_name(dev) : "?"); |
1da177e4 | 616 | |
c7084b35 CD |
617 | if (size <= io_tlb_overflow || !do_panic) |
618 | return; | |
619 | ||
620 | if (dir == DMA_BIDIRECTIONAL) | |
621 | panic("DMA: Random memory could be DMA accessed\n"); | |
622 | if (dir == DMA_FROM_DEVICE) | |
623 | panic("DMA: Random memory could be DMA written\n"); | |
624 | if (dir == DMA_TO_DEVICE) | |
625 | panic("DMA: Random memory could be DMA read\n"); | |
1da177e4 LT |
626 | } |
627 | ||
628 | /* | |
629 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
17e5ad6c | 630 | * physical address to use is returned. |
1da177e4 LT |
631 | * |
632 | * Once the device is given the dma address, the device owns this memory until | |
ceb5ac32 | 633 | * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. |
1da177e4 | 634 | */ |
f98eee8e FT |
635 | dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, |
636 | unsigned long offset, size_t size, | |
637 | enum dma_data_direction dir, | |
638 | struct dma_attrs *attrs) | |
1da177e4 | 639 | { |
f98eee8e | 640 | phys_addr_t phys = page_to_phys(page) + offset; |
862d196b | 641 | dma_addr_t dev_addr = phys_to_dma(dev, phys); |
1da177e4 LT |
642 | void *map; |
643 | ||
34814545 | 644 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 645 | /* |
ceb5ac32 | 646 | * If the address happens to be in the device's DMA window, |
1da177e4 LT |
647 | * we can safely return the device addr and not worry about bounce |
648 | * buffering it. | |
649 | */ | |
b9394647 | 650 | if (dma_capable(dev, dev_addr, size) && !swiotlb_force) |
1da177e4 LT |
651 | return dev_addr; |
652 | ||
653 | /* | |
654 | * Oh well, have to allocate and map a bounce buffer. | |
655 | */ | |
f98eee8e | 656 | map = map_single(dev, phys, size, dir); |
1da177e4 | 657 | if (!map) { |
f98eee8e | 658 | swiotlb_full(dev, size, dir, 1); |
1da177e4 LT |
659 | map = io_tlb_overflow_buffer; |
660 | } | |
661 | ||
f98eee8e | 662 | dev_addr = swiotlb_virt_to_bus(dev, map); |
1da177e4 LT |
663 | |
664 | /* | |
665 | * Ensure that the address returned is DMA'ble | |
666 | */ | |
b9394647 | 667 | if (!dma_capable(dev, dev_addr, size)) |
1da177e4 LT |
668 | panic("map_single: bounce buffer is not DMA'ble"); |
669 | ||
670 | return dev_addr; | |
671 | } | |
f98eee8e | 672 | EXPORT_SYMBOL_GPL(swiotlb_map_page); |
1da177e4 | 673 | |
1da177e4 LT |
674 | /* |
675 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
ceb5ac32 | 676 | * match what was provided for in a previous swiotlb_map_page call. All |
1da177e4 LT |
677 | * other usages are undefined. |
678 | * | |
679 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
680 | * whatever the device wrote there. | |
681 | */ | |
7fcebbd2 BB |
682 | static void unmap_single(struct device *hwdev, dma_addr_t dev_addr, |
683 | size_t size, int dir) | |
1da177e4 | 684 | { |
862d196b | 685 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
1da177e4 | 686 | |
34814545 | 687 | BUG_ON(dir == DMA_NONE); |
7fcebbd2 | 688 | |
02ca646e FT |
689 | if (is_swiotlb_buffer(paddr)) { |
690 | do_unmap_single(hwdev, phys_to_virt(paddr), size, dir); | |
7fcebbd2 BB |
691 | return; |
692 | } | |
693 | ||
694 | if (dir != DMA_FROM_DEVICE) | |
695 | return; | |
696 | ||
02ca646e FT |
697 | /* |
698 | * phys_to_virt doesn't work with hihgmem page but we could | |
699 | * call dma_mark_clean() with hihgmem page here. However, we | |
700 | * are fine since dma_mark_clean() is null on POWERPC. We can | |
701 | * make dma_mark_clean() take a physical address if necessary. | |
702 | */ | |
703 | dma_mark_clean(phys_to_virt(paddr), size); | |
7fcebbd2 BB |
704 | } |
705 | ||
706 | void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, | |
707 | size_t size, enum dma_data_direction dir, | |
708 | struct dma_attrs *attrs) | |
709 | { | |
710 | unmap_single(hwdev, dev_addr, size, dir); | |
1da177e4 | 711 | } |
f98eee8e | 712 | EXPORT_SYMBOL_GPL(swiotlb_unmap_page); |
874d6a95 | 713 | |
1da177e4 LT |
714 | /* |
715 | * Make physical memory consistent for a single streaming mode DMA translation | |
716 | * after a transfer. | |
717 | * | |
ceb5ac32 | 718 | * If you perform a swiotlb_map_page() but wish to interrogate the buffer |
17e5ad6c TL |
719 | * using the cpu, yet do not wish to teardown the dma mapping, you must |
720 | * call this function before doing so. At the next point you give the dma | |
1da177e4 LT |
721 | * address back to the card, you must first perform a |
722 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
723 | */ | |
be6b0267 | 724 | static void |
8270f3f1 | 725 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 | 726 | size_t size, int dir, int target) |
1da177e4 | 727 | { |
862d196b | 728 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
1da177e4 | 729 | |
34814545 | 730 | BUG_ON(dir == DMA_NONE); |
380d6878 | 731 | |
02ca646e FT |
732 | if (is_swiotlb_buffer(paddr)) { |
733 | sync_single(hwdev, phys_to_virt(paddr), size, dir, target); | |
380d6878 BB |
734 | return; |
735 | } | |
736 | ||
737 | if (dir != DMA_FROM_DEVICE) | |
738 | return; | |
739 | ||
02ca646e | 740 | dma_mark_clean(phys_to_virt(paddr), size); |
1da177e4 LT |
741 | } |
742 | ||
8270f3f1 JL |
743 | void |
744 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 745 | size_t size, enum dma_data_direction dir) |
8270f3f1 | 746 | { |
de69e0f0 | 747 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); |
8270f3f1 | 748 | } |
874d6a95 | 749 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); |
8270f3f1 | 750 | |
1da177e4 LT |
751 | void |
752 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 753 | size_t size, enum dma_data_direction dir) |
1da177e4 | 754 | { |
de69e0f0 | 755 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); |
1da177e4 | 756 | } |
874d6a95 | 757 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); |
1da177e4 | 758 | |
878a97cf JL |
759 | /* |
760 | * Same as above, but for a sub-range of the mapping. | |
761 | */ | |
be6b0267 | 762 | static void |
878a97cf | 763 | swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 JL |
764 | unsigned long offset, size_t size, |
765 | int dir, int target) | |
878a97cf | 766 | { |
380d6878 | 767 | swiotlb_sync_single(hwdev, dev_addr + offset, size, dir, target); |
878a97cf JL |
768 | } |
769 | ||
770 | void | |
771 | swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e FT |
772 | unsigned long offset, size_t size, |
773 | enum dma_data_direction dir) | |
878a97cf | 774 | { |
de69e0f0 JL |
775 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
776 | SYNC_FOR_CPU); | |
878a97cf | 777 | } |
874d6a95 | 778 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu); |
878a97cf JL |
779 | |
780 | void | |
781 | swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e FT |
782 | unsigned long offset, size_t size, |
783 | enum dma_data_direction dir) | |
878a97cf | 784 | { |
de69e0f0 JL |
785 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
786 | SYNC_FOR_DEVICE); | |
878a97cf | 787 | } |
874d6a95 | 788 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device); |
878a97cf | 789 | |
1da177e4 LT |
790 | /* |
791 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
ceb5ac32 | 792 | * This is the scatter-gather version of the above swiotlb_map_page |
1da177e4 LT |
793 | * interface. Here the scatter gather list elements are each tagged with the |
794 | * appropriate dma address and length. They are obtained via | |
795 | * sg_dma_{address,length}(SG). | |
796 | * | |
797 | * NOTE: An implementation may be able to use a smaller number of | |
798 | * DMA address/length pairs than there are SG table elements. | |
799 | * (for example via virtual mapping capabilities) | |
800 | * The routine returns the number of addr/length pairs actually | |
801 | * used, at most nents. | |
802 | * | |
ceb5ac32 | 803 | * Device ownership issues as mentioned above for swiotlb_map_page are the |
1da177e4 LT |
804 | * same here. |
805 | */ | |
806 | int | |
309df0c5 | 807 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, |
160c1d8e | 808 | enum dma_data_direction dir, struct dma_attrs *attrs) |
1da177e4 | 809 | { |
dbfd49fe | 810 | struct scatterlist *sg; |
1da177e4 LT |
811 | int i; |
812 | ||
34814545 | 813 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 814 | |
dbfd49fe | 815 | for_each_sg(sgl, sg, nelems, i) { |
961d7d0e | 816 | phys_addr_t paddr = sg_phys(sg); |
862d196b | 817 | dma_addr_t dev_addr = phys_to_dma(hwdev, paddr); |
bc40ac66 | 818 | |
cf56e3f2 | 819 | if (swiotlb_force || |
b9394647 | 820 | !dma_capable(hwdev, dev_addr, sg->length)) { |
bc40ac66 BB |
821 | void *map = map_single(hwdev, sg_phys(sg), |
822 | sg->length, dir); | |
7e870233 | 823 | if (!map) { |
1da177e4 LT |
824 | /* Don't panic here, we expect map_sg users |
825 | to do proper error handling. */ | |
826 | swiotlb_full(hwdev, sg->length, dir, 0); | |
309df0c5 AK |
827 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
828 | attrs); | |
dbfd49fe | 829 | sgl[0].dma_length = 0; |
1da177e4 LT |
830 | return 0; |
831 | } | |
70a7d3cc | 832 | sg->dma_address = swiotlb_virt_to_bus(hwdev, map); |
1da177e4 LT |
833 | } else |
834 | sg->dma_address = dev_addr; | |
835 | sg->dma_length = sg->length; | |
836 | } | |
837 | return nelems; | |
838 | } | |
309df0c5 AK |
839 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); |
840 | ||
841 | int | |
842 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
843 | int dir) | |
844 | { | |
845 | return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
846 | } | |
874d6a95 | 847 | EXPORT_SYMBOL(swiotlb_map_sg); |
1da177e4 LT |
848 | |
849 | /* | |
850 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
ceb5ac32 | 851 | * concerning calls here are the same as for swiotlb_unmap_page() above. |
1da177e4 LT |
852 | */ |
853 | void | |
309df0c5 | 854 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
160c1d8e | 855 | int nelems, enum dma_data_direction dir, struct dma_attrs *attrs) |
1da177e4 | 856 | { |
dbfd49fe | 857 | struct scatterlist *sg; |
1da177e4 LT |
858 | int i; |
859 | ||
34814545 | 860 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 861 | |
7fcebbd2 BB |
862 | for_each_sg(sgl, sg, nelems, i) |
863 | unmap_single(hwdev, sg->dma_address, sg->dma_length, dir); | |
864 | ||
1da177e4 | 865 | } |
309df0c5 AK |
866 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); |
867 | ||
868 | void | |
869 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
870 | int dir) | |
871 | { | |
872 | return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
873 | } | |
874d6a95 | 874 | EXPORT_SYMBOL(swiotlb_unmap_sg); |
1da177e4 LT |
875 | |
876 | /* | |
877 | * Make physical memory consistent for a set of streaming mode DMA translations | |
878 | * after a transfer. | |
879 | * | |
880 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
881 | * and usage. | |
882 | */ | |
be6b0267 | 883 | static void |
dbfd49fe | 884 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, |
de69e0f0 | 885 | int nelems, int dir, int target) |
1da177e4 | 886 | { |
dbfd49fe | 887 | struct scatterlist *sg; |
1da177e4 LT |
888 | int i; |
889 | ||
380d6878 BB |
890 | for_each_sg(sgl, sg, nelems, i) |
891 | swiotlb_sync_single(hwdev, sg->dma_address, | |
de69e0f0 | 892 | sg->dma_length, dir, target); |
1da177e4 LT |
893 | } |
894 | ||
8270f3f1 JL |
895 | void |
896 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 897 | int nelems, enum dma_data_direction dir) |
8270f3f1 | 898 | { |
de69e0f0 | 899 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); |
8270f3f1 | 900 | } |
874d6a95 | 901 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); |
8270f3f1 | 902 | |
1da177e4 LT |
903 | void |
904 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 905 | int nelems, enum dma_data_direction dir) |
1da177e4 | 906 | { |
de69e0f0 | 907 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); |
1da177e4 | 908 | } |
874d6a95 | 909 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); |
1da177e4 LT |
910 | |
911 | int | |
8d8bb39b | 912 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) |
1da177e4 | 913 | { |
70a7d3cc | 914 | return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer)); |
1da177e4 | 915 | } |
874d6a95 | 916 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); |
1da177e4 LT |
917 | |
918 | /* | |
17e5ad6c | 919 | * Return whether the given device DMA address mask can be supported |
1da177e4 | 920 | * properly. For example, if your device can only drive the low 24-bits |
17e5ad6c | 921 | * during bus mastering, then you would pass 0x00ffffff as the mask to |
1da177e4 LT |
922 | * this function. |
923 | */ | |
924 | int | |
563aaf06 | 925 | swiotlb_dma_supported(struct device *hwdev, u64 mask) |
1da177e4 | 926 | { |
70a7d3cc | 927 | return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask; |
1da177e4 | 928 | } |
1da177e4 | 929 | EXPORT_SYMBOL(swiotlb_dma_supported); |