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1da177e4
LT
1/*
2 * Dynamic DMA mapping support.
3 *
563aaf06 4 * This implementation is a fallback for platforms that do not support
1da177e4
LT
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
569c8bf5
JL
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
1da177e4
LT
17 */
18
19#include <linux/cache.h>
17e5ad6c 20#include <linux/dma-mapping.h>
1da177e4
LT
21#include <linux/mm.h>
22#include <linux/module.h>
1da177e4
LT
23#include <linux/spinlock.h>
24#include <linux/string.h>
25#include <linux/types.h>
26#include <linux/ctype.h>
27
28#include <asm/io.h>
1da177e4 29#include <asm/dma.h>
17e5ad6c 30#include <asm/scatterlist.h>
1da177e4
LT
31
32#include <linux/init.h>
33#include <linux/bootmem.h>
34
35#define OFFSET(val,align) ((unsigned long) \
36 ( (val) & ( (align) - 1)))
37
38#define SG_ENT_VIRT_ADDRESS(sg) (page_address((sg)->page) + (sg)->offset)
93fbff63 39#define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
1da177e4
LT
40
41/*
42 * Maximum allowable number of contiguous slabs to map,
43 * must be a power of 2. What is the appropriate value ?
44 * The complexity of {map,unmap}_single is linearly dependent on this value.
45 */
46#define IO_TLB_SEGSIZE 128
47
48/*
49 * log of the size of each IO TLB slab. The number of slabs is command line
50 * controllable.
51 */
52#define IO_TLB_SHIFT 11
53
0b9afede
AW
54#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
55
56/*
57 * Minimum IO TLB size to bother booting with. Systems with mainly
58 * 64bit capable cards will only lightly use the swiotlb. If we can't
59 * allocate a contiguous 1MB, we're probably in trouble anyway.
60 */
61#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
62
de69e0f0
JL
63/*
64 * Enumeration for sync targets
65 */
66enum dma_sync_target {
67 SYNC_FOR_CPU = 0,
68 SYNC_FOR_DEVICE = 1,
69};
70
1da177e4
LT
71int swiotlb_force;
72
73/*
74 * Used to do a quick range check in swiotlb_unmap_single and
75 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
76 * API.
77 */
78static char *io_tlb_start, *io_tlb_end;
79
80/*
81 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
82 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
83 */
84static unsigned long io_tlb_nslabs;
85
86/*
87 * When the IOMMU overflows we return a fallback buffer. This sets the size.
88 */
89static unsigned long io_tlb_overflow = 32*1024;
90
91void *io_tlb_overflow_buffer;
92
93/*
94 * This is a free list describing the number of free entries available from
95 * each index
96 */
97static unsigned int *io_tlb_list;
98static unsigned int io_tlb_index;
99
100/*
101 * We need to save away the original address corresponding to a mapped entry
102 * for the sync operations.
103 */
25667d67 104static unsigned char **io_tlb_orig_addr;
1da177e4
LT
105
106/*
107 * Protect the above data structures in the map and unmap calls
108 */
109static DEFINE_SPINLOCK(io_tlb_lock);
110
111static int __init
112setup_io_tlb_npages(char *str)
113{
114 if (isdigit(*str)) {
e8579e72 115 io_tlb_nslabs = simple_strtoul(str, &str, 0);
1da177e4
LT
116 /* avoid tail segment of size < IO_TLB_SEGSIZE */
117 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
118 }
119 if (*str == ',')
120 ++str;
121 if (!strcmp(str, "force"))
122 swiotlb_force = 1;
123 return 1;
124}
125__setup("swiotlb=", setup_io_tlb_npages);
126/* make io_tlb_overflow tunable too? */
127
128/*
129 * Statically reserve bounce buffer space and initialize bounce buffer data
17e5ad6c 130 * structures for the software IO TLB used to implement the DMA API.
1da177e4 131 */
563aaf06
JB
132void __init
133swiotlb_init_with_default_size(size_t default_size)
1da177e4 134{
563aaf06 135 unsigned long i, bytes;
1da177e4
LT
136
137 if (!io_tlb_nslabs) {
e8579e72 138 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
1da177e4
LT
139 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
140 }
141
563aaf06
JB
142 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
143
1da177e4
LT
144 /*
145 * Get IO TLB memory from the low pages
146 */
563aaf06 147 io_tlb_start = alloc_bootmem_low_pages(bytes);
1da177e4
LT
148 if (!io_tlb_start)
149 panic("Cannot allocate SWIOTLB buffer");
563aaf06 150 io_tlb_end = io_tlb_start + bytes;
1da177e4
LT
151
152 /*
153 * Allocate and initialize the free list array. This array is used
154 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
155 * between io_tlb_start and io_tlb_end.
156 */
157 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
25667d67 158 for (i = 0; i < io_tlb_nslabs; i++)
1da177e4
LT
159 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
160 io_tlb_index = 0;
25667d67 161 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
1da177e4
LT
162
163 /*
164 * Get the overflow emergency buffer
165 */
166 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
563aaf06
JB
167 if (!io_tlb_overflow_buffer)
168 panic("Cannot allocate SWIOTLB overflow buffer!\n");
169
25667d67
TL
170 printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
171 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
1da177e4
LT
172}
173
563aaf06
JB
174void __init
175swiotlb_init(void)
1da177e4 176{
25667d67 177 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
1da177e4
LT
178}
179
0b9afede
AW
180/*
181 * Systems with larger DMA zones (those that don't support ISA) can
182 * initialize the swiotlb later using the slab allocator if needed.
183 * This should be just like above, but with some error catching.
184 */
185int
563aaf06 186swiotlb_late_init_with_default_size(size_t default_size)
0b9afede 187{
563aaf06 188 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
0b9afede
AW
189 unsigned int order;
190
191 if (!io_tlb_nslabs) {
192 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
193 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
194 }
195
196 /*
197 * Get IO TLB memory from the low pages
198 */
563aaf06 199 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
0b9afede 200 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 201 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede
AW
202
203 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
204 io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
205 order);
206 if (io_tlb_start)
207 break;
208 order--;
209 }
210
211 if (!io_tlb_start)
212 goto cleanup1;
213
563aaf06 214 if (order != get_order(bytes)) {
0b9afede
AW
215 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
216 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
217 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 218 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede 219 }
563aaf06
JB
220 io_tlb_end = io_tlb_start + bytes;
221 memset(io_tlb_start, 0, bytes);
0b9afede
AW
222
223 /*
224 * Allocate and initialize the free list array. This array is used
225 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
226 * between io_tlb_start and io_tlb_end.
227 */
228 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
229 get_order(io_tlb_nslabs * sizeof(int)));
230 if (!io_tlb_list)
231 goto cleanup2;
232
233 for (i = 0; i < io_tlb_nslabs; i++)
234 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
235 io_tlb_index = 0;
236
25667d67
TL
237 io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
238 get_order(io_tlb_nslabs * sizeof(char *)));
0b9afede
AW
239 if (!io_tlb_orig_addr)
240 goto cleanup3;
241
25667d67 242 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
0b9afede
AW
243
244 /*
245 * Get the overflow emergency buffer
246 */
247 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
248 get_order(io_tlb_overflow));
249 if (!io_tlb_overflow_buffer)
250 goto cleanup4;
251
25667d67
TL
252 printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
253 "0x%lx\n", bytes >> 20,
254 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
0b9afede
AW
255
256 return 0;
257
258cleanup4:
25667d67
TL
259 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
260 sizeof(char *)));
0b9afede
AW
261 io_tlb_orig_addr = NULL;
262cleanup3:
25667d67
TL
263 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
264 sizeof(int)));
0b9afede 265 io_tlb_list = NULL;
0b9afede 266cleanup2:
563aaf06 267 io_tlb_end = NULL;
0b9afede
AW
268 free_pages((unsigned long)io_tlb_start, order);
269 io_tlb_start = NULL;
270cleanup1:
271 io_tlb_nslabs = req_nslabs;
272 return -ENOMEM;
273}
274
be6b0267 275static int
1da177e4
LT
276address_needs_mapping(struct device *hwdev, dma_addr_t addr)
277{
278 dma_addr_t mask = 0xffffffff;
279 /* If the device has a mask, use it, otherwise default to 32 bits */
280 if (hwdev && hwdev->dma_mask)
281 mask = *hwdev->dma_mask;
282 return (addr & ~mask) != 0;
283}
284
285/*
286 * Allocates bounce buffer and returns its kernel virtual address.
287 */
288static void *
25667d67 289map_single(struct device *hwdev, char *buffer, size_t size, int dir)
1da177e4
LT
290{
291 unsigned long flags;
292 char *dma_addr;
293 unsigned int nslots, stride, index, wrap;
294 int i;
295
296 /*
297 * For mappings greater than a page, we limit the stride (and
298 * hence alignment) to a page size.
299 */
300 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
301 if (size > PAGE_SIZE)
302 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
303 else
304 stride = 1;
305
34814545 306 BUG_ON(!nslots);
1da177e4
LT
307
308 /*
309 * Find suitable number of IO TLB entries size that will fit this
310 * request and allocate a buffer from that IO TLB pool.
311 */
312 spin_lock_irqsave(&io_tlb_lock, flags);
313 {
314 wrap = index = ALIGN(io_tlb_index, stride);
315
316 if (index >= io_tlb_nslabs)
317 wrap = index = 0;
318
319 do {
320 /*
321 * If we find a slot that indicates we have 'nslots'
322 * number of contiguous buffers, we allocate the
323 * buffers from that slot and mark the entries as '0'
324 * indicating unavailable.
325 */
326 if (io_tlb_list[index] >= nslots) {
327 int count = 0;
328
329 for (i = index; i < (int) (index + nslots); i++)
330 io_tlb_list[i] = 0;
331 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
332 io_tlb_list[i] = ++count;
333 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
334
335 /*
336 * Update the indices to avoid searching in
337 * the next round.
338 */
339 io_tlb_index = ((index + nslots) < io_tlb_nslabs
340 ? (index + nslots) : 0);
341
342 goto found;
343 }
344 index += stride;
345 if (index >= io_tlb_nslabs)
346 index = 0;
347 } while (index != wrap);
348
349 spin_unlock_irqrestore(&io_tlb_lock, flags);
350 return NULL;
351 }
352 found:
353 spin_unlock_irqrestore(&io_tlb_lock, flags);
354
355 /*
356 * Save away the mapping from the original address to the DMA address.
357 * This is needed when we sync the memory. Then we sync the buffer if
358 * needed.
359 */
360 io_tlb_orig_addr[index] = buffer;
361 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
25667d67 362 memcpy(dma_addr, buffer, size);
1da177e4
LT
363
364 return dma_addr;
365}
366
367/*
368 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
369 */
370static void
371unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
372{
373 unsigned long flags;
374 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
375 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
25667d67 376 char *buffer = io_tlb_orig_addr[index];
1da177e4
LT
377
378 /*
379 * First, sync the memory before unmapping the entry
380 */
25667d67 381 if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
1da177e4
LT
382 /*
383 * bounce... copy the data back into the original buffer * and
384 * delete the bounce buffer.
385 */
25667d67 386 memcpy(buffer, dma_addr, size);
1da177e4
LT
387
388 /*
389 * Return the buffer to the free list by setting the corresponding
390 * entries to indicate the number of contigous entries available.
391 * While returning the entries to the free list, we merge the entries
392 * with slots below and above the pool being returned.
393 */
394 spin_lock_irqsave(&io_tlb_lock, flags);
395 {
396 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
397 io_tlb_list[index + nslots] : 0);
398 /*
399 * Step 1: return the slots to the free list, merging the
400 * slots with superceeding slots
401 */
402 for (i = index + nslots - 1; i >= index; i--)
403 io_tlb_list[i] = ++count;
404 /*
405 * Step 2: merge the returned slots with the preceding slots,
406 * if available (non zero)
407 */
408 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
409 io_tlb_list[i] = ++count;
410 }
411 spin_unlock_irqrestore(&io_tlb_lock, flags);
412}
413
414static void
de69e0f0
JL
415sync_single(struct device *hwdev, char *dma_addr, size_t size,
416 int dir, int target)
1da177e4
LT
417{
418 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
25667d67 419 char *buffer = io_tlb_orig_addr[index];
1da177e4 420
de69e0f0
JL
421 switch (target) {
422 case SYNC_FOR_CPU:
423 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
25667d67 424 memcpy(buffer, dma_addr, size);
34814545
ES
425 else
426 BUG_ON(dir != DMA_TO_DEVICE);
de69e0f0
JL
427 break;
428 case SYNC_FOR_DEVICE:
429 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
25667d67 430 memcpy(dma_addr, buffer, size);
34814545
ES
431 else
432 BUG_ON(dir != DMA_FROM_DEVICE);
de69e0f0
JL
433 break;
434 default:
1da177e4 435 BUG();
de69e0f0 436 }
1da177e4
LT
437}
438
439void *
440swiotlb_alloc_coherent(struct device *hwdev, size_t size,
06a54497 441 dma_addr_t *dma_handle, gfp_t flags)
1da177e4 442{
563aaf06 443 dma_addr_t dev_addr;
1da177e4
LT
444 void *ret;
445 int order = get_order(size);
446
447 /*
448 * XXX fix me: the DMA API should pass us an explicit DMA mask
449 * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
450 * bit range instead of a 16MB one).
451 */
452 flags |= GFP_DMA;
453
25667d67 454 ret = (void *)__get_free_pages(flags, order);
93fbff63 455 if (ret && address_needs_mapping(hwdev, virt_to_bus(ret))) {
1da177e4
LT
456 /*
457 * The allocated memory isn't reachable by the device.
458 * Fall back on swiotlb_map_single().
459 */
460 free_pages((unsigned long) ret, order);
461 ret = NULL;
462 }
463 if (!ret) {
464 /*
465 * We are either out of memory or the device can't DMA
466 * to GFP_DMA memory; fall back on
467 * swiotlb_map_single(), which will grab memory from
468 * the lowest available address range.
469 */
470 dma_addr_t handle;
471 handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
17a941d8 472 if (swiotlb_dma_mapping_error(handle))
1da177e4
LT
473 return NULL;
474
93fbff63 475 ret = bus_to_virt(handle);
1da177e4
LT
476 }
477
478 memset(ret, 0, size);
93fbff63 479 dev_addr = virt_to_bus(ret);
1da177e4
LT
480
481 /* Confirm address can be DMA'd by device */
482 if (address_needs_mapping(hwdev, dev_addr)) {
563aaf06
JB
483 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
484 (unsigned long long)*hwdev->dma_mask,
485 (unsigned long long)dev_addr);
1da177e4
LT
486 panic("swiotlb_alloc_coherent: allocated memory is out of "
487 "range for device");
488 }
489 *dma_handle = dev_addr;
490 return ret;
491}
492
493void
494swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
495 dma_addr_t dma_handle)
496{
497 if (!(vaddr >= (void *)io_tlb_start
498 && vaddr < (void *)io_tlb_end))
499 free_pages((unsigned long) vaddr, get_order(size));
500 else
501 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
502 swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
503}
504
505static void
506swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
507{
508 /*
509 * Ran out of IOMMU space for this operation. This is very bad.
510 * Unfortunately the drivers cannot handle this operation properly.
17e5ad6c 511 * unless they check for dma_mapping_error (most don't)
1da177e4
LT
512 * When the mapping is small enough return a static buffer to limit
513 * the damage, or panic when the transfer is too big.
514 */
563aaf06 515 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
1da177e4
LT
516 "device %s\n", size, dev ? dev->bus_id : "?");
517
518 if (size > io_tlb_overflow && do_panic) {
17e5ad6c
TL
519 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
520 panic("DMA: Memory would be corrupted\n");
521 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
522 panic("DMA: Random memory would be DMAed\n");
1da177e4
LT
523 }
524}
525
526/*
527 * Map a single buffer of the indicated size for DMA in streaming mode. The
17e5ad6c 528 * physical address to use is returned.
1da177e4
LT
529 *
530 * Once the device is given the dma address, the device owns this memory until
531 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
532 */
533dma_addr_t
534swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
535{
563aaf06 536 dma_addr_t dev_addr = virt_to_bus(ptr);
1da177e4
LT
537 void *map;
538
34814545 539 BUG_ON(dir == DMA_NONE);
1da177e4
LT
540 /*
541 * If the pointer passed in happens to be in the device's DMA window,
542 * we can safely return the device addr and not worry about bounce
543 * buffering it.
544 */
25667d67 545 if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force)
1da177e4
LT
546 return dev_addr;
547
548 /*
549 * Oh well, have to allocate and map a bounce buffer.
550 */
25667d67 551 map = map_single(hwdev, ptr, size, dir);
1da177e4
LT
552 if (!map) {
553 swiotlb_full(hwdev, size, dir, 1);
554 map = io_tlb_overflow_buffer;
555 }
556
93fbff63 557 dev_addr = virt_to_bus(map);
1da177e4
LT
558
559 /*
560 * Ensure that the address returned is DMA'ble
561 */
562 if (address_needs_mapping(hwdev, dev_addr))
563 panic("map_single: bounce buffer is not DMA'ble");
564
565 return dev_addr;
566}
567
1da177e4
LT
568/*
569 * Unmap a single streaming mode DMA translation. The dma_addr and size must
570 * match what was provided for in a previous swiotlb_map_single call. All
571 * other usages are undefined.
572 *
573 * After this call, reads by the cpu to the buffer are guaranteed to see
574 * whatever the device wrote there.
575 */
576void
577swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
578 int dir)
579{
93fbff63 580 char *dma_addr = bus_to_virt(dev_addr);
1da177e4 581
34814545 582 BUG_ON(dir == DMA_NONE);
1da177e4
LT
583 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
584 unmap_single(hwdev, dma_addr, size, dir);
585 else if (dir == DMA_FROM_DEVICE)
cde14bbf 586 dma_mark_clean(dma_addr, size);
1da177e4
LT
587}
588
589/*
590 * Make physical memory consistent for a single streaming mode DMA translation
591 * after a transfer.
592 *
593 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
17e5ad6c
TL
594 * using the cpu, yet do not wish to teardown the dma mapping, you must
595 * call this function before doing so. At the next point you give the dma
1da177e4
LT
596 * address back to the card, you must first perform a
597 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
598 */
be6b0267 599static void
8270f3f1 600swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0 601 size_t size, int dir, int target)
1da177e4 602{
93fbff63 603 char *dma_addr = bus_to_virt(dev_addr);
1da177e4 604
34814545 605 BUG_ON(dir == DMA_NONE);
1da177e4 606 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
de69e0f0 607 sync_single(hwdev, dma_addr, size, dir, target);
1da177e4 608 else if (dir == DMA_FROM_DEVICE)
cde14bbf 609 dma_mark_clean(dma_addr, size);
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LT
610}
611
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612void
613swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
614 size_t size, int dir)
615{
de69e0f0 616 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
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JL
617}
618
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619void
620swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
621 size_t size, int dir)
622{
de69e0f0 623 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
1da177e4
LT
624}
625
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JL
626/*
627 * Same as above, but for a sub-range of the mapping.
628 */
be6b0267 629static void
878a97cf 630swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
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631 unsigned long offset, size_t size,
632 int dir, int target)
878a97cf 633{
93fbff63 634 char *dma_addr = bus_to_virt(dev_addr) + offset;
878a97cf 635
34814545 636 BUG_ON(dir == DMA_NONE);
878a97cf 637 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
de69e0f0 638 sync_single(hwdev, dma_addr, size, dir, target);
878a97cf 639 else if (dir == DMA_FROM_DEVICE)
cde14bbf 640 dma_mark_clean(dma_addr, size);
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JL
641}
642
643void
644swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
645 unsigned long offset, size_t size, int dir)
646{
de69e0f0
JL
647 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
648 SYNC_FOR_CPU);
878a97cf
JL
649}
650
651void
652swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
653 unsigned long offset, size_t size, int dir)
654{
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JL
655 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
656 SYNC_FOR_DEVICE);
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JL
657}
658
1da177e4
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659/*
660 * Map a set of buffers described by scatterlist in streaming mode for DMA.
661 * This is the scatter-gather version of the above swiotlb_map_single
662 * interface. Here the scatter gather list elements are each tagged with the
663 * appropriate dma address and length. They are obtained via
664 * sg_dma_{address,length}(SG).
665 *
666 * NOTE: An implementation may be able to use a smaller number of
667 * DMA address/length pairs than there are SG table elements.
668 * (for example via virtual mapping capabilities)
669 * The routine returns the number of addr/length pairs actually
670 * used, at most nents.
671 *
672 * Device ownership issues as mentioned above for swiotlb_map_single are the
673 * same here.
674 */
675int
676swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
677 int dir)
678{
25667d67 679 void *addr;
563aaf06 680 dma_addr_t dev_addr;
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681 int i;
682
34814545 683 BUG_ON(dir == DMA_NONE);
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LT
684
685 for (i = 0; i < nelems; i++, sg++) {
25667d67
TL
686 addr = SG_ENT_VIRT_ADDRESS(sg);
687 dev_addr = virt_to_bus(addr);
688 if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) {
689 void *map = map_single(hwdev, addr, sg->length, dir);
7e870233 690 if (!map) {
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691 /* Don't panic here, we expect map_sg users
692 to do proper error handling. */
693 swiotlb_full(hwdev, sg->length, dir, 0);
694 swiotlb_unmap_sg(hwdev, sg - i, i, dir);
695 sg[0].dma_length = 0;
696 return 0;
697 }
cde14bbf 698 sg->dma_address = virt_to_bus(map);
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699 } else
700 sg->dma_address = dev_addr;
701 sg->dma_length = sg->length;
702 }
703 return nelems;
704}
705
706/*
707 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
708 * concerning calls here are the same as for swiotlb_unmap_single() above.
709 */
710void
711swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
712 int dir)
713{
714 int i;
715
34814545 716 BUG_ON(dir == DMA_NONE);
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717
718 for (i = 0; i < nelems; i++, sg++)
719 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
93fbff63
JB
720 unmap_single(hwdev, bus_to_virt(sg->dma_address),
721 sg->dma_length, dir);
1da177e4 722 else if (dir == DMA_FROM_DEVICE)
cde14bbf 723 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
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724}
725
726/*
727 * Make physical memory consistent for a set of streaming mode DMA translations
728 * after a transfer.
729 *
730 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
731 * and usage.
732 */
be6b0267 733static void
8270f3f1 734swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sg,
de69e0f0 735 int nelems, int dir, int target)
1da177e4
LT
736{
737 int i;
738
34814545 739 BUG_ON(dir == DMA_NONE);
1da177e4
LT
740
741 for (i = 0; i < nelems; i++, sg++)
742 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
93fbff63 743 sync_single(hwdev, bus_to_virt(sg->dma_address),
de69e0f0 744 sg->dma_length, dir, target);
cde14bbf
JB
745 else if (dir == DMA_FROM_DEVICE)
746 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
1da177e4
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747}
748
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749void
750swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
751 int nelems, int dir)
752{
de69e0f0 753 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
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JL
754}
755
1da177e4
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756void
757swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
758 int nelems, int dir)
759{
de69e0f0 760 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1da177e4
LT
761}
762
763int
764swiotlb_dma_mapping_error(dma_addr_t dma_addr)
765{
93fbff63 766 return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
1da177e4
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767}
768
769/*
17e5ad6c 770 * Return whether the given device DMA address mask can be supported
1da177e4 771 * properly. For example, if your device can only drive the low 24-bits
17e5ad6c 772 * during bus mastering, then you would pass 0x00ffffff as the mask to
1da177e4
LT
773 * this function.
774 */
775int
563aaf06 776swiotlb_dma_supported(struct device *hwdev, u64 mask)
1da177e4 777{
25667d67 778 return virt_to_bus(io_tlb_end - 1) <= mask;
1da177e4
LT
779}
780
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781EXPORT_SYMBOL(swiotlb_map_single);
782EXPORT_SYMBOL(swiotlb_unmap_single);
783EXPORT_SYMBOL(swiotlb_map_sg);
784EXPORT_SYMBOL(swiotlb_unmap_sg);
785EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
786EXPORT_SYMBOL(swiotlb_sync_single_for_device);
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JL
787EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
788EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
1da177e4
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789EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
790EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
791EXPORT_SYMBOL(swiotlb_dma_mapping_error);
25667d67
TL
792EXPORT_SYMBOL(swiotlb_alloc_coherent);
793EXPORT_SYMBOL(swiotlb_free_coherent);
1da177e4 794EXPORT_SYMBOL(swiotlb_dma_supported);