]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Dynamic DMA mapping support. | |
3 | * | |
563aaf06 | 4 | * This implementation is a fallback for platforms that do not support |
1da177e4 LT |
5 | * I/O TLBs (aka DMA address translation hardware). |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
569c8bf5 JL |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
fb05a379 | 17 | * 08/12/11 beckyb Add highmem support |
1da177e4 LT |
18 | */ |
19 | ||
20 | #include <linux/cache.h> | |
17e5ad6c | 21 | #include <linux/dma-mapping.h> |
1da177e4 LT |
22 | #include <linux/mm.h> |
23 | #include <linux/module.h> | |
1da177e4 LT |
24 | #include <linux/spinlock.h> |
25 | #include <linux/string.h> | |
0016fdee | 26 | #include <linux/swiotlb.h> |
fb05a379 | 27 | #include <linux/pfn.h> |
1da177e4 LT |
28 | #include <linux/types.h> |
29 | #include <linux/ctype.h> | |
ef9b1893 | 30 | #include <linux/highmem.h> |
1da177e4 LT |
31 | |
32 | #include <asm/io.h> | |
1da177e4 | 33 | #include <asm/dma.h> |
17e5ad6c | 34 | #include <asm/scatterlist.h> |
1da177e4 LT |
35 | |
36 | #include <linux/init.h> | |
37 | #include <linux/bootmem.h> | |
a8522509 | 38 | #include <linux/iommu-helper.h> |
1da177e4 LT |
39 | |
40 | #define OFFSET(val,align) ((unsigned long) \ | |
41 | ( (val) & ( (align) - 1))) | |
42 | ||
0b9afede AW |
43 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
44 | ||
45 | /* | |
46 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
47 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
48 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
49 | */ | |
50 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
51 | ||
de69e0f0 JL |
52 | /* |
53 | * Enumeration for sync targets | |
54 | */ | |
55 | enum dma_sync_target { | |
56 | SYNC_FOR_CPU = 0, | |
57 | SYNC_FOR_DEVICE = 1, | |
58 | }; | |
59 | ||
1da177e4 LT |
60 | int swiotlb_force; |
61 | ||
62 | /* | |
ceb5ac32 BB |
63 | * Used to do a quick range check in unmap_single and |
64 | * sync_single_*, to see if the memory was in fact allocated by this | |
1da177e4 LT |
65 | * API. |
66 | */ | |
67 | static char *io_tlb_start, *io_tlb_end; | |
68 | ||
69 | /* | |
70 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and | |
71 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
72 | */ | |
73 | static unsigned long io_tlb_nslabs; | |
74 | ||
75 | /* | |
76 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
77 | */ | |
78 | static unsigned long io_tlb_overflow = 32*1024; | |
79 | ||
80 | void *io_tlb_overflow_buffer; | |
81 | ||
82 | /* | |
83 | * This is a free list describing the number of free entries available from | |
84 | * each index | |
85 | */ | |
86 | static unsigned int *io_tlb_list; | |
87 | static unsigned int io_tlb_index; | |
88 | ||
89 | /* | |
90 | * We need to save away the original address corresponding to a mapped entry | |
91 | * for the sync operations. | |
92 | */ | |
bc40ac66 | 93 | static phys_addr_t *io_tlb_orig_addr; |
1da177e4 LT |
94 | |
95 | /* | |
96 | * Protect the above data structures in the map and unmap calls | |
97 | */ | |
98 | static DEFINE_SPINLOCK(io_tlb_lock); | |
99 | ||
100 | static int __init | |
101 | setup_io_tlb_npages(char *str) | |
102 | { | |
103 | if (isdigit(*str)) { | |
e8579e72 | 104 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
1da177e4 LT |
105 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
106 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
107 | } | |
108 | if (*str == ',') | |
109 | ++str; | |
110 | if (!strcmp(str, "force")) | |
111 | swiotlb_force = 1; | |
112 | return 1; | |
113 | } | |
114 | __setup("swiotlb=", setup_io_tlb_npages); | |
115 | /* make io_tlb_overflow tunable too? */ | |
116 | ||
02ca646e | 117 | /* Note that this doesn't work with highmem page */ |
70a7d3cc JF |
118 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, |
119 | volatile void *address) | |
e08e1f7a | 120 | { |
862d196b | 121 | return phys_to_dma(hwdev, virt_to_phys(address)); |
e08e1f7a IC |
122 | } |
123 | ||
2e5b2b86 IC |
124 | static void swiotlb_print_info(unsigned long bytes) |
125 | { | |
126 | phys_addr_t pstart, pend; | |
2e5b2b86 IC |
127 | |
128 | pstart = virt_to_phys(io_tlb_start); | |
129 | pend = virt_to_phys(io_tlb_end); | |
130 | ||
2e5b2b86 IC |
131 | printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n", |
132 | bytes >> 20, io_tlb_start, io_tlb_end); | |
70a7d3cc JF |
133 | printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n", |
134 | (unsigned long long)pstart, | |
135 | (unsigned long long)pend); | |
2e5b2b86 IC |
136 | } |
137 | ||
1da177e4 LT |
138 | /* |
139 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
17e5ad6c | 140 | * structures for the software IO TLB used to implement the DMA API. |
1da177e4 | 141 | */ |
563aaf06 JB |
142 | void __init |
143 | swiotlb_init_with_default_size(size_t default_size) | |
1da177e4 | 144 | { |
563aaf06 | 145 | unsigned long i, bytes; |
1da177e4 LT |
146 | |
147 | if (!io_tlb_nslabs) { | |
e8579e72 | 148 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
1da177e4 LT |
149 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
150 | } | |
151 | ||
563aaf06 JB |
152 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
153 | ||
1da177e4 LT |
154 | /* |
155 | * Get IO TLB memory from the low pages | |
156 | */ | |
3885123d | 157 | io_tlb_start = alloc_bootmem_low_pages(bytes); |
1da177e4 LT |
158 | if (!io_tlb_start) |
159 | panic("Cannot allocate SWIOTLB buffer"); | |
563aaf06 | 160 | io_tlb_end = io_tlb_start + bytes; |
1da177e4 LT |
161 | |
162 | /* | |
163 | * Allocate and initialize the free list array. This array is used | |
164 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
165 | * between io_tlb_start and io_tlb_end. | |
166 | */ | |
167 | io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); | |
25667d67 | 168 | for (i = 0; i < io_tlb_nslabs; i++) |
1da177e4 LT |
169 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
170 | io_tlb_index = 0; | |
bc40ac66 | 171 | io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t)); |
1da177e4 LT |
172 | |
173 | /* | |
174 | * Get the overflow emergency buffer | |
175 | */ | |
176 | io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); | |
563aaf06 JB |
177 | if (!io_tlb_overflow_buffer) |
178 | panic("Cannot allocate SWIOTLB overflow buffer!\n"); | |
179 | ||
2e5b2b86 | 180 | swiotlb_print_info(bytes); |
1da177e4 LT |
181 | } |
182 | ||
563aaf06 JB |
183 | void __init |
184 | swiotlb_init(void) | |
1da177e4 | 185 | { |
25667d67 | 186 | swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */ |
1da177e4 LT |
187 | } |
188 | ||
0b9afede AW |
189 | /* |
190 | * Systems with larger DMA zones (those that don't support ISA) can | |
191 | * initialize the swiotlb later using the slab allocator if needed. | |
192 | * This should be just like above, but with some error catching. | |
193 | */ | |
194 | int | |
563aaf06 | 195 | swiotlb_late_init_with_default_size(size_t default_size) |
0b9afede | 196 | { |
563aaf06 | 197 | unsigned long i, bytes, req_nslabs = io_tlb_nslabs; |
0b9afede AW |
198 | unsigned int order; |
199 | ||
200 | if (!io_tlb_nslabs) { | |
201 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
202 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
203 | } | |
204 | ||
205 | /* | |
206 | * Get IO TLB memory from the low pages | |
207 | */ | |
563aaf06 | 208 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
0b9afede | 209 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
563aaf06 | 210 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede AW |
211 | |
212 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
bb52196b FT |
213 | io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, |
214 | order); | |
0b9afede AW |
215 | if (io_tlb_start) |
216 | break; | |
217 | order--; | |
218 | } | |
219 | ||
220 | if (!io_tlb_start) | |
221 | goto cleanup1; | |
222 | ||
563aaf06 | 223 | if (order != get_order(bytes)) { |
0b9afede AW |
224 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " |
225 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
226 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
563aaf06 | 227 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede | 228 | } |
563aaf06 JB |
229 | io_tlb_end = io_tlb_start + bytes; |
230 | memset(io_tlb_start, 0, bytes); | |
0b9afede AW |
231 | |
232 | /* | |
233 | * Allocate and initialize the free list array. This array is used | |
234 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
235 | * between io_tlb_start and io_tlb_end. | |
236 | */ | |
237 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
238 | get_order(io_tlb_nslabs * sizeof(int))); | |
239 | if (!io_tlb_list) | |
240 | goto cleanup2; | |
241 | ||
242 | for (i = 0; i < io_tlb_nslabs; i++) | |
243 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
244 | io_tlb_index = 0; | |
245 | ||
bc40ac66 BB |
246 | io_tlb_orig_addr = (phys_addr_t *) |
247 | __get_free_pages(GFP_KERNEL, | |
248 | get_order(io_tlb_nslabs * | |
249 | sizeof(phys_addr_t))); | |
0b9afede AW |
250 | if (!io_tlb_orig_addr) |
251 | goto cleanup3; | |
252 | ||
bc40ac66 | 253 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t)); |
0b9afede AW |
254 | |
255 | /* | |
256 | * Get the overflow emergency buffer | |
257 | */ | |
258 | io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
259 | get_order(io_tlb_overflow)); | |
260 | if (!io_tlb_overflow_buffer) | |
261 | goto cleanup4; | |
262 | ||
2e5b2b86 | 263 | swiotlb_print_info(bytes); |
0b9afede AW |
264 | |
265 | return 0; | |
266 | ||
267 | cleanup4: | |
bc40ac66 BB |
268 | free_pages((unsigned long)io_tlb_orig_addr, |
269 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
0b9afede AW |
270 | io_tlb_orig_addr = NULL; |
271 | cleanup3: | |
25667d67 TL |
272 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
273 | sizeof(int))); | |
0b9afede | 274 | io_tlb_list = NULL; |
0b9afede | 275 | cleanup2: |
563aaf06 | 276 | io_tlb_end = NULL; |
0b9afede AW |
277 | free_pages((unsigned long)io_tlb_start, order); |
278 | io_tlb_start = NULL; | |
279 | cleanup1: | |
280 | io_tlb_nslabs = req_nslabs; | |
281 | return -ENOMEM; | |
282 | } | |
283 | ||
02ca646e | 284 | static int is_swiotlb_buffer(phys_addr_t paddr) |
640aebfe | 285 | { |
02ca646e FT |
286 | return paddr >= virt_to_phys(io_tlb_start) && |
287 | paddr < virt_to_phys(io_tlb_end); | |
640aebfe FT |
288 | } |
289 | ||
fb05a379 BB |
290 | /* |
291 | * Bounce: copy the swiotlb buffer back to the original dma location | |
292 | */ | |
293 | static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size, | |
294 | enum dma_data_direction dir) | |
295 | { | |
296 | unsigned long pfn = PFN_DOWN(phys); | |
297 | ||
298 | if (PageHighMem(pfn_to_page(pfn))) { | |
299 | /* The buffer does not have a mapping. Map it in and copy */ | |
300 | unsigned int offset = phys & ~PAGE_MASK; | |
301 | char *buffer; | |
302 | unsigned int sz = 0; | |
303 | unsigned long flags; | |
304 | ||
305 | while (size) { | |
67131ad0 | 306 | sz = min_t(size_t, PAGE_SIZE - offset, size); |
fb05a379 BB |
307 | |
308 | local_irq_save(flags); | |
309 | buffer = kmap_atomic(pfn_to_page(pfn), | |
310 | KM_BOUNCE_READ); | |
311 | if (dir == DMA_TO_DEVICE) | |
312 | memcpy(dma_addr, buffer + offset, sz); | |
ef9b1893 | 313 | else |
fb05a379 BB |
314 | memcpy(buffer + offset, dma_addr, sz); |
315 | kunmap_atomic(buffer, KM_BOUNCE_READ); | |
ef9b1893 | 316 | local_irq_restore(flags); |
fb05a379 BB |
317 | |
318 | size -= sz; | |
319 | pfn++; | |
320 | dma_addr += sz; | |
321 | offset = 0; | |
ef9b1893 JF |
322 | } |
323 | } else { | |
ef9b1893 | 324 | if (dir == DMA_TO_DEVICE) |
fb05a379 | 325 | memcpy(dma_addr, phys_to_virt(phys), size); |
ef9b1893 | 326 | else |
fb05a379 | 327 | memcpy(phys_to_virt(phys), dma_addr, size); |
ef9b1893 | 328 | } |
1b548f66 JF |
329 | } |
330 | ||
1da177e4 LT |
331 | /* |
332 | * Allocates bounce buffer and returns its kernel virtual address. | |
333 | */ | |
334 | static void * | |
bc40ac66 | 335 | map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir) |
1da177e4 LT |
336 | { |
337 | unsigned long flags; | |
338 | char *dma_addr; | |
339 | unsigned int nslots, stride, index, wrap; | |
340 | int i; | |
681cc5cd FT |
341 | unsigned long start_dma_addr; |
342 | unsigned long mask; | |
343 | unsigned long offset_slots; | |
344 | unsigned long max_slots; | |
345 | ||
346 | mask = dma_get_seg_boundary(hwdev); | |
70a7d3cc | 347 | start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask; |
681cc5cd FT |
348 | |
349 | offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
a5ddde4a IC |
350 | |
351 | /* | |
352 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
353 | */ | |
b15a3891 JB |
354 | max_slots = mask + 1 |
355 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
356 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
1da177e4 LT |
357 | |
358 | /* | |
359 | * For mappings greater than a page, we limit the stride (and | |
360 | * hence alignment) to a page size. | |
361 | */ | |
362 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
363 | if (size > PAGE_SIZE) | |
364 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
365 | else | |
366 | stride = 1; | |
367 | ||
34814545 | 368 | BUG_ON(!nslots); |
1da177e4 LT |
369 | |
370 | /* | |
371 | * Find suitable number of IO TLB entries size that will fit this | |
372 | * request and allocate a buffer from that IO TLB pool. | |
373 | */ | |
374 | spin_lock_irqsave(&io_tlb_lock, flags); | |
a7133a15 AM |
375 | index = ALIGN(io_tlb_index, stride); |
376 | if (index >= io_tlb_nslabs) | |
377 | index = 0; | |
378 | wrap = index; | |
379 | ||
380 | do { | |
a8522509 FT |
381 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
382 | max_slots)) { | |
b15a3891 JB |
383 | index += stride; |
384 | if (index >= io_tlb_nslabs) | |
385 | index = 0; | |
a7133a15 AM |
386 | if (index == wrap) |
387 | goto not_found; | |
388 | } | |
389 | ||
390 | /* | |
391 | * If we find a slot that indicates we have 'nslots' number of | |
392 | * contiguous buffers, we allocate the buffers from that slot | |
393 | * and mark the entries as '0' indicating unavailable. | |
394 | */ | |
395 | if (io_tlb_list[index] >= nslots) { | |
396 | int count = 0; | |
397 | ||
398 | for (i = index; i < (int) (index + nslots); i++) | |
399 | io_tlb_list[i] = 0; | |
400 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
401 | io_tlb_list[i] = ++count; | |
402 | dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
1da177e4 | 403 | |
a7133a15 AM |
404 | /* |
405 | * Update the indices to avoid searching in the next | |
406 | * round. | |
407 | */ | |
408 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
409 | ? (index + nslots) : 0); | |
410 | ||
411 | goto found; | |
412 | } | |
413 | index += stride; | |
414 | if (index >= io_tlb_nslabs) | |
415 | index = 0; | |
416 | } while (index != wrap); | |
417 | ||
418 | not_found: | |
419 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
420 | return NULL; | |
421 | found: | |
1da177e4 LT |
422 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
423 | ||
424 | /* | |
425 | * Save away the mapping from the original address to the DMA address. | |
426 | * This is needed when we sync the memory. Then we sync the buffer if | |
427 | * needed. | |
428 | */ | |
bc40ac66 BB |
429 | for (i = 0; i < nslots; i++) |
430 | io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT); | |
1da177e4 | 431 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
fb05a379 | 432 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
1da177e4 LT |
433 | |
434 | return dma_addr; | |
435 | } | |
436 | ||
437 | /* | |
438 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
439 | */ | |
440 | static void | |
7fcebbd2 | 441 | do_unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) |
1da177e4 LT |
442 | { |
443 | unsigned long flags; | |
444 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
445 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
bc40ac66 | 446 | phys_addr_t phys = io_tlb_orig_addr[index]; |
1da177e4 LT |
447 | |
448 | /* | |
449 | * First, sync the memory before unmapping the entry | |
450 | */ | |
bc40ac66 | 451 | if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
fb05a379 | 452 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
1da177e4 LT |
453 | |
454 | /* | |
455 | * Return the buffer to the free list by setting the corresponding | |
456 | * entries to indicate the number of contigous entries available. | |
457 | * While returning the entries to the free list, we merge the entries | |
458 | * with slots below and above the pool being returned. | |
459 | */ | |
460 | spin_lock_irqsave(&io_tlb_lock, flags); | |
461 | { | |
462 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
463 | io_tlb_list[index + nslots] : 0); | |
464 | /* | |
465 | * Step 1: return the slots to the free list, merging the | |
466 | * slots with superceeding slots | |
467 | */ | |
468 | for (i = index + nslots - 1; i >= index; i--) | |
469 | io_tlb_list[i] = ++count; | |
470 | /* | |
471 | * Step 2: merge the returned slots with the preceding slots, | |
472 | * if available (non zero) | |
473 | */ | |
474 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
475 | io_tlb_list[i] = ++count; | |
476 | } | |
477 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
478 | } | |
479 | ||
480 | static void | |
de69e0f0 JL |
481 | sync_single(struct device *hwdev, char *dma_addr, size_t size, |
482 | int dir, int target) | |
1da177e4 | 483 | { |
bc40ac66 BB |
484 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; |
485 | phys_addr_t phys = io_tlb_orig_addr[index]; | |
486 | ||
487 | phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); | |
df336d1c | 488 | |
de69e0f0 JL |
489 | switch (target) { |
490 | case SYNC_FOR_CPU: | |
491 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 492 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
34814545 ES |
493 | else |
494 | BUG_ON(dir != DMA_TO_DEVICE); | |
de69e0f0 JL |
495 | break; |
496 | case SYNC_FOR_DEVICE: | |
497 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 498 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
34814545 ES |
499 | else |
500 | BUG_ON(dir != DMA_FROM_DEVICE); | |
de69e0f0 JL |
501 | break; |
502 | default: | |
1da177e4 | 503 | BUG(); |
de69e0f0 | 504 | } |
1da177e4 LT |
505 | } |
506 | ||
507 | void * | |
508 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
06a54497 | 509 | dma_addr_t *dma_handle, gfp_t flags) |
1da177e4 | 510 | { |
563aaf06 | 511 | dma_addr_t dev_addr; |
1da177e4 LT |
512 | void *ret; |
513 | int order = get_order(size); | |
284901a9 | 514 | u64 dma_mask = DMA_BIT_MASK(32); |
1e74f300 FT |
515 | |
516 | if (hwdev && hwdev->coherent_dma_mask) | |
517 | dma_mask = hwdev->coherent_dma_mask; | |
1da177e4 | 518 | |
25667d67 | 519 | ret = (void *)__get_free_pages(flags, order); |
b9394647 | 520 | if (ret && swiotlb_virt_to_bus(hwdev, ret) + size > dma_mask) { |
1da177e4 LT |
521 | /* |
522 | * The allocated memory isn't reachable by the device. | |
1da177e4 LT |
523 | */ |
524 | free_pages((unsigned long) ret, order); | |
525 | ret = NULL; | |
526 | } | |
527 | if (!ret) { | |
528 | /* | |
529 | * We are either out of memory or the device can't DMA | |
ceb5ac32 BB |
530 | * to GFP_DMA memory; fall back on map_single(), which |
531 | * will grab memory from the lowest available address range. | |
1da177e4 | 532 | */ |
bc40ac66 | 533 | ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE); |
9dfda12b | 534 | if (!ret) |
1da177e4 | 535 | return NULL; |
1da177e4 LT |
536 | } |
537 | ||
538 | memset(ret, 0, size); | |
70a7d3cc | 539 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); |
1da177e4 LT |
540 | |
541 | /* Confirm address can be DMA'd by device */ | |
b9394647 | 542 | if (dev_addr + size > dma_mask) { |
563aaf06 | 543 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", |
1e74f300 | 544 | (unsigned long long)dma_mask, |
563aaf06 | 545 | (unsigned long long)dev_addr); |
a2b89b59 FT |
546 | |
547 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
7fcebbd2 | 548 | do_unmap_single(hwdev, ret, size, DMA_TO_DEVICE); |
a2b89b59 | 549 | return NULL; |
1da177e4 LT |
550 | } |
551 | *dma_handle = dev_addr; | |
552 | return ret; | |
553 | } | |
874d6a95 | 554 | EXPORT_SYMBOL(swiotlb_alloc_coherent); |
1da177e4 LT |
555 | |
556 | void | |
557 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
02ca646e | 558 | dma_addr_t dev_addr) |
1da177e4 | 559 | { |
862d196b | 560 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
02ca646e | 561 | |
aa24886e | 562 | WARN_ON(irqs_disabled()); |
02ca646e FT |
563 | if (!is_swiotlb_buffer(paddr)) |
564 | free_pages((unsigned long)vaddr, get_order(size)); | |
1da177e4 LT |
565 | else |
566 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
7fcebbd2 | 567 | do_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); |
1da177e4 | 568 | } |
874d6a95 | 569 | EXPORT_SYMBOL(swiotlb_free_coherent); |
1da177e4 LT |
570 | |
571 | static void | |
572 | swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) | |
573 | { | |
574 | /* | |
575 | * Ran out of IOMMU space for this operation. This is very bad. | |
576 | * Unfortunately the drivers cannot handle this operation properly. | |
17e5ad6c | 577 | * unless they check for dma_mapping_error (most don't) |
1da177e4 LT |
578 | * When the mapping is small enough return a static buffer to limit |
579 | * the damage, or panic when the transfer is too big. | |
580 | */ | |
563aaf06 | 581 | printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " |
94b32486 | 582 | "device %s\n", size, dev ? dev_name(dev) : "?"); |
1da177e4 LT |
583 | |
584 | if (size > io_tlb_overflow && do_panic) { | |
17e5ad6c TL |
585 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) |
586 | panic("DMA: Memory would be corrupted\n"); | |
587 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) | |
588 | panic("DMA: Random memory would be DMAed\n"); | |
1da177e4 LT |
589 | } |
590 | } | |
591 | ||
592 | /* | |
593 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
17e5ad6c | 594 | * physical address to use is returned. |
1da177e4 LT |
595 | * |
596 | * Once the device is given the dma address, the device owns this memory until | |
ceb5ac32 | 597 | * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. |
1da177e4 | 598 | */ |
f98eee8e FT |
599 | dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, |
600 | unsigned long offset, size_t size, | |
601 | enum dma_data_direction dir, | |
602 | struct dma_attrs *attrs) | |
1da177e4 | 603 | { |
f98eee8e | 604 | phys_addr_t phys = page_to_phys(page) + offset; |
862d196b | 605 | dma_addr_t dev_addr = phys_to_dma(dev, phys); |
1da177e4 LT |
606 | void *map; |
607 | ||
34814545 | 608 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 609 | /* |
ceb5ac32 | 610 | * If the address happens to be in the device's DMA window, |
1da177e4 LT |
611 | * we can safely return the device addr and not worry about bounce |
612 | * buffering it. | |
613 | */ | |
b9394647 | 614 | if (dma_capable(dev, dev_addr, size) && !swiotlb_force) |
1da177e4 LT |
615 | return dev_addr; |
616 | ||
617 | /* | |
618 | * Oh well, have to allocate and map a bounce buffer. | |
619 | */ | |
f98eee8e | 620 | map = map_single(dev, phys, size, dir); |
1da177e4 | 621 | if (!map) { |
f98eee8e | 622 | swiotlb_full(dev, size, dir, 1); |
1da177e4 LT |
623 | map = io_tlb_overflow_buffer; |
624 | } | |
625 | ||
f98eee8e | 626 | dev_addr = swiotlb_virt_to_bus(dev, map); |
1da177e4 LT |
627 | |
628 | /* | |
629 | * Ensure that the address returned is DMA'ble | |
630 | */ | |
b9394647 | 631 | if (!dma_capable(dev, dev_addr, size)) |
1da177e4 LT |
632 | panic("map_single: bounce buffer is not DMA'ble"); |
633 | ||
634 | return dev_addr; | |
635 | } | |
f98eee8e | 636 | EXPORT_SYMBOL_GPL(swiotlb_map_page); |
1da177e4 | 637 | |
1da177e4 LT |
638 | /* |
639 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
ceb5ac32 | 640 | * match what was provided for in a previous swiotlb_map_page call. All |
1da177e4 LT |
641 | * other usages are undefined. |
642 | * | |
643 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
644 | * whatever the device wrote there. | |
645 | */ | |
7fcebbd2 BB |
646 | static void unmap_single(struct device *hwdev, dma_addr_t dev_addr, |
647 | size_t size, int dir) | |
1da177e4 | 648 | { |
862d196b | 649 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
1da177e4 | 650 | |
34814545 | 651 | BUG_ON(dir == DMA_NONE); |
7fcebbd2 | 652 | |
02ca646e FT |
653 | if (is_swiotlb_buffer(paddr)) { |
654 | do_unmap_single(hwdev, phys_to_virt(paddr), size, dir); | |
7fcebbd2 BB |
655 | return; |
656 | } | |
657 | ||
658 | if (dir != DMA_FROM_DEVICE) | |
659 | return; | |
660 | ||
02ca646e FT |
661 | /* |
662 | * phys_to_virt doesn't work with hihgmem page but we could | |
663 | * call dma_mark_clean() with hihgmem page here. However, we | |
664 | * are fine since dma_mark_clean() is null on POWERPC. We can | |
665 | * make dma_mark_clean() take a physical address if necessary. | |
666 | */ | |
667 | dma_mark_clean(phys_to_virt(paddr), size); | |
7fcebbd2 BB |
668 | } |
669 | ||
670 | void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, | |
671 | size_t size, enum dma_data_direction dir, | |
672 | struct dma_attrs *attrs) | |
673 | { | |
674 | unmap_single(hwdev, dev_addr, size, dir); | |
1da177e4 | 675 | } |
f98eee8e | 676 | EXPORT_SYMBOL_GPL(swiotlb_unmap_page); |
874d6a95 | 677 | |
1da177e4 LT |
678 | /* |
679 | * Make physical memory consistent for a single streaming mode DMA translation | |
680 | * after a transfer. | |
681 | * | |
ceb5ac32 | 682 | * If you perform a swiotlb_map_page() but wish to interrogate the buffer |
17e5ad6c TL |
683 | * using the cpu, yet do not wish to teardown the dma mapping, you must |
684 | * call this function before doing so. At the next point you give the dma | |
1da177e4 LT |
685 | * address back to the card, you must first perform a |
686 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
687 | */ | |
be6b0267 | 688 | static void |
8270f3f1 | 689 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 | 690 | size_t size, int dir, int target) |
1da177e4 | 691 | { |
862d196b | 692 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
1da177e4 | 693 | |
34814545 | 694 | BUG_ON(dir == DMA_NONE); |
380d6878 | 695 | |
02ca646e FT |
696 | if (is_swiotlb_buffer(paddr)) { |
697 | sync_single(hwdev, phys_to_virt(paddr), size, dir, target); | |
380d6878 BB |
698 | return; |
699 | } | |
700 | ||
701 | if (dir != DMA_FROM_DEVICE) | |
702 | return; | |
703 | ||
02ca646e | 704 | dma_mark_clean(phys_to_virt(paddr), size); |
1da177e4 LT |
705 | } |
706 | ||
8270f3f1 JL |
707 | void |
708 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 709 | size_t size, enum dma_data_direction dir) |
8270f3f1 | 710 | { |
de69e0f0 | 711 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); |
8270f3f1 | 712 | } |
874d6a95 | 713 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); |
8270f3f1 | 714 | |
1da177e4 LT |
715 | void |
716 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 717 | size_t size, enum dma_data_direction dir) |
1da177e4 | 718 | { |
de69e0f0 | 719 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); |
1da177e4 | 720 | } |
874d6a95 | 721 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); |
1da177e4 | 722 | |
878a97cf JL |
723 | /* |
724 | * Same as above, but for a sub-range of the mapping. | |
725 | */ | |
be6b0267 | 726 | static void |
878a97cf | 727 | swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 JL |
728 | unsigned long offset, size_t size, |
729 | int dir, int target) | |
878a97cf | 730 | { |
380d6878 | 731 | swiotlb_sync_single(hwdev, dev_addr + offset, size, dir, target); |
878a97cf JL |
732 | } |
733 | ||
734 | void | |
735 | swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e FT |
736 | unsigned long offset, size_t size, |
737 | enum dma_data_direction dir) | |
878a97cf | 738 | { |
de69e0f0 JL |
739 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
740 | SYNC_FOR_CPU); | |
878a97cf | 741 | } |
874d6a95 | 742 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu); |
878a97cf JL |
743 | |
744 | void | |
745 | swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e FT |
746 | unsigned long offset, size_t size, |
747 | enum dma_data_direction dir) | |
878a97cf | 748 | { |
de69e0f0 JL |
749 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
750 | SYNC_FOR_DEVICE); | |
878a97cf | 751 | } |
874d6a95 | 752 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device); |
878a97cf | 753 | |
1da177e4 LT |
754 | /* |
755 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
ceb5ac32 | 756 | * This is the scatter-gather version of the above swiotlb_map_page |
1da177e4 LT |
757 | * interface. Here the scatter gather list elements are each tagged with the |
758 | * appropriate dma address and length. They are obtained via | |
759 | * sg_dma_{address,length}(SG). | |
760 | * | |
761 | * NOTE: An implementation may be able to use a smaller number of | |
762 | * DMA address/length pairs than there are SG table elements. | |
763 | * (for example via virtual mapping capabilities) | |
764 | * The routine returns the number of addr/length pairs actually | |
765 | * used, at most nents. | |
766 | * | |
ceb5ac32 | 767 | * Device ownership issues as mentioned above for swiotlb_map_page are the |
1da177e4 LT |
768 | * same here. |
769 | */ | |
770 | int | |
309df0c5 | 771 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, |
160c1d8e | 772 | enum dma_data_direction dir, struct dma_attrs *attrs) |
1da177e4 | 773 | { |
dbfd49fe | 774 | struct scatterlist *sg; |
1da177e4 LT |
775 | int i; |
776 | ||
34814545 | 777 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 778 | |
dbfd49fe | 779 | for_each_sg(sgl, sg, nelems, i) { |
961d7d0e | 780 | phys_addr_t paddr = sg_phys(sg); |
862d196b | 781 | dma_addr_t dev_addr = phys_to_dma(hwdev, paddr); |
bc40ac66 | 782 | |
cf56e3f2 | 783 | if (swiotlb_force || |
b9394647 | 784 | !dma_capable(hwdev, dev_addr, sg->length)) { |
bc40ac66 BB |
785 | void *map = map_single(hwdev, sg_phys(sg), |
786 | sg->length, dir); | |
7e870233 | 787 | if (!map) { |
1da177e4 LT |
788 | /* Don't panic here, we expect map_sg users |
789 | to do proper error handling. */ | |
790 | swiotlb_full(hwdev, sg->length, dir, 0); | |
309df0c5 AK |
791 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
792 | attrs); | |
dbfd49fe | 793 | sgl[0].dma_length = 0; |
1da177e4 LT |
794 | return 0; |
795 | } | |
70a7d3cc | 796 | sg->dma_address = swiotlb_virt_to_bus(hwdev, map); |
1da177e4 LT |
797 | } else |
798 | sg->dma_address = dev_addr; | |
799 | sg->dma_length = sg->length; | |
800 | } | |
801 | return nelems; | |
802 | } | |
309df0c5 AK |
803 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); |
804 | ||
805 | int | |
806 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
807 | int dir) | |
808 | { | |
809 | return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
810 | } | |
874d6a95 | 811 | EXPORT_SYMBOL(swiotlb_map_sg); |
1da177e4 LT |
812 | |
813 | /* | |
814 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
ceb5ac32 | 815 | * concerning calls here are the same as for swiotlb_unmap_page() above. |
1da177e4 LT |
816 | */ |
817 | void | |
309df0c5 | 818 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
160c1d8e | 819 | int nelems, enum dma_data_direction dir, struct dma_attrs *attrs) |
1da177e4 | 820 | { |
dbfd49fe | 821 | struct scatterlist *sg; |
1da177e4 LT |
822 | int i; |
823 | ||
34814545 | 824 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 825 | |
7fcebbd2 BB |
826 | for_each_sg(sgl, sg, nelems, i) |
827 | unmap_single(hwdev, sg->dma_address, sg->dma_length, dir); | |
828 | ||
1da177e4 | 829 | } |
309df0c5 AK |
830 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); |
831 | ||
832 | void | |
833 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
834 | int dir) | |
835 | { | |
836 | return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
837 | } | |
874d6a95 | 838 | EXPORT_SYMBOL(swiotlb_unmap_sg); |
1da177e4 LT |
839 | |
840 | /* | |
841 | * Make physical memory consistent for a set of streaming mode DMA translations | |
842 | * after a transfer. | |
843 | * | |
844 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
845 | * and usage. | |
846 | */ | |
be6b0267 | 847 | static void |
dbfd49fe | 848 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, |
de69e0f0 | 849 | int nelems, int dir, int target) |
1da177e4 | 850 | { |
dbfd49fe | 851 | struct scatterlist *sg; |
1da177e4 LT |
852 | int i; |
853 | ||
380d6878 BB |
854 | for_each_sg(sgl, sg, nelems, i) |
855 | swiotlb_sync_single(hwdev, sg->dma_address, | |
de69e0f0 | 856 | sg->dma_length, dir, target); |
1da177e4 LT |
857 | } |
858 | ||
8270f3f1 JL |
859 | void |
860 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 861 | int nelems, enum dma_data_direction dir) |
8270f3f1 | 862 | { |
de69e0f0 | 863 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); |
8270f3f1 | 864 | } |
874d6a95 | 865 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); |
8270f3f1 | 866 | |
1da177e4 LT |
867 | void |
868 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 869 | int nelems, enum dma_data_direction dir) |
1da177e4 | 870 | { |
de69e0f0 | 871 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); |
1da177e4 | 872 | } |
874d6a95 | 873 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); |
1da177e4 LT |
874 | |
875 | int | |
8d8bb39b | 876 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) |
1da177e4 | 877 | { |
70a7d3cc | 878 | return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer)); |
1da177e4 | 879 | } |
874d6a95 | 880 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); |
1da177e4 LT |
881 | |
882 | /* | |
17e5ad6c | 883 | * Return whether the given device DMA address mask can be supported |
1da177e4 | 884 | * properly. For example, if your device can only drive the low 24-bits |
17e5ad6c | 885 | * during bus mastering, then you would pass 0x00ffffff as the mask to |
1da177e4 LT |
886 | * this function. |
887 | */ | |
888 | int | |
563aaf06 | 889 | swiotlb_dma_supported(struct device *hwdev, u64 mask) |
1da177e4 | 890 | { |
70a7d3cc | 891 | return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask; |
1da177e4 | 892 | } |
1da177e4 | 893 | EXPORT_SYMBOL(swiotlb_dma_supported); |