]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blame - lib/swiotlb.c
swiotlb: Add swiotlb_free() function
[mirror_ubuntu-eoan-kernel.git] / lib / swiotlb.c
CommitLineData
1da177e4
LT
1/*
2 * Dynamic DMA mapping support.
3 *
563aaf06 4 * This implementation is a fallback for platforms that do not support
1da177e4
LT
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
569c8bf5
JL
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
fb05a379 17 * 08/12/11 beckyb Add highmem support
1da177e4
LT
18 */
19
20#include <linux/cache.h>
17e5ad6c 21#include <linux/dma-mapping.h>
1da177e4
LT
22#include <linux/mm.h>
23#include <linux/module.h>
1da177e4
LT
24#include <linux/spinlock.h>
25#include <linux/string.h>
0016fdee 26#include <linux/swiotlb.h>
fb05a379 27#include <linux/pfn.h>
1da177e4
LT
28#include <linux/types.h>
29#include <linux/ctype.h>
ef9b1893 30#include <linux/highmem.h>
1da177e4
LT
31
32#include <asm/io.h>
1da177e4 33#include <asm/dma.h>
17e5ad6c 34#include <asm/scatterlist.h>
1da177e4
LT
35
36#include <linux/init.h>
37#include <linux/bootmem.h>
a8522509 38#include <linux/iommu-helper.h>
1da177e4
LT
39
40#define OFFSET(val,align) ((unsigned long) \
41 ( (val) & ( (align) - 1)))
42
0b9afede
AW
43#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
44
45/*
46 * Minimum IO TLB size to bother booting with. Systems with mainly
47 * 64bit capable cards will only lightly use the swiotlb. If we can't
48 * allocate a contiguous 1MB, we're probably in trouble anyway.
49 */
50#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
51
de69e0f0
JL
52/*
53 * Enumeration for sync targets
54 */
55enum dma_sync_target {
56 SYNC_FOR_CPU = 0,
57 SYNC_FOR_DEVICE = 1,
58};
59
1da177e4
LT
60int swiotlb_force;
61
62/*
ceb5ac32
BB
63 * Used to do a quick range check in unmap_single and
64 * sync_single_*, to see if the memory was in fact allocated by this
1da177e4
LT
65 * API.
66 */
67static char *io_tlb_start, *io_tlb_end;
68
69/*
70 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
71 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
72 */
73static unsigned long io_tlb_nslabs;
74
75/*
76 * When the IOMMU overflows we return a fallback buffer. This sets the size.
77 */
78static unsigned long io_tlb_overflow = 32*1024;
79
80void *io_tlb_overflow_buffer;
81
82/*
83 * This is a free list describing the number of free entries available from
84 * each index
85 */
86static unsigned int *io_tlb_list;
87static unsigned int io_tlb_index;
88
89/*
90 * We need to save away the original address corresponding to a mapped entry
91 * for the sync operations.
92 */
bc40ac66 93static phys_addr_t *io_tlb_orig_addr;
1da177e4
LT
94
95/*
96 * Protect the above data structures in the map and unmap calls
97 */
98static DEFINE_SPINLOCK(io_tlb_lock);
99
5740afdb
FT
100static int late_alloc;
101
1da177e4
LT
102static int __init
103setup_io_tlb_npages(char *str)
104{
105 if (isdigit(*str)) {
e8579e72 106 io_tlb_nslabs = simple_strtoul(str, &str, 0);
1da177e4
LT
107 /* avoid tail segment of size < IO_TLB_SEGSIZE */
108 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
109 }
110 if (*str == ',')
111 ++str;
112 if (!strcmp(str, "force"))
113 swiotlb_force = 1;
114 return 1;
115}
116__setup("swiotlb=", setup_io_tlb_npages);
117/* make io_tlb_overflow tunable too? */
118
02ca646e 119/* Note that this doesn't work with highmem page */
70a7d3cc
JF
120static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
121 volatile void *address)
e08e1f7a 122{
862d196b 123 return phys_to_dma(hwdev, virt_to_phys(address));
e08e1f7a
IC
124}
125
2e5b2b86
IC
126static void swiotlb_print_info(unsigned long bytes)
127{
128 phys_addr_t pstart, pend;
2e5b2b86
IC
129
130 pstart = virt_to_phys(io_tlb_start);
131 pend = virt_to_phys(io_tlb_end);
132
2e5b2b86
IC
133 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
134 bytes >> 20, io_tlb_start, io_tlb_end);
70a7d3cc
JF
135 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
136 (unsigned long long)pstart,
137 (unsigned long long)pend);
2e5b2b86
IC
138}
139
1da177e4
LT
140/*
141 * Statically reserve bounce buffer space and initialize bounce buffer data
17e5ad6c 142 * structures for the software IO TLB used to implement the DMA API.
1da177e4 143 */
563aaf06
JB
144void __init
145swiotlb_init_with_default_size(size_t default_size)
1da177e4 146{
563aaf06 147 unsigned long i, bytes;
1da177e4
LT
148
149 if (!io_tlb_nslabs) {
e8579e72 150 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
1da177e4
LT
151 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
152 }
153
563aaf06
JB
154 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
155
1da177e4
LT
156 /*
157 * Get IO TLB memory from the low pages
158 */
3885123d 159 io_tlb_start = alloc_bootmem_low_pages(bytes);
1da177e4
LT
160 if (!io_tlb_start)
161 panic("Cannot allocate SWIOTLB buffer");
563aaf06 162 io_tlb_end = io_tlb_start + bytes;
1da177e4
LT
163
164 /*
165 * Allocate and initialize the free list array. This array is used
166 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
167 * between io_tlb_start and io_tlb_end.
168 */
169 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
25667d67 170 for (i = 0; i < io_tlb_nslabs; i++)
1da177e4
LT
171 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
172 io_tlb_index = 0;
bc40ac66 173 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t));
1da177e4
LT
174
175 /*
176 * Get the overflow emergency buffer
177 */
178 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
563aaf06
JB
179 if (!io_tlb_overflow_buffer)
180 panic("Cannot allocate SWIOTLB overflow buffer!\n");
181
2e5b2b86 182 swiotlb_print_info(bytes);
1da177e4
LT
183}
184
563aaf06
JB
185void __init
186swiotlb_init(void)
1da177e4 187{
25667d67 188 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
1da177e4
LT
189}
190
0b9afede
AW
191/*
192 * Systems with larger DMA zones (those that don't support ISA) can
193 * initialize the swiotlb later using the slab allocator if needed.
194 * This should be just like above, but with some error catching.
195 */
196int
563aaf06 197swiotlb_late_init_with_default_size(size_t default_size)
0b9afede 198{
563aaf06 199 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
0b9afede
AW
200 unsigned int order;
201
202 if (!io_tlb_nslabs) {
203 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
204 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
205 }
206
207 /*
208 * Get IO TLB memory from the low pages
209 */
563aaf06 210 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
0b9afede 211 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 212 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede
AW
213
214 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
bb52196b
FT
215 io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
216 order);
0b9afede
AW
217 if (io_tlb_start)
218 break;
219 order--;
220 }
221
222 if (!io_tlb_start)
223 goto cleanup1;
224
563aaf06 225 if (order != get_order(bytes)) {
0b9afede
AW
226 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
227 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
228 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 229 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede 230 }
563aaf06
JB
231 io_tlb_end = io_tlb_start + bytes;
232 memset(io_tlb_start, 0, bytes);
0b9afede
AW
233
234 /*
235 * Allocate and initialize the free list array. This array is used
236 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
237 * between io_tlb_start and io_tlb_end.
238 */
239 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
240 get_order(io_tlb_nslabs * sizeof(int)));
241 if (!io_tlb_list)
242 goto cleanup2;
243
244 for (i = 0; i < io_tlb_nslabs; i++)
245 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
246 io_tlb_index = 0;
247
bc40ac66
BB
248 io_tlb_orig_addr = (phys_addr_t *)
249 __get_free_pages(GFP_KERNEL,
250 get_order(io_tlb_nslabs *
251 sizeof(phys_addr_t)));
0b9afede
AW
252 if (!io_tlb_orig_addr)
253 goto cleanup3;
254
bc40ac66 255 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
0b9afede
AW
256
257 /*
258 * Get the overflow emergency buffer
259 */
260 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
261 get_order(io_tlb_overflow));
262 if (!io_tlb_overflow_buffer)
263 goto cleanup4;
264
2e5b2b86 265 swiotlb_print_info(bytes);
0b9afede 266
5740afdb
FT
267 late_alloc = 1;
268
0b9afede
AW
269 return 0;
270
271cleanup4:
bc40ac66
BB
272 free_pages((unsigned long)io_tlb_orig_addr,
273 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
0b9afede
AW
274 io_tlb_orig_addr = NULL;
275cleanup3:
25667d67
TL
276 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
277 sizeof(int)));
0b9afede 278 io_tlb_list = NULL;
0b9afede 279cleanup2:
563aaf06 280 io_tlb_end = NULL;
0b9afede
AW
281 free_pages((unsigned long)io_tlb_start, order);
282 io_tlb_start = NULL;
283cleanup1:
284 io_tlb_nslabs = req_nslabs;
285 return -ENOMEM;
286}
287
5740afdb
FT
288void __init swiotlb_free(void)
289{
290 if (!io_tlb_overflow_buffer)
291 return;
292
293 if (late_alloc) {
294 free_pages((unsigned long)io_tlb_overflow_buffer,
295 get_order(io_tlb_overflow));
296 free_pages((unsigned long)io_tlb_orig_addr,
297 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
298 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
299 sizeof(int)));
300 free_pages((unsigned long)io_tlb_start,
301 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
302 } else {
303 free_bootmem_late(__pa(io_tlb_overflow_buffer),
304 io_tlb_overflow);
305 free_bootmem_late(__pa(io_tlb_orig_addr),
306 io_tlb_nslabs * sizeof(phys_addr_t));
307 free_bootmem_late(__pa(io_tlb_list),
308 io_tlb_nslabs * sizeof(int));
309 free_bootmem_late(__pa(io_tlb_start),
310 io_tlb_nslabs << IO_TLB_SHIFT);
311 }
312}
313
02ca646e 314static int is_swiotlb_buffer(phys_addr_t paddr)
640aebfe 315{
02ca646e
FT
316 return paddr >= virt_to_phys(io_tlb_start) &&
317 paddr < virt_to_phys(io_tlb_end);
640aebfe
FT
318}
319
fb05a379
BB
320/*
321 * Bounce: copy the swiotlb buffer back to the original dma location
322 */
323static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
324 enum dma_data_direction dir)
325{
326 unsigned long pfn = PFN_DOWN(phys);
327
328 if (PageHighMem(pfn_to_page(pfn))) {
329 /* The buffer does not have a mapping. Map it in and copy */
330 unsigned int offset = phys & ~PAGE_MASK;
331 char *buffer;
332 unsigned int sz = 0;
333 unsigned long flags;
334
335 while (size) {
67131ad0 336 sz = min_t(size_t, PAGE_SIZE - offset, size);
fb05a379
BB
337
338 local_irq_save(flags);
339 buffer = kmap_atomic(pfn_to_page(pfn),
340 KM_BOUNCE_READ);
341 if (dir == DMA_TO_DEVICE)
342 memcpy(dma_addr, buffer + offset, sz);
ef9b1893 343 else
fb05a379
BB
344 memcpy(buffer + offset, dma_addr, sz);
345 kunmap_atomic(buffer, KM_BOUNCE_READ);
ef9b1893 346 local_irq_restore(flags);
fb05a379
BB
347
348 size -= sz;
349 pfn++;
350 dma_addr += sz;
351 offset = 0;
ef9b1893
JF
352 }
353 } else {
ef9b1893 354 if (dir == DMA_TO_DEVICE)
fb05a379 355 memcpy(dma_addr, phys_to_virt(phys), size);
ef9b1893 356 else
fb05a379 357 memcpy(phys_to_virt(phys), dma_addr, size);
ef9b1893 358 }
1b548f66
JF
359}
360
1da177e4
LT
361/*
362 * Allocates bounce buffer and returns its kernel virtual address.
363 */
364static void *
bc40ac66 365map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir)
1da177e4
LT
366{
367 unsigned long flags;
368 char *dma_addr;
369 unsigned int nslots, stride, index, wrap;
370 int i;
681cc5cd
FT
371 unsigned long start_dma_addr;
372 unsigned long mask;
373 unsigned long offset_slots;
374 unsigned long max_slots;
375
376 mask = dma_get_seg_boundary(hwdev);
70a7d3cc 377 start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask;
681cc5cd
FT
378
379 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
a5ddde4a
IC
380
381 /*
382 * Carefully handle integer overflow which can occur when mask == ~0UL.
383 */
b15a3891
JB
384 max_slots = mask + 1
385 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
386 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
1da177e4
LT
387
388 /*
389 * For mappings greater than a page, we limit the stride (and
390 * hence alignment) to a page size.
391 */
392 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
393 if (size > PAGE_SIZE)
394 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
395 else
396 stride = 1;
397
34814545 398 BUG_ON(!nslots);
1da177e4
LT
399
400 /*
401 * Find suitable number of IO TLB entries size that will fit this
402 * request and allocate a buffer from that IO TLB pool.
403 */
404 spin_lock_irqsave(&io_tlb_lock, flags);
a7133a15
AM
405 index = ALIGN(io_tlb_index, stride);
406 if (index >= io_tlb_nslabs)
407 index = 0;
408 wrap = index;
409
410 do {
a8522509
FT
411 while (iommu_is_span_boundary(index, nslots, offset_slots,
412 max_slots)) {
b15a3891
JB
413 index += stride;
414 if (index >= io_tlb_nslabs)
415 index = 0;
a7133a15
AM
416 if (index == wrap)
417 goto not_found;
418 }
419
420 /*
421 * If we find a slot that indicates we have 'nslots' number of
422 * contiguous buffers, we allocate the buffers from that slot
423 * and mark the entries as '0' indicating unavailable.
424 */
425 if (io_tlb_list[index] >= nslots) {
426 int count = 0;
427
428 for (i = index; i < (int) (index + nslots); i++)
429 io_tlb_list[i] = 0;
430 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
431 io_tlb_list[i] = ++count;
432 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
1da177e4 433
a7133a15
AM
434 /*
435 * Update the indices to avoid searching in the next
436 * round.
437 */
438 io_tlb_index = ((index + nslots) < io_tlb_nslabs
439 ? (index + nslots) : 0);
440
441 goto found;
442 }
443 index += stride;
444 if (index >= io_tlb_nslabs)
445 index = 0;
446 } while (index != wrap);
447
448not_found:
449 spin_unlock_irqrestore(&io_tlb_lock, flags);
450 return NULL;
451found:
1da177e4
LT
452 spin_unlock_irqrestore(&io_tlb_lock, flags);
453
454 /*
455 * Save away the mapping from the original address to the DMA address.
456 * This is needed when we sync the memory. Then we sync the buffer if
457 * needed.
458 */
bc40ac66
BB
459 for (i = 0; i < nslots; i++)
460 io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
1da177e4 461 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
fb05a379 462 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
1da177e4
LT
463
464 return dma_addr;
465}
466
467/*
468 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
469 */
470static void
7fcebbd2 471do_unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
1da177e4
LT
472{
473 unsigned long flags;
474 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
475 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
bc40ac66 476 phys_addr_t phys = io_tlb_orig_addr[index];
1da177e4
LT
477
478 /*
479 * First, sync the memory before unmapping the entry
480 */
bc40ac66 481 if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
fb05a379 482 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
1da177e4
LT
483
484 /*
485 * Return the buffer to the free list by setting the corresponding
486 * entries to indicate the number of contigous entries available.
487 * While returning the entries to the free list, we merge the entries
488 * with slots below and above the pool being returned.
489 */
490 spin_lock_irqsave(&io_tlb_lock, flags);
491 {
492 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
493 io_tlb_list[index + nslots] : 0);
494 /*
495 * Step 1: return the slots to the free list, merging the
496 * slots with superceeding slots
497 */
498 for (i = index + nslots - 1; i >= index; i--)
499 io_tlb_list[i] = ++count;
500 /*
501 * Step 2: merge the returned slots with the preceding slots,
502 * if available (non zero)
503 */
504 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
505 io_tlb_list[i] = ++count;
506 }
507 spin_unlock_irqrestore(&io_tlb_lock, flags);
508}
509
510static void
de69e0f0
JL
511sync_single(struct device *hwdev, char *dma_addr, size_t size,
512 int dir, int target)
1da177e4 513{
bc40ac66
BB
514 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
515 phys_addr_t phys = io_tlb_orig_addr[index];
516
517 phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
df336d1c 518
de69e0f0
JL
519 switch (target) {
520 case SYNC_FOR_CPU:
521 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
fb05a379 522 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
34814545
ES
523 else
524 BUG_ON(dir != DMA_TO_DEVICE);
de69e0f0
JL
525 break;
526 case SYNC_FOR_DEVICE:
527 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
fb05a379 528 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
34814545
ES
529 else
530 BUG_ON(dir != DMA_FROM_DEVICE);
de69e0f0
JL
531 break;
532 default:
1da177e4 533 BUG();
de69e0f0 534 }
1da177e4
LT
535}
536
537void *
538swiotlb_alloc_coherent(struct device *hwdev, size_t size,
06a54497 539 dma_addr_t *dma_handle, gfp_t flags)
1da177e4 540{
563aaf06 541 dma_addr_t dev_addr;
1da177e4
LT
542 void *ret;
543 int order = get_order(size);
284901a9 544 u64 dma_mask = DMA_BIT_MASK(32);
1e74f300
FT
545
546 if (hwdev && hwdev->coherent_dma_mask)
547 dma_mask = hwdev->coherent_dma_mask;
1da177e4 548
25667d67 549 ret = (void *)__get_free_pages(flags, order);
b9394647 550 if (ret && swiotlb_virt_to_bus(hwdev, ret) + size > dma_mask) {
1da177e4
LT
551 /*
552 * The allocated memory isn't reachable by the device.
1da177e4
LT
553 */
554 free_pages((unsigned long) ret, order);
555 ret = NULL;
556 }
557 if (!ret) {
558 /*
559 * We are either out of memory or the device can't DMA
ceb5ac32
BB
560 * to GFP_DMA memory; fall back on map_single(), which
561 * will grab memory from the lowest available address range.
1da177e4 562 */
bc40ac66 563 ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
9dfda12b 564 if (!ret)
1da177e4 565 return NULL;
1da177e4
LT
566 }
567
568 memset(ret, 0, size);
70a7d3cc 569 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
1da177e4
LT
570
571 /* Confirm address can be DMA'd by device */
b9394647 572 if (dev_addr + size > dma_mask) {
563aaf06 573 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
1e74f300 574 (unsigned long long)dma_mask,
563aaf06 575 (unsigned long long)dev_addr);
a2b89b59
FT
576
577 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
7fcebbd2 578 do_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
a2b89b59 579 return NULL;
1da177e4
LT
580 }
581 *dma_handle = dev_addr;
582 return ret;
583}
874d6a95 584EXPORT_SYMBOL(swiotlb_alloc_coherent);
1da177e4
LT
585
586void
587swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
02ca646e 588 dma_addr_t dev_addr)
1da177e4 589{
862d196b 590 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
02ca646e 591
aa24886e 592 WARN_ON(irqs_disabled());
02ca646e
FT
593 if (!is_swiotlb_buffer(paddr))
594 free_pages((unsigned long)vaddr, get_order(size));
1da177e4
LT
595 else
596 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
7fcebbd2 597 do_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
1da177e4 598}
874d6a95 599EXPORT_SYMBOL(swiotlb_free_coherent);
1da177e4
LT
600
601static void
602swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
603{
604 /*
605 * Ran out of IOMMU space for this operation. This is very bad.
606 * Unfortunately the drivers cannot handle this operation properly.
17e5ad6c 607 * unless they check for dma_mapping_error (most don't)
1da177e4
LT
608 * When the mapping is small enough return a static buffer to limit
609 * the damage, or panic when the transfer is too big.
610 */
563aaf06 611 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
94b32486 612 "device %s\n", size, dev ? dev_name(dev) : "?");
1da177e4 613
c7084b35
CD
614 if (size <= io_tlb_overflow || !do_panic)
615 return;
616
617 if (dir == DMA_BIDIRECTIONAL)
618 panic("DMA: Random memory could be DMA accessed\n");
619 if (dir == DMA_FROM_DEVICE)
620 panic("DMA: Random memory could be DMA written\n");
621 if (dir == DMA_TO_DEVICE)
622 panic("DMA: Random memory could be DMA read\n");
1da177e4
LT
623}
624
625/*
626 * Map a single buffer of the indicated size for DMA in streaming mode. The
17e5ad6c 627 * physical address to use is returned.
1da177e4
LT
628 *
629 * Once the device is given the dma address, the device owns this memory until
ceb5ac32 630 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
1da177e4 631 */
f98eee8e
FT
632dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
633 unsigned long offset, size_t size,
634 enum dma_data_direction dir,
635 struct dma_attrs *attrs)
1da177e4 636{
f98eee8e 637 phys_addr_t phys = page_to_phys(page) + offset;
862d196b 638 dma_addr_t dev_addr = phys_to_dma(dev, phys);
1da177e4
LT
639 void *map;
640
34814545 641 BUG_ON(dir == DMA_NONE);
1da177e4 642 /*
ceb5ac32 643 * If the address happens to be in the device's DMA window,
1da177e4
LT
644 * we can safely return the device addr and not worry about bounce
645 * buffering it.
646 */
b9394647 647 if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
1da177e4
LT
648 return dev_addr;
649
650 /*
651 * Oh well, have to allocate and map a bounce buffer.
652 */
f98eee8e 653 map = map_single(dev, phys, size, dir);
1da177e4 654 if (!map) {
f98eee8e 655 swiotlb_full(dev, size, dir, 1);
1da177e4
LT
656 map = io_tlb_overflow_buffer;
657 }
658
f98eee8e 659 dev_addr = swiotlb_virt_to_bus(dev, map);
1da177e4
LT
660
661 /*
662 * Ensure that the address returned is DMA'ble
663 */
b9394647 664 if (!dma_capable(dev, dev_addr, size))
1da177e4
LT
665 panic("map_single: bounce buffer is not DMA'ble");
666
667 return dev_addr;
668}
f98eee8e 669EXPORT_SYMBOL_GPL(swiotlb_map_page);
1da177e4 670
1da177e4
LT
671/*
672 * Unmap a single streaming mode DMA translation. The dma_addr and size must
ceb5ac32 673 * match what was provided for in a previous swiotlb_map_page call. All
1da177e4
LT
674 * other usages are undefined.
675 *
676 * After this call, reads by the cpu to the buffer are guaranteed to see
677 * whatever the device wrote there.
678 */
7fcebbd2
BB
679static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
680 size_t size, int dir)
1da177e4 681{
862d196b 682 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
1da177e4 683
34814545 684 BUG_ON(dir == DMA_NONE);
7fcebbd2 685
02ca646e
FT
686 if (is_swiotlb_buffer(paddr)) {
687 do_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
7fcebbd2
BB
688 return;
689 }
690
691 if (dir != DMA_FROM_DEVICE)
692 return;
693
02ca646e
FT
694 /*
695 * phys_to_virt doesn't work with hihgmem page but we could
696 * call dma_mark_clean() with hihgmem page here. However, we
697 * are fine since dma_mark_clean() is null on POWERPC. We can
698 * make dma_mark_clean() take a physical address if necessary.
699 */
700 dma_mark_clean(phys_to_virt(paddr), size);
7fcebbd2
BB
701}
702
703void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
704 size_t size, enum dma_data_direction dir,
705 struct dma_attrs *attrs)
706{
707 unmap_single(hwdev, dev_addr, size, dir);
1da177e4 708}
f98eee8e 709EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
874d6a95 710
1da177e4
LT
711/*
712 * Make physical memory consistent for a single streaming mode DMA translation
713 * after a transfer.
714 *
ceb5ac32 715 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
17e5ad6c
TL
716 * using the cpu, yet do not wish to teardown the dma mapping, you must
717 * call this function before doing so. At the next point you give the dma
1da177e4
LT
718 * address back to the card, you must first perform a
719 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
720 */
be6b0267 721static void
8270f3f1 722swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0 723 size_t size, int dir, int target)
1da177e4 724{
862d196b 725 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
1da177e4 726
34814545 727 BUG_ON(dir == DMA_NONE);
380d6878 728
02ca646e
FT
729 if (is_swiotlb_buffer(paddr)) {
730 sync_single(hwdev, phys_to_virt(paddr), size, dir, target);
380d6878
BB
731 return;
732 }
733
734 if (dir != DMA_FROM_DEVICE)
735 return;
736
02ca646e 737 dma_mark_clean(phys_to_virt(paddr), size);
1da177e4
LT
738}
739
8270f3f1
JL
740void
741swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
160c1d8e 742 size_t size, enum dma_data_direction dir)
8270f3f1 743{
de69e0f0 744 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
8270f3f1 745}
874d6a95 746EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
8270f3f1 747
1da177e4
LT
748void
749swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
160c1d8e 750 size_t size, enum dma_data_direction dir)
1da177e4 751{
de69e0f0 752 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
1da177e4 753}
874d6a95 754EXPORT_SYMBOL(swiotlb_sync_single_for_device);
1da177e4 755
878a97cf
JL
756/*
757 * Same as above, but for a sub-range of the mapping.
758 */
be6b0267 759static void
878a97cf 760swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0
JL
761 unsigned long offset, size_t size,
762 int dir, int target)
878a97cf 763{
380d6878 764 swiotlb_sync_single(hwdev, dev_addr + offset, size, dir, target);
878a97cf
JL
765}
766
767void
768swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
160c1d8e
FT
769 unsigned long offset, size_t size,
770 enum dma_data_direction dir)
878a97cf 771{
de69e0f0
JL
772 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
773 SYNC_FOR_CPU);
878a97cf 774}
874d6a95 775EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
878a97cf
JL
776
777void
778swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
160c1d8e
FT
779 unsigned long offset, size_t size,
780 enum dma_data_direction dir)
878a97cf 781{
de69e0f0
JL
782 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
783 SYNC_FOR_DEVICE);
878a97cf 784}
874d6a95 785EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
878a97cf 786
1da177e4
LT
787/*
788 * Map a set of buffers described by scatterlist in streaming mode for DMA.
ceb5ac32 789 * This is the scatter-gather version of the above swiotlb_map_page
1da177e4
LT
790 * interface. Here the scatter gather list elements are each tagged with the
791 * appropriate dma address and length. They are obtained via
792 * sg_dma_{address,length}(SG).
793 *
794 * NOTE: An implementation may be able to use a smaller number of
795 * DMA address/length pairs than there are SG table elements.
796 * (for example via virtual mapping capabilities)
797 * The routine returns the number of addr/length pairs actually
798 * used, at most nents.
799 *
ceb5ac32 800 * Device ownership issues as mentioned above for swiotlb_map_page are the
1da177e4
LT
801 * same here.
802 */
803int
309df0c5 804swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
160c1d8e 805 enum dma_data_direction dir, struct dma_attrs *attrs)
1da177e4 806{
dbfd49fe 807 struct scatterlist *sg;
1da177e4
LT
808 int i;
809
34814545 810 BUG_ON(dir == DMA_NONE);
1da177e4 811
dbfd49fe 812 for_each_sg(sgl, sg, nelems, i) {
961d7d0e 813 phys_addr_t paddr = sg_phys(sg);
862d196b 814 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
bc40ac66 815
cf56e3f2 816 if (swiotlb_force ||
b9394647 817 !dma_capable(hwdev, dev_addr, sg->length)) {
bc40ac66
BB
818 void *map = map_single(hwdev, sg_phys(sg),
819 sg->length, dir);
7e870233 820 if (!map) {
1da177e4
LT
821 /* Don't panic here, we expect map_sg users
822 to do proper error handling. */
823 swiotlb_full(hwdev, sg->length, dir, 0);
309df0c5
AK
824 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
825 attrs);
dbfd49fe 826 sgl[0].dma_length = 0;
1da177e4
LT
827 return 0;
828 }
70a7d3cc 829 sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
1da177e4
LT
830 } else
831 sg->dma_address = dev_addr;
832 sg->dma_length = sg->length;
833 }
834 return nelems;
835}
309df0c5
AK
836EXPORT_SYMBOL(swiotlb_map_sg_attrs);
837
838int
839swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
840 int dir)
841{
842 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
843}
874d6a95 844EXPORT_SYMBOL(swiotlb_map_sg);
1da177e4
LT
845
846/*
847 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
ceb5ac32 848 * concerning calls here are the same as for swiotlb_unmap_page() above.
1da177e4
LT
849 */
850void
309df0c5 851swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
160c1d8e 852 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
1da177e4 853{
dbfd49fe 854 struct scatterlist *sg;
1da177e4
LT
855 int i;
856
34814545 857 BUG_ON(dir == DMA_NONE);
1da177e4 858
7fcebbd2
BB
859 for_each_sg(sgl, sg, nelems, i)
860 unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
861
1da177e4 862}
309df0c5
AK
863EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
864
865void
866swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
867 int dir)
868{
869 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
870}
874d6a95 871EXPORT_SYMBOL(swiotlb_unmap_sg);
1da177e4
LT
872
873/*
874 * Make physical memory consistent for a set of streaming mode DMA translations
875 * after a transfer.
876 *
877 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
878 * and usage.
879 */
be6b0267 880static void
dbfd49fe 881swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
de69e0f0 882 int nelems, int dir, int target)
1da177e4 883{
dbfd49fe 884 struct scatterlist *sg;
1da177e4
LT
885 int i;
886
380d6878
BB
887 for_each_sg(sgl, sg, nelems, i)
888 swiotlb_sync_single(hwdev, sg->dma_address,
de69e0f0 889 sg->dma_length, dir, target);
1da177e4
LT
890}
891
8270f3f1
JL
892void
893swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
160c1d8e 894 int nelems, enum dma_data_direction dir)
8270f3f1 895{
de69e0f0 896 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
8270f3f1 897}
874d6a95 898EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
8270f3f1 899
1da177e4
LT
900void
901swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
160c1d8e 902 int nelems, enum dma_data_direction dir)
1da177e4 903{
de69e0f0 904 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1da177e4 905}
874d6a95 906EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
1da177e4
LT
907
908int
8d8bb39b 909swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
1da177e4 910{
70a7d3cc 911 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
1da177e4 912}
874d6a95 913EXPORT_SYMBOL(swiotlb_dma_mapping_error);
1da177e4
LT
914
915/*
17e5ad6c 916 * Return whether the given device DMA address mask can be supported
1da177e4 917 * properly. For example, if your device can only drive the low 24-bits
17e5ad6c 918 * during bus mastering, then you would pass 0x00ffffff as the mask to
1da177e4
LT
919 * this function.
920 */
921int
563aaf06 922swiotlb_dma_supported(struct device *hwdev, u64 mask)
1da177e4 923{
70a7d3cc 924 return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
1da177e4 925}
1da177e4 926EXPORT_SYMBOL(swiotlb_dma_supported);