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1da177e4
LT
1/*
2 * Dynamic DMA mapping support.
3 *
569c8bf5 4 * This implementation is for IA-64 and EM64T platforms that do not support
1da177e4
LT
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
569c8bf5
JL
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
1da177e4
LT
17 */
18
19#include <linux/cache.h>
17e5ad6c 20#include <linux/dma-mapping.h>
1da177e4
LT
21#include <linux/mm.h>
22#include <linux/module.h>
1da177e4
LT
23#include <linux/spinlock.h>
24#include <linux/string.h>
25#include <linux/types.h>
26#include <linux/ctype.h>
27
28#include <asm/io.h>
1da177e4 29#include <asm/dma.h>
17e5ad6c 30#include <asm/scatterlist.h>
1da177e4
LT
31
32#include <linux/init.h>
33#include <linux/bootmem.h>
34
35#define OFFSET(val,align) ((unsigned long) \
36 ( (val) & ( (align) - 1)))
37
38#define SG_ENT_VIRT_ADDRESS(sg) (page_address((sg)->page) + (sg)->offset)
39#define SG_ENT_PHYS_ADDRESS(SG) virt_to_phys(SG_ENT_VIRT_ADDRESS(SG))
40
41/*
42 * Maximum allowable number of contiguous slabs to map,
43 * must be a power of 2. What is the appropriate value ?
44 * The complexity of {map,unmap}_single is linearly dependent on this value.
45 */
46#define IO_TLB_SEGSIZE 128
47
48/*
49 * log of the size of each IO TLB slab. The number of slabs is command line
50 * controllable.
51 */
52#define IO_TLB_SHIFT 11
53
0b9afede
AW
54#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
55
56/*
57 * Minimum IO TLB size to bother booting with. Systems with mainly
58 * 64bit capable cards will only lightly use the swiotlb. If we can't
59 * allocate a contiguous 1MB, we're probably in trouble anyway.
60 */
61#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
62
de69e0f0
JL
63/*
64 * Enumeration for sync targets
65 */
66enum dma_sync_target {
67 SYNC_FOR_CPU = 0,
68 SYNC_FOR_DEVICE = 1,
69};
70
1da177e4
LT
71int swiotlb_force;
72
73/*
74 * Used to do a quick range check in swiotlb_unmap_single and
75 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
76 * API.
77 */
78static char *io_tlb_start, *io_tlb_end;
79
80/*
81 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
82 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
83 */
84static unsigned long io_tlb_nslabs;
85
86/*
87 * When the IOMMU overflows we return a fallback buffer. This sets the size.
88 */
89static unsigned long io_tlb_overflow = 32*1024;
90
91void *io_tlb_overflow_buffer;
92
93/*
94 * This is a free list describing the number of free entries available from
95 * each index
96 */
97static unsigned int *io_tlb_list;
98static unsigned int io_tlb_index;
99
100/*
101 * We need to save away the original address corresponding to a mapped entry
102 * for the sync operations.
103 */
104static unsigned char **io_tlb_orig_addr;
105
106/*
107 * Protect the above data structures in the map and unmap calls
108 */
109static DEFINE_SPINLOCK(io_tlb_lock);
110
111static int __init
112setup_io_tlb_npages(char *str)
113{
114 if (isdigit(*str)) {
e8579e72 115 io_tlb_nslabs = simple_strtoul(str, &str, 0);
1da177e4
LT
116 /* avoid tail segment of size < IO_TLB_SEGSIZE */
117 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
118 }
119 if (*str == ',')
120 ++str;
121 if (!strcmp(str, "force"))
122 swiotlb_force = 1;
123 return 1;
124}
125__setup("swiotlb=", setup_io_tlb_npages);
126/* make io_tlb_overflow tunable too? */
127
128/*
129 * Statically reserve bounce buffer space and initialize bounce buffer data
17e5ad6c 130 * structures for the software IO TLB used to implement the DMA API.
1da177e4
LT
131 */
132void
133swiotlb_init_with_default_size (size_t default_size)
134{
135 unsigned long i;
136
137 if (!io_tlb_nslabs) {
e8579e72 138 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
1da177e4
LT
139 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
140 }
141
142 /*
143 * Get IO TLB memory from the low pages
144 */
008857c1 145 io_tlb_start = alloc_bootmem_low_pages(io_tlb_nslabs * (1 << IO_TLB_SHIFT));
1da177e4
LT
146 if (!io_tlb_start)
147 panic("Cannot allocate SWIOTLB buffer");
148 io_tlb_end = io_tlb_start + io_tlb_nslabs * (1 << IO_TLB_SHIFT);
149
150 /*
151 * Allocate and initialize the free list array. This array is used
152 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
153 * between io_tlb_start and io_tlb_end.
154 */
155 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
156 for (i = 0; i < io_tlb_nslabs; i++)
157 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
158 io_tlb_index = 0;
159 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
160
161 /*
162 * Get the overflow emergency buffer
163 */
164 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
165 printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
166 virt_to_phys(io_tlb_start), virt_to_phys(io_tlb_end));
167}
168
169void
170swiotlb_init (void)
171{
172 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
173}
174
0b9afede
AW
175/*
176 * Systems with larger DMA zones (those that don't support ISA) can
177 * initialize the swiotlb later using the slab allocator if needed.
178 * This should be just like above, but with some error catching.
179 */
180int
181swiotlb_late_init_with_default_size (size_t default_size)
182{
183 unsigned long i, req_nslabs = io_tlb_nslabs;
184 unsigned int order;
185
186 if (!io_tlb_nslabs) {
187 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
188 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
189 }
190
191 /*
192 * Get IO TLB memory from the low pages
193 */
194 order = get_order(io_tlb_nslabs * (1 << IO_TLB_SHIFT));
195 io_tlb_nslabs = SLABS_PER_PAGE << order;
196
197 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
198 io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
199 order);
200 if (io_tlb_start)
201 break;
202 order--;
203 }
204
205 if (!io_tlb_start)
206 goto cleanup1;
207
208 if (order != get_order(io_tlb_nslabs * (1 << IO_TLB_SHIFT))) {
209 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
210 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
211 io_tlb_nslabs = SLABS_PER_PAGE << order;
212 }
213 io_tlb_end = io_tlb_start + io_tlb_nslabs * (1 << IO_TLB_SHIFT);
214 memset(io_tlb_start, 0, io_tlb_nslabs * (1 << IO_TLB_SHIFT));
215
216 /*
217 * Allocate and initialize the free list array. This array is used
218 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
219 * between io_tlb_start and io_tlb_end.
220 */
221 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
222 get_order(io_tlb_nslabs * sizeof(int)));
223 if (!io_tlb_list)
224 goto cleanup2;
225
226 for (i = 0; i < io_tlb_nslabs; i++)
227 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
228 io_tlb_index = 0;
229
230 io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
231 get_order(io_tlb_nslabs * sizeof(char *)));
232 if (!io_tlb_orig_addr)
233 goto cleanup3;
234
235 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
236
237 /*
238 * Get the overflow emergency buffer
239 */
240 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
241 get_order(io_tlb_overflow));
242 if (!io_tlb_overflow_buffer)
243 goto cleanup4;
244
245 printk(KERN_INFO "Placing %ldMB software IO TLB between 0x%lx - "
246 "0x%lx\n", (io_tlb_nslabs * (1 << IO_TLB_SHIFT)) >> 20,
247 virt_to_phys(io_tlb_start), virt_to_phys(io_tlb_end));
248
249 return 0;
250
251cleanup4:
252 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
253 sizeof(char *)));
254 io_tlb_orig_addr = NULL;
255cleanup3:
256 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
257 sizeof(int)));
258 io_tlb_list = NULL;
259 io_tlb_end = NULL;
260cleanup2:
261 free_pages((unsigned long)io_tlb_start, order);
262 io_tlb_start = NULL;
263cleanup1:
264 io_tlb_nslabs = req_nslabs;
265 return -ENOMEM;
266}
267
1da177e4
LT
268static inline int
269address_needs_mapping(struct device *hwdev, dma_addr_t addr)
270{
271 dma_addr_t mask = 0xffffffff;
272 /* If the device has a mask, use it, otherwise default to 32 bits */
273 if (hwdev && hwdev->dma_mask)
274 mask = *hwdev->dma_mask;
275 return (addr & ~mask) != 0;
276}
277
278/*
279 * Allocates bounce buffer and returns its kernel virtual address.
280 */
281static void *
282map_single(struct device *hwdev, char *buffer, size_t size, int dir)
283{
284 unsigned long flags;
285 char *dma_addr;
286 unsigned int nslots, stride, index, wrap;
287 int i;
288
289 /*
290 * For mappings greater than a page, we limit the stride (and
291 * hence alignment) to a page size.
292 */
293 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
294 if (size > PAGE_SIZE)
295 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
296 else
297 stride = 1;
298
299 if (!nslots)
300 BUG();
301
302 /*
303 * Find suitable number of IO TLB entries size that will fit this
304 * request and allocate a buffer from that IO TLB pool.
305 */
306 spin_lock_irqsave(&io_tlb_lock, flags);
307 {
308 wrap = index = ALIGN(io_tlb_index, stride);
309
310 if (index >= io_tlb_nslabs)
311 wrap = index = 0;
312
313 do {
314 /*
315 * If we find a slot that indicates we have 'nslots'
316 * number of contiguous buffers, we allocate the
317 * buffers from that slot and mark the entries as '0'
318 * indicating unavailable.
319 */
320 if (io_tlb_list[index] >= nslots) {
321 int count = 0;
322
323 for (i = index; i < (int) (index + nslots); i++)
324 io_tlb_list[i] = 0;
325 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
326 io_tlb_list[i] = ++count;
327 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
328
329 /*
330 * Update the indices to avoid searching in
331 * the next round.
332 */
333 io_tlb_index = ((index + nslots) < io_tlb_nslabs
334 ? (index + nslots) : 0);
335
336 goto found;
337 }
338 index += stride;
339 if (index >= io_tlb_nslabs)
340 index = 0;
341 } while (index != wrap);
342
343 spin_unlock_irqrestore(&io_tlb_lock, flags);
344 return NULL;
345 }
346 found:
347 spin_unlock_irqrestore(&io_tlb_lock, flags);
348
349 /*
350 * Save away the mapping from the original address to the DMA address.
351 * This is needed when we sync the memory. Then we sync the buffer if
352 * needed.
353 */
354 io_tlb_orig_addr[index] = buffer;
355 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
356 memcpy(dma_addr, buffer, size);
357
358 return dma_addr;
359}
360
361/*
362 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
363 */
364static void
365unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
366{
367 unsigned long flags;
368 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
369 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
370 char *buffer = io_tlb_orig_addr[index];
371
372 /*
373 * First, sync the memory before unmapping the entry
374 */
375 if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
376 /*
377 * bounce... copy the data back into the original buffer * and
378 * delete the bounce buffer.
379 */
380 memcpy(buffer, dma_addr, size);
381
382 /*
383 * Return the buffer to the free list by setting the corresponding
384 * entries to indicate the number of contigous entries available.
385 * While returning the entries to the free list, we merge the entries
386 * with slots below and above the pool being returned.
387 */
388 spin_lock_irqsave(&io_tlb_lock, flags);
389 {
390 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
391 io_tlb_list[index + nslots] : 0);
392 /*
393 * Step 1: return the slots to the free list, merging the
394 * slots with superceeding slots
395 */
396 for (i = index + nslots - 1; i >= index; i--)
397 io_tlb_list[i] = ++count;
398 /*
399 * Step 2: merge the returned slots with the preceding slots,
400 * if available (non zero)
401 */
402 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
403 io_tlb_list[i] = ++count;
404 }
405 spin_unlock_irqrestore(&io_tlb_lock, flags);
406}
407
408static void
de69e0f0
JL
409sync_single(struct device *hwdev, char *dma_addr, size_t size,
410 int dir, int target)
1da177e4
LT
411{
412 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
413 char *buffer = io_tlb_orig_addr[index];
414
de69e0f0
JL
415 switch (target) {
416 case SYNC_FOR_CPU:
417 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
418 memcpy(buffer, dma_addr, size);
419 else if (dir != DMA_TO_DEVICE)
420 BUG();
421 break;
422 case SYNC_FOR_DEVICE:
423 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
424 memcpy(dma_addr, buffer, size);
425 else if (dir != DMA_FROM_DEVICE)
426 BUG();
427 break;
428 default:
1da177e4 429 BUG();
de69e0f0 430 }
1da177e4
LT
431}
432
433void *
434swiotlb_alloc_coherent(struct device *hwdev, size_t size,
06a54497 435 dma_addr_t *dma_handle, gfp_t flags)
1da177e4
LT
436{
437 unsigned long dev_addr;
438 void *ret;
439 int order = get_order(size);
440
441 /*
442 * XXX fix me: the DMA API should pass us an explicit DMA mask
443 * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
444 * bit range instead of a 16MB one).
445 */
446 flags |= GFP_DMA;
447
448 ret = (void *)__get_free_pages(flags, order);
449 if (ret && address_needs_mapping(hwdev, virt_to_phys(ret))) {
450 /*
451 * The allocated memory isn't reachable by the device.
452 * Fall back on swiotlb_map_single().
453 */
454 free_pages((unsigned long) ret, order);
455 ret = NULL;
456 }
457 if (!ret) {
458 /*
459 * We are either out of memory or the device can't DMA
460 * to GFP_DMA memory; fall back on
461 * swiotlb_map_single(), which will grab memory from
462 * the lowest available address range.
463 */
464 dma_addr_t handle;
465 handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
17a941d8 466 if (swiotlb_dma_mapping_error(handle))
1da177e4
LT
467 return NULL;
468
469 ret = phys_to_virt(handle);
470 }
471
472 memset(ret, 0, size);
473 dev_addr = virt_to_phys(ret);
474
475 /* Confirm address can be DMA'd by device */
476 if (address_needs_mapping(hwdev, dev_addr)) {
477 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016lx\n",
478 (unsigned long long)*hwdev->dma_mask, dev_addr);
479 panic("swiotlb_alloc_coherent: allocated memory is out of "
480 "range for device");
481 }
482 *dma_handle = dev_addr;
483 return ret;
484}
485
486void
487swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
488 dma_addr_t dma_handle)
489{
490 if (!(vaddr >= (void *)io_tlb_start
491 && vaddr < (void *)io_tlb_end))
492 free_pages((unsigned long) vaddr, get_order(size));
493 else
494 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
495 swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
496}
497
498static void
499swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
500{
501 /*
502 * Ran out of IOMMU space for this operation. This is very bad.
503 * Unfortunately the drivers cannot handle this operation properly.
17e5ad6c 504 * unless they check for dma_mapping_error (most don't)
1da177e4
LT
505 * When the mapping is small enough return a static buffer to limit
506 * the damage, or panic when the transfer is too big.
507 */
17e5ad6c 508 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %lu bytes at "
1da177e4
LT
509 "device %s\n", size, dev ? dev->bus_id : "?");
510
511 if (size > io_tlb_overflow && do_panic) {
17e5ad6c
TL
512 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
513 panic("DMA: Memory would be corrupted\n");
514 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
515 panic("DMA: Random memory would be DMAed\n");
1da177e4
LT
516 }
517}
518
519/*
520 * Map a single buffer of the indicated size for DMA in streaming mode. The
17e5ad6c 521 * physical address to use is returned.
1da177e4
LT
522 *
523 * Once the device is given the dma address, the device owns this memory until
524 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
525 */
526dma_addr_t
527swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
528{
529 unsigned long dev_addr = virt_to_phys(ptr);
530 void *map;
531
532 if (dir == DMA_NONE)
533 BUG();
534 /*
535 * If the pointer passed in happens to be in the device's DMA window,
536 * we can safely return the device addr and not worry about bounce
537 * buffering it.
538 */
539 if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force)
540 return dev_addr;
541
542 /*
543 * Oh well, have to allocate and map a bounce buffer.
544 */
545 map = map_single(hwdev, ptr, size, dir);
546 if (!map) {
547 swiotlb_full(hwdev, size, dir, 1);
548 map = io_tlb_overflow_buffer;
549 }
550
551 dev_addr = virt_to_phys(map);
552
553 /*
554 * Ensure that the address returned is DMA'ble
555 */
556 if (address_needs_mapping(hwdev, dev_addr))
557 panic("map_single: bounce buffer is not DMA'ble");
558
559 return dev_addr;
560}
561
562/*
563 * Since DMA is i-cache coherent, any (complete) pages that were written via
564 * DMA can be marked as "clean" so that lazy_mmu_prot_update() doesn't have to
565 * flush them when they get mapped into an executable vm-area.
566 */
567static void
568mark_clean(void *addr, size_t size)
569{
570 unsigned long pg_addr, end;
571
572 pg_addr = PAGE_ALIGN((unsigned long) addr);
573 end = (unsigned long) addr + size;
574 while (pg_addr + PAGE_SIZE <= end) {
575 struct page *page = virt_to_page(pg_addr);
576 set_bit(PG_arch_1, &page->flags);
577 pg_addr += PAGE_SIZE;
578 }
579}
580
581/*
582 * Unmap a single streaming mode DMA translation. The dma_addr and size must
583 * match what was provided for in a previous swiotlb_map_single call. All
584 * other usages are undefined.
585 *
586 * After this call, reads by the cpu to the buffer are guaranteed to see
587 * whatever the device wrote there.
588 */
589void
590swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
591 int dir)
592{
593 char *dma_addr = phys_to_virt(dev_addr);
594
595 if (dir == DMA_NONE)
596 BUG();
597 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
598 unmap_single(hwdev, dma_addr, size, dir);
599 else if (dir == DMA_FROM_DEVICE)
600 mark_clean(dma_addr, size);
601}
602
603/*
604 * Make physical memory consistent for a single streaming mode DMA translation
605 * after a transfer.
606 *
607 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
17e5ad6c
TL
608 * using the cpu, yet do not wish to teardown the dma mapping, you must
609 * call this function before doing so. At the next point you give the dma
1da177e4
LT
610 * address back to the card, you must first perform a
611 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
612 */
8270f3f1
JL
613static inline void
614swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0 615 size_t size, int dir, int target)
1da177e4
LT
616{
617 char *dma_addr = phys_to_virt(dev_addr);
618
619 if (dir == DMA_NONE)
620 BUG();
621 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
de69e0f0 622 sync_single(hwdev, dma_addr, size, dir, target);
1da177e4
LT
623 else if (dir == DMA_FROM_DEVICE)
624 mark_clean(dma_addr, size);
625}
626
8270f3f1
JL
627void
628swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
629 size_t size, int dir)
630{
de69e0f0 631 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
8270f3f1
JL
632}
633
1da177e4
LT
634void
635swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
636 size_t size, int dir)
637{
de69e0f0 638 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
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639}
640
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641/*
642 * Same as above, but for a sub-range of the mapping.
643 */
644static inline void
645swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
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646 unsigned long offset, size_t size,
647 int dir, int target)
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648{
649 char *dma_addr = phys_to_virt(dev_addr) + offset;
650
651 if (dir == DMA_NONE)
652 BUG();
653 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
de69e0f0 654 sync_single(hwdev, dma_addr, size, dir, target);
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655 else if (dir == DMA_FROM_DEVICE)
656 mark_clean(dma_addr, size);
657}
658
659void
660swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
661 unsigned long offset, size_t size, int dir)
662{
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663 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
664 SYNC_FOR_CPU);
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665}
666
667void
668swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
669 unsigned long offset, size_t size, int dir)
670{
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671 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
672 SYNC_FOR_DEVICE);
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673}
674
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675/*
676 * Map a set of buffers described by scatterlist in streaming mode for DMA.
677 * This is the scatter-gather version of the above swiotlb_map_single
678 * interface. Here the scatter gather list elements are each tagged with the
679 * appropriate dma address and length. They are obtained via
680 * sg_dma_{address,length}(SG).
681 *
682 * NOTE: An implementation may be able to use a smaller number of
683 * DMA address/length pairs than there are SG table elements.
684 * (for example via virtual mapping capabilities)
685 * The routine returns the number of addr/length pairs actually
686 * used, at most nents.
687 *
688 * Device ownership issues as mentioned above for swiotlb_map_single are the
689 * same here.
690 */
691int
692swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
693 int dir)
694{
695 void *addr;
696 unsigned long dev_addr;
697 int i;
698
699 if (dir == DMA_NONE)
700 BUG();
701
702 for (i = 0; i < nelems; i++, sg++) {
703 addr = SG_ENT_VIRT_ADDRESS(sg);
704 dev_addr = virt_to_phys(addr);
705 if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) {
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706 void *map = map_single(hwdev, addr, sg->length, dir);
707 sg->dma_address = virt_to_bus(map);
708 if (!map) {
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709 /* Don't panic here, we expect map_sg users
710 to do proper error handling. */
711 swiotlb_full(hwdev, sg->length, dir, 0);
712 swiotlb_unmap_sg(hwdev, sg - i, i, dir);
713 sg[0].dma_length = 0;
714 return 0;
715 }
716 } else
717 sg->dma_address = dev_addr;
718 sg->dma_length = sg->length;
719 }
720 return nelems;
721}
722
723/*
724 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
725 * concerning calls here are the same as for swiotlb_unmap_single() above.
726 */
727void
728swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
729 int dir)
730{
731 int i;
732
733 if (dir == DMA_NONE)
734 BUG();
735
736 for (i = 0; i < nelems; i++, sg++)
737 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
738 unmap_single(hwdev, (void *) phys_to_virt(sg->dma_address), sg->dma_length, dir);
739 else if (dir == DMA_FROM_DEVICE)
740 mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
741}
742
743/*
744 * Make physical memory consistent for a set of streaming mode DMA translations
745 * after a transfer.
746 *
747 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
748 * and usage.
749 */
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750static inline void
751swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sg,
de69e0f0 752 int nelems, int dir, int target)
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753{
754 int i;
755
756 if (dir == DMA_NONE)
757 BUG();
758
759 for (i = 0; i < nelems; i++, sg++)
760 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
761 sync_single(hwdev, (void *) sg->dma_address,
de69e0f0 762 sg->dma_length, dir, target);
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763}
764
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765void
766swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
767 int nelems, int dir)
768{
de69e0f0 769 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
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770}
771
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772void
773swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
774 int nelems, int dir)
775{
de69e0f0 776 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
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777}
778
779int
780swiotlb_dma_mapping_error(dma_addr_t dma_addr)
781{
782 return (dma_addr == virt_to_phys(io_tlb_overflow_buffer));
783}
784
785/*
17e5ad6c 786 * Return whether the given device DMA address mask can be supported
1da177e4 787 * properly. For example, if your device can only drive the low 24-bits
17e5ad6c 788 * during bus mastering, then you would pass 0x00ffffff as the mask to
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789 * this function.
790 */
791int
792swiotlb_dma_supported (struct device *hwdev, u64 mask)
793{
794 return (virt_to_phys (io_tlb_end) - 1) <= mask;
795}
796
797EXPORT_SYMBOL(swiotlb_init);
798EXPORT_SYMBOL(swiotlb_map_single);
799EXPORT_SYMBOL(swiotlb_unmap_single);
800EXPORT_SYMBOL(swiotlb_map_sg);
801EXPORT_SYMBOL(swiotlb_unmap_sg);
802EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
803EXPORT_SYMBOL(swiotlb_sync_single_for_device);
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804EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
805EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
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806EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
807EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
808EXPORT_SYMBOL(swiotlb_dma_mapping_error);
809EXPORT_SYMBOL(swiotlb_alloc_coherent);
810EXPORT_SYMBOL(swiotlb_free_coherent);
811EXPORT_SYMBOL(swiotlb_dma_supported);