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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Dynamic DMA mapping support. | |
3 | * | |
563aaf06 | 4 | * This implementation is a fallback for platforms that do not support |
1da177e4 LT |
5 | * I/O TLBs (aka DMA address translation hardware). |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
569c8bf5 JL |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
1da177e4 LT |
17 | */ |
18 | ||
19 | #include <linux/cache.h> | |
17e5ad6c | 20 | #include <linux/dma-mapping.h> |
1da177e4 LT |
21 | #include <linux/mm.h> |
22 | #include <linux/module.h> | |
1da177e4 | 23 | #include <linux/spinlock.h> |
8c5df16b | 24 | #include <linux/swiotlb.h> |
1da177e4 LT |
25 | #include <linux/string.h> |
26 | #include <linux/types.h> | |
27 | #include <linux/ctype.h> | |
28 | ||
29 | #include <asm/io.h> | |
1da177e4 | 30 | #include <asm/dma.h> |
17e5ad6c | 31 | #include <asm/scatterlist.h> |
1da177e4 LT |
32 | |
33 | #include <linux/init.h> | |
34 | #include <linux/bootmem.h> | |
a8522509 | 35 | #include <linux/iommu-helper.h> |
1da177e4 LT |
36 | |
37 | #define OFFSET(val,align) ((unsigned long) \ | |
38 | ( (val) & ( (align) - 1))) | |
39 | ||
f9527f12 | 40 | #define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg))) |
93fbff63 | 41 | #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg)) |
1da177e4 LT |
42 | |
43 | /* | |
44 | * Maximum allowable number of contiguous slabs to map, | |
45 | * must be a power of 2. What is the appropriate value ? | |
46 | * The complexity of {map,unmap}_single is linearly dependent on this value. | |
47 | */ | |
48 | #define IO_TLB_SEGSIZE 128 | |
49 | ||
50 | /* | |
51 | * log of the size of each IO TLB slab. The number of slabs is command line | |
52 | * controllable. | |
53 | */ | |
54 | #define IO_TLB_SHIFT 11 | |
55 | ||
0b9afede AW |
56 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
57 | ||
58 | /* | |
59 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
60 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
61 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
62 | */ | |
63 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
64 | ||
de69e0f0 JL |
65 | /* |
66 | * Enumeration for sync targets | |
67 | */ | |
68 | enum dma_sync_target { | |
69 | SYNC_FOR_CPU = 0, | |
70 | SYNC_FOR_DEVICE = 1, | |
71 | }; | |
72 | ||
1da177e4 LT |
73 | int swiotlb_force; |
74 | ||
75 | /* | |
76 | * Used to do a quick range check in swiotlb_unmap_single and | |
77 | * swiotlb_sync_single_*, to see if the memory was in fact allocated by this | |
78 | * API. | |
79 | */ | |
80 | static char *io_tlb_start, *io_tlb_end; | |
81 | ||
82 | /* | |
83 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and | |
84 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
85 | */ | |
86 | static unsigned long io_tlb_nslabs; | |
87 | ||
88 | /* | |
89 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
90 | */ | |
91 | static unsigned long io_tlb_overflow = 32*1024; | |
92 | ||
93 | void *io_tlb_overflow_buffer; | |
94 | ||
95 | /* | |
96 | * This is a free list describing the number of free entries available from | |
97 | * each index | |
98 | */ | |
99 | static unsigned int *io_tlb_list; | |
100 | static unsigned int io_tlb_index; | |
101 | ||
102 | /* | |
103 | * We need to save away the original address corresponding to a mapped entry | |
104 | * for the sync operations. | |
105 | */ | |
25667d67 | 106 | static unsigned char **io_tlb_orig_addr; |
1da177e4 LT |
107 | |
108 | /* | |
109 | * Protect the above data structures in the map and unmap calls | |
110 | */ | |
111 | static DEFINE_SPINLOCK(io_tlb_lock); | |
112 | ||
113 | static int __init | |
114 | setup_io_tlb_npages(char *str) | |
115 | { | |
116 | if (isdigit(*str)) { | |
e8579e72 | 117 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
1da177e4 LT |
118 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
119 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
120 | } | |
121 | if (*str == ',') | |
122 | ++str; | |
123 | if (!strcmp(str, "force")) | |
124 | swiotlb_force = 1; | |
125 | return 1; | |
126 | } | |
127 | __setup("swiotlb=", setup_io_tlb_npages); | |
128 | /* make io_tlb_overflow tunable too? */ | |
129 | ||
8c5df16b JF |
130 | void * __weak swiotlb_alloc_boot(size_t size, unsigned long nslabs) |
131 | { | |
132 | return alloc_bootmem_low_pages(size); | |
133 | } | |
134 | ||
135 | void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs) | |
136 | { | |
137 | return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order); | |
138 | } | |
139 | ||
1da177e4 LT |
140 | /* |
141 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
17e5ad6c | 142 | * structures for the software IO TLB used to implement the DMA API. |
1da177e4 | 143 | */ |
563aaf06 JB |
144 | void __init |
145 | swiotlb_init_with_default_size(size_t default_size) | |
1da177e4 | 146 | { |
563aaf06 | 147 | unsigned long i, bytes; |
1da177e4 LT |
148 | |
149 | if (!io_tlb_nslabs) { | |
e8579e72 | 150 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
1da177e4 LT |
151 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
152 | } | |
153 | ||
563aaf06 JB |
154 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
155 | ||
1da177e4 LT |
156 | /* |
157 | * Get IO TLB memory from the low pages | |
158 | */ | |
8c5df16b | 159 | io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs); |
1da177e4 LT |
160 | if (!io_tlb_start) |
161 | panic("Cannot allocate SWIOTLB buffer"); | |
563aaf06 | 162 | io_tlb_end = io_tlb_start + bytes; |
1da177e4 LT |
163 | |
164 | /* | |
165 | * Allocate and initialize the free list array. This array is used | |
166 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
167 | * between io_tlb_start and io_tlb_end. | |
168 | */ | |
169 | io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); | |
25667d67 | 170 | for (i = 0; i < io_tlb_nslabs; i++) |
1da177e4 LT |
171 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
172 | io_tlb_index = 0; | |
25667d67 | 173 | io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *)); |
1da177e4 LT |
174 | |
175 | /* | |
176 | * Get the overflow emergency buffer | |
177 | */ | |
178 | io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); | |
563aaf06 JB |
179 | if (!io_tlb_overflow_buffer) |
180 | panic("Cannot allocate SWIOTLB overflow buffer!\n"); | |
181 | ||
25667d67 TL |
182 | printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n", |
183 | virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end)); | |
1da177e4 LT |
184 | } |
185 | ||
563aaf06 JB |
186 | void __init |
187 | swiotlb_init(void) | |
1da177e4 | 188 | { |
25667d67 | 189 | swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */ |
1da177e4 LT |
190 | } |
191 | ||
0b9afede AW |
192 | /* |
193 | * Systems with larger DMA zones (those that don't support ISA) can | |
194 | * initialize the swiotlb later using the slab allocator if needed. | |
195 | * This should be just like above, but with some error catching. | |
196 | */ | |
197 | int | |
563aaf06 | 198 | swiotlb_late_init_with_default_size(size_t default_size) |
0b9afede | 199 | { |
563aaf06 | 200 | unsigned long i, bytes, req_nslabs = io_tlb_nslabs; |
0b9afede AW |
201 | unsigned int order; |
202 | ||
203 | if (!io_tlb_nslabs) { | |
204 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
205 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
206 | } | |
207 | ||
208 | /* | |
209 | * Get IO TLB memory from the low pages | |
210 | */ | |
563aaf06 | 211 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
0b9afede | 212 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
563aaf06 | 213 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede AW |
214 | |
215 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
8c5df16b | 216 | io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs); |
0b9afede AW |
217 | if (io_tlb_start) |
218 | break; | |
219 | order--; | |
220 | } | |
221 | ||
222 | if (!io_tlb_start) | |
223 | goto cleanup1; | |
224 | ||
563aaf06 | 225 | if (order != get_order(bytes)) { |
0b9afede AW |
226 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " |
227 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
228 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
563aaf06 | 229 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede | 230 | } |
563aaf06 JB |
231 | io_tlb_end = io_tlb_start + bytes; |
232 | memset(io_tlb_start, 0, bytes); | |
0b9afede AW |
233 | |
234 | /* | |
235 | * Allocate and initialize the free list array. This array is used | |
236 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
237 | * between io_tlb_start and io_tlb_end. | |
238 | */ | |
239 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
240 | get_order(io_tlb_nslabs * sizeof(int))); | |
241 | if (!io_tlb_list) | |
242 | goto cleanup2; | |
243 | ||
244 | for (i = 0; i < io_tlb_nslabs; i++) | |
245 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
246 | io_tlb_index = 0; | |
247 | ||
25667d67 TL |
248 | io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL, |
249 | get_order(io_tlb_nslabs * sizeof(char *))); | |
0b9afede AW |
250 | if (!io_tlb_orig_addr) |
251 | goto cleanup3; | |
252 | ||
25667d67 | 253 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *)); |
0b9afede AW |
254 | |
255 | /* | |
256 | * Get the overflow emergency buffer | |
257 | */ | |
258 | io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
259 | get_order(io_tlb_overflow)); | |
260 | if (!io_tlb_overflow_buffer) | |
261 | goto cleanup4; | |
262 | ||
25667d67 TL |
263 | printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - " |
264 | "0x%lx\n", bytes >> 20, | |
265 | virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end)); | |
0b9afede AW |
266 | |
267 | return 0; | |
268 | ||
269 | cleanup4: | |
25667d67 TL |
270 | free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs * |
271 | sizeof(char *))); | |
0b9afede AW |
272 | io_tlb_orig_addr = NULL; |
273 | cleanup3: | |
25667d67 TL |
274 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
275 | sizeof(int))); | |
0b9afede | 276 | io_tlb_list = NULL; |
0b9afede | 277 | cleanup2: |
563aaf06 | 278 | io_tlb_end = NULL; |
0b9afede AW |
279 | free_pages((unsigned long)io_tlb_start, order); |
280 | io_tlb_start = NULL; | |
281 | cleanup1: | |
282 | io_tlb_nslabs = req_nslabs; | |
283 | return -ENOMEM; | |
284 | } | |
285 | ||
be6b0267 | 286 | static int |
2797982e | 287 | address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size) |
1da177e4 | 288 | { |
07a2c01a | 289 | return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size); |
1da177e4 LT |
290 | } |
291 | ||
640aebfe FT |
292 | static int is_swiotlb_buffer(char *addr) |
293 | { | |
294 | return addr >= io_tlb_start && addr < io_tlb_end; | |
295 | } | |
296 | ||
1da177e4 LT |
297 | /* |
298 | * Allocates bounce buffer and returns its kernel virtual address. | |
299 | */ | |
300 | static void * | |
25667d67 | 301 | map_single(struct device *hwdev, char *buffer, size_t size, int dir) |
1da177e4 LT |
302 | { |
303 | unsigned long flags; | |
304 | char *dma_addr; | |
305 | unsigned int nslots, stride, index, wrap; | |
306 | int i; | |
681cc5cd FT |
307 | unsigned long start_dma_addr; |
308 | unsigned long mask; | |
309 | unsigned long offset_slots; | |
310 | unsigned long max_slots; | |
311 | ||
312 | mask = dma_get_seg_boundary(hwdev); | |
313 | start_dma_addr = virt_to_bus(io_tlb_start) & mask; | |
314 | ||
315 | offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
b15a3891 JB |
316 | max_slots = mask + 1 |
317 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
318 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
1da177e4 LT |
319 | |
320 | /* | |
321 | * For mappings greater than a page, we limit the stride (and | |
322 | * hence alignment) to a page size. | |
323 | */ | |
324 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
325 | if (size > PAGE_SIZE) | |
326 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
327 | else | |
328 | stride = 1; | |
329 | ||
34814545 | 330 | BUG_ON(!nslots); |
1da177e4 LT |
331 | |
332 | /* | |
333 | * Find suitable number of IO TLB entries size that will fit this | |
334 | * request and allocate a buffer from that IO TLB pool. | |
335 | */ | |
336 | spin_lock_irqsave(&io_tlb_lock, flags); | |
a7133a15 AM |
337 | index = ALIGN(io_tlb_index, stride); |
338 | if (index >= io_tlb_nslabs) | |
339 | index = 0; | |
340 | wrap = index; | |
341 | ||
342 | do { | |
a8522509 FT |
343 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
344 | max_slots)) { | |
b15a3891 JB |
345 | index += stride; |
346 | if (index >= io_tlb_nslabs) | |
347 | index = 0; | |
a7133a15 AM |
348 | if (index == wrap) |
349 | goto not_found; | |
350 | } | |
351 | ||
352 | /* | |
353 | * If we find a slot that indicates we have 'nslots' number of | |
354 | * contiguous buffers, we allocate the buffers from that slot | |
355 | * and mark the entries as '0' indicating unavailable. | |
356 | */ | |
357 | if (io_tlb_list[index] >= nslots) { | |
358 | int count = 0; | |
359 | ||
360 | for (i = index; i < (int) (index + nslots); i++) | |
361 | io_tlb_list[i] = 0; | |
362 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
363 | io_tlb_list[i] = ++count; | |
364 | dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
1da177e4 | 365 | |
a7133a15 AM |
366 | /* |
367 | * Update the indices to avoid searching in the next | |
368 | * round. | |
369 | */ | |
370 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
371 | ? (index + nslots) : 0); | |
372 | ||
373 | goto found; | |
374 | } | |
375 | index += stride; | |
376 | if (index >= io_tlb_nslabs) | |
377 | index = 0; | |
378 | } while (index != wrap); | |
379 | ||
380 | not_found: | |
381 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
382 | return NULL; | |
383 | found: | |
1da177e4 LT |
384 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
385 | ||
386 | /* | |
387 | * Save away the mapping from the original address to the DMA address. | |
388 | * This is needed when we sync the memory. Then we sync the buffer if | |
389 | * needed. | |
390 | */ | |
df336d1c KF |
391 | for (i = 0; i < nslots; i++) |
392 | io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT); | |
1da177e4 | 393 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
25667d67 | 394 | memcpy(dma_addr, buffer, size); |
1da177e4 LT |
395 | |
396 | return dma_addr; | |
397 | } | |
398 | ||
399 | /* | |
400 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
401 | */ | |
402 | static void | |
403 | unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) | |
404 | { | |
405 | unsigned long flags; | |
406 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
407 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
25667d67 | 408 | char *buffer = io_tlb_orig_addr[index]; |
1da177e4 LT |
409 | |
410 | /* | |
411 | * First, sync the memory before unmapping the entry | |
412 | */ | |
25667d67 | 413 | if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
1da177e4 LT |
414 | /* |
415 | * bounce... copy the data back into the original buffer * and | |
416 | * delete the bounce buffer. | |
417 | */ | |
25667d67 | 418 | memcpy(buffer, dma_addr, size); |
1da177e4 LT |
419 | |
420 | /* | |
421 | * Return the buffer to the free list by setting the corresponding | |
422 | * entries to indicate the number of contigous entries available. | |
423 | * While returning the entries to the free list, we merge the entries | |
424 | * with slots below and above the pool being returned. | |
425 | */ | |
426 | spin_lock_irqsave(&io_tlb_lock, flags); | |
427 | { | |
428 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
429 | io_tlb_list[index + nslots] : 0); | |
430 | /* | |
431 | * Step 1: return the slots to the free list, merging the | |
432 | * slots with superceeding slots | |
433 | */ | |
434 | for (i = index + nslots - 1; i >= index; i--) | |
435 | io_tlb_list[i] = ++count; | |
436 | /* | |
437 | * Step 2: merge the returned slots with the preceding slots, | |
438 | * if available (non zero) | |
439 | */ | |
440 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
441 | io_tlb_list[i] = ++count; | |
442 | } | |
443 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
444 | } | |
445 | ||
446 | static void | |
de69e0f0 JL |
447 | sync_single(struct device *hwdev, char *dma_addr, size_t size, |
448 | int dir, int target) | |
1da177e4 LT |
449 | { |
450 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
25667d67 | 451 | char *buffer = io_tlb_orig_addr[index]; |
1da177e4 | 452 | |
df336d1c KF |
453 | buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); |
454 | ||
de69e0f0 JL |
455 | switch (target) { |
456 | case SYNC_FOR_CPU: | |
457 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
25667d67 | 458 | memcpy(buffer, dma_addr, size); |
34814545 ES |
459 | else |
460 | BUG_ON(dir != DMA_TO_DEVICE); | |
de69e0f0 JL |
461 | break; |
462 | case SYNC_FOR_DEVICE: | |
463 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
25667d67 | 464 | memcpy(dma_addr, buffer, size); |
34814545 ES |
465 | else |
466 | BUG_ON(dir != DMA_FROM_DEVICE); | |
de69e0f0 JL |
467 | break; |
468 | default: | |
1da177e4 | 469 | BUG(); |
de69e0f0 | 470 | } |
1da177e4 LT |
471 | } |
472 | ||
473 | void * | |
474 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
06a54497 | 475 | dma_addr_t *dma_handle, gfp_t flags) |
1da177e4 | 476 | { |
563aaf06 | 477 | dma_addr_t dev_addr; |
1da177e4 LT |
478 | void *ret; |
479 | int order = get_order(size); | |
1e74f300 FT |
480 | u64 dma_mask = DMA_32BIT_MASK; |
481 | ||
482 | if (hwdev && hwdev->coherent_dma_mask) | |
483 | dma_mask = hwdev->coherent_dma_mask; | |
1da177e4 | 484 | |
25667d67 | 485 | ret = (void *)__get_free_pages(flags, order); |
1e74f300 | 486 | if (ret && !is_buffer_dma_capable(dma_mask, virt_to_bus(ret), size)) { |
1da177e4 LT |
487 | /* |
488 | * The allocated memory isn't reachable by the device. | |
489 | * Fall back on swiotlb_map_single(). | |
490 | */ | |
491 | free_pages((unsigned long) ret, order); | |
492 | ret = NULL; | |
493 | } | |
494 | if (!ret) { | |
495 | /* | |
496 | * We are either out of memory or the device can't DMA | |
497 | * to GFP_DMA memory; fall back on | |
498 | * swiotlb_map_single(), which will grab memory from | |
499 | * the lowest available address range. | |
500 | */ | |
9dfda12b FT |
501 | ret = map_single(hwdev, NULL, size, DMA_FROM_DEVICE); |
502 | if (!ret) | |
1da177e4 | 503 | return NULL; |
1da177e4 LT |
504 | } |
505 | ||
506 | memset(ret, 0, size); | |
93fbff63 | 507 | dev_addr = virt_to_bus(ret); |
1da177e4 LT |
508 | |
509 | /* Confirm address can be DMA'd by device */ | |
1e74f300 | 510 | if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) { |
563aaf06 | 511 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", |
1e74f300 | 512 | (unsigned long long)dma_mask, |
563aaf06 | 513 | (unsigned long long)dev_addr); |
a2b89b59 FT |
514 | |
515 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
516 | unmap_single(hwdev, ret, size, DMA_TO_DEVICE); | |
517 | return NULL; | |
1da177e4 LT |
518 | } |
519 | *dma_handle = dev_addr; | |
520 | return ret; | |
521 | } | |
522 | ||
523 | void | |
524 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
525 | dma_addr_t dma_handle) | |
526 | { | |
aa24886e | 527 | WARN_ON(irqs_disabled()); |
640aebfe | 528 | if (!is_swiotlb_buffer(vaddr)) |
1da177e4 LT |
529 | free_pages((unsigned long) vaddr, get_order(size)); |
530 | else | |
531 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
21f6c4de | 532 | unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); |
1da177e4 LT |
533 | } |
534 | ||
535 | static void | |
536 | swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) | |
537 | { | |
538 | /* | |
539 | * Ran out of IOMMU space for this operation. This is very bad. | |
540 | * Unfortunately the drivers cannot handle this operation properly. | |
17e5ad6c | 541 | * unless they check for dma_mapping_error (most don't) |
1da177e4 LT |
542 | * When the mapping is small enough return a static buffer to limit |
543 | * the damage, or panic when the transfer is too big. | |
544 | */ | |
563aaf06 | 545 | printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " |
1da177e4 LT |
546 | "device %s\n", size, dev ? dev->bus_id : "?"); |
547 | ||
548 | if (size > io_tlb_overflow && do_panic) { | |
17e5ad6c TL |
549 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) |
550 | panic("DMA: Memory would be corrupted\n"); | |
551 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) | |
552 | panic("DMA: Random memory would be DMAed\n"); | |
1da177e4 LT |
553 | } |
554 | } | |
555 | ||
556 | /* | |
557 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
17e5ad6c | 558 | * physical address to use is returned. |
1da177e4 LT |
559 | * |
560 | * Once the device is given the dma address, the device owns this memory until | |
561 | * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed. | |
562 | */ | |
563 | dma_addr_t | |
309df0c5 AK |
564 | swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size, |
565 | int dir, struct dma_attrs *attrs) | |
1da177e4 | 566 | { |
563aaf06 | 567 | dma_addr_t dev_addr = virt_to_bus(ptr); |
1da177e4 LT |
568 | void *map; |
569 | ||
34814545 | 570 | BUG_ON(dir == DMA_NONE); |
1da177e4 LT |
571 | /* |
572 | * If the pointer passed in happens to be in the device's DMA window, | |
573 | * we can safely return the device addr and not worry about bounce | |
574 | * buffering it. | |
575 | */ | |
2797982e | 576 | if (!address_needs_mapping(hwdev, dev_addr, size) && !swiotlb_force) |
1da177e4 LT |
577 | return dev_addr; |
578 | ||
579 | /* | |
580 | * Oh well, have to allocate and map a bounce buffer. | |
581 | */ | |
25667d67 | 582 | map = map_single(hwdev, ptr, size, dir); |
1da177e4 LT |
583 | if (!map) { |
584 | swiotlb_full(hwdev, size, dir, 1); | |
585 | map = io_tlb_overflow_buffer; | |
586 | } | |
587 | ||
93fbff63 | 588 | dev_addr = virt_to_bus(map); |
1da177e4 LT |
589 | |
590 | /* | |
591 | * Ensure that the address returned is DMA'ble | |
592 | */ | |
2797982e | 593 | if (address_needs_mapping(hwdev, dev_addr, size)) |
1da177e4 LT |
594 | panic("map_single: bounce buffer is not DMA'ble"); |
595 | ||
596 | return dev_addr; | |
597 | } | |
309df0c5 AK |
598 | EXPORT_SYMBOL(swiotlb_map_single_attrs); |
599 | ||
600 | dma_addr_t | |
601 | swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir) | |
602 | { | |
603 | return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL); | |
604 | } | |
1da177e4 | 605 | |
1da177e4 LT |
606 | /* |
607 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
608 | * match what was provided for in a previous swiotlb_map_single call. All | |
609 | * other usages are undefined. | |
610 | * | |
611 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
612 | * whatever the device wrote there. | |
613 | */ | |
614 | void | |
309df0c5 AK |
615 | swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr, |
616 | size_t size, int dir, struct dma_attrs *attrs) | |
1da177e4 | 617 | { |
93fbff63 | 618 | char *dma_addr = bus_to_virt(dev_addr); |
1da177e4 | 619 | |
34814545 | 620 | BUG_ON(dir == DMA_NONE); |
640aebfe | 621 | if (is_swiotlb_buffer(dma_addr)) |
1da177e4 LT |
622 | unmap_single(hwdev, dma_addr, size, dir); |
623 | else if (dir == DMA_FROM_DEVICE) | |
cde14bbf | 624 | dma_mark_clean(dma_addr, size); |
1da177e4 | 625 | } |
309df0c5 | 626 | EXPORT_SYMBOL(swiotlb_unmap_single_attrs); |
1da177e4 | 627 | |
309df0c5 AK |
628 | void |
629 | swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size, | |
630 | int dir) | |
631 | { | |
632 | return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL); | |
633 | } | |
1da177e4 LT |
634 | /* |
635 | * Make physical memory consistent for a single streaming mode DMA translation | |
636 | * after a transfer. | |
637 | * | |
638 | * If you perform a swiotlb_map_single() but wish to interrogate the buffer | |
17e5ad6c TL |
639 | * using the cpu, yet do not wish to teardown the dma mapping, you must |
640 | * call this function before doing so. At the next point you give the dma | |
1da177e4 LT |
641 | * address back to the card, you must first perform a |
642 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
643 | */ | |
be6b0267 | 644 | static void |
8270f3f1 | 645 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 | 646 | size_t size, int dir, int target) |
1da177e4 | 647 | { |
93fbff63 | 648 | char *dma_addr = bus_to_virt(dev_addr); |
1da177e4 | 649 | |
34814545 | 650 | BUG_ON(dir == DMA_NONE); |
640aebfe | 651 | if (is_swiotlb_buffer(dma_addr)) |
de69e0f0 | 652 | sync_single(hwdev, dma_addr, size, dir, target); |
1da177e4 | 653 | else if (dir == DMA_FROM_DEVICE) |
cde14bbf | 654 | dma_mark_clean(dma_addr, size); |
1da177e4 LT |
655 | } |
656 | ||
8270f3f1 JL |
657 | void |
658 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
659 | size_t size, int dir) | |
660 | { | |
de69e0f0 | 661 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); |
8270f3f1 JL |
662 | } |
663 | ||
1da177e4 LT |
664 | void |
665 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
666 | size_t size, int dir) | |
667 | { | |
de69e0f0 | 668 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); |
1da177e4 LT |
669 | } |
670 | ||
878a97cf JL |
671 | /* |
672 | * Same as above, but for a sub-range of the mapping. | |
673 | */ | |
be6b0267 | 674 | static void |
878a97cf | 675 | swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 JL |
676 | unsigned long offset, size_t size, |
677 | int dir, int target) | |
878a97cf | 678 | { |
93fbff63 | 679 | char *dma_addr = bus_to_virt(dev_addr) + offset; |
878a97cf | 680 | |
34814545 | 681 | BUG_ON(dir == DMA_NONE); |
640aebfe | 682 | if (is_swiotlb_buffer(dma_addr)) |
de69e0f0 | 683 | sync_single(hwdev, dma_addr, size, dir, target); |
878a97cf | 684 | else if (dir == DMA_FROM_DEVICE) |
cde14bbf | 685 | dma_mark_clean(dma_addr, size); |
878a97cf JL |
686 | } |
687 | ||
688 | void | |
689 | swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
690 | unsigned long offset, size_t size, int dir) | |
691 | { | |
de69e0f0 JL |
692 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
693 | SYNC_FOR_CPU); | |
878a97cf JL |
694 | } |
695 | ||
696 | void | |
697 | swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
698 | unsigned long offset, size_t size, int dir) | |
699 | { | |
de69e0f0 JL |
700 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
701 | SYNC_FOR_DEVICE); | |
878a97cf JL |
702 | } |
703 | ||
309df0c5 AK |
704 | void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int, |
705 | struct dma_attrs *); | |
1da177e4 LT |
706 | /* |
707 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
708 | * This is the scatter-gather version of the above swiotlb_map_single | |
709 | * interface. Here the scatter gather list elements are each tagged with the | |
710 | * appropriate dma address and length. They are obtained via | |
711 | * sg_dma_{address,length}(SG). | |
712 | * | |
713 | * NOTE: An implementation may be able to use a smaller number of | |
714 | * DMA address/length pairs than there are SG table elements. | |
715 | * (for example via virtual mapping capabilities) | |
716 | * The routine returns the number of addr/length pairs actually | |
717 | * used, at most nents. | |
718 | * | |
719 | * Device ownership issues as mentioned above for swiotlb_map_single are the | |
720 | * same here. | |
721 | */ | |
722 | int | |
309df0c5 AK |
723 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, |
724 | int dir, struct dma_attrs *attrs) | |
1da177e4 | 725 | { |
dbfd49fe | 726 | struct scatterlist *sg; |
25667d67 | 727 | void *addr; |
563aaf06 | 728 | dma_addr_t dev_addr; |
1da177e4 LT |
729 | int i; |
730 | ||
34814545 | 731 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 732 | |
dbfd49fe | 733 | for_each_sg(sgl, sg, nelems, i) { |
25667d67 TL |
734 | addr = SG_ENT_VIRT_ADDRESS(sg); |
735 | dev_addr = virt_to_bus(addr); | |
2797982e FT |
736 | if (swiotlb_force || |
737 | address_needs_mapping(hwdev, dev_addr, sg->length)) { | |
25667d67 | 738 | void *map = map_single(hwdev, addr, sg->length, dir); |
7e870233 | 739 | if (!map) { |
1da177e4 LT |
740 | /* Don't panic here, we expect map_sg users |
741 | to do proper error handling. */ | |
742 | swiotlb_full(hwdev, sg->length, dir, 0); | |
309df0c5 AK |
743 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
744 | attrs); | |
dbfd49fe | 745 | sgl[0].dma_length = 0; |
1da177e4 LT |
746 | return 0; |
747 | } | |
cde14bbf | 748 | sg->dma_address = virt_to_bus(map); |
1da177e4 LT |
749 | } else |
750 | sg->dma_address = dev_addr; | |
751 | sg->dma_length = sg->length; | |
752 | } | |
753 | return nelems; | |
754 | } | |
309df0c5 AK |
755 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); |
756 | ||
757 | int | |
758 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
759 | int dir) | |
760 | { | |
761 | return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
762 | } | |
1da177e4 LT |
763 | |
764 | /* | |
765 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
766 | * concerning calls here are the same as for swiotlb_unmap_single() above. | |
767 | */ | |
768 | void | |
309df0c5 AK |
769 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
770 | int nelems, int dir, struct dma_attrs *attrs) | |
1da177e4 | 771 | { |
dbfd49fe | 772 | struct scatterlist *sg; |
1da177e4 LT |
773 | int i; |
774 | ||
34814545 | 775 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 776 | |
dbfd49fe | 777 | for_each_sg(sgl, sg, nelems, i) { |
1da177e4 | 778 | if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) |
93fbff63 JB |
779 | unmap_single(hwdev, bus_to_virt(sg->dma_address), |
780 | sg->dma_length, dir); | |
1da177e4 | 781 | else if (dir == DMA_FROM_DEVICE) |
cde14bbf | 782 | dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length); |
dbfd49fe | 783 | } |
1da177e4 | 784 | } |
309df0c5 AK |
785 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); |
786 | ||
787 | void | |
788 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
789 | int dir) | |
790 | { | |
791 | return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
792 | } | |
1da177e4 LT |
793 | |
794 | /* | |
795 | * Make physical memory consistent for a set of streaming mode DMA translations | |
796 | * after a transfer. | |
797 | * | |
798 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
799 | * and usage. | |
800 | */ | |
be6b0267 | 801 | static void |
dbfd49fe | 802 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, |
de69e0f0 | 803 | int nelems, int dir, int target) |
1da177e4 | 804 | { |
dbfd49fe | 805 | struct scatterlist *sg; |
1da177e4 LT |
806 | int i; |
807 | ||
34814545 | 808 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 809 | |
dbfd49fe | 810 | for_each_sg(sgl, sg, nelems, i) { |
1da177e4 | 811 | if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) |
93fbff63 | 812 | sync_single(hwdev, bus_to_virt(sg->dma_address), |
de69e0f0 | 813 | sg->dma_length, dir, target); |
cde14bbf JB |
814 | else if (dir == DMA_FROM_DEVICE) |
815 | dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length); | |
dbfd49fe | 816 | } |
1da177e4 LT |
817 | } |
818 | ||
8270f3f1 JL |
819 | void |
820 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
821 | int nelems, int dir) | |
822 | { | |
de69e0f0 | 823 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); |
8270f3f1 JL |
824 | } |
825 | ||
1da177e4 LT |
826 | void |
827 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
828 | int nelems, int dir) | |
829 | { | |
de69e0f0 | 830 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); |
1da177e4 LT |
831 | } |
832 | ||
833 | int | |
8d8bb39b | 834 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) |
1da177e4 | 835 | { |
93fbff63 | 836 | return (dma_addr == virt_to_bus(io_tlb_overflow_buffer)); |
1da177e4 LT |
837 | } |
838 | ||
839 | /* | |
17e5ad6c | 840 | * Return whether the given device DMA address mask can be supported |
1da177e4 | 841 | * properly. For example, if your device can only drive the low 24-bits |
17e5ad6c | 842 | * during bus mastering, then you would pass 0x00ffffff as the mask to |
1da177e4 LT |
843 | * this function. |
844 | */ | |
845 | int | |
563aaf06 | 846 | swiotlb_dma_supported(struct device *hwdev, u64 mask) |
1da177e4 | 847 | { |
25667d67 | 848 | return virt_to_bus(io_tlb_end - 1) <= mask; |
1da177e4 LT |
849 | } |
850 | ||
1da177e4 LT |
851 | EXPORT_SYMBOL(swiotlb_map_single); |
852 | EXPORT_SYMBOL(swiotlb_unmap_single); | |
853 | EXPORT_SYMBOL(swiotlb_map_sg); | |
854 | EXPORT_SYMBOL(swiotlb_unmap_sg); | |
855 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); | |
856 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); | |
878a97cf JL |
857 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu); |
858 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device); | |
1da177e4 LT |
859 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); |
860 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); | |
861 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); | |
25667d67 TL |
862 | EXPORT_SYMBOL(swiotlb_alloc_coherent); |
863 | EXPORT_SYMBOL(swiotlb_free_coherent); | |
1da177e4 | 864 | EXPORT_SYMBOL(swiotlb_dma_supported); |