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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Dynamic DMA mapping support. | |
3 | * | |
563aaf06 | 4 | * This implementation is a fallback for platforms that do not support |
1da177e4 LT |
5 | * I/O TLBs (aka DMA address translation hardware). |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
569c8bf5 JL |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
fb05a379 | 17 | * 08/12/11 beckyb Add highmem support |
1da177e4 LT |
18 | */ |
19 | ||
20 | #include <linux/cache.h> | |
17e5ad6c | 21 | #include <linux/dma-mapping.h> |
1da177e4 LT |
22 | #include <linux/mm.h> |
23 | #include <linux/module.h> | |
1da177e4 LT |
24 | #include <linux/spinlock.h> |
25 | #include <linux/string.h> | |
0016fdee | 26 | #include <linux/swiotlb.h> |
fb05a379 | 27 | #include <linux/pfn.h> |
1da177e4 LT |
28 | #include <linux/types.h> |
29 | #include <linux/ctype.h> | |
ef9b1893 | 30 | #include <linux/highmem.h> |
1da177e4 LT |
31 | |
32 | #include <asm/io.h> | |
1da177e4 | 33 | #include <asm/dma.h> |
17e5ad6c | 34 | #include <asm/scatterlist.h> |
1da177e4 LT |
35 | |
36 | #include <linux/init.h> | |
37 | #include <linux/bootmem.h> | |
a8522509 | 38 | #include <linux/iommu-helper.h> |
1da177e4 LT |
39 | |
40 | #define OFFSET(val,align) ((unsigned long) \ | |
41 | ( (val) & ( (align) - 1))) | |
42 | ||
0b9afede AW |
43 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
44 | ||
45 | /* | |
46 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
47 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
48 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
49 | */ | |
50 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
51 | ||
de69e0f0 JL |
52 | /* |
53 | * Enumeration for sync targets | |
54 | */ | |
55 | enum dma_sync_target { | |
56 | SYNC_FOR_CPU = 0, | |
57 | SYNC_FOR_DEVICE = 1, | |
58 | }; | |
59 | ||
1da177e4 LT |
60 | int swiotlb_force; |
61 | ||
62 | /* | |
ceb5ac32 BB |
63 | * Used to do a quick range check in unmap_single and |
64 | * sync_single_*, to see if the memory was in fact allocated by this | |
1da177e4 LT |
65 | * API. |
66 | */ | |
67 | static char *io_tlb_start, *io_tlb_end; | |
68 | ||
69 | /* | |
70 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and | |
71 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
72 | */ | |
73 | static unsigned long io_tlb_nslabs; | |
74 | ||
75 | /* | |
76 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
77 | */ | |
78 | static unsigned long io_tlb_overflow = 32*1024; | |
79 | ||
80 | void *io_tlb_overflow_buffer; | |
81 | ||
82 | /* | |
83 | * This is a free list describing the number of free entries available from | |
84 | * each index | |
85 | */ | |
86 | static unsigned int *io_tlb_list; | |
87 | static unsigned int io_tlb_index; | |
88 | ||
89 | /* | |
90 | * We need to save away the original address corresponding to a mapped entry | |
91 | * for the sync operations. | |
92 | */ | |
bc40ac66 | 93 | static phys_addr_t *io_tlb_orig_addr; |
1da177e4 LT |
94 | |
95 | /* | |
96 | * Protect the above data structures in the map and unmap calls | |
97 | */ | |
98 | static DEFINE_SPINLOCK(io_tlb_lock); | |
99 | ||
5740afdb FT |
100 | static int late_alloc; |
101 | ||
1da177e4 LT |
102 | static int __init |
103 | setup_io_tlb_npages(char *str) | |
104 | { | |
105 | if (isdigit(*str)) { | |
e8579e72 | 106 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
1da177e4 LT |
107 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
108 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
109 | } | |
110 | if (*str == ',') | |
111 | ++str; | |
112 | if (!strcmp(str, "force")) | |
113 | swiotlb_force = 1; | |
114 | return 1; | |
115 | } | |
116 | __setup("swiotlb=", setup_io_tlb_npages); | |
117 | /* make io_tlb_overflow tunable too? */ | |
118 | ||
02ca646e | 119 | /* Note that this doesn't work with highmem page */ |
70a7d3cc JF |
120 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, |
121 | volatile void *address) | |
e08e1f7a | 122 | { |
862d196b | 123 | return phys_to_dma(hwdev, virt_to_phys(address)); |
e08e1f7a IC |
124 | } |
125 | ||
ad32e8cb | 126 | void swiotlb_print_info(void) |
2e5b2b86 | 127 | { |
ad32e8cb | 128 | unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
2e5b2b86 | 129 | phys_addr_t pstart, pend; |
2e5b2b86 IC |
130 | |
131 | pstart = virt_to_phys(io_tlb_start); | |
132 | pend = virt_to_phys(io_tlb_end); | |
133 | ||
2e5b2b86 IC |
134 | printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n", |
135 | bytes >> 20, io_tlb_start, io_tlb_end); | |
70a7d3cc JF |
136 | printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n", |
137 | (unsigned long long)pstart, | |
138 | (unsigned long long)pend); | |
2e5b2b86 IC |
139 | } |
140 | ||
1da177e4 LT |
141 | /* |
142 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
17e5ad6c | 143 | * structures for the software IO TLB used to implement the DMA API. |
1da177e4 | 144 | */ |
563aaf06 | 145 | void __init |
ad32e8cb | 146 | swiotlb_init_with_default_size(size_t default_size, int verbose) |
1da177e4 | 147 | { |
563aaf06 | 148 | unsigned long i, bytes; |
1da177e4 LT |
149 | |
150 | if (!io_tlb_nslabs) { | |
e8579e72 | 151 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
1da177e4 LT |
152 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
153 | } | |
154 | ||
563aaf06 JB |
155 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
156 | ||
1da177e4 LT |
157 | /* |
158 | * Get IO TLB memory from the low pages | |
159 | */ | |
3885123d | 160 | io_tlb_start = alloc_bootmem_low_pages(bytes); |
1da177e4 LT |
161 | if (!io_tlb_start) |
162 | panic("Cannot allocate SWIOTLB buffer"); | |
563aaf06 | 163 | io_tlb_end = io_tlb_start + bytes; |
1da177e4 LT |
164 | |
165 | /* | |
166 | * Allocate and initialize the free list array. This array is used | |
167 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
168 | * between io_tlb_start and io_tlb_end. | |
169 | */ | |
170 | io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); | |
25667d67 | 171 | for (i = 0; i < io_tlb_nslabs; i++) |
1da177e4 LT |
172 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
173 | io_tlb_index = 0; | |
bc40ac66 | 174 | io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t)); |
1da177e4 LT |
175 | |
176 | /* | |
177 | * Get the overflow emergency buffer | |
178 | */ | |
179 | io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); | |
563aaf06 JB |
180 | if (!io_tlb_overflow_buffer) |
181 | panic("Cannot allocate SWIOTLB overflow buffer!\n"); | |
ad32e8cb FT |
182 | if (verbose) |
183 | swiotlb_print_info(); | |
1da177e4 LT |
184 | } |
185 | ||
563aaf06 | 186 | void __init |
ad32e8cb | 187 | swiotlb_init(int verbose) |
1da177e4 | 188 | { |
ad32e8cb | 189 | swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */ |
1da177e4 LT |
190 | } |
191 | ||
0b9afede AW |
192 | /* |
193 | * Systems with larger DMA zones (those that don't support ISA) can | |
194 | * initialize the swiotlb later using the slab allocator if needed. | |
195 | * This should be just like above, but with some error catching. | |
196 | */ | |
197 | int | |
563aaf06 | 198 | swiotlb_late_init_with_default_size(size_t default_size) |
0b9afede | 199 | { |
563aaf06 | 200 | unsigned long i, bytes, req_nslabs = io_tlb_nslabs; |
0b9afede AW |
201 | unsigned int order; |
202 | ||
203 | if (!io_tlb_nslabs) { | |
204 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
205 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
206 | } | |
207 | ||
208 | /* | |
209 | * Get IO TLB memory from the low pages | |
210 | */ | |
563aaf06 | 211 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
0b9afede | 212 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
563aaf06 | 213 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede AW |
214 | |
215 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
bb52196b FT |
216 | io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, |
217 | order); | |
0b9afede AW |
218 | if (io_tlb_start) |
219 | break; | |
220 | order--; | |
221 | } | |
222 | ||
223 | if (!io_tlb_start) | |
224 | goto cleanup1; | |
225 | ||
563aaf06 | 226 | if (order != get_order(bytes)) { |
0b9afede AW |
227 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " |
228 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
229 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
563aaf06 | 230 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede | 231 | } |
563aaf06 JB |
232 | io_tlb_end = io_tlb_start + bytes; |
233 | memset(io_tlb_start, 0, bytes); | |
0b9afede AW |
234 | |
235 | /* | |
236 | * Allocate and initialize the free list array. This array is used | |
237 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
238 | * between io_tlb_start and io_tlb_end. | |
239 | */ | |
240 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
241 | get_order(io_tlb_nslabs * sizeof(int))); | |
242 | if (!io_tlb_list) | |
243 | goto cleanup2; | |
244 | ||
245 | for (i = 0; i < io_tlb_nslabs; i++) | |
246 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
247 | io_tlb_index = 0; | |
248 | ||
bc40ac66 BB |
249 | io_tlb_orig_addr = (phys_addr_t *) |
250 | __get_free_pages(GFP_KERNEL, | |
251 | get_order(io_tlb_nslabs * | |
252 | sizeof(phys_addr_t))); | |
0b9afede AW |
253 | if (!io_tlb_orig_addr) |
254 | goto cleanup3; | |
255 | ||
bc40ac66 | 256 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t)); |
0b9afede AW |
257 | |
258 | /* | |
259 | * Get the overflow emergency buffer | |
260 | */ | |
261 | io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
262 | get_order(io_tlb_overflow)); | |
263 | if (!io_tlb_overflow_buffer) | |
264 | goto cleanup4; | |
265 | ||
ad32e8cb | 266 | swiotlb_print_info(); |
0b9afede | 267 | |
5740afdb FT |
268 | late_alloc = 1; |
269 | ||
0b9afede AW |
270 | return 0; |
271 | ||
272 | cleanup4: | |
bc40ac66 BB |
273 | free_pages((unsigned long)io_tlb_orig_addr, |
274 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
0b9afede AW |
275 | io_tlb_orig_addr = NULL; |
276 | cleanup3: | |
25667d67 TL |
277 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
278 | sizeof(int))); | |
0b9afede | 279 | io_tlb_list = NULL; |
0b9afede | 280 | cleanup2: |
563aaf06 | 281 | io_tlb_end = NULL; |
0b9afede AW |
282 | free_pages((unsigned long)io_tlb_start, order); |
283 | io_tlb_start = NULL; | |
284 | cleanup1: | |
285 | io_tlb_nslabs = req_nslabs; | |
286 | return -ENOMEM; | |
287 | } | |
288 | ||
5740afdb FT |
289 | void __init swiotlb_free(void) |
290 | { | |
291 | if (!io_tlb_overflow_buffer) | |
292 | return; | |
293 | ||
294 | if (late_alloc) { | |
295 | free_pages((unsigned long)io_tlb_overflow_buffer, | |
296 | get_order(io_tlb_overflow)); | |
297 | free_pages((unsigned long)io_tlb_orig_addr, | |
298 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
299 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
300 | sizeof(int))); | |
301 | free_pages((unsigned long)io_tlb_start, | |
302 | get_order(io_tlb_nslabs << IO_TLB_SHIFT)); | |
303 | } else { | |
304 | free_bootmem_late(__pa(io_tlb_overflow_buffer), | |
305 | io_tlb_overflow); | |
306 | free_bootmem_late(__pa(io_tlb_orig_addr), | |
307 | io_tlb_nslabs * sizeof(phys_addr_t)); | |
308 | free_bootmem_late(__pa(io_tlb_list), | |
309 | io_tlb_nslabs * sizeof(int)); | |
310 | free_bootmem_late(__pa(io_tlb_start), | |
311 | io_tlb_nslabs << IO_TLB_SHIFT); | |
312 | } | |
313 | } | |
314 | ||
02ca646e | 315 | static int is_swiotlb_buffer(phys_addr_t paddr) |
640aebfe | 316 | { |
02ca646e FT |
317 | return paddr >= virt_to_phys(io_tlb_start) && |
318 | paddr < virt_to_phys(io_tlb_end); | |
640aebfe FT |
319 | } |
320 | ||
fb05a379 BB |
321 | /* |
322 | * Bounce: copy the swiotlb buffer back to the original dma location | |
323 | */ | |
324 | static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size, | |
325 | enum dma_data_direction dir) | |
326 | { | |
327 | unsigned long pfn = PFN_DOWN(phys); | |
328 | ||
329 | if (PageHighMem(pfn_to_page(pfn))) { | |
330 | /* The buffer does not have a mapping. Map it in and copy */ | |
331 | unsigned int offset = phys & ~PAGE_MASK; | |
332 | char *buffer; | |
333 | unsigned int sz = 0; | |
334 | unsigned long flags; | |
335 | ||
336 | while (size) { | |
67131ad0 | 337 | sz = min_t(size_t, PAGE_SIZE - offset, size); |
fb05a379 BB |
338 | |
339 | local_irq_save(flags); | |
340 | buffer = kmap_atomic(pfn_to_page(pfn), | |
341 | KM_BOUNCE_READ); | |
342 | if (dir == DMA_TO_DEVICE) | |
343 | memcpy(dma_addr, buffer + offset, sz); | |
ef9b1893 | 344 | else |
fb05a379 BB |
345 | memcpy(buffer + offset, dma_addr, sz); |
346 | kunmap_atomic(buffer, KM_BOUNCE_READ); | |
ef9b1893 | 347 | local_irq_restore(flags); |
fb05a379 BB |
348 | |
349 | size -= sz; | |
350 | pfn++; | |
351 | dma_addr += sz; | |
352 | offset = 0; | |
ef9b1893 JF |
353 | } |
354 | } else { | |
ef9b1893 | 355 | if (dir == DMA_TO_DEVICE) |
fb05a379 | 356 | memcpy(dma_addr, phys_to_virt(phys), size); |
ef9b1893 | 357 | else |
fb05a379 | 358 | memcpy(phys_to_virt(phys), dma_addr, size); |
ef9b1893 | 359 | } |
1b548f66 JF |
360 | } |
361 | ||
1da177e4 LT |
362 | /* |
363 | * Allocates bounce buffer and returns its kernel virtual address. | |
364 | */ | |
365 | static void * | |
bc40ac66 | 366 | map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir) |
1da177e4 LT |
367 | { |
368 | unsigned long flags; | |
369 | char *dma_addr; | |
370 | unsigned int nslots, stride, index, wrap; | |
371 | int i; | |
681cc5cd FT |
372 | unsigned long start_dma_addr; |
373 | unsigned long mask; | |
374 | unsigned long offset_slots; | |
375 | unsigned long max_slots; | |
376 | ||
377 | mask = dma_get_seg_boundary(hwdev); | |
70a7d3cc | 378 | start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask; |
681cc5cd FT |
379 | |
380 | offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
a5ddde4a IC |
381 | |
382 | /* | |
383 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
384 | */ | |
b15a3891 JB |
385 | max_slots = mask + 1 |
386 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
387 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
1da177e4 LT |
388 | |
389 | /* | |
390 | * For mappings greater than a page, we limit the stride (and | |
391 | * hence alignment) to a page size. | |
392 | */ | |
393 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
394 | if (size > PAGE_SIZE) | |
395 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
396 | else | |
397 | stride = 1; | |
398 | ||
34814545 | 399 | BUG_ON(!nslots); |
1da177e4 LT |
400 | |
401 | /* | |
402 | * Find suitable number of IO TLB entries size that will fit this | |
403 | * request and allocate a buffer from that IO TLB pool. | |
404 | */ | |
405 | spin_lock_irqsave(&io_tlb_lock, flags); | |
a7133a15 AM |
406 | index = ALIGN(io_tlb_index, stride); |
407 | if (index >= io_tlb_nslabs) | |
408 | index = 0; | |
409 | wrap = index; | |
410 | ||
411 | do { | |
a8522509 FT |
412 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
413 | max_slots)) { | |
b15a3891 JB |
414 | index += stride; |
415 | if (index >= io_tlb_nslabs) | |
416 | index = 0; | |
a7133a15 AM |
417 | if (index == wrap) |
418 | goto not_found; | |
419 | } | |
420 | ||
421 | /* | |
422 | * If we find a slot that indicates we have 'nslots' number of | |
423 | * contiguous buffers, we allocate the buffers from that slot | |
424 | * and mark the entries as '0' indicating unavailable. | |
425 | */ | |
426 | if (io_tlb_list[index] >= nslots) { | |
427 | int count = 0; | |
428 | ||
429 | for (i = index; i < (int) (index + nslots); i++) | |
430 | io_tlb_list[i] = 0; | |
431 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
432 | io_tlb_list[i] = ++count; | |
433 | dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
1da177e4 | 434 | |
a7133a15 AM |
435 | /* |
436 | * Update the indices to avoid searching in the next | |
437 | * round. | |
438 | */ | |
439 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
440 | ? (index + nslots) : 0); | |
441 | ||
442 | goto found; | |
443 | } | |
444 | index += stride; | |
445 | if (index >= io_tlb_nslabs) | |
446 | index = 0; | |
447 | } while (index != wrap); | |
448 | ||
449 | not_found: | |
450 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
451 | return NULL; | |
452 | found: | |
1da177e4 LT |
453 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
454 | ||
455 | /* | |
456 | * Save away the mapping from the original address to the DMA address. | |
457 | * This is needed when we sync the memory. Then we sync the buffer if | |
458 | * needed. | |
459 | */ | |
bc40ac66 BB |
460 | for (i = 0; i < nslots; i++) |
461 | io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT); | |
1da177e4 | 462 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
fb05a379 | 463 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
1da177e4 LT |
464 | |
465 | return dma_addr; | |
466 | } | |
467 | ||
468 | /* | |
469 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
470 | */ | |
471 | static void | |
7fcebbd2 | 472 | do_unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) |
1da177e4 LT |
473 | { |
474 | unsigned long flags; | |
475 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
476 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
bc40ac66 | 477 | phys_addr_t phys = io_tlb_orig_addr[index]; |
1da177e4 LT |
478 | |
479 | /* | |
480 | * First, sync the memory before unmapping the entry | |
481 | */ | |
bc40ac66 | 482 | if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
fb05a379 | 483 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
1da177e4 LT |
484 | |
485 | /* | |
486 | * Return the buffer to the free list by setting the corresponding | |
487 | * entries to indicate the number of contigous entries available. | |
488 | * While returning the entries to the free list, we merge the entries | |
489 | * with slots below and above the pool being returned. | |
490 | */ | |
491 | spin_lock_irqsave(&io_tlb_lock, flags); | |
492 | { | |
493 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
494 | io_tlb_list[index + nslots] : 0); | |
495 | /* | |
496 | * Step 1: return the slots to the free list, merging the | |
497 | * slots with superceeding slots | |
498 | */ | |
499 | for (i = index + nslots - 1; i >= index; i--) | |
500 | io_tlb_list[i] = ++count; | |
501 | /* | |
502 | * Step 2: merge the returned slots with the preceding slots, | |
503 | * if available (non zero) | |
504 | */ | |
505 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
506 | io_tlb_list[i] = ++count; | |
507 | } | |
508 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
509 | } | |
510 | ||
511 | static void | |
de69e0f0 JL |
512 | sync_single(struct device *hwdev, char *dma_addr, size_t size, |
513 | int dir, int target) | |
1da177e4 | 514 | { |
bc40ac66 BB |
515 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; |
516 | phys_addr_t phys = io_tlb_orig_addr[index]; | |
517 | ||
518 | phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); | |
df336d1c | 519 | |
de69e0f0 JL |
520 | switch (target) { |
521 | case SYNC_FOR_CPU: | |
522 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 523 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
34814545 ES |
524 | else |
525 | BUG_ON(dir != DMA_TO_DEVICE); | |
de69e0f0 JL |
526 | break; |
527 | case SYNC_FOR_DEVICE: | |
528 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 529 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
34814545 ES |
530 | else |
531 | BUG_ON(dir != DMA_FROM_DEVICE); | |
de69e0f0 JL |
532 | break; |
533 | default: | |
1da177e4 | 534 | BUG(); |
de69e0f0 | 535 | } |
1da177e4 LT |
536 | } |
537 | ||
538 | void * | |
539 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
06a54497 | 540 | dma_addr_t *dma_handle, gfp_t flags) |
1da177e4 | 541 | { |
563aaf06 | 542 | dma_addr_t dev_addr; |
1da177e4 LT |
543 | void *ret; |
544 | int order = get_order(size); | |
284901a9 | 545 | u64 dma_mask = DMA_BIT_MASK(32); |
1e74f300 FT |
546 | |
547 | if (hwdev && hwdev->coherent_dma_mask) | |
548 | dma_mask = hwdev->coherent_dma_mask; | |
1da177e4 | 549 | |
25667d67 | 550 | ret = (void *)__get_free_pages(flags, order); |
b9394647 | 551 | if (ret && swiotlb_virt_to_bus(hwdev, ret) + size > dma_mask) { |
1da177e4 LT |
552 | /* |
553 | * The allocated memory isn't reachable by the device. | |
1da177e4 LT |
554 | */ |
555 | free_pages((unsigned long) ret, order); | |
556 | ret = NULL; | |
557 | } | |
558 | if (!ret) { | |
559 | /* | |
560 | * We are either out of memory or the device can't DMA | |
ceb5ac32 BB |
561 | * to GFP_DMA memory; fall back on map_single(), which |
562 | * will grab memory from the lowest available address range. | |
1da177e4 | 563 | */ |
bc40ac66 | 564 | ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE); |
9dfda12b | 565 | if (!ret) |
1da177e4 | 566 | return NULL; |
1da177e4 LT |
567 | } |
568 | ||
569 | memset(ret, 0, size); | |
70a7d3cc | 570 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); |
1da177e4 LT |
571 | |
572 | /* Confirm address can be DMA'd by device */ | |
b9394647 | 573 | if (dev_addr + size > dma_mask) { |
563aaf06 | 574 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", |
1e74f300 | 575 | (unsigned long long)dma_mask, |
563aaf06 | 576 | (unsigned long long)dev_addr); |
a2b89b59 FT |
577 | |
578 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
7fcebbd2 | 579 | do_unmap_single(hwdev, ret, size, DMA_TO_DEVICE); |
a2b89b59 | 580 | return NULL; |
1da177e4 LT |
581 | } |
582 | *dma_handle = dev_addr; | |
583 | return ret; | |
584 | } | |
874d6a95 | 585 | EXPORT_SYMBOL(swiotlb_alloc_coherent); |
1da177e4 LT |
586 | |
587 | void | |
588 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
02ca646e | 589 | dma_addr_t dev_addr) |
1da177e4 | 590 | { |
862d196b | 591 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
02ca646e | 592 | |
aa24886e | 593 | WARN_ON(irqs_disabled()); |
02ca646e FT |
594 | if (!is_swiotlb_buffer(paddr)) |
595 | free_pages((unsigned long)vaddr, get_order(size)); | |
1da177e4 LT |
596 | else |
597 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
7fcebbd2 | 598 | do_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); |
1da177e4 | 599 | } |
874d6a95 | 600 | EXPORT_SYMBOL(swiotlb_free_coherent); |
1da177e4 LT |
601 | |
602 | static void | |
603 | swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) | |
604 | { | |
605 | /* | |
606 | * Ran out of IOMMU space for this operation. This is very bad. | |
607 | * Unfortunately the drivers cannot handle this operation properly. | |
17e5ad6c | 608 | * unless they check for dma_mapping_error (most don't) |
1da177e4 LT |
609 | * When the mapping is small enough return a static buffer to limit |
610 | * the damage, or panic when the transfer is too big. | |
611 | */ | |
563aaf06 | 612 | printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " |
94b32486 | 613 | "device %s\n", size, dev ? dev_name(dev) : "?"); |
1da177e4 | 614 | |
c7084b35 CD |
615 | if (size <= io_tlb_overflow || !do_panic) |
616 | return; | |
617 | ||
618 | if (dir == DMA_BIDIRECTIONAL) | |
619 | panic("DMA: Random memory could be DMA accessed\n"); | |
620 | if (dir == DMA_FROM_DEVICE) | |
621 | panic("DMA: Random memory could be DMA written\n"); | |
622 | if (dir == DMA_TO_DEVICE) | |
623 | panic("DMA: Random memory could be DMA read\n"); | |
1da177e4 LT |
624 | } |
625 | ||
626 | /* | |
627 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
17e5ad6c | 628 | * physical address to use is returned. |
1da177e4 LT |
629 | * |
630 | * Once the device is given the dma address, the device owns this memory until | |
ceb5ac32 | 631 | * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. |
1da177e4 | 632 | */ |
f98eee8e FT |
633 | dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, |
634 | unsigned long offset, size_t size, | |
635 | enum dma_data_direction dir, | |
636 | struct dma_attrs *attrs) | |
1da177e4 | 637 | { |
f98eee8e | 638 | phys_addr_t phys = page_to_phys(page) + offset; |
862d196b | 639 | dma_addr_t dev_addr = phys_to_dma(dev, phys); |
1da177e4 LT |
640 | void *map; |
641 | ||
34814545 | 642 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 643 | /* |
ceb5ac32 | 644 | * If the address happens to be in the device's DMA window, |
1da177e4 LT |
645 | * we can safely return the device addr and not worry about bounce |
646 | * buffering it. | |
647 | */ | |
b9394647 | 648 | if (dma_capable(dev, dev_addr, size) && !swiotlb_force) |
1da177e4 LT |
649 | return dev_addr; |
650 | ||
651 | /* | |
652 | * Oh well, have to allocate and map a bounce buffer. | |
653 | */ | |
f98eee8e | 654 | map = map_single(dev, phys, size, dir); |
1da177e4 | 655 | if (!map) { |
f98eee8e | 656 | swiotlb_full(dev, size, dir, 1); |
1da177e4 LT |
657 | map = io_tlb_overflow_buffer; |
658 | } | |
659 | ||
f98eee8e | 660 | dev_addr = swiotlb_virt_to_bus(dev, map); |
1da177e4 LT |
661 | |
662 | /* | |
663 | * Ensure that the address returned is DMA'ble | |
664 | */ | |
b9394647 | 665 | if (!dma_capable(dev, dev_addr, size)) |
1da177e4 LT |
666 | panic("map_single: bounce buffer is not DMA'ble"); |
667 | ||
668 | return dev_addr; | |
669 | } | |
f98eee8e | 670 | EXPORT_SYMBOL_GPL(swiotlb_map_page); |
1da177e4 | 671 | |
1da177e4 LT |
672 | /* |
673 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
ceb5ac32 | 674 | * match what was provided for in a previous swiotlb_map_page call. All |
1da177e4 LT |
675 | * other usages are undefined. |
676 | * | |
677 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
678 | * whatever the device wrote there. | |
679 | */ | |
7fcebbd2 BB |
680 | static void unmap_single(struct device *hwdev, dma_addr_t dev_addr, |
681 | size_t size, int dir) | |
1da177e4 | 682 | { |
862d196b | 683 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
1da177e4 | 684 | |
34814545 | 685 | BUG_ON(dir == DMA_NONE); |
7fcebbd2 | 686 | |
02ca646e FT |
687 | if (is_swiotlb_buffer(paddr)) { |
688 | do_unmap_single(hwdev, phys_to_virt(paddr), size, dir); | |
7fcebbd2 BB |
689 | return; |
690 | } | |
691 | ||
692 | if (dir != DMA_FROM_DEVICE) | |
693 | return; | |
694 | ||
02ca646e FT |
695 | /* |
696 | * phys_to_virt doesn't work with hihgmem page but we could | |
697 | * call dma_mark_clean() with hihgmem page here. However, we | |
698 | * are fine since dma_mark_clean() is null on POWERPC. We can | |
699 | * make dma_mark_clean() take a physical address if necessary. | |
700 | */ | |
701 | dma_mark_clean(phys_to_virt(paddr), size); | |
7fcebbd2 BB |
702 | } |
703 | ||
704 | void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, | |
705 | size_t size, enum dma_data_direction dir, | |
706 | struct dma_attrs *attrs) | |
707 | { | |
708 | unmap_single(hwdev, dev_addr, size, dir); | |
1da177e4 | 709 | } |
f98eee8e | 710 | EXPORT_SYMBOL_GPL(swiotlb_unmap_page); |
874d6a95 | 711 | |
1da177e4 LT |
712 | /* |
713 | * Make physical memory consistent for a single streaming mode DMA translation | |
714 | * after a transfer. | |
715 | * | |
ceb5ac32 | 716 | * If you perform a swiotlb_map_page() but wish to interrogate the buffer |
17e5ad6c TL |
717 | * using the cpu, yet do not wish to teardown the dma mapping, you must |
718 | * call this function before doing so. At the next point you give the dma | |
1da177e4 LT |
719 | * address back to the card, you must first perform a |
720 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
721 | */ | |
be6b0267 | 722 | static void |
8270f3f1 | 723 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 | 724 | size_t size, int dir, int target) |
1da177e4 | 725 | { |
862d196b | 726 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
1da177e4 | 727 | |
34814545 | 728 | BUG_ON(dir == DMA_NONE); |
380d6878 | 729 | |
02ca646e FT |
730 | if (is_swiotlb_buffer(paddr)) { |
731 | sync_single(hwdev, phys_to_virt(paddr), size, dir, target); | |
380d6878 BB |
732 | return; |
733 | } | |
734 | ||
735 | if (dir != DMA_FROM_DEVICE) | |
736 | return; | |
737 | ||
02ca646e | 738 | dma_mark_clean(phys_to_virt(paddr), size); |
1da177e4 LT |
739 | } |
740 | ||
8270f3f1 JL |
741 | void |
742 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 743 | size_t size, enum dma_data_direction dir) |
8270f3f1 | 744 | { |
de69e0f0 | 745 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); |
8270f3f1 | 746 | } |
874d6a95 | 747 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); |
8270f3f1 | 748 | |
1da177e4 LT |
749 | void |
750 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 751 | size_t size, enum dma_data_direction dir) |
1da177e4 | 752 | { |
de69e0f0 | 753 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); |
1da177e4 | 754 | } |
874d6a95 | 755 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); |
1da177e4 | 756 | |
878a97cf JL |
757 | /* |
758 | * Same as above, but for a sub-range of the mapping. | |
759 | */ | |
be6b0267 | 760 | static void |
878a97cf | 761 | swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 JL |
762 | unsigned long offset, size_t size, |
763 | int dir, int target) | |
878a97cf | 764 | { |
380d6878 | 765 | swiotlb_sync_single(hwdev, dev_addr + offset, size, dir, target); |
878a97cf JL |
766 | } |
767 | ||
768 | void | |
769 | swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e FT |
770 | unsigned long offset, size_t size, |
771 | enum dma_data_direction dir) | |
878a97cf | 772 | { |
de69e0f0 JL |
773 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
774 | SYNC_FOR_CPU); | |
878a97cf | 775 | } |
874d6a95 | 776 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu); |
878a97cf JL |
777 | |
778 | void | |
779 | swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e FT |
780 | unsigned long offset, size_t size, |
781 | enum dma_data_direction dir) | |
878a97cf | 782 | { |
de69e0f0 JL |
783 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
784 | SYNC_FOR_DEVICE); | |
878a97cf | 785 | } |
874d6a95 | 786 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device); |
878a97cf | 787 | |
1da177e4 LT |
788 | /* |
789 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
ceb5ac32 | 790 | * This is the scatter-gather version of the above swiotlb_map_page |
1da177e4 LT |
791 | * interface. Here the scatter gather list elements are each tagged with the |
792 | * appropriate dma address and length. They are obtained via | |
793 | * sg_dma_{address,length}(SG). | |
794 | * | |
795 | * NOTE: An implementation may be able to use a smaller number of | |
796 | * DMA address/length pairs than there are SG table elements. | |
797 | * (for example via virtual mapping capabilities) | |
798 | * The routine returns the number of addr/length pairs actually | |
799 | * used, at most nents. | |
800 | * | |
ceb5ac32 | 801 | * Device ownership issues as mentioned above for swiotlb_map_page are the |
1da177e4 LT |
802 | * same here. |
803 | */ | |
804 | int | |
309df0c5 | 805 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, |
160c1d8e | 806 | enum dma_data_direction dir, struct dma_attrs *attrs) |
1da177e4 | 807 | { |
dbfd49fe | 808 | struct scatterlist *sg; |
1da177e4 LT |
809 | int i; |
810 | ||
34814545 | 811 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 812 | |
dbfd49fe | 813 | for_each_sg(sgl, sg, nelems, i) { |
961d7d0e | 814 | phys_addr_t paddr = sg_phys(sg); |
862d196b | 815 | dma_addr_t dev_addr = phys_to_dma(hwdev, paddr); |
bc40ac66 | 816 | |
cf56e3f2 | 817 | if (swiotlb_force || |
b9394647 | 818 | !dma_capable(hwdev, dev_addr, sg->length)) { |
bc40ac66 BB |
819 | void *map = map_single(hwdev, sg_phys(sg), |
820 | sg->length, dir); | |
7e870233 | 821 | if (!map) { |
1da177e4 LT |
822 | /* Don't panic here, we expect map_sg users |
823 | to do proper error handling. */ | |
824 | swiotlb_full(hwdev, sg->length, dir, 0); | |
309df0c5 AK |
825 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
826 | attrs); | |
dbfd49fe | 827 | sgl[0].dma_length = 0; |
1da177e4 LT |
828 | return 0; |
829 | } | |
70a7d3cc | 830 | sg->dma_address = swiotlb_virt_to_bus(hwdev, map); |
1da177e4 LT |
831 | } else |
832 | sg->dma_address = dev_addr; | |
833 | sg->dma_length = sg->length; | |
834 | } | |
835 | return nelems; | |
836 | } | |
309df0c5 AK |
837 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); |
838 | ||
839 | int | |
840 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
841 | int dir) | |
842 | { | |
843 | return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
844 | } | |
874d6a95 | 845 | EXPORT_SYMBOL(swiotlb_map_sg); |
1da177e4 LT |
846 | |
847 | /* | |
848 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
ceb5ac32 | 849 | * concerning calls here are the same as for swiotlb_unmap_page() above. |
1da177e4 LT |
850 | */ |
851 | void | |
309df0c5 | 852 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
160c1d8e | 853 | int nelems, enum dma_data_direction dir, struct dma_attrs *attrs) |
1da177e4 | 854 | { |
dbfd49fe | 855 | struct scatterlist *sg; |
1da177e4 LT |
856 | int i; |
857 | ||
34814545 | 858 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 859 | |
7fcebbd2 BB |
860 | for_each_sg(sgl, sg, nelems, i) |
861 | unmap_single(hwdev, sg->dma_address, sg->dma_length, dir); | |
862 | ||
1da177e4 | 863 | } |
309df0c5 AK |
864 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); |
865 | ||
866 | void | |
867 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
868 | int dir) | |
869 | { | |
870 | return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
871 | } | |
874d6a95 | 872 | EXPORT_SYMBOL(swiotlb_unmap_sg); |
1da177e4 LT |
873 | |
874 | /* | |
875 | * Make physical memory consistent for a set of streaming mode DMA translations | |
876 | * after a transfer. | |
877 | * | |
878 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
879 | * and usage. | |
880 | */ | |
be6b0267 | 881 | static void |
dbfd49fe | 882 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, |
de69e0f0 | 883 | int nelems, int dir, int target) |
1da177e4 | 884 | { |
dbfd49fe | 885 | struct scatterlist *sg; |
1da177e4 LT |
886 | int i; |
887 | ||
380d6878 BB |
888 | for_each_sg(sgl, sg, nelems, i) |
889 | swiotlb_sync_single(hwdev, sg->dma_address, | |
de69e0f0 | 890 | sg->dma_length, dir, target); |
1da177e4 LT |
891 | } |
892 | ||
8270f3f1 JL |
893 | void |
894 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 895 | int nelems, enum dma_data_direction dir) |
8270f3f1 | 896 | { |
de69e0f0 | 897 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); |
8270f3f1 | 898 | } |
874d6a95 | 899 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); |
8270f3f1 | 900 | |
1da177e4 LT |
901 | void |
902 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 903 | int nelems, enum dma_data_direction dir) |
1da177e4 | 904 | { |
de69e0f0 | 905 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); |
1da177e4 | 906 | } |
874d6a95 | 907 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); |
1da177e4 LT |
908 | |
909 | int | |
8d8bb39b | 910 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) |
1da177e4 | 911 | { |
70a7d3cc | 912 | return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer)); |
1da177e4 | 913 | } |
874d6a95 | 914 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); |
1da177e4 LT |
915 | |
916 | /* | |
17e5ad6c | 917 | * Return whether the given device DMA address mask can be supported |
1da177e4 | 918 | * properly. For example, if your device can only drive the low 24-bits |
17e5ad6c | 919 | * during bus mastering, then you would pass 0x00ffffff as the mask to |
1da177e4 LT |
920 | * this function. |
921 | */ | |
922 | int | |
563aaf06 | 923 | swiotlb_dma_supported(struct device *hwdev, u64 mask) |
1da177e4 | 924 | { |
70a7d3cc | 925 | return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask; |
1da177e4 | 926 | } |
1da177e4 | 927 | EXPORT_SYMBOL(swiotlb_dma_supported); |