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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Dynamic DMA mapping support. | |
3 | * | |
563aaf06 | 4 | * This implementation is a fallback for platforms that do not support |
1da177e4 LT |
5 | * I/O TLBs (aka DMA address translation hardware). |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
569c8bf5 JL |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
fb05a379 | 17 | * 08/12/11 beckyb Add highmem support |
1da177e4 LT |
18 | */ |
19 | ||
20 | #include <linux/cache.h> | |
17e5ad6c | 21 | #include <linux/dma-mapping.h> |
1da177e4 | 22 | #include <linux/mm.h> |
8bc3bcc9 | 23 | #include <linux/export.h> |
1da177e4 LT |
24 | #include <linux/spinlock.h> |
25 | #include <linux/string.h> | |
0016fdee | 26 | #include <linux/swiotlb.h> |
fb05a379 | 27 | #include <linux/pfn.h> |
1da177e4 LT |
28 | #include <linux/types.h> |
29 | #include <linux/ctype.h> | |
ef9b1893 | 30 | #include <linux/highmem.h> |
5a0e3ad6 | 31 | #include <linux/gfp.h> |
84be456f | 32 | #include <linux/scatterlist.h> |
1da177e4 LT |
33 | |
34 | #include <asm/io.h> | |
1da177e4 LT |
35 | #include <asm/dma.h> |
36 | ||
37 | #include <linux/init.h> | |
38 | #include <linux/bootmem.h> | |
a8522509 | 39 | #include <linux/iommu-helper.h> |
1da177e4 | 40 | |
ce5be5a1 | 41 | #define CREATE_TRACE_POINTS |
2b2b614d ZK |
42 | #include <trace/events/swiotlb.h> |
43 | ||
1da177e4 LT |
44 | #define OFFSET(val,align) ((unsigned long) \ |
45 | ( (val) & ( (align) - 1))) | |
46 | ||
0b9afede AW |
47 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
48 | ||
49 | /* | |
50 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
51 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
52 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
53 | */ | |
54 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
55 | ||
ae7871be | 56 | enum swiotlb_force swiotlb_force; |
1da177e4 LT |
57 | |
58 | /* | |
bfc5501f KRW |
59 | * Used to do a quick range check in swiotlb_tbl_unmap_single and |
60 | * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this | |
1da177e4 LT |
61 | * API. |
62 | */ | |
ff7204a7 | 63 | static phys_addr_t io_tlb_start, io_tlb_end; |
1da177e4 LT |
64 | |
65 | /* | |
b595076a | 66 | * The number of IO TLB blocks (in groups of 64) between io_tlb_start and |
1da177e4 LT |
67 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. |
68 | */ | |
69 | static unsigned long io_tlb_nslabs; | |
70 | ||
71 | /* | |
72 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
73 | */ | |
74 | static unsigned long io_tlb_overflow = 32*1024; | |
75 | ||
ee3f6ba8 | 76 | static phys_addr_t io_tlb_overflow_buffer; |
1da177e4 LT |
77 | |
78 | /* | |
79 | * This is a free list describing the number of free entries available from | |
80 | * each index | |
81 | */ | |
82 | static unsigned int *io_tlb_list; | |
83 | static unsigned int io_tlb_index; | |
84 | ||
85 | /* | |
86 | * We need to save away the original address corresponding to a mapped entry | |
87 | * for the sync operations. | |
88 | */ | |
8e0629c1 | 89 | #define INVALID_PHYS_ADDR (~(phys_addr_t)0) |
bc40ac66 | 90 | static phys_addr_t *io_tlb_orig_addr; |
1da177e4 LT |
91 | |
92 | /* | |
93 | * Protect the above data structures in the map and unmap calls | |
94 | */ | |
95 | static DEFINE_SPINLOCK(io_tlb_lock); | |
96 | ||
5740afdb FT |
97 | static int late_alloc; |
98 | ||
1da177e4 LT |
99 | static int __init |
100 | setup_io_tlb_npages(char *str) | |
101 | { | |
102 | if (isdigit(*str)) { | |
e8579e72 | 103 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
1da177e4 LT |
104 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
105 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
106 | } | |
107 | if (*str == ',') | |
108 | ++str; | |
b18485e7 | 109 | if (!strcmp(str, "force")) |
ae7871be | 110 | swiotlb_force = SWIOTLB_FORCE; |
b18485e7 | 111 | |
c729de8f | 112 | return 0; |
1da177e4 | 113 | } |
c729de8f | 114 | early_param("swiotlb", setup_io_tlb_npages); |
1da177e4 LT |
115 | /* make io_tlb_overflow tunable too? */ |
116 | ||
f21ffe9f | 117 | unsigned long swiotlb_nr_tbl(void) |
5f98ecdb FT |
118 | { |
119 | return io_tlb_nslabs; | |
120 | } | |
f21ffe9f | 121 | EXPORT_SYMBOL_GPL(swiotlb_nr_tbl); |
c729de8f YL |
122 | |
123 | /* default to 64MB */ | |
124 | #define IO_TLB_DEFAULT_SIZE (64UL<<20) | |
125 | unsigned long swiotlb_size_or_default(void) | |
126 | { | |
127 | unsigned long size; | |
128 | ||
129 | size = io_tlb_nslabs << IO_TLB_SHIFT; | |
130 | ||
131 | return size ? size : (IO_TLB_DEFAULT_SIZE); | |
132 | } | |
133 | ||
02ca646e | 134 | /* Note that this doesn't work with highmem page */ |
70a7d3cc JF |
135 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, |
136 | volatile void *address) | |
e08e1f7a | 137 | { |
862d196b | 138 | return phys_to_dma(hwdev, virt_to_phys(address)); |
e08e1f7a IC |
139 | } |
140 | ||
ac2cbab2 YL |
141 | static bool no_iotlb_memory; |
142 | ||
ad32e8cb | 143 | void swiotlb_print_info(void) |
2e5b2b86 | 144 | { |
ad32e8cb | 145 | unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
ff7204a7 | 146 | unsigned char *vstart, *vend; |
2e5b2b86 | 147 | |
ac2cbab2 YL |
148 | if (no_iotlb_memory) { |
149 | pr_warn("software IO TLB: No low mem\n"); | |
150 | return; | |
151 | } | |
152 | ||
ff7204a7 | 153 | vstart = phys_to_virt(io_tlb_start); |
c40dba06 | 154 | vend = phys_to_virt(io_tlb_end); |
2e5b2b86 | 155 | |
3af684c7 | 156 | printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n", |
ff7204a7 | 157 | (unsigned long long)io_tlb_start, |
c40dba06 | 158 | (unsigned long long)io_tlb_end, |
ff7204a7 | 159 | bytes >> 20, vstart, vend - 1); |
2e5b2b86 IC |
160 | } |
161 | ||
ac2cbab2 | 162 | int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose) |
1da177e4 | 163 | { |
ee3f6ba8 | 164 | void *v_overflow_buffer; |
563aaf06 | 165 | unsigned long i, bytes; |
1da177e4 | 166 | |
abbceff7 | 167 | bytes = nslabs << IO_TLB_SHIFT; |
1da177e4 | 168 | |
abbceff7 | 169 | io_tlb_nslabs = nslabs; |
ff7204a7 AD |
170 | io_tlb_start = __pa(tlb); |
171 | io_tlb_end = io_tlb_start + bytes; | |
1da177e4 | 172 | |
ee3f6ba8 AD |
173 | /* |
174 | * Get the overflow emergency buffer | |
175 | */ | |
ad6492b8 | 176 | v_overflow_buffer = memblock_virt_alloc_low_nopanic( |
457ff1de SS |
177 | PAGE_ALIGN(io_tlb_overflow), |
178 | PAGE_SIZE); | |
ee3f6ba8 | 179 | if (!v_overflow_buffer) |
ac2cbab2 | 180 | return -ENOMEM; |
ee3f6ba8 AD |
181 | |
182 | io_tlb_overflow_buffer = __pa(v_overflow_buffer); | |
183 | ||
1da177e4 LT |
184 | /* |
185 | * Allocate and initialize the free list array. This array is used | |
186 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
187 | * between io_tlb_start and io_tlb_end. | |
188 | */ | |
457ff1de SS |
189 | io_tlb_list = memblock_virt_alloc( |
190 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int)), | |
191 | PAGE_SIZE); | |
457ff1de SS |
192 | io_tlb_orig_addr = memblock_virt_alloc( |
193 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)), | |
194 | PAGE_SIZE); | |
8e0629c1 JB |
195 | for (i = 0; i < io_tlb_nslabs; i++) { |
196 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
197 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; | |
198 | } | |
199 | io_tlb_index = 0; | |
1da177e4 | 200 | |
ad32e8cb FT |
201 | if (verbose) |
202 | swiotlb_print_info(); | |
ac2cbab2 YL |
203 | |
204 | return 0; | |
1da177e4 LT |
205 | } |
206 | ||
abbceff7 FT |
207 | /* |
208 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
209 | * structures for the software IO TLB used to implement the DMA API. | |
210 | */ | |
ac2cbab2 YL |
211 | void __init |
212 | swiotlb_init(int verbose) | |
abbceff7 | 213 | { |
c729de8f | 214 | size_t default_size = IO_TLB_DEFAULT_SIZE; |
ff7204a7 | 215 | unsigned char *vstart; |
abbceff7 FT |
216 | unsigned long bytes; |
217 | ||
218 | if (!io_tlb_nslabs) { | |
219 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
220 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
221 | } | |
222 | ||
223 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
224 | ||
ac2cbab2 | 225 | /* Get IO TLB memory from the low pages */ |
ad6492b8 | 226 | vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE); |
ac2cbab2 YL |
227 | if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose)) |
228 | return; | |
abbceff7 | 229 | |
ac2cbab2 | 230 | if (io_tlb_start) |
457ff1de SS |
231 | memblock_free_early(io_tlb_start, |
232 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); | |
ac2cbab2 YL |
233 | pr_warn("Cannot allocate SWIOTLB buffer"); |
234 | no_iotlb_memory = true; | |
1da177e4 LT |
235 | } |
236 | ||
0b9afede AW |
237 | /* |
238 | * Systems with larger DMA zones (those that don't support ISA) can | |
239 | * initialize the swiotlb later using the slab allocator if needed. | |
240 | * This should be just like above, but with some error catching. | |
241 | */ | |
242 | int | |
563aaf06 | 243 | swiotlb_late_init_with_default_size(size_t default_size) |
0b9afede | 244 | { |
74838b75 | 245 | unsigned long bytes, req_nslabs = io_tlb_nslabs; |
ff7204a7 | 246 | unsigned char *vstart = NULL; |
0b9afede | 247 | unsigned int order; |
74838b75 | 248 | int rc = 0; |
0b9afede AW |
249 | |
250 | if (!io_tlb_nslabs) { | |
251 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
252 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
253 | } | |
254 | ||
255 | /* | |
256 | * Get IO TLB memory from the low pages | |
257 | */ | |
563aaf06 | 258 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
0b9afede | 259 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
563aaf06 | 260 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede AW |
261 | |
262 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
ff7204a7 AD |
263 | vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, |
264 | order); | |
265 | if (vstart) | |
0b9afede AW |
266 | break; |
267 | order--; | |
268 | } | |
269 | ||
ff7204a7 | 270 | if (!vstart) { |
74838b75 KRW |
271 | io_tlb_nslabs = req_nslabs; |
272 | return -ENOMEM; | |
273 | } | |
563aaf06 | 274 | if (order != get_order(bytes)) { |
0b9afede AW |
275 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " |
276 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
277 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
278 | } | |
ff7204a7 | 279 | rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs); |
74838b75 | 280 | if (rc) |
ff7204a7 | 281 | free_pages((unsigned long)vstart, order); |
74838b75 KRW |
282 | return rc; |
283 | } | |
284 | ||
285 | int | |
286 | swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs) | |
287 | { | |
288 | unsigned long i, bytes; | |
ee3f6ba8 | 289 | unsigned char *v_overflow_buffer; |
74838b75 KRW |
290 | |
291 | bytes = nslabs << IO_TLB_SHIFT; | |
292 | ||
293 | io_tlb_nslabs = nslabs; | |
ff7204a7 AD |
294 | io_tlb_start = virt_to_phys(tlb); |
295 | io_tlb_end = io_tlb_start + bytes; | |
74838b75 | 296 | |
ff7204a7 | 297 | memset(tlb, 0, bytes); |
0b9afede | 298 | |
ee3f6ba8 AD |
299 | /* |
300 | * Get the overflow emergency buffer | |
301 | */ | |
302 | v_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
303 | get_order(io_tlb_overflow)); | |
304 | if (!v_overflow_buffer) | |
305 | goto cleanup2; | |
306 | ||
307 | io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer); | |
308 | ||
0b9afede AW |
309 | /* |
310 | * Allocate and initialize the free list array. This array is used | |
311 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
312 | * between io_tlb_start and io_tlb_end. | |
313 | */ | |
314 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
315 | get_order(io_tlb_nslabs * sizeof(int))); | |
316 | if (!io_tlb_list) | |
ee3f6ba8 | 317 | goto cleanup3; |
0b9afede | 318 | |
bc40ac66 BB |
319 | io_tlb_orig_addr = (phys_addr_t *) |
320 | __get_free_pages(GFP_KERNEL, | |
321 | get_order(io_tlb_nslabs * | |
322 | sizeof(phys_addr_t))); | |
0b9afede | 323 | if (!io_tlb_orig_addr) |
ee3f6ba8 | 324 | goto cleanup4; |
0b9afede | 325 | |
8e0629c1 JB |
326 | for (i = 0; i < io_tlb_nslabs; i++) { |
327 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
328 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; | |
329 | } | |
330 | io_tlb_index = 0; | |
0b9afede | 331 | |
ad32e8cb | 332 | swiotlb_print_info(); |
0b9afede | 333 | |
5740afdb FT |
334 | late_alloc = 1; |
335 | ||
0b9afede AW |
336 | return 0; |
337 | ||
338 | cleanup4: | |
25667d67 TL |
339 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
340 | sizeof(int))); | |
0b9afede | 341 | io_tlb_list = NULL; |
ee3f6ba8 AD |
342 | cleanup3: |
343 | free_pages((unsigned long)v_overflow_buffer, | |
344 | get_order(io_tlb_overflow)); | |
345 | io_tlb_overflow_buffer = 0; | |
0b9afede | 346 | cleanup2: |
c40dba06 | 347 | io_tlb_end = 0; |
ff7204a7 | 348 | io_tlb_start = 0; |
74838b75 | 349 | io_tlb_nslabs = 0; |
0b9afede AW |
350 | return -ENOMEM; |
351 | } | |
352 | ||
5740afdb FT |
353 | void __init swiotlb_free(void) |
354 | { | |
ee3f6ba8 | 355 | if (!io_tlb_orig_addr) |
5740afdb FT |
356 | return; |
357 | ||
358 | if (late_alloc) { | |
ee3f6ba8 | 359 | free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer), |
5740afdb FT |
360 | get_order(io_tlb_overflow)); |
361 | free_pages((unsigned long)io_tlb_orig_addr, | |
362 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
363 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
364 | sizeof(int))); | |
ff7204a7 | 365 | free_pages((unsigned long)phys_to_virt(io_tlb_start), |
5740afdb FT |
366 | get_order(io_tlb_nslabs << IO_TLB_SHIFT)); |
367 | } else { | |
457ff1de SS |
368 | memblock_free_late(io_tlb_overflow_buffer, |
369 | PAGE_ALIGN(io_tlb_overflow)); | |
370 | memblock_free_late(__pa(io_tlb_orig_addr), | |
371 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t))); | |
372 | memblock_free_late(__pa(io_tlb_list), | |
373 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int))); | |
374 | memblock_free_late(io_tlb_start, | |
375 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); | |
5740afdb | 376 | } |
f21ffe9f | 377 | io_tlb_nslabs = 0; |
5740afdb FT |
378 | } |
379 | ||
9c5a3621 | 380 | int is_swiotlb_buffer(phys_addr_t paddr) |
640aebfe | 381 | { |
ff7204a7 | 382 | return paddr >= io_tlb_start && paddr < io_tlb_end; |
640aebfe FT |
383 | } |
384 | ||
fb05a379 BB |
385 | /* |
386 | * Bounce: copy the swiotlb buffer back to the original dma location | |
387 | */ | |
af51a9f1 AD |
388 | static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr, |
389 | size_t size, enum dma_data_direction dir) | |
fb05a379 | 390 | { |
af51a9f1 AD |
391 | unsigned long pfn = PFN_DOWN(orig_addr); |
392 | unsigned char *vaddr = phys_to_virt(tlb_addr); | |
fb05a379 BB |
393 | |
394 | if (PageHighMem(pfn_to_page(pfn))) { | |
395 | /* The buffer does not have a mapping. Map it in and copy */ | |
af51a9f1 | 396 | unsigned int offset = orig_addr & ~PAGE_MASK; |
fb05a379 BB |
397 | char *buffer; |
398 | unsigned int sz = 0; | |
399 | unsigned long flags; | |
400 | ||
401 | while (size) { | |
67131ad0 | 402 | sz = min_t(size_t, PAGE_SIZE - offset, size); |
fb05a379 BB |
403 | |
404 | local_irq_save(flags); | |
c3eede8e | 405 | buffer = kmap_atomic(pfn_to_page(pfn)); |
fb05a379 | 406 | if (dir == DMA_TO_DEVICE) |
af51a9f1 | 407 | memcpy(vaddr, buffer + offset, sz); |
ef9b1893 | 408 | else |
af51a9f1 | 409 | memcpy(buffer + offset, vaddr, sz); |
c3eede8e | 410 | kunmap_atomic(buffer); |
ef9b1893 | 411 | local_irq_restore(flags); |
fb05a379 BB |
412 | |
413 | size -= sz; | |
414 | pfn++; | |
af51a9f1 | 415 | vaddr += sz; |
fb05a379 | 416 | offset = 0; |
ef9b1893 | 417 | } |
af51a9f1 AD |
418 | } else if (dir == DMA_TO_DEVICE) { |
419 | memcpy(vaddr, phys_to_virt(orig_addr), size); | |
ef9b1893 | 420 | } else { |
af51a9f1 | 421 | memcpy(phys_to_virt(orig_addr), vaddr, size); |
ef9b1893 | 422 | } |
1b548f66 JF |
423 | } |
424 | ||
e05ed4d1 AD |
425 | phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, |
426 | dma_addr_t tbl_dma_addr, | |
427 | phys_addr_t orig_addr, size_t size, | |
0443fa00 AD |
428 | enum dma_data_direction dir, |
429 | unsigned long attrs) | |
1da177e4 LT |
430 | { |
431 | unsigned long flags; | |
e05ed4d1 | 432 | phys_addr_t tlb_addr; |
1da177e4 LT |
433 | unsigned int nslots, stride, index, wrap; |
434 | int i; | |
681cc5cd FT |
435 | unsigned long mask; |
436 | unsigned long offset_slots; | |
437 | unsigned long max_slots; | |
438 | ||
ac2cbab2 YL |
439 | if (no_iotlb_memory) |
440 | panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); | |
441 | ||
681cc5cd | 442 | mask = dma_get_seg_boundary(hwdev); |
681cc5cd | 443 | |
eb605a57 FT |
444 | tbl_dma_addr &= mask; |
445 | ||
446 | offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
a5ddde4a IC |
447 | |
448 | /* | |
449 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
450 | */ | |
b15a3891 JB |
451 | max_slots = mask + 1 |
452 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
453 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
1da177e4 LT |
454 | |
455 | /* | |
456 | * For mappings greater than a page, we limit the stride (and | |
457 | * hence alignment) to a page size. | |
458 | */ | |
459 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
460 | if (size > PAGE_SIZE) | |
461 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
462 | else | |
463 | stride = 1; | |
464 | ||
34814545 | 465 | BUG_ON(!nslots); |
1da177e4 LT |
466 | |
467 | /* | |
468 | * Find suitable number of IO TLB entries size that will fit this | |
469 | * request and allocate a buffer from that IO TLB pool. | |
470 | */ | |
471 | spin_lock_irqsave(&io_tlb_lock, flags); | |
a7133a15 AM |
472 | index = ALIGN(io_tlb_index, stride); |
473 | if (index >= io_tlb_nslabs) | |
474 | index = 0; | |
475 | wrap = index; | |
476 | ||
477 | do { | |
a8522509 FT |
478 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
479 | max_slots)) { | |
b15a3891 JB |
480 | index += stride; |
481 | if (index >= io_tlb_nslabs) | |
482 | index = 0; | |
a7133a15 AM |
483 | if (index == wrap) |
484 | goto not_found; | |
485 | } | |
486 | ||
487 | /* | |
488 | * If we find a slot that indicates we have 'nslots' number of | |
489 | * contiguous buffers, we allocate the buffers from that slot | |
490 | * and mark the entries as '0' indicating unavailable. | |
491 | */ | |
492 | if (io_tlb_list[index] >= nslots) { | |
493 | int count = 0; | |
494 | ||
495 | for (i = index; i < (int) (index + nslots); i++) | |
496 | io_tlb_list[i] = 0; | |
497 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
498 | io_tlb_list[i] = ++count; | |
e05ed4d1 | 499 | tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT); |
1da177e4 | 500 | |
a7133a15 AM |
501 | /* |
502 | * Update the indices to avoid searching in the next | |
503 | * round. | |
504 | */ | |
505 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
506 | ? (index + nslots) : 0); | |
507 | ||
508 | goto found; | |
509 | } | |
510 | index += stride; | |
511 | if (index >= io_tlb_nslabs) | |
512 | index = 0; | |
513 | } while (index != wrap); | |
514 | ||
515 | not_found: | |
516 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
0cb637bf KRW |
517 | if (printk_ratelimit()) |
518 | dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size); | |
e05ed4d1 | 519 | return SWIOTLB_MAP_ERROR; |
a7133a15 | 520 | found: |
1da177e4 LT |
521 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
522 | ||
523 | /* | |
524 | * Save away the mapping from the original address to the DMA address. | |
525 | * This is needed when we sync the memory. Then we sync the buffer if | |
526 | * needed. | |
527 | */ | |
bc40ac66 | 528 | for (i = 0; i < nslots; i++) |
e05ed4d1 | 529 | io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT); |
0443fa00 AD |
530 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) && |
531 | (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
af51a9f1 | 532 | swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE); |
1da177e4 | 533 | |
e05ed4d1 | 534 | return tlb_addr; |
1da177e4 | 535 | } |
d7ef1533 | 536 | EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single); |
1da177e4 | 537 | |
eb605a57 FT |
538 | /* |
539 | * Allocates bounce buffer and returns its kernel virtual address. | |
540 | */ | |
541 | ||
023600f1 AC |
542 | static phys_addr_t |
543 | map_single(struct device *hwdev, phys_addr_t phys, size_t size, | |
0443fa00 | 544 | enum dma_data_direction dir, unsigned long attrs) |
eb605a57 | 545 | { |
ff7204a7 | 546 | dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start); |
eb605a57 | 547 | |
0443fa00 AD |
548 | return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, |
549 | dir, attrs); | |
eb605a57 FT |
550 | } |
551 | ||
1da177e4 LT |
552 | /* |
553 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
554 | */ | |
61ca08c3 | 555 | void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr, |
0443fa00 AD |
556 | size_t size, enum dma_data_direction dir, |
557 | unsigned long attrs) | |
1da177e4 LT |
558 | { |
559 | unsigned long flags; | |
560 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
61ca08c3 AD |
561 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; |
562 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; | |
1da177e4 LT |
563 | |
564 | /* | |
565 | * First, sync the memory before unmapping the entry | |
566 | */ | |
8e0629c1 | 567 | if (orig_addr != INVALID_PHYS_ADDR && |
0443fa00 | 568 | !(attrs & DMA_ATTR_SKIP_CPU_SYNC) && |
8e0629c1 | 569 | ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
af51a9f1 | 570 | swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE); |
1da177e4 LT |
571 | |
572 | /* | |
573 | * Return the buffer to the free list by setting the corresponding | |
af901ca1 | 574 | * entries to indicate the number of contiguous entries available. |
1da177e4 LT |
575 | * While returning the entries to the free list, we merge the entries |
576 | * with slots below and above the pool being returned. | |
577 | */ | |
578 | spin_lock_irqsave(&io_tlb_lock, flags); | |
579 | { | |
580 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
581 | io_tlb_list[index + nslots] : 0); | |
582 | /* | |
583 | * Step 1: return the slots to the free list, merging the | |
584 | * slots with superceeding slots | |
585 | */ | |
8e0629c1 | 586 | for (i = index + nslots - 1; i >= index; i--) { |
1da177e4 | 587 | io_tlb_list[i] = ++count; |
8e0629c1 JB |
588 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; |
589 | } | |
1da177e4 LT |
590 | /* |
591 | * Step 2: merge the returned slots with the preceding slots, | |
592 | * if available (non zero) | |
593 | */ | |
594 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
595 | io_tlb_list[i] = ++count; | |
596 | } | |
597 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
598 | } | |
d7ef1533 | 599 | EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single); |
1da177e4 | 600 | |
fbfda893 AD |
601 | void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr, |
602 | size_t size, enum dma_data_direction dir, | |
603 | enum dma_sync_target target) | |
1da177e4 | 604 | { |
fbfda893 AD |
605 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; |
606 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; | |
bc40ac66 | 607 | |
8e0629c1 JB |
608 | if (orig_addr == INVALID_PHYS_ADDR) |
609 | return; | |
fbfda893 | 610 | orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1); |
df336d1c | 611 | |
de69e0f0 JL |
612 | switch (target) { |
613 | case SYNC_FOR_CPU: | |
614 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
af51a9f1 | 615 | swiotlb_bounce(orig_addr, tlb_addr, |
fbfda893 | 616 | size, DMA_FROM_DEVICE); |
34814545 ES |
617 | else |
618 | BUG_ON(dir != DMA_TO_DEVICE); | |
de69e0f0 JL |
619 | break; |
620 | case SYNC_FOR_DEVICE: | |
621 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
af51a9f1 | 622 | swiotlb_bounce(orig_addr, tlb_addr, |
fbfda893 | 623 | size, DMA_TO_DEVICE); |
34814545 ES |
624 | else |
625 | BUG_ON(dir != DMA_FROM_DEVICE); | |
de69e0f0 JL |
626 | break; |
627 | default: | |
1da177e4 | 628 | BUG(); |
de69e0f0 | 629 | } |
1da177e4 | 630 | } |
d7ef1533 | 631 | EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single); |
1da177e4 LT |
632 | |
633 | void * | |
634 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
06a54497 | 635 | dma_addr_t *dma_handle, gfp_t flags) |
1da177e4 | 636 | { |
563aaf06 | 637 | dma_addr_t dev_addr; |
1da177e4 LT |
638 | void *ret; |
639 | int order = get_order(size); | |
284901a9 | 640 | u64 dma_mask = DMA_BIT_MASK(32); |
1e74f300 FT |
641 | |
642 | if (hwdev && hwdev->coherent_dma_mask) | |
643 | dma_mask = hwdev->coherent_dma_mask; | |
1da177e4 | 644 | |
25667d67 | 645 | ret = (void *)__get_free_pages(flags, order); |
e05ed4d1 AD |
646 | if (ret) { |
647 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); | |
648 | if (dev_addr + size - 1 > dma_mask) { | |
649 | /* | |
650 | * The allocated memory isn't reachable by the device. | |
651 | */ | |
652 | free_pages((unsigned long) ret, order); | |
653 | ret = NULL; | |
654 | } | |
1da177e4 LT |
655 | } |
656 | if (!ret) { | |
657 | /* | |
bfc5501f KRW |
658 | * We are either out of memory or the device can't DMA to |
659 | * GFP_DMA memory; fall back on map_single(), which | |
ceb5ac32 | 660 | * will grab memory from the lowest available address range. |
1da177e4 | 661 | */ |
0443fa00 AD |
662 | phys_addr_t paddr = map_single(hwdev, 0, size, |
663 | DMA_FROM_DEVICE, 0); | |
e05ed4d1 | 664 | if (paddr == SWIOTLB_MAP_ERROR) |
94cc81f9 | 665 | goto err_warn; |
1da177e4 | 666 | |
e05ed4d1 AD |
667 | ret = phys_to_virt(paddr); |
668 | dev_addr = phys_to_dma(hwdev, paddr); | |
1da177e4 | 669 | |
61ca08c3 AD |
670 | /* Confirm address can be DMA'd by device */ |
671 | if (dev_addr + size - 1 > dma_mask) { | |
672 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", | |
673 | (unsigned long long)dma_mask, | |
674 | (unsigned long long)dev_addr); | |
a2b89b59 | 675 | |
0443fa00 AD |
676 | /* |
677 | * DMA_TO_DEVICE to avoid memcpy in unmap_single. | |
678 | * The DMA_ATTR_SKIP_CPU_SYNC is optional. | |
679 | */ | |
61ca08c3 | 680 | swiotlb_tbl_unmap_single(hwdev, paddr, |
0443fa00 AD |
681 | size, DMA_TO_DEVICE, |
682 | DMA_ATTR_SKIP_CPU_SYNC); | |
94cc81f9 | 683 | goto err_warn; |
61ca08c3 | 684 | } |
1da177e4 | 685 | } |
e05ed4d1 | 686 | |
1da177e4 | 687 | *dma_handle = dev_addr; |
e05ed4d1 AD |
688 | memset(ret, 0, size); |
689 | ||
1da177e4 | 690 | return ret; |
94cc81f9 JR |
691 | |
692 | err_warn: | |
693 | pr_warn("swiotlb: coherent allocation failed for device %s size=%zu\n", | |
694 | dev_name(hwdev), size); | |
695 | dump_stack(); | |
696 | ||
697 | return NULL; | |
1da177e4 | 698 | } |
874d6a95 | 699 | EXPORT_SYMBOL(swiotlb_alloc_coherent); |
1da177e4 LT |
700 | |
701 | void | |
702 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
02ca646e | 703 | dma_addr_t dev_addr) |
1da177e4 | 704 | { |
862d196b | 705 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
02ca646e | 706 | |
aa24886e | 707 | WARN_ON(irqs_disabled()); |
02ca646e FT |
708 | if (!is_swiotlb_buffer(paddr)) |
709 | free_pages((unsigned long)vaddr, get_order(size)); | |
1da177e4 | 710 | else |
0443fa00 AD |
711 | /* |
712 | * DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single. | |
713 | * DMA_ATTR_SKIP_CPU_SYNC is optional. | |
714 | */ | |
715 | swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE, | |
716 | DMA_ATTR_SKIP_CPU_SYNC); | |
1da177e4 | 717 | } |
874d6a95 | 718 | EXPORT_SYMBOL(swiotlb_free_coherent); |
1da177e4 LT |
719 | |
720 | static void | |
22d48269 KRW |
721 | swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir, |
722 | int do_panic) | |
1da177e4 LT |
723 | { |
724 | /* | |
725 | * Ran out of IOMMU space for this operation. This is very bad. | |
726 | * Unfortunately the drivers cannot handle this operation properly. | |
17e5ad6c | 727 | * unless they check for dma_mapping_error (most don't) |
1da177e4 LT |
728 | * When the mapping is small enough return a static buffer to limit |
729 | * the damage, or panic when the transfer is too big. | |
730 | */ | |
0d2e1898 GU |
731 | dev_err_ratelimited(dev, "DMA: Out of SW-IOMMU space for %zu bytes\n", |
732 | size); | |
1da177e4 | 733 | |
c7084b35 CD |
734 | if (size <= io_tlb_overflow || !do_panic) |
735 | return; | |
736 | ||
737 | if (dir == DMA_BIDIRECTIONAL) | |
738 | panic("DMA: Random memory could be DMA accessed\n"); | |
739 | if (dir == DMA_FROM_DEVICE) | |
740 | panic("DMA: Random memory could be DMA written\n"); | |
741 | if (dir == DMA_TO_DEVICE) | |
742 | panic("DMA: Random memory could be DMA read\n"); | |
1da177e4 LT |
743 | } |
744 | ||
745 | /* | |
746 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
17e5ad6c | 747 | * physical address to use is returned. |
1da177e4 LT |
748 | * |
749 | * Once the device is given the dma address, the device owns this memory until | |
ceb5ac32 | 750 | * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. |
1da177e4 | 751 | */ |
f98eee8e FT |
752 | dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, |
753 | unsigned long offset, size_t size, | |
754 | enum dma_data_direction dir, | |
00085f1e | 755 | unsigned long attrs) |
1da177e4 | 756 | { |
e05ed4d1 | 757 | phys_addr_t map, phys = page_to_phys(page) + offset; |
862d196b | 758 | dma_addr_t dev_addr = phys_to_dma(dev, phys); |
1da177e4 | 759 | |
34814545 | 760 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 761 | /* |
ceb5ac32 | 762 | * If the address happens to be in the device's DMA window, |
1da177e4 LT |
763 | * we can safely return the device addr and not worry about bounce |
764 | * buffering it. | |
765 | */ | |
ae7871be | 766 | if (dma_capable(dev, dev_addr, size) && swiotlb_force != SWIOTLB_FORCE) |
1da177e4 LT |
767 | return dev_addr; |
768 | ||
2b2b614d ZK |
769 | trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force); |
770 | ||
e05ed4d1 | 771 | /* Oh well, have to allocate and map a bounce buffer. */ |
0443fa00 | 772 | map = map_single(dev, phys, size, dir, attrs); |
e05ed4d1 | 773 | if (map == SWIOTLB_MAP_ERROR) { |
f98eee8e | 774 | swiotlb_full(dev, size, dir, 1); |
ee3f6ba8 | 775 | return phys_to_dma(dev, io_tlb_overflow_buffer); |
1da177e4 LT |
776 | } |
777 | ||
e05ed4d1 | 778 | dev_addr = phys_to_dma(dev, map); |
1da177e4 | 779 | |
e05ed4d1 | 780 | /* Ensure that the address returned is DMA'ble */ |
0443fa00 AD |
781 | if (dma_capable(dev, dev_addr, size)) |
782 | return dev_addr; | |
783 | ||
d29fa0cb AD |
784 | attrs |= DMA_ATTR_SKIP_CPU_SYNC; |
785 | swiotlb_tbl_unmap_single(dev, map, size, dir, attrs); | |
1da177e4 | 786 | |
0443fa00 | 787 | return phys_to_dma(dev, io_tlb_overflow_buffer); |
1da177e4 | 788 | } |
f98eee8e | 789 | EXPORT_SYMBOL_GPL(swiotlb_map_page); |
1da177e4 | 790 | |
1da177e4 LT |
791 | /* |
792 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
ceb5ac32 | 793 | * match what was provided for in a previous swiotlb_map_page call. All |
1da177e4 LT |
794 | * other usages are undefined. |
795 | * | |
796 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
797 | * whatever the device wrote there. | |
798 | */ | |
7fcebbd2 | 799 | static void unmap_single(struct device *hwdev, dma_addr_t dev_addr, |
0443fa00 AD |
800 | size_t size, enum dma_data_direction dir, |
801 | unsigned long attrs) | |
1da177e4 | 802 | { |
862d196b | 803 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
1da177e4 | 804 | |
34814545 | 805 | BUG_ON(dir == DMA_NONE); |
7fcebbd2 | 806 | |
02ca646e | 807 | if (is_swiotlb_buffer(paddr)) { |
0443fa00 | 808 | swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs); |
7fcebbd2 BB |
809 | return; |
810 | } | |
811 | ||
812 | if (dir != DMA_FROM_DEVICE) | |
813 | return; | |
814 | ||
02ca646e FT |
815 | /* |
816 | * phys_to_virt doesn't work with hihgmem page but we could | |
817 | * call dma_mark_clean() with hihgmem page here. However, we | |
818 | * are fine since dma_mark_clean() is null on POWERPC. We can | |
819 | * make dma_mark_clean() take a physical address if necessary. | |
820 | */ | |
821 | dma_mark_clean(phys_to_virt(paddr), size); | |
7fcebbd2 BB |
822 | } |
823 | ||
824 | void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, | |
825 | size_t size, enum dma_data_direction dir, | |
00085f1e | 826 | unsigned long attrs) |
7fcebbd2 | 827 | { |
0443fa00 | 828 | unmap_single(hwdev, dev_addr, size, dir, attrs); |
1da177e4 | 829 | } |
f98eee8e | 830 | EXPORT_SYMBOL_GPL(swiotlb_unmap_page); |
874d6a95 | 831 | |
1da177e4 LT |
832 | /* |
833 | * Make physical memory consistent for a single streaming mode DMA translation | |
834 | * after a transfer. | |
835 | * | |
ceb5ac32 | 836 | * If you perform a swiotlb_map_page() but wish to interrogate the buffer |
17e5ad6c TL |
837 | * using the cpu, yet do not wish to teardown the dma mapping, you must |
838 | * call this function before doing so. At the next point you give the dma | |
1da177e4 LT |
839 | * address back to the card, you must first perform a |
840 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
841 | */ | |
be6b0267 | 842 | static void |
8270f3f1 | 843 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, |
d7ef1533 KRW |
844 | size_t size, enum dma_data_direction dir, |
845 | enum dma_sync_target target) | |
1da177e4 | 846 | { |
862d196b | 847 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
1da177e4 | 848 | |
34814545 | 849 | BUG_ON(dir == DMA_NONE); |
380d6878 | 850 | |
02ca646e | 851 | if (is_swiotlb_buffer(paddr)) { |
fbfda893 | 852 | swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target); |
380d6878 BB |
853 | return; |
854 | } | |
855 | ||
856 | if (dir != DMA_FROM_DEVICE) | |
857 | return; | |
858 | ||
02ca646e | 859 | dma_mark_clean(phys_to_virt(paddr), size); |
1da177e4 LT |
860 | } |
861 | ||
8270f3f1 JL |
862 | void |
863 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 864 | size_t size, enum dma_data_direction dir) |
8270f3f1 | 865 | { |
de69e0f0 | 866 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); |
8270f3f1 | 867 | } |
874d6a95 | 868 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); |
8270f3f1 | 869 | |
1da177e4 LT |
870 | void |
871 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 872 | size_t size, enum dma_data_direction dir) |
1da177e4 | 873 | { |
de69e0f0 | 874 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); |
1da177e4 | 875 | } |
874d6a95 | 876 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); |
1da177e4 LT |
877 | |
878 | /* | |
879 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
ceb5ac32 | 880 | * This is the scatter-gather version of the above swiotlb_map_page |
1da177e4 LT |
881 | * interface. Here the scatter gather list elements are each tagged with the |
882 | * appropriate dma address and length. They are obtained via | |
883 | * sg_dma_{address,length}(SG). | |
884 | * | |
885 | * NOTE: An implementation may be able to use a smaller number of | |
886 | * DMA address/length pairs than there are SG table elements. | |
887 | * (for example via virtual mapping capabilities) | |
888 | * The routine returns the number of addr/length pairs actually | |
889 | * used, at most nents. | |
890 | * | |
ceb5ac32 | 891 | * Device ownership issues as mentioned above for swiotlb_map_page are the |
1da177e4 LT |
892 | * same here. |
893 | */ | |
894 | int | |
309df0c5 | 895 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, |
00085f1e | 896 | enum dma_data_direction dir, unsigned long attrs) |
1da177e4 | 897 | { |
dbfd49fe | 898 | struct scatterlist *sg; |
1da177e4 LT |
899 | int i; |
900 | ||
34814545 | 901 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 902 | |
dbfd49fe | 903 | for_each_sg(sgl, sg, nelems, i) { |
961d7d0e | 904 | phys_addr_t paddr = sg_phys(sg); |
862d196b | 905 | dma_addr_t dev_addr = phys_to_dma(hwdev, paddr); |
bc40ac66 | 906 | |
ae7871be | 907 | if (swiotlb_force == SWIOTLB_FORCE || |
b9394647 | 908 | !dma_capable(hwdev, dev_addr, sg->length)) { |
e05ed4d1 | 909 | phys_addr_t map = map_single(hwdev, sg_phys(sg), |
0443fa00 | 910 | sg->length, dir, attrs); |
e05ed4d1 | 911 | if (map == SWIOTLB_MAP_ERROR) { |
1da177e4 LT |
912 | /* Don't panic here, we expect map_sg users |
913 | to do proper error handling. */ | |
914 | swiotlb_full(hwdev, sg->length, dir, 0); | |
d29fa0cb | 915 | attrs |= DMA_ATTR_SKIP_CPU_SYNC; |
309df0c5 AK |
916 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
917 | attrs); | |
4d86ec7a | 918 | sg_dma_len(sgl) = 0; |
1da177e4 LT |
919 | return 0; |
920 | } | |
e05ed4d1 | 921 | sg->dma_address = phys_to_dma(hwdev, map); |
1da177e4 LT |
922 | } else |
923 | sg->dma_address = dev_addr; | |
4d86ec7a | 924 | sg_dma_len(sg) = sg->length; |
1da177e4 LT |
925 | } |
926 | return nelems; | |
927 | } | |
309df0c5 AK |
928 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); |
929 | ||
1da177e4 LT |
930 | /* |
931 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
ceb5ac32 | 932 | * concerning calls here are the same as for swiotlb_unmap_page() above. |
1da177e4 LT |
933 | */ |
934 | void | |
309df0c5 | 935 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
00085f1e KK |
936 | int nelems, enum dma_data_direction dir, |
937 | unsigned long attrs) | |
1da177e4 | 938 | { |
dbfd49fe | 939 | struct scatterlist *sg; |
1da177e4 LT |
940 | int i; |
941 | ||
34814545 | 942 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 943 | |
7fcebbd2 | 944 | for_each_sg(sgl, sg, nelems, i) |
0443fa00 AD |
945 | unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir, |
946 | attrs); | |
1da177e4 | 947 | } |
309df0c5 AK |
948 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); |
949 | ||
1da177e4 LT |
950 | /* |
951 | * Make physical memory consistent for a set of streaming mode DMA translations | |
952 | * after a transfer. | |
953 | * | |
954 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
955 | * and usage. | |
956 | */ | |
be6b0267 | 957 | static void |
dbfd49fe | 958 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, |
d7ef1533 KRW |
959 | int nelems, enum dma_data_direction dir, |
960 | enum dma_sync_target target) | |
1da177e4 | 961 | { |
dbfd49fe | 962 | struct scatterlist *sg; |
1da177e4 LT |
963 | int i; |
964 | ||
380d6878 BB |
965 | for_each_sg(sgl, sg, nelems, i) |
966 | swiotlb_sync_single(hwdev, sg->dma_address, | |
4d86ec7a | 967 | sg_dma_len(sg), dir, target); |
1da177e4 LT |
968 | } |
969 | ||
8270f3f1 JL |
970 | void |
971 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 972 | int nelems, enum dma_data_direction dir) |
8270f3f1 | 973 | { |
de69e0f0 | 974 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); |
8270f3f1 | 975 | } |
874d6a95 | 976 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); |
8270f3f1 | 977 | |
1da177e4 LT |
978 | void |
979 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 980 | int nelems, enum dma_data_direction dir) |
1da177e4 | 981 | { |
de69e0f0 | 982 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); |
1da177e4 | 983 | } |
874d6a95 | 984 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); |
1da177e4 LT |
985 | |
986 | int | |
8d8bb39b | 987 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) |
1da177e4 | 988 | { |
ee3f6ba8 | 989 | return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer)); |
1da177e4 | 990 | } |
874d6a95 | 991 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); |
1da177e4 LT |
992 | |
993 | /* | |
17e5ad6c | 994 | * Return whether the given device DMA address mask can be supported |
1da177e4 | 995 | * properly. For example, if your device can only drive the low 24-bits |
17e5ad6c | 996 | * during bus mastering, then you would pass 0x00ffffff as the mask to |
1da177e4 LT |
997 | * this function. |
998 | */ | |
999 | int | |
563aaf06 | 1000 | swiotlb_dma_supported(struct device *hwdev, u64 mask) |
1da177e4 | 1001 | { |
c40dba06 | 1002 | return phys_to_dma(hwdev, io_tlb_end - 1) <= mask; |
1da177e4 | 1003 | } |
1da177e4 | 1004 | EXPORT_SYMBOL(swiotlb_dma_supported); |