[mirror_qemu.git] / linux-headers / asm-x86 / kvm.h

/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _ASM_X86_KVM_H
#define _ASM_X86_KVM_H

/*
 * KVM x86 specific structures and definitions
 *
 */

#include <linux/types.h>
#include <linux/ioctl.h>

#define KVM_PIO_PAGE_OFFSET 1
#define KVM_COALESCED_MMIO_PAGE_OFFSET 2

#define DE_VECTOR 0
#define DB_VECTOR 1
#define BP_VECTOR 3
#define OF_VECTOR 4
#define BR_VECTOR 5
#define UD_VECTOR 6
#define NM_VECTOR 7
#define DF_VECTOR 8
#define TS_VECTOR 10
#define NP_VECTOR 11
#define SS_VECTOR 12
#define GP_VECTOR 13
#define PF_VECTOR 14
#define MF_VECTOR 16
#define AC_VECTOR 17
#define MC_VECTOR 18
#define XM_VECTOR 19
#define VE_VECTOR 20

/* Select x86 specific features in <linux/kvm.h> */
#define __KVM_HAVE_PIT
#define __KVM_HAVE_IOAPIC
#define __KVM_HAVE_IRQ_LINE
#define __KVM_HAVE_MSI
#define __KVM_HAVE_USER_NMI
#define __KVM_HAVE_GUEST_DEBUG
#define __KVM_HAVE_MSIX
#define __KVM_HAVE_MCE
#define __KVM_HAVE_PIT_STATE2
#define __KVM_HAVE_XEN_HVM
#define __KVM_HAVE_VCPU_EVENTS
#define __KVM_HAVE_DEBUGREGS
#define __KVM_HAVE_XSAVE
#define __KVM_HAVE_XCRS
#define __KVM_HAVE_READONLY_MEM

/* Architectural interrupt line count. */
#define KVM_NR_INTERRUPTS 256

struct kvm_memory_alias {
	__u32 slot;  /* this has a different namespace than memory slots */
	__u32 flags;
	__u64 guest_phys_addr;
	__u64 memory_size;
	__u64 target_phys_addr;
};

/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
struct kvm_pic_state {
	__u8 last_irr;	/* edge detection */
	__u8 irr;		/* interrupt request register */
	__u8 imr;		/* interrupt mask register */
	__u8 isr;		/* interrupt service register */
	__u8 priority_add;	/* highest irq priority */
	__u8 irq_base;
	__u8 read_reg_select;
	__u8 poll;
	__u8 special_mask;
	__u8 init_state;
	__u8 auto_eoi;
	__u8 rotate_on_auto_eoi;
	__u8 special_fully_nested_mode;
	__u8 init4;		/* true if 4 byte init */
	__u8 elcr;		/* PIIX edge/trigger selection */
	__u8 elcr_mask;
};

#define KVM_IOAPIC_NUM_PINS  24
struct kvm_ioapic_state {
	__u64 base_address;
	__u32 ioregsel;
	__u32 id;
	__u32 irr;
	__u32 pad;
	union {
		__u64 bits;
		struct {
			__u8 vector;
			__u8 delivery_mode:3;
			__u8 dest_mode:1;
			__u8 delivery_status:1;
			__u8 polarity:1;
			__u8 remote_irr:1;
			__u8 trig_mode:1;
			__u8 mask:1;
			__u8 reserve:7;
			__u8 reserved[4];
			__u8 dest_id;
		} fields;
	} redirtbl[KVM_IOAPIC_NUM_PINS];
};

#define KVM_IRQCHIP_PIC_MASTER   0
#define KVM_IRQCHIP_PIC_SLAVE    1
#define KVM_IRQCHIP_IOAPIC       2
#define KVM_NR_IRQCHIPS          3

#define KVM_RUN_X86_SMM		 (1 << 0)

/* for KVM_GET_REGS and KVM_SET_REGS */
struct kvm_regs {
	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
	__u64 rax, rbx, rcx, rdx;
	__u64 rsi, rdi, rsp, rbp;
	__u64 r8,  r9,  r10, r11;
	__u64 r12, r13, r14, r15;
	__u64 rip, rflags;
};

/* for KVM_GET_LAPIC and KVM_SET_LAPIC */
#define KVM_APIC_REG_SIZE 0x400
struct kvm_lapic_state {
	char regs[KVM_APIC_REG_SIZE];
};

struct kvm_segment {
	__u64 base;
	__u32 limit;
	__u16 selector;
	__u8  type;
	__u8  present, dpl, db, s, l, g, avl;
	__u8  unusable;
	__u8  padding;
};

struct kvm_dtable {
	__u64 base;
	__u16 limit;
	__u16 padding[3];
};


/* for KVM_GET_SREGS and KVM_SET_SREGS */
struct kvm_sregs {
	/* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
	struct kvm_segment cs, ds, es, fs, gs, ss;
	struct kvm_segment tr, ldt;
	struct kvm_dtable gdt, idt;
	__u64 cr0, cr2, cr3, cr4, cr8;
	__u64 efer;
	__u64 apic_base;
	__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
};

/* for KVM_GET_FPU and KVM_SET_FPU */
struct kvm_fpu {
	__u8  fpr[8][16];
	__u16 fcw;
	__u16 fsw;
	__u8  ftwx;  /* in fxsave format */
	__u8  pad1;
	__u16 last_opcode;
	__u64 last_ip;
	__u64 last_dp;
	__u8  xmm[16][16];
	__u32 mxcsr;
	__u32 pad2;
};

struct kvm_msr_entry {
	__u32 index;
	__u32 reserved;
	__u64 data;
};

/* for KVM_GET_MSRS and KVM_SET_MSRS */
struct kvm_msrs {
	__u32 nmsrs; /* number of msrs in entries */
	__u32 pad;

	struct kvm_msr_entry entries[0];
};

/* for KVM_GET_MSR_INDEX_LIST */
struct kvm_msr_list {
	__u32 nmsrs; /* number of msrs in entries */
	__u32 indices[0];
};


struct kvm_cpuid_entry {
	__u32 function;
	__u32 eax;
	__u32 ebx;
	__u32 ecx;
	__u32 edx;
	__u32 padding;
};

/* for KVM_SET_CPUID */
struct kvm_cpuid {
	__u32 nent;
	__u32 padding;
	struct kvm_cpuid_entry entries[0];
};

struct kvm_cpuid_entry2 {
	__u32 function;
	__u32 index;
	__u32 flags;
	__u32 eax;
	__u32 ebx;
	__u32 ecx;
	__u32 edx;
	__u32 padding[3];
};

#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX		(1 << 0)
#define KVM_CPUID_FLAG_STATEFUL_FUNC		(1 << 1)
#define KVM_CPUID_FLAG_STATE_READ_NEXT		(1 << 2)

/* for KVM_SET_CPUID2 */
struct kvm_cpuid2 {
	__u32 nent;
	__u32 padding;
	struct kvm_cpuid_entry2 entries[0];
};

/* for KVM_GET_PIT and KVM_SET_PIT */
struct kvm_pit_channel_state {
	__u32 count; /* can be 65536 */
	__u16 latched_count;
	__u8 count_latched;
	__u8 status_latched;
	__u8 status;
	__u8 read_state;
	__u8 write_state;
	__u8 write_latch;
	__u8 rw_mode;
	__u8 mode;
	__u8 bcd;
	__u8 gate;
	__s64 count_load_time;
};

struct kvm_debug_exit_arch {
	__u32 exception;
	__u32 pad;
	__u64 pc;
	__u64 dr6;
	__u64 dr7;
};

#define KVM_GUESTDBG_USE_SW_BP		0x00010000
#define KVM_GUESTDBG_USE_HW_BP		0x00020000
#define KVM_GUESTDBG_INJECT_DB		0x00040000
#define KVM_GUESTDBG_INJECT_BP		0x00080000

/* for KVM_SET_GUEST_DEBUG */
struct kvm_guest_debug_arch {
	__u64 debugreg[8];
};

struct kvm_pit_state {
	struct kvm_pit_channel_state channels[3];
};

#define KVM_PIT_FLAGS_HPET_LEGACY  0x00000001

struct kvm_pit_state2 {
	struct kvm_pit_channel_state channels[3];
	__u32 flags;
	__u32 reserved[9];
};

struct kvm_reinject_control {
	__u8 pit_reinject;
	__u8 reserved[31];
};

/* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
#define KVM_VCPUEVENT_VALID_NMI_PENDING	0x00000001
#define KVM_VCPUEVENT_VALID_SIPI_VECTOR	0x00000002
#define KVM_VCPUEVENT_VALID_SHADOW	0x00000004
#define KVM_VCPUEVENT_VALID_SMM		0x00000008
#define KVM_VCPUEVENT_VALID_PAYLOAD	0x00000010

/* Interrupt shadow states */
#define KVM_X86_SHADOW_INT_MOV_SS	0x01
#define KVM_X86_SHADOW_INT_STI		0x02

/* for KVM_GET/SET_VCPU_EVENTS */
struct kvm_vcpu_events {
	struct {
		__u8 injected;
		__u8 nr;
		__u8 has_error_code;
		__u8 pending;
		__u32 error_code;
	} exception;
	struct {
		__u8 injected;
		__u8 nr;
		__u8 soft;
		__u8 shadow;
	} interrupt;
	struct {
		__u8 injected;
		__u8 pending;
		__u8 masked;
		__u8 pad;
	} nmi;
	__u32 sipi_vector;
	__u32 flags;
	struct {
		__u8 smm;
		__u8 pending;
		__u8 smm_inside_nmi;
		__u8 latched_init;
	} smi;
	__u8 reserved[27];
	__u8 exception_has_payload;
	__u64 exception_payload;
};

/* for KVM_GET/SET_DEBUGREGS */
struct kvm_debugregs {
	__u64 db[4];
	__u64 dr6;
	__u64 dr7;
	__u64 flags;
	__u64 reserved[9];
};

/* for KVM_CAP_XSAVE */
struct kvm_xsave {
	__u32 region[1024];
};

#define KVM_MAX_XCRS	16

struct kvm_xcr {
	__u32 xcr;
	__u32 reserved;
	__u64 value;
};

struct kvm_xcrs {
	__u32 nr_xcrs;
	__u32 flags;
	struct kvm_xcr xcrs[KVM_MAX_XCRS];
	__u64 padding[16];
};

#define KVM_SYNC_X86_REGS      (1UL << 0)
#define KVM_SYNC_X86_SREGS     (1UL << 1)
#define KVM_SYNC_X86_EVENTS    (1UL << 2)

#define KVM_SYNC_X86_VALID_FIELDS \
	(KVM_SYNC_X86_REGS| \
	 KVM_SYNC_X86_SREGS| \
	 KVM_SYNC_X86_EVENTS)

/* kvm_sync_regs struct included by kvm_run struct */
struct kvm_sync_regs {
	/* Members of this structure are potentially malicious.
	 * Care must be taken by code reading, esp. interpreting,
	 * data fields from them inside KVM to prevent TOCTOU and
	 * double-fetch types of vulnerabilities.
	 */
	struct kvm_regs regs;
	struct kvm_sregs sregs;
	struct kvm_vcpu_events events;
};

#define KVM_X86_QUIRK_LINT0_REENABLED	   (1 << 0)
#define KVM_X86_QUIRK_CD_NW_CLEARED	   (1 << 1)
#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE	   (1 << 2)
#define KVM_X86_QUIRK_OUT_7E_INC_RIP	   (1 << 3)
#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)

#define KVM_STATE_NESTED_FORMAT_VMX	0
#define KVM_STATE_NESTED_FORMAT_SVM	1	/* unused */

#define KVM_STATE_NESTED_GUEST_MODE	0x00000001
#define KVM_STATE_NESTED_RUN_PENDING	0x00000002
#define KVM_STATE_NESTED_EVMCS		0x00000004

#define KVM_STATE_NESTED_SMM_GUEST_MODE	0x00000001
#define KVM_STATE_NESTED_SMM_VMXON	0x00000002

#define KVM_STATE_NESTED_VMX_VMCS_SIZE	0x1000

struct kvm_vmx_nested_state_data {
	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
	__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
};

struct kvm_vmx_nested_state_hdr {
	__u64 vmxon_pa;
	__u64 vmcs12_pa;

	struct {
		__u16 flags;
	} smm;
};

/* for KVM_CAP_NESTED_STATE */
struct kvm_nested_state {
	__u16 flags;
	__u16 format;
	__u32 size;

	union {
		struct kvm_vmx_nested_state_hdr vmx;

		/* Pad the header to 128 bytes.  */
		__u8 pad[120];
	} hdr;

	/*
	 * Define data region as 0 bytes to preserve backwards-compatability
	 * to old definition of kvm_nested_state in order to avoid changing
	 * KVM_{GET,PUT}_NESTED_STATE ioctl values.
	 */
	union {
		struct kvm_vmx_nested_state_data vmx[0];
	} data;
};

/* for KVM_CAP_PMU_EVENT_FILTER */
struct kvm_pmu_event_filter {
	__u32 action;
	__u32 nevents;
	__u32 fixed_counter_bitmap;
	__u32 flags;
	__u32 pad[4];
	__u64 events[0];
};

#define KVM_PMU_EVENT_ALLOW 0
#define KVM_PMU_EVENT_DENY 1

#endif /* _ASM_X86_KVM_H */
Commit	Line	Data
dd873966	1	/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
51b24e34 JK	2	#ifndef _ASM_X86_KVM_H
	3	#define _ASM_X86_KVM_H
	4
	5	/*
	6	* KVM x86 specific structures and definitions
	7	*
	8	*/
	9
	10	#include <linux/types.h>
	11	#include <linux/ioctl.h>
	12
74c98e20 CH	13	#define KVM_PIO_PAGE_OFFSET 1
	14	#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
	15
716b8e4d AW	16	#define DE_VECTOR 0
	17	#define DB_VECTOR 1
	18	#define BP_VECTOR 3
	19	#define OF_VECTOR 4
	20	#define BR_VECTOR 5
	21	#define UD_VECTOR 6
	22	#define NM_VECTOR 7
	23	#define DF_VECTOR 8
	24	#define TS_VECTOR 10
	25	#define NP_VECTOR 11
	26	#define SS_VECTOR 12
	27	#define GP_VECTOR 13
	28	#define PF_VECTOR 14
	29	#define MF_VECTOR 16
a9fd1654	30	#define AC_VECTOR 17
716b8e4d	31	#define MC_VECTOR 18
a9fd1654 JF	32	#define XM_VECTOR 19
a9fd1654 JF	33	#define VE_VECTOR 20
716b8e4d	34
51b24e34 JK	35	/* Select x86 specific features in <linux/kvm.h> */
	36	#define __KVM_HAVE_PIT
	37	#define __KVM_HAVE_IOAPIC
651682dc	38	#define __KVM_HAVE_IRQ_LINE
51b24e34 JK	39	#define __KVM_HAVE_MSI
	40	#define __KVM_HAVE_USER_NMI
	41	#define __KVM_HAVE_GUEST_DEBUG
	42	#define __KVM_HAVE_MSIX
	43	#define __KVM_HAVE_MCE
	44	#define __KVM_HAVE_PIT_STATE2
	45	#define __KVM_HAVE_XEN_HVM
	46	#define __KVM_HAVE_VCPU_EVENTS
	47	#define __KVM_HAVE_DEBUGREGS
	48	#define __KVM_HAVE_XSAVE
	49	#define __KVM_HAVE_XCRS
716b8e4d	50	#define __KVM_HAVE_READONLY_MEM
51b24e34 JK	51
	52	/* Architectural interrupt line count. */
	53	#define KVM_NR_INTERRUPTS 256
	54
	55	struct kvm_memory_alias {
	56	__u32 slot; /* this has a different namespace than memory slots */
	57	__u32 flags;
	58	__u64 guest_phys_addr;
	59	__u64 memory_size;
	60	__u64 target_phys_addr;
	61	};
	62
	63	/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
	64	struct kvm_pic_state {
	65	__u8 last_irr; /* edge detection */
	66	__u8 irr; /* interrupt request register */
	67	__u8 imr; /* interrupt mask register */
	68	__u8 isr; /* interrupt service register */
	69	__u8 priority_add; /* highest irq priority */
	70	__u8 irq_base;
	71	__u8 read_reg_select;
	72	__u8 poll;
	73	__u8 special_mask;
	74	__u8 init_state;
	75	__u8 auto_eoi;
	76	__u8 rotate_on_auto_eoi;
	77	__u8 special_fully_nested_mode;
	78	__u8 init4; /* true if 4 byte init */
	79	__u8 elcr; /* PIIX edge/trigger selection */
	80	__u8 elcr_mask;
	81	};
	82
	83	#define KVM_IOAPIC_NUM_PINS 24
	84	struct kvm_ioapic_state {
	85	__u64 base_address;
	86	__u32 ioregsel;
	87	__u32 id;
	88	__u32 irr;
	89	__u32 pad;
	90	union {
	91	__u64 bits;
	92	struct {
	93	__u8 vector;
	94	__u8 delivery_mode:3;
	95	__u8 dest_mode:1;
	96	__u8 delivery_status:1;
	97	__u8 polarity:1;
	98	__u8 remote_irr:1;
	99	__u8 trig_mode:1;
	100	__u8 mask:1;
	101	__u8 reserve:7;
	102	__u8 reserved[4];
	103	__u8 dest_id;
	104	} fields;
	105	} redirtbl[KVM_IOAPIC_NUM_PINS];
	106	};
	107
	108	#define KVM_IRQCHIP_PIC_MASTER 0
	109	#define KVM_IRQCHIP_PIC_SLAVE 1
	110	#define KVM_IRQCHIP_IOAPIC 2
	111	#define KVM_NR_IRQCHIPS 3
	112
24a31426 PB	113	#define KVM_RUN_X86_SMM (1 << 0)
24a31426 PB	114
51b24e34 JK	115	/* for KVM_GET_REGS and KVM_SET_REGS */
	116	struct kvm_regs {
	117	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
	118	__u64 rax, rbx, rcx, rdx;
	119	__u64 rsi, rdi, rsp, rbp;
	120	__u64 r8, r9, r10, r11;
	121	__u64 r12, r13, r14, r15;
	122	__u64 rip, rflags;
	123	};
	124
	125	/* for KVM_GET_LAPIC and KVM_SET_LAPIC */
	126	#define KVM_APIC_REG_SIZE 0x400
	127	struct kvm_lapic_state {
	128	char regs[KVM_APIC_REG_SIZE];
	129	};
	130
	131	struct kvm_segment {
	132	__u64 base;
	133	__u32 limit;
	134	__u16 selector;
	135	__u8 type;
	136	__u8 present, dpl, db, s, l, g, avl;
	137	__u8 unusable;
	138	__u8 padding;
	139	};
	140
	141	struct kvm_dtable {
	142	__u64 base;
	143	__u16 limit;
	144	__u16 padding[3];
	145	};
	146
	147
	148	/* for KVM_GET_SREGS and KVM_SET_SREGS */
	149	struct kvm_sregs {
	150	/* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
	151	struct kvm_segment cs, ds, es, fs, gs, ss;
	152	struct kvm_segment tr, ldt;
	153	struct kvm_dtable gdt, idt;
	154	__u64 cr0, cr2, cr3, cr4, cr8;
	155	__u64 efer;
	156	__u64 apic_base;
b07d1c2f	157	__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
51b24e34 JK	158	};
	159
	160	/* for KVM_GET_FPU and KVM_SET_FPU */
	161	struct kvm_fpu {
	162	__u8 fpr[8][16];
	163	__u16 fcw;
	164	__u16 fsw;
	165	__u8 ftwx; /* in fxsave format */
	166	__u8 pad1;
	167	__u16 last_opcode;
	168	__u64 last_ip;
	169	__u64 last_dp;
	170	__u8 xmm[16][16];
	171	__u32 mxcsr;
	172	__u32 pad2;
	173	};
	174
	175	struct kvm_msr_entry {
	176	__u32 index;
	177	__u32 reserved;
	178	__u64 data;
	179	};
	180
	181	/* for KVM_GET_MSRS and KVM_SET_MSRS */
	182	struct kvm_msrs {
	183	__u32 nmsrs; /* number of msrs in entries */
	184	__u32 pad;
	185
	186	struct kvm_msr_entry entries[0];
	187	};
	188
	189	/* for KVM_GET_MSR_INDEX_LIST */
	190	struct kvm_msr_list {
	191	__u32 nmsrs; /* number of msrs in entries */
	192	__u32 indices[0];
	193	};
	194
	195
	196	struct kvm_cpuid_entry {
	197	__u32 function;
	198	__u32 eax;
	199	__u32 ebx;
	200	__u32 ecx;
	201	__u32 edx;
	202	__u32 padding;
	203	};
	204
	205	/* for KVM_SET_CPUID */
	206	struct kvm_cpuid {
	207	__u32 nent;
	208	__u32 padding;
	209	struct kvm_cpuid_entry entries[0];
	210	};
	211
	212	struct kvm_cpuid_entry2 {
	213	__u32 function;
	214	__u32 index;
	215	__u32 flags;
	216	__u32 eax;
	217	__u32 ebx;
	218	__u32 ecx;
	219	__u32 edx;
	220	__u32 padding[3];
	221	};
222
ff804f15 CH	223	#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0)
	224	#define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1)
	225	#define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2)
51b24e34 JK	226
	227	/* for KVM_SET_CPUID2 */
	228	struct kvm_cpuid2 {
	229	__u32 nent;
	230	__u32 padding;
	231	struct kvm_cpuid_entry2 entries[0];
	232	};
	233
	234	/* for KVM_GET_PIT and KVM_SET_PIT */
	235	struct kvm_pit_channel_state {
	236	__u32 count; /* can be 65536 */
	237	__u16 latched_count;
	238	__u8 count_latched;
	239	__u8 status_latched;
	240	__u8 status;
	241	__u8 read_state;
	242	__u8 write_state;
	243	__u8 write_latch;
	244	__u8 rw_mode;
	245	__u8 mode;
	246	__u8 bcd;
	247	__u8 gate;
	248	__s64 count_load_time;
	249	};
	250
	251	struct kvm_debug_exit_arch {
	252	__u32 exception;
	253	__u32 pad;
	254	__u64 pc;
	255	__u64 dr6;
	256	__u64 dr7;
	257	};
	258
	259	#define KVM_GUESTDBG_USE_SW_BP 0x00010000
	260	#define KVM_GUESTDBG_USE_HW_BP 0x00020000
	261	#define KVM_GUESTDBG_INJECT_DB 0x00040000
	262	#define KVM_GUESTDBG_INJECT_BP 0x00080000
	263
	264	/* for KVM_SET_GUEST_DEBUG */
	265	struct kvm_guest_debug_arch {
	266	__u64 debugreg[8];
	267	};
	268
	269	struct kvm_pit_state {
	270	struct kvm_pit_channel_state channels[3];
	271	};
	272
	273	#define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
	274
	275	struct kvm_pit_state2 {
	276	struct kvm_pit_channel_state channels[3];
	277	__u32 flags;
	278	__u32 reserved[9];
	279	};
	280
	281	struct kvm_reinject_control {
	282	__u8 pit_reinject;
	283	__u8 reserved[31];
	284	};
	285
	286	/* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
	287	#define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001
	288	#define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002
	289	#define KVM_VCPUEVENT_VALID_SHADOW 0x00000004
24a31426	290	#define KVM_VCPUEVENT_VALID_SMM 0x00000008
966f2ec3	291	#define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010
51b24e34 JK	292
	293	/* Interrupt shadow states */
	294	#define KVM_X86_SHADOW_INT_MOV_SS 0x01
	295	#define KVM_X86_SHADOW_INT_STI 0x02
	296
	297	/* for KVM_GET/SET_VCPU_EVENTS */
	298	struct kvm_vcpu_events {
	299	struct {
	300	__u8 injected;
	301	__u8 nr;
	302	__u8 has_error_code;
966f2ec3	303	__u8 pending;
51b24e34 JK	304	__u32 error_code;
	305	} exception;
	306	struct {
	307	__u8 injected;
	308	__u8 nr;
	309	__u8 soft;
	310	__u8 shadow;
	311	} interrupt;
	312	struct {
	313	__u8 injected;
	314	__u8 pending;
	315	__u8 masked;
	316	__u8 pad;
	317	} nmi;
	318	__u32 sipi_vector;
	319	__u32 flags;
24a31426 PB	320	struct {
	321	__u8 smm;
	322	__u8 pending;
	323	__u8 smm_inside_nmi;
	324	__u8 latched_init;
	325	} smi;
966f2ec3 PB	326	__u8 reserved[27];
	327	__u8 exception_has_payload;
	328	__u64 exception_payload;
51b24e34 JK	329	};
	330
	331	/* for KVM_GET/SET_DEBUGREGS */
	332	struct kvm_debugregs {
	333	__u64 db[4];
	334	__u64 dr6;
	335	__u64 dr7;
	336	__u64 flags;
	337	__u64 reserved[9];
	338	};
	339
	340	/* for KVM_CAP_XSAVE */
	341	struct kvm_xsave {
	342	__u32 region[1024];
	343	};
	344
	345	#define KVM_MAX_XCRS 16
	346
	347	struct kvm_xcr {
	348	__u32 xcr;
	349	__u32 reserved;
	350	__u64 value;
	351	};
	352
	353	struct kvm_xcrs {
	354	__u32 nr_xcrs;
	355	__u32 flags;
	356	struct kvm_xcr xcrs[KVM_MAX_XCRS];
	357	__u64 padding[16];
	358	};
	359
65a6d8dd PM	360	#define KVM_SYNC_X86_REGS (1UL << 0)
	361	#define KVM_SYNC_X86_SREGS (1UL << 1)
	362	#define KVM_SYNC_X86_EVENTS (1UL << 2)
	363
	364	#define KVM_SYNC_X86_VALID_FIELDS \
	365	(KVM_SYNC_X86_REGS\| \
	366	KVM_SYNC_X86_SREGS\| \
	367	KVM_SYNC_X86_EVENTS)
	368
	369	/* kvm_sync_regs struct included by kvm_run struct */
1529ae1b	370	struct kvm_sync_regs {
65a6d8dd PM	371	/* Members of this structure are potentially malicious.
	372	* Care must be taken by code reading, esp. interpreting,
	373	* data fields from them inside KVM to prevent TOCTOU and
	374	* double-fetch types of vulnerabilities.
	375	*/
	376	struct kvm_regs regs;
	377	struct kvm_sregs sregs;
	378	struct kvm_vcpu_events events;
1529ae1b AG	379	};
1529ae1b AG	380
f363d039 EA	381	#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
	382	#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
	383	#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
	384	#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
	385	#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)
24a31426	386
1d33bea4	387	#define KVM_STATE_NESTED_FORMAT_VMX 0
f363d039	388	#define KVM_STATE_NESTED_FORMAT_SVM 1 /* unused */
1d33bea4	389
d36f7de8 CH	390	#define KVM_STATE_NESTED_GUEST_MODE 0x00000001
d36f7de8 CH	391	#define KVM_STATE_NESTED_RUN_PENDING 0x00000002
966f2ec3	392	#define KVM_STATE_NESTED_EVMCS 0x00000004
d36f7de8 CH	393
	394	#define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001
	395	#define KVM_STATE_NESTED_SMM_VMXON 0x00000002
	396
f363d039 EA	397	#define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000
f363d039 EA	398
1d33bea4 LA	399	struct kvm_vmx_nested_state_data {
	400	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
	401	__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
	402	};
	403
	404	struct kvm_vmx_nested_state_hdr {
d36f7de8	405	__u64 vmxon_pa;
1d33bea4	406	__u64 vmcs12_pa;
d36f7de8 CH	407
	408	struct {
	409	__u16 flags;
	410	} smm;
	411	};
	412
	413	/* for KVM_CAP_NESTED_STATE */
	414	struct kvm_nested_state {
d36f7de8	415	__u16 flags;
d36f7de8	416	__u16 format;
d36f7de8 CH	417	__u32 size;
	418
	419	union {
1d33bea4	420	struct kvm_vmx_nested_state_hdr vmx;
d36f7de8 CH	421
	422	/* Pad the header to 128 bytes. */
	423	__u8 pad[120];
1d33bea4	424	} hdr;
d36f7de8	425
1d33bea4 LA	426	/*
	427	* Define data region as 0 bytes to preserve backwards-compatability
	428	* to old definition of kvm_nested_state in order to avoid changing
	429	* KVM_{GET,PUT}_NESTED_STATE ioctl values.
	430	*/
	431	union {
	432	struct kvm_vmx_nested_state_data vmx[0];
	433	} data;
d36f7de8 CH	434	};
d36f7de8 CH	435
f363d039 EA	436	/* for KVM_CAP_PMU_EVENT_FILTER */
	437	struct kvm_pmu_event_filter {
	438	__u32 action;
	439	__u32 nevents;
	440	__u32 fixed_counter_bitmap;
	441	__u32 flags;
	442	__u32 pad[4];
	443	__u64 events[0];
	444	};
	445
	446	#define KVM_PMU_EVENT_ALLOW 0
	447	#define KVM_PMU_EVENT_DENY 1
	448
51b24e34	449	#endif /* _ASM_X86_KVM_H */