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migration: Reference migration state around loadvm_postcopy_handle_run_bh
[mirror_qemu.git] / linux-user / elfload.c
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31e31b8a 1/* This is the Linux kernel elf-loading code, ported into user space */
d39594e9 2#include "qemu/osdep.h"
edf8e2af 3#include <sys/param.h>
31e31b8a 4
0ea731db 5#include <sys/prctl.h>
edf8e2af 6#include <sys/resource.h>
30ab9ef2 7#include <sys/shm.h>
31e31b8a 8
3ef693a0 9#include "qemu.h"
3b249d26 10#include "user-internals.h"
db2af69d 11#include "signal-common.h"
3ad0a769 12#include "loader.h"
5423e6d3 13#include "user-mmap.h"
76cad711 14#include "disas/disas.h"
ce543844 15#include "qemu/bitops.h"
f348b6d1 16#include "qemu/path.h"
dc5e9ac7 17#include "qemu/queue.h"
c6a2377f 18#include "qemu/guest-random.h"
6fd59449 19#include "qemu/units.h"
ee947430 20#include "qemu/selfmap.h"
370ed600 21#include "qemu/lockable.h"
c7f17e7b 22#include "qapi/error.h"
cc37d98b 23#include "qemu/error-report.h"
db2af69d 24#include "target_signal.h"
7c10cb38 25#include "accel/tcg/debuginfo.h"
31e31b8a 26
5a534314
PM		 27#ifdef TARGET_ARM
28#include "target/arm/cpu-features.h"
29#endif
30
e58ffeb3 31#ifdef _ARCH_PPC64
a6cc84f4 32#undef ARCH_DLINFO
33#undef ELF_PLATFORM
34#undef ELF_HWCAP
ad6919dc 35#undef ELF_HWCAP2
a6cc84f4 36#undef ELF_CLASS
37#undef ELF_DATA
38#undef ELF_ARCH
39#endif
40
c40f621a
RH		 41#ifndef TARGET_ARCH_HAS_SIGTRAMP_PAGE
42#define TARGET_ARCH_HAS_SIGTRAMP_PAGE 0
43#endif
44
45typedef struct {
46 const uint8_t *image;
47 const uint32_t *relocs;
48 unsigned image_size;
49 unsigned reloc_count;
50 unsigned sigreturn_ofs;
51 unsigned rt_sigreturn_ofs;
52} VdsoImageInfo;
53
edf8e2af
MW		 54#define ELF_OSABI ELFOSABI_SYSV
55
cb33da57
BS		 56/* from personality.h */
57
58/*
59 * Flags for bug emulation.
60 *
61 * These occupy the top three bytes.
62 */
63enum {
d97ef72e
RH		 64 ADDR_NO_RANDOMIZE = 0x0040000, /* disable randomization of VA space */
65 FDPIC_FUNCPTRS = 0x0080000, /* userspace function ptrs point to
66 descriptors (signal handling) */
67 MMAP_PAGE_ZERO = 0x0100000,
68 ADDR_COMPAT_LAYOUT = 0x0200000,
69 READ_IMPLIES_EXEC = 0x0400000,
70 ADDR_LIMIT_32BIT = 0x0800000,
71 SHORT_INODE = 0x1000000,
72 WHOLE_SECONDS = 0x2000000,
73 STICKY_TIMEOUTS = 0x4000000,
74 ADDR_LIMIT_3GB = 0x8000000,
cb33da57
BS		 75};
76
77/*
78 * Personality types.
79 *
80 * These go in the low byte. Avoid using the top bit, it will
81 * conflict with error returns.
82 */
83enum {
d97ef72e
RH		 84 PER_LINUX = 0x0000,
85 PER_LINUX_32BIT = 0x0000 | ADDR_LIMIT_32BIT,
86 PER_LINUX_FDPIC = 0x0000 | FDPIC_FUNCPTRS,
87 PER_SVR4 = 0x0001 | STICKY_TIMEOUTS | MMAP_PAGE_ZERO,
88 PER_SVR3 = 0x0002 | STICKY_TIMEOUTS | SHORT_INODE,
89 PER_SCOSVR3 = 0x0003 | STICKY_TIMEOUTS | WHOLE_SECONDS | SHORT_INODE,
90 PER_OSR5 = 0x0003 | STICKY_TIMEOUTS | WHOLE_SECONDS,
91 PER_WYSEV386 = 0x0004 | STICKY_TIMEOUTS | SHORT_INODE,
92 PER_ISCR4 = 0x0005 | STICKY_TIMEOUTS,
93 PER_BSD = 0x0006,
94 PER_SUNOS = 0x0006 | STICKY_TIMEOUTS,
95 PER_XENIX = 0x0007 | STICKY_TIMEOUTS | SHORT_INODE,
96 PER_LINUX32 = 0x0008,
97 PER_LINUX32_3GB = 0x0008 | ADDR_LIMIT_3GB,
98 PER_IRIX32 = 0x0009 | STICKY_TIMEOUTS,/* IRIX5 32-bit */
99 PER_IRIXN32 = 0x000a | STICKY_TIMEOUTS,/* IRIX6 new 32-bit */
100 PER_IRIX64 = 0x000b | STICKY_TIMEOUTS,/* IRIX6 64-bit */
101 PER_RISCOS = 0x000c,
102 PER_SOLARIS = 0x000d | STICKY_TIMEOUTS,
103 PER_UW7 = 0x000e | STICKY_TIMEOUTS | MMAP_PAGE_ZERO,
104 PER_OSF4 = 0x000f, /* OSF/1 v4 */
105 PER_HPUX = 0x0010,
106 PER_MASK = 0x00ff,
cb33da57
BS		 107};
108
109/*
110 * Return the base personality without flags.
111 */
d97ef72e 112#define personality(pers) (pers & PER_MASK)
cb33da57 113
3cb10cfa
CL		 114int info_is_fdpic(struct image_info *info)
115{
116 return info->personality == PER_LINUX_FDPIC;
117}
118
83fb7adf
FB		 119/* this flag is uneffective under linux too, should be deleted */
120#ifndef MAP_DENYWRITE
121#define MAP_DENYWRITE 0
122#endif
123
124/* should probably go in elf.h */
125#ifndef ELIBBAD
126#define ELIBBAD 80
127#endif
128
ee3eb3a7 129#if TARGET_BIG_ENDIAN
28490231
RH		 130#define ELF_DATA ELFDATA2MSB
131#else
132#define ELF_DATA ELFDATA2LSB
133#endif
134
a29f998d 135#ifdef TARGET_ABI_MIPSN32
918fc54c
PB		 136typedef abi_ullong target_elf_greg_t;
137#define tswapreg(ptr) tswap64(ptr)
a29f998d
PB		 138#else
139typedef abi_ulong target_elf_greg_t;
140#define tswapreg(ptr) tswapal(ptr)
141#endif
142
21e807fa 143#ifdef USE_UID16
1ddd592f
PB		 144typedef abi_ushort target_uid_t;
145typedef abi_ushort target_gid_t;
21e807fa 146#else
f8fd4fc4
PB		 147typedef abi_uint target_uid_t;
148typedef abi_uint target_gid_t;
21e807fa 149#endif
f8fd4fc4 150typedef abi_int target_pid_t;
21e807fa 151
30ac07d4
FB		 152#ifdef TARGET_I386
153
15338fd7
FB		 154#define ELF_HWCAP get_elf_hwcap()
155
156static uint32_t get_elf_hwcap(void)
157{
a2247f8e
AF		 158 X86CPU *cpu = X86_CPU(thread_cpu);
159
160 return cpu->env.features[FEAT_1_EDX];
15338fd7
FB		 161}
162
84409ddb 163#ifdef TARGET_X86_64
84409ddb 164#define ELF_CLASS ELFCLASS64
84409ddb
JM		 165#define ELF_ARCH EM_X86_64
166
9263ba84
RH		 167#define ELF_PLATFORM "x86_64"
168
84409ddb
JM		 169static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop)
170{
171 regs->rax = 0;
172 regs->rsp = infop->start_stack;
173 regs->rip = infop->entry;
174}
175
9edc5d79 176#define ELF_NREG 27
c227f099 177typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
9edc5d79
MW		 178
179/*
180 * Note that ELF_NREG should be 29 as there should be place for
181 * TRAPNO and ERR "registers" as well but linux doesn't dump
182 * those.
183 *
184 * See linux kernel: arch/x86/include/asm/elf.h
185 */
05390248 186static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUX86State *env)
9edc5d79 187{
030912e0
IL		 188 (*regs)[0] = tswapreg(env->regs[15]);
189 (*regs)[1] = tswapreg(env->regs[14]);
190 (*regs)[2] = tswapreg(env->regs[13]);
191 (*regs)[3] = tswapreg(env->regs[12]);
192 (*regs)[4] = tswapreg(env->regs[R_EBP]);
193 (*regs)[5] = tswapreg(env->regs[R_EBX]);
194 (*regs)[6] = tswapreg(env->regs[11]);
195 (*regs)[7] = tswapreg(env->regs[10]);
196 (*regs)[8] = tswapreg(env->regs[9]);
197 (*regs)[9] = tswapreg(env->regs[8]);
198 (*regs)[10] = tswapreg(env->regs[R_EAX]);
199 (*regs)[11] = tswapreg(env->regs[R_ECX]);
200 (*regs)[12] = tswapreg(env->regs[R_EDX]);
201 (*regs)[13] = tswapreg(env->regs[R_ESI]);
202 (*regs)[14] = tswapreg(env->regs[R_EDI]);
203 (*regs)[15] = tswapreg(env->regs[R_EAX]); /* XXX */
204 (*regs)[16] = tswapreg(env->eip);
205 (*regs)[17] = tswapreg(env->segs[R_CS].selector & 0xffff);
206 (*regs)[18] = tswapreg(env->eflags);
207 (*regs)[19] = tswapreg(env->regs[R_ESP]);
208 (*regs)[20] = tswapreg(env->segs[R_SS].selector & 0xffff);
209 (*regs)[21] = tswapreg(env->segs[R_FS].selector & 0xffff);
210 (*regs)[22] = tswapreg(env->segs[R_GS].selector & 0xffff);
211 (*regs)[23] = tswapreg(env->segs[R_DS].selector & 0xffff);
212 (*regs)[24] = tswapreg(env->segs[R_ES].selector & 0xffff);
213 (*regs)[25] = tswapreg(env->segs[R_FS].selector & 0xffff);
214 (*regs)[26] = tswapreg(env->segs[R_GS].selector & 0xffff);
9edc5d79
MW		 215}
216
d461b73e
RH		 217#if ULONG_MAX > UINT32_MAX
218#define INIT_GUEST_COMMPAGE
219static bool init_guest_commpage(void)
220{
221 /*
222 * The vsyscall page is at a high negative address aka kernel space,
223 * which means that we cannot actually allocate it with target_mmap.
224 * We still should be able to use page_set_flags, unless the user
225 * has specified -R reserved_va, which would trigger an assert().
226 */
227 if (reserved_va != 0 &&
95059f9c 228 TARGET_VSYSCALL_PAGE + TARGET_PAGE_SIZE - 1 > reserved_va) {
d461b73e
RH		 229 error_report("Cannot allocate vsyscall page");
230 exit(EXIT_FAILURE);
231 }
232 page_set_flags(TARGET_VSYSCALL_PAGE,
49840a4a 233 TARGET_VSYSCALL_PAGE | ~TARGET_PAGE_MASK,
d461b73e
RH		 234 PAGE_EXEC | PAGE_VALID);
235 return true;
236}
237#endif
84409ddb
JM		 238#else
239
30ac07d4
FB		 240/*
241 * This is used to ensure we don't load something for the wrong architecture.
242 */
243#define elf_check_arch(x) ( ((x) == EM_386) || ((x) == EM_486) )
244
245/*
246 * These are used to set parameters in the core dumps.
247 */
d97ef72e 248#define ELF_CLASS ELFCLASS32
d97ef72e 249#define ELF_ARCH EM_386
30ac07d4 250
9263ba84 251#define ELF_PLATFORM get_elf_platform()
872f3d04 252#define EXSTACK_DEFAULT true
9263ba84
RH		 253
254static const char *get_elf_platform(void)
255{
256 static char elf_platform[] = "i386";
257 int family = object_property_get_int(OBJECT(thread_cpu), "family", NULL);
258 if (family > 6) {
259 family = 6;
260 }
261 if (family >= 3) {
262 elf_platform[1] = '0' + family;
263 }
264 return elf_platform;
265}
266
d97ef72e
RH		 267static inline void init_thread(struct target_pt_regs *regs,
268 struct image_info *infop)
b346ff46
FB		 269{
270 regs->esp = infop->start_stack;
271 regs->eip = infop->entry;
e5fe0c52
PB		 272
273 /* SVR4/i386 ABI (pages 3-31, 3-32) says that when the program
274 starts %edx contains a pointer to a function which might be
275 registered using `atexit'. This provides a mean for the
276 dynamic linker to call DT_FINI functions for shared libraries
277 that have been loaded before the code runs.
278
279 A value of 0 tells we have no such handler. */
280 regs->edx = 0;
b346ff46 281}
9edc5d79 282
9edc5d79 283#define ELF_NREG 17
c227f099 284typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
9edc5d79
MW		 285
286/*
287 * Note that ELF_NREG should be 19 as there should be place for
288 * TRAPNO and ERR "registers" as well but linux doesn't dump
289 * those.
290 *
291 * See linux kernel: arch/x86/include/asm/elf.h
292 */
05390248 293static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUX86State *env)
9edc5d79 294{
030912e0
IL		 295 (*regs)[0] = tswapreg(env->regs[R_EBX]);
296 (*regs)[1] = tswapreg(env->regs[R_ECX]);
297 (*regs)[2] = tswapreg(env->regs[R_EDX]);
298 (*regs)[3] = tswapreg(env->regs[R_ESI]);
299 (*regs)[4] = tswapreg(env->regs[R_EDI]);
300 (*regs)[5] = tswapreg(env->regs[R_EBP]);
301 (*regs)[6] = tswapreg(env->regs[R_EAX]);
302 (*regs)[7] = tswapreg(env->segs[R_DS].selector & 0xffff);
303 (*regs)[8] = tswapreg(env->segs[R_ES].selector & 0xffff);
304 (*regs)[9] = tswapreg(env->segs[R_FS].selector & 0xffff);
305 (*regs)[10] = tswapreg(env->segs[R_GS].selector & 0xffff);
306 (*regs)[11] = tswapreg(env->regs[R_EAX]); /* XXX */
307 (*regs)[12] = tswapreg(env->eip);
308 (*regs)[13] = tswapreg(env->segs[R_CS].selector & 0xffff);
309 (*regs)[14] = tswapreg(env->eflags);
310 (*regs)[15] = tswapreg(env->regs[R_ESP]);
311 (*regs)[16] = tswapreg(env->segs[R_SS].selector & 0xffff);
9edc5d79 312}
a1367443
RH		 313
314/*
315 * i386 is the only target which supplies AT_SYSINFO for the vdso.
316 * All others only supply AT_SYSINFO_EHDR.
317 */
318#define DLINFO_ARCH_ITEMS (vdso_info != NULL)
319#define ARCH_DLINFO \
320 do { \
321 if (vdso_info) { \
322 NEW_AUX_ENT(AT_SYSINFO, vdso_info->entry); \
323 } \
324 } while (0)
325
a1367443 326#endif /* TARGET_X86_64 */
b346ff46 327
6b1a9d38 328#define VDSO_HEADER "vdso.c.inc"
b346ff46 329
9edc5d79 330#define USE_ELF_CORE_DUMP
d97ef72e 331#define ELF_EXEC_PAGESIZE 4096
b346ff46 332
a1367443 333#endif /* TARGET_I386 */
b346ff46
FB		 334
335#ifdef TARGET_ARM
336
24e76ff0
PM		 337#ifndef TARGET_AARCH64
338/* 32 bit ARM definitions */
339
b597c3f7 340#define ELF_ARCH EM_ARM
d97ef72e 341#define ELF_CLASS ELFCLASS32
872f3d04 342#define EXSTACK_DEFAULT true
b346ff46 343
d97ef72e
RH		 344static inline void init_thread(struct target_pt_regs *regs,
345 struct image_info *infop)
b346ff46 346{
992f48a0 347 abi_long stack = infop->start_stack;
b346ff46 348 memset(regs, 0, sizeof(*regs));
99033cae 349
167e4cdc
PM		 350 regs->uregs[16] = ARM_CPU_MODE_USR;
351 if (infop->entry & 1) {
352 regs->uregs[16] |= CPSR_T;
353 }
354 regs->uregs[15] = infop->entry & 0xfffffffe;
355 regs->uregs[13] = infop->start_stack;
2f619698 356 /* FIXME - what to for failure of get_user()? */
167e4cdc
PM		 357 get_user_ual(regs->uregs[2], stack + 8); /* envp */
358 get_user_ual(regs->uregs[1], stack + 4); /* envp */
a1516e92 359 /* XXX: it seems that r0 is zeroed after ! */
167e4cdc 360 regs->uregs[0] = 0;
e5fe0c52 361 /* For uClinux PIC binaries. */
863cf0b7 362 /* XXX: Linux does this only on ARM with no MMU (do we care ?) */
167e4cdc 363 regs->uregs[10] = infop->start_data;
3cb10cfa
CL		 364
365 /* Support ARM FDPIC. */
366 if (info_is_fdpic(infop)) {
367 /* As described in the ABI document, r7 points to the loadmap info
368 * prepared by the kernel. If an interpreter is needed, r8 points
369 * to the interpreter loadmap and r9 points to the interpreter
370 * PT_DYNAMIC info. If no interpreter is needed, r8 is zero, and
371 * r9 points to the main program PT_DYNAMIC info.
372 */
373 regs->uregs[7] = infop->loadmap_addr;
374 if (infop->interpreter_loadmap_addr) {
375 /* Executable is dynamically loaded. */
376 regs->uregs[8] = infop->interpreter_loadmap_addr;
377 regs->uregs[9] = infop->interpreter_pt_dynamic_addr;
378 } else {
379 regs->uregs[8] = 0;
380 regs->uregs[9] = infop->pt_dynamic_addr;
381 }
382 }
b346ff46
FB		 383}
384
edf8e2af 385#define ELF_NREG 18
c227f099 386typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
edf8e2af 387
05390248 388static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUARMState *env)
edf8e2af 389{
86cd7b2d
PB		 390 (*regs)[0] = tswapreg(env->regs[0]);
391 (*regs)[1] = tswapreg(env->regs[1]);
392 (*regs)[2] = tswapreg(env->regs[2]);
393 (*regs)[3] = tswapreg(env->regs[3]);
394 (*regs)[4] = tswapreg(env->regs[4]);
395 (*regs)[5] = tswapreg(env->regs[5]);
396 (*regs)[6] = tswapreg(env->regs[6]);
397 (*regs)[7] = tswapreg(env->regs[7]);
398 (*regs)[8] = tswapreg(env->regs[8]);
399 (*regs)[9] = tswapreg(env->regs[9]);
400 (*regs)[10] = tswapreg(env->regs[10]);
401 (*regs)[11] = tswapreg(env->regs[11]);
402 (*regs)[12] = tswapreg(env->regs[12]);
403 (*regs)[13] = tswapreg(env->regs[13]);
404 (*regs)[14] = tswapreg(env->regs[14]);
405 (*regs)[15] = tswapreg(env->regs[15]);
406
407 (*regs)[16] = tswapreg(cpsr_read((CPUARMState *)env));
408 (*regs)[17] = tswapreg(env->regs[0]); /* XXX */
edf8e2af
MW		 409}
410
30ac07d4 411#define USE_ELF_CORE_DUMP
d97ef72e 412#define ELF_EXEC_PAGESIZE 4096
30ac07d4 413
afce2927
FB		 414enum
415{
d97ef72e
RH		 416 ARM_HWCAP_ARM_SWP = 1 << 0,
417 ARM_HWCAP_ARM_HALF = 1 << 1,
418 ARM_HWCAP_ARM_THUMB = 1 << 2,
419 ARM_HWCAP_ARM_26BIT = 1 << 3,
420 ARM_HWCAP_ARM_FAST_MULT = 1 << 4,
421 ARM_HWCAP_ARM_FPA = 1 << 5,
422 ARM_HWCAP_ARM_VFP = 1 << 6,
423 ARM_HWCAP_ARM_EDSP = 1 << 7,
424 ARM_HWCAP_ARM_JAVA = 1 << 8,
425 ARM_HWCAP_ARM_IWMMXT = 1 << 9,
43ce393e
PM		 426 ARM_HWCAP_ARM_CRUNCH = 1 << 10,
427 ARM_HWCAP_ARM_THUMBEE = 1 << 11,
428 ARM_HWCAP_ARM_NEON = 1 << 12,
429 ARM_HWCAP_ARM_VFPv3 = 1 << 13,
430 ARM_HWCAP_ARM_VFPv3D16 = 1 << 14,
24682654
PM		 431 ARM_HWCAP_ARM_TLS = 1 << 15,
432 ARM_HWCAP_ARM_VFPv4 = 1 << 16,
433 ARM_HWCAP_ARM_IDIVA = 1 << 17,
434 ARM_HWCAP_ARM_IDIVT = 1 << 18,
435 ARM_HWCAP_ARM_VFPD32 = 1 << 19,
436 ARM_HWCAP_ARM_LPAE = 1 << 20,
437 ARM_HWCAP_ARM_EVTSTRM = 1 << 21,
23d7f14d
PM		 438 ARM_HWCAP_ARM_FPHP = 1 << 22,
439 ARM_HWCAP_ARM_ASIMDHP = 1 << 23,
440 ARM_HWCAP_ARM_ASIMDDP = 1 << 24,
441 ARM_HWCAP_ARM_ASIMDFHM = 1 << 25,
442 ARM_HWCAP_ARM_ASIMDBF16 = 1 << 26,
443 ARM_HWCAP_ARM_I8MM = 1 << 27,
afce2927
FB		 444};
445
ad6919dc
PM		 446enum {
447 ARM_HWCAP2_ARM_AES = 1 << 0,
448 ARM_HWCAP2_ARM_PMULL = 1 << 1,
449 ARM_HWCAP2_ARM_SHA1 = 1 << 2,
450 ARM_HWCAP2_ARM_SHA2 = 1 << 3,
451 ARM_HWCAP2_ARM_CRC32 = 1 << 4,
23d7f14d
PM		 452 ARM_HWCAP2_ARM_SB = 1 << 5,
453 ARM_HWCAP2_ARM_SSBS = 1 << 6,
ad6919dc
PM		 454};
455
6b1275ff
PM		 456/* The commpage only exists for 32 bit kernels */
457
66346faf 458#define HI_COMMPAGE (intptr_t)0xffff0f00u
806d1021 459
ee947430
AB		 460static bool init_guest_commpage(void)
461{
d713cf4d
PMD		 462 ARMCPU *cpu = ARM_CPU(thread_cpu);
463 abi_ptr commpage;
464 void *want;
465 void *addr;
466
467 /*
468 * M-profile allocates maximum of 2GB address space, so can never
469 * allocate the commpage. Skip it.
470 */
471 if (arm_feature(&cpu->env, ARM_FEATURE_M)) {
472 return true;
473 }
474
475 commpage = HI_COMMPAGE & -qemu_host_page_size;
476 want = g2h_untagged(commpage);
477 addr = mmap(want, qemu_host_page_size, PROT_READ | PROT_WRITE,
478 MAP_ANONYMOUS | MAP_PRIVATE | MAP_FIXED, -1, 0);
97cc7560 479
6cda41da 480 if (addr == MAP_FAILED) {
ee947430
AB		 481 perror("Allocating guest commpage");
482 exit(EXIT_FAILURE);
97cc7560 483 }
ee947430
AB		 484 if (addr != want) {
485 return false;
97cc7560
DDAG		 486 }
487
ee947430 488 /* Set kernel helper versions; rest of page is 0. */
6cda41da 489 __put_user(5, (uint32_t *)g2h_untagged(0xffff0ffcu));
97cc7560 490
6cda41da 491 if (mprotect(addr, qemu_host_page_size, PROT_READ)) {
97cc7560 492 perror("Protecting guest commpage");
ee947430 493 exit(EXIT_FAILURE);
97cc7560 494 }
6cda41da
RH		 495
496 page_set_flags(commpage, commpage | ~qemu_host_page_mask,
497 PAGE_READ | PAGE_EXEC | PAGE_VALID);
ee947430 498 return true;
97cc7560 499}
adf050b1
BC		 500
501#define ELF_HWCAP get_elf_hwcap()
ad6919dc 502#define ELF_HWCAP2 get_elf_hwcap2()
adf050b1 503
a55b9e72 504uint32_t get_elf_hwcap(void)
adf050b1 505{
a2247f8e 506 ARMCPU *cpu = ARM_CPU(thread_cpu);
adf050b1
BC		 507 uint32_t hwcaps = 0;
508
509 hwcaps |= ARM_HWCAP_ARM_SWP;
510 hwcaps |= ARM_HWCAP_ARM_HALF;
511 hwcaps |= ARM_HWCAP_ARM_THUMB;
512 hwcaps |= ARM_HWCAP_ARM_FAST_MULT;
adf050b1
BC		 513
514 /* probe for the extra features */
515#define GET_FEATURE(feat, hwcap) \
a2247f8e 516 do { if (arm_feature(&cpu->env, feat)) { hwcaps |= hwcap; } } while (0)
962fcbf2
RH		 517
518#define GET_FEATURE_ID(feat, hwcap) \
519 do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0)
520
24682654
PM		 521 /* EDSP is in v5TE and above, but all our v5 CPUs are v5TE */
522 GET_FEATURE(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP);
adf050b1
BC		 523 GET_FEATURE(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT);
524 GET_FEATURE(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE);
525 GET_FEATURE(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON);
24682654 526 GET_FEATURE(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS);
bfa8a370 527 GET_FEATURE(ARM_FEATURE_LPAE, ARM_HWCAP_ARM_LPAE);
873b73c0
PM		 528 GET_FEATURE_ID(aa32_arm_div, ARM_HWCAP_ARM_IDIVA);
529 GET_FEATURE_ID(aa32_thumb_div, ARM_HWCAP_ARM_IDIVT);
bfa8a370
RH		 530 GET_FEATURE_ID(aa32_vfp, ARM_HWCAP_ARM_VFP);
531
532 if (cpu_isar_feature(aa32_fpsp_v3, cpu) ||
533 cpu_isar_feature(aa32_fpdp_v3, cpu)) {
534 hwcaps |= ARM_HWCAP_ARM_VFPv3;
535 if (cpu_isar_feature(aa32_simd_r32, cpu)) {
536 hwcaps |= ARM_HWCAP_ARM_VFPD32;
537 } else {
538 hwcaps |= ARM_HWCAP_ARM_VFPv3D16;
539 }
540 }
541 GET_FEATURE_ID(aa32_simdfmac, ARM_HWCAP_ARM_VFPv4);
429b7e01
PM		 542 /*
543 * MVFR1.FPHP and .SIMDHP must be in sync, and QEMU uses the same
544 * isar_feature function for both. The kernel reports them as two hwcaps.
545 */
546 GET_FEATURE_ID(aa32_fp16_arith, ARM_HWCAP_ARM_FPHP);
547 GET_FEATURE_ID(aa32_fp16_arith, ARM_HWCAP_ARM_ASIMDHP);
548 GET_FEATURE_ID(aa32_dp, ARM_HWCAP_ARM_ASIMDDP);
549 GET_FEATURE_ID(aa32_fhm, ARM_HWCAP_ARM_ASIMDFHM);
550 GET_FEATURE_ID(aa32_bf16, ARM_HWCAP_ARM_ASIMDBF16);
551 GET_FEATURE_ID(aa32_i8mm, ARM_HWCAP_ARM_I8MM);
adf050b1
BC		 552
553 return hwcaps;
554}
afce2927 555
63c1b7de 556uint64_t get_elf_hwcap2(void)
ad6919dc
PM		 557{
558 ARMCPU *cpu = ARM_CPU(thread_cpu);
63c1b7de 559 uint64_t hwcaps = 0;
ad6919dc 560
962fcbf2
RH		 561 GET_FEATURE_ID(aa32_aes, ARM_HWCAP2_ARM_AES);
562 GET_FEATURE_ID(aa32_pmull, ARM_HWCAP2_ARM_PMULL);
563 GET_FEATURE_ID(aa32_sha1, ARM_HWCAP2_ARM_SHA1);
564 GET_FEATURE_ID(aa32_sha2, ARM_HWCAP2_ARM_SHA2);
565 GET_FEATURE_ID(aa32_crc32, ARM_HWCAP2_ARM_CRC32);
429b7e01
PM		 566 GET_FEATURE_ID(aa32_sb, ARM_HWCAP2_ARM_SB);
567 GET_FEATURE_ID(aa32_ssbs, ARM_HWCAP2_ARM_SSBS);
ad6919dc
PM		 568 return hwcaps;
569}
570
a55b9e72
HD		 571const char *elf_hwcap_str(uint32_t bit)
572{
573 static const char *hwcap_str[] = {
574 [__builtin_ctz(ARM_HWCAP_ARM_SWP )] = "swp",
575 [__builtin_ctz(ARM_HWCAP_ARM_HALF )] = "half",
576 [__builtin_ctz(ARM_HWCAP_ARM_THUMB )] = "thumb",
577 [__builtin_ctz(ARM_HWCAP_ARM_26BIT )] = "26bit",
578 [__builtin_ctz(ARM_HWCAP_ARM_FAST_MULT)] = "fast_mult",
579 [__builtin_ctz(ARM_HWCAP_ARM_FPA )] = "fpa",
580 [__builtin_ctz(ARM_HWCAP_ARM_VFP )] = "vfp",
581 [__builtin_ctz(ARM_HWCAP_ARM_EDSP )] = "edsp",
582 [__builtin_ctz(ARM_HWCAP_ARM_JAVA )] = "java",
583 [__builtin_ctz(ARM_HWCAP_ARM_IWMMXT )] = "iwmmxt",
584 [__builtin_ctz(ARM_HWCAP_ARM_CRUNCH )] = "crunch",
585 [__builtin_ctz(ARM_HWCAP_ARM_THUMBEE )] = "thumbee",
586 [__builtin_ctz(ARM_HWCAP_ARM_NEON )] = "neon",
587 [__builtin_ctz(ARM_HWCAP_ARM_VFPv3 )] = "vfpv3",
588 [__builtin_ctz(ARM_HWCAP_ARM_VFPv3D16 )] = "vfpv3d16",
589 [__builtin_ctz(ARM_HWCAP_ARM_TLS )] = "tls",
590 [__builtin_ctz(ARM_HWCAP_ARM_VFPv4 )] = "vfpv4",
591 [__builtin_ctz(ARM_HWCAP_ARM_IDIVA )] = "idiva",
592 [__builtin_ctz(ARM_HWCAP_ARM_IDIVT )] = "idivt",
593 [__builtin_ctz(ARM_HWCAP_ARM_VFPD32 )] = "vfpd32",
594 [__builtin_ctz(ARM_HWCAP_ARM_LPAE )] = "lpae",
595 [__builtin_ctz(ARM_HWCAP_ARM_EVTSTRM )] = "evtstrm",
23d7f14d
PM		 596 [__builtin_ctz(ARM_HWCAP_ARM_FPHP )] = "fphp",
597 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDHP )] = "asimdhp",
598 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDDP )] = "asimddp",
599 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDFHM )] = "asimdfhm",
600 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDBF16)] = "asimdbf16",
601 [__builtin_ctz(ARM_HWCAP_ARM_I8MM )] = "i8mm",
a55b9e72
HD		 602 };
603
604 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
605}
606
607const char *elf_hwcap2_str(uint32_t bit)
608{
609 static const char *hwcap_str[] = {
610 [__builtin_ctz(ARM_HWCAP2_ARM_AES )] = "aes",
611 [__builtin_ctz(ARM_HWCAP2_ARM_PMULL)] = "pmull",
612 [__builtin_ctz(ARM_HWCAP2_ARM_SHA1 )] = "sha1",
613 [__builtin_ctz(ARM_HWCAP2_ARM_SHA2 )] = "sha2",
614 [__builtin_ctz(ARM_HWCAP2_ARM_CRC32)] = "crc32",
23d7f14d
PM		 615 [__builtin_ctz(ARM_HWCAP2_ARM_SB )] = "sb",
616 [__builtin_ctz(ARM_HWCAP2_ARM_SSBS )] = "ssbs",
a55b9e72
HD		 617 };
618
619 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
620}
621
ad6919dc 622#undef GET_FEATURE
962fcbf2 623#undef GET_FEATURE_ID
ad6919dc 624
13ec4ec3
RH		 625#define ELF_PLATFORM get_elf_platform()
626
627static const char *get_elf_platform(void)
628{
b77af26e 629 CPUARMState *env = cpu_env(thread_cpu);
13ec4ec3 630
ee3eb3a7 631#if TARGET_BIG_ENDIAN
13ec4ec3
RH		 632# define END "b"
633#else
634# define END "l"
635#endif
636
637 if (arm_feature(env, ARM_FEATURE_V8)) {
638 return "v8" END;
639 } else if (arm_feature(env, ARM_FEATURE_V7)) {
640 if (arm_feature(env, ARM_FEATURE_M)) {
641 return "v7m" END;
642 } else {
643 return "v7" END;
644 }
645 } else if (arm_feature(env, ARM_FEATURE_V6)) {
646 return "v6" END;
647 } else if (arm_feature(env, ARM_FEATURE_V5)) {
648 return "v5" END;
649 } else {
650 return "v4" END;
651 }
652
653#undef END
654}
655
24e76ff0
PM		 656#else
657/* 64 bit ARM definitions */
24e76ff0 658
b597c3f7 659#define ELF_ARCH EM_AARCH64
24e76ff0 660#define ELF_CLASS ELFCLASS64
ee3eb3a7 661#if TARGET_BIG_ENDIAN
e20e3ec9
RH		 662# define ELF_PLATFORM "aarch64_be"
663#else
664# define ELF_PLATFORM "aarch64"
665#endif
24e76ff0
PM		 666
667static inline void init_thread(struct target_pt_regs *regs,
668 struct image_info *infop)
669{
670 abi_long stack = infop->start_stack;
671 memset(regs, 0, sizeof(*regs));
672
673 regs->pc = infop->entry & ~0x3ULL;
674 regs->sp = stack;
675}
676
677#define ELF_NREG 34
678typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
679
680static void elf_core_copy_regs(target_elf_gregset_t *regs,
681 const CPUARMState *env)
682{
683 int i;
684
685 for (i = 0; i < 32; i++) {
686 (*regs)[i] = tswapreg(env->xregs[i]);
687 }
688 (*regs)[32] = tswapreg(env->pc);
689 (*regs)[33] = tswapreg(pstate_read((CPUARMState *)env));
690}
691
692#define USE_ELF_CORE_DUMP
693#define ELF_EXEC_PAGESIZE 4096
694
695enum {
696 ARM_HWCAP_A64_FP = 1 << 0,
697 ARM_HWCAP_A64_ASIMD = 1 << 1,
698 ARM_HWCAP_A64_EVTSTRM = 1 << 2,
699 ARM_HWCAP_A64_AES = 1 << 3,
700 ARM_HWCAP_A64_PMULL = 1 << 4,
701 ARM_HWCAP_A64_SHA1 = 1 << 5,
702 ARM_HWCAP_A64_SHA2 = 1 << 6,
703 ARM_HWCAP_A64_CRC32 = 1 << 7,
955f56d4
AB		 704 ARM_HWCAP_A64_ATOMICS = 1 << 8,
705 ARM_HWCAP_A64_FPHP = 1 << 9,
706 ARM_HWCAP_A64_ASIMDHP = 1 << 10,
707 ARM_HWCAP_A64_CPUID = 1 << 11,
708 ARM_HWCAP_A64_ASIMDRDM = 1 << 12,
709 ARM_HWCAP_A64_JSCVT = 1 << 13,
710 ARM_HWCAP_A64_FCMA = 1 << 14,
711 ARM_HWCAP_A64_LRCPC = 1 << 15,
712 ARM_HWCAP_A64_DCPOP = 1 << 16,
713 ARM_HWCAP_A64_SHA3 = 1 << 17,
714 ARM_HWCAP_A64_SM3 = 1 << 18,
715 ARM_HWCAP_A64_SM4 = 1 << 19,
716 ARM_HWCAP_A64_ASIMDDP = 1 << 20,
717 ARM_HWCAP_A64_SHA512 = 1 << 21,
718 ARM_HWCAP_A64_SVE = 1 << 22,
0083a1fa
RH		 719 ARM_HWCAP_A64_ASIMDFHM = 1 << 23,
720 ARM_HWCAP_A64_DIT = 1 << 24,
721 ARM_HWCAP_A64_USCAT = 1 << 25,
722 ARM_HWCAP_A64_ILRCPC = 1 << 26,
723 ARM_HWCAP_A64_FLAGM = 1 << 27,
724 ARM_HWCAP_A64_SSBS = 1 << 28,
725 ARM_HWCAP_A64_SB = 1 << 29,
726 ARM_HWCAP_A64_PACA = 1 << 30,
727 ARM_HWCAP_A64_PACG = 1UL << 31,
2041df4a
RH		 728
729 ARM_HWCAP2_A64_DCPODP = 1 << 0,
730 ARM_HWCAP2_A64_SVE2 = 1 << 1,
731 ARM_HWCAP2_A64_SVEAES = 1 << 2,
732 ARM_HWCAP2_A64_SVEPMULL = 1 << 3,
733 ARM_HWCAP2_A64_SVEBITPERM = 1 << 4,
734 ARM_HWCAP2_A64_SVESHA3 = 1 << 5,
735 ARM_HWCAP2_A64_SVESM4 = 1 << 6,
736 ARM_HWCAP2_A64_FLAGM2 = 1 << 7,
737 ARM_HWCAP2_A64_FRINT = 1 << 8,
68948d18
RH		 738 ARM_HWCAP2_A64_SVEI8MM = 1 << 9,
739 ARM_HWCAP2_A64_SVEF32MM = 1 << 10,
740 ARM_HWCAP2_A64_SVEF64MM = 1 << 11,
741 ARM_HWCAP2_A64_SVEBF16 = 1 << 12,
742 ARM_HWCAP2_A64_I8MM = 1 << 13,
743 ARM_HWCAP2_A64_BF16 = 1 << 14,
744 ARM_HWCAP2_A64_DGH = 1 << 15,
745 ARM_HWCAP2_A64_RNG = 1 << 16,
746 ARM_HWCAP2_A64_BTI = 1 << 17,
747 ARM_HWCAP2_A64_MTE = 1 << 18,
f9982cea
RH		 748 ARM_HWCAP2_A64_ECV = 1 << 19,
749 ARM_HWCAP2_A64_AFP = 1 << 20,
750 ARM_HWCAP2_A64_RPRES = 1 << 21,
751 ARM_HWCAP2_A64_MTE3 = 1 << 22,
752 ARM_HWCAP2_A64_SME = 1 << 23,
753 ARM_HWCAP2_A64_SME_I16I64 = 1 << 24,
754 ARM_HWCAP2_A64_SME_F64F64 = 1 << 25,
755 ARM_HWCAP2_A64_SME_I8I32 = 1 << 26,
756 ARM_HWCAP2_A64_SME_F16F32 = 1 << 27,
757 ARM_HWCAP2_A64_SME_B16F32 = 1 << 28,
758 ARM_HWCAP2_A64_SME_F32F32 = 1 << 29,
759 ARM_HWCAP2_A64_SME_FA64 = 1 << 30,
23d7f14d
PM		 760 ARM_HWCAP2_A64_WFXT = 1ULL << 31,
761 ARM_HWCAP2_A64_EBF16 = 1ULL << 32,
762 ARM_HWCAP2_A64_SVE_EBF16 = 1ULL << 33,
763 ARM_HWCAP2_A64_CSSC = 1ULL << 34,
764 ARM_HWCAP2_A64_RPRFM = 1ULL << 35,
765 ARM_HWCAP2_A64_SVE2P1 = 1ULL << 36,
766 ARM_HWCAP2_A64_SME2 = 1ULL << 37,
767 ARM_HWCAP2_A64_SME2P1 = 1ULL << 38,
768 ARM_HWCAP2_A64_SME_I16I32 = 1ULL << 39,
769 ARM_HWCAP2_A64_SME_BI32I32 = 1ULL << 40,
770 ARM_HWCAP2_A64_SME_B16B16 = 1ULL << 41,
771 ARM_HWCAP2_A64_SME_F16F16 = 1ULL << 42,
772 ARM_HWCAP2_A64_MOPS = 1ULL << 43,
773 ARM_HWCAP2_A64_HBC = 1ULL << 44,
24e76ff0
PM		 774};
775
2041df4a
RH		 776#define ELF_HWCAP get_elf_hwcap()
777#define ELF_HWCAP2 get_elf_hwcap2()
778
779#define GET_FEATURE_ID(feat, hwcap) \
780 do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0)
24e76ff0 781
a55b9e72 782uint32_t get_elf_hwcap(void)
24e76ff0
PM		 783{
784 ARMCPU *cpu = ARM_CPU(thread_cpu);
785 uint32_t hwcaps = 0;
786
787 hwcaps |= ARM_HWCAP_A64_FP;
788 hwcaps |= ARM_HWCAP_A64_ASIMD;
37020ff1 789 hwcaps |= ARM_HWCAP_A64_CPUID;
24e76ff0
PM		 790
791 /* probe for the extra features */
962fcbf2
RH		 792
793 GET_FEATURE_ID(aa64_aes, ARM_HWCAP_A64_AES);
794 GET_FEATURE_ID(aa64_pmull, ARM_HWCAP_A64_PMULL);
795 GET_FEATURE_ID(aa64_sha1, ARM_HWCAP_A64_SHA1);
796 GET_FEATURE_ID(aa64_sha256, ARM_HWCAP_A64_SHA2);
797 GET_FEATURE_ID(aa64_sha512, ARM_HWCAP_A64_SHA512);
798 GET_FEATURE_ID(aa64_crc32, ARM_HWCAP_A64_CRC32);
799 GET_FEATURE_ID(aa64_sha3, ARM_HWCAP_A64_SHA3);
800 GET_FEATURE_ID(aa64_sm3, ARM_HWCAP_A64_SM3);
801 GET_FEATURE_ID(aa64_sm4, ARM_HWCAP_A64_SM4);
5763190f 802 GET_FEATURE_ID(aa64_fp16, ARM_HWCAP_A64_FPHP | ARM_HWCAP_A64_ASIMDHP);
962fcbf2 803 GET_FEATURE_ID(aa64_atomics, ARM_HWCAP_A64_ATOMICS);
5cfea248 804 GET_FEATURE_ID(aa64_lse2, ARM_HWCAP_A64_USCAT);
962fcbf2
RH		 805 GET_FEATURE_ID(aa64_rdm, ARM_HWCAP_A64_ASIMDRDM);
806 GET_FEATURE_ID(aa64_dp, ARM_HWCAP_A64_ASIMDDP);
807 GET_FEATURE_ID(aa64_fcma, ARM_HWCAP_A64_FCMA);
cd208a1c 808 GET_FEATURE_ID(aa64_sve, ARM_HWCAP_A64_SVE);
29d26ab2 809 GET_FEATURE_ID(aa64_pauth, ARM_HWCAP_A64_PACA | ARM_HWCAP_A64_PACG);
1c9af3a9 810 GET_FEATURE_ID(aa64_fhm, ARM_HWCAP_A64_ASIMDFHM);
5cfea248 811 GET_FEATURE_ID(aa64_dit, ARM_HWCAP_A64_DIT);
1c9af3a9 812 GET_FEATURE_ID(aa64_jscvt, ARM_HWCAP_A64_JSCVT);
9888bd1e 813 GET_FEATURE_ID(aa64_sb, ARM_HWCAP_A64_SB);
b89d9c98 814 GET_FEATURE_ID(aa64_condm_4, ARM_HWCAP_A64_FLAGM);
0d57b499 815 GET_FEATURE_ID(aa64_dcpop, ARM_HWCAP_A64_DCPOP);
2677cf9f 816 GET_FEATURE_ID(aa64_rcpc_8_3, ARM_HWCAP_A64_LRCPC);
a1229109 817 GET_FEATURE_ID(aa64_rcpc_8_4, ARM_HWCAP_A64_ILRCPC);
962fcbf2 818
2041df4a
RH		 819 return hwcaps;
820}
821
63c1b7de 822uint64_t get_elf_hwcap2(void)
2041df4a
RH		 823{
824 ARMCPU *cpu = ARM_CPU(thread_cpu);
63c1b7de 825 uint64_t hwcaps = 0;
2041df4a 826
0d57b499 827 GET_FEATURE_ID(aa64_dcpodp, ARM_HWCAP2_A64_DCPODP);
cdc8d8b2
RH		 828 GET_FEATURE_ID(aa64_sve2, ARM_HWCAP2_A64_SVE2);
829 GET_FEATURE_ID(aa64_sve2_aes, ARM_HWCAP2_A64_SVEAES);
830 GET_FEATURE_ID(aa64_sve2_pmull128, ARM_HWCAP2_A64_SVEPMULL);
831 GET_FEATURE_ID(aa64_sve2_bitperm, ARM_HWCAP2_A64_SVEBITPERM);
832 GET_FEATURE_ID(aa64_sve2_sha3, ARM_HWCAP2_A64_SVESHA3);
833 GET_FEATURE_ID(aa64_sve2_sm4, ARM_HWCAP2_A64_SVESM4);
2041df4a
RH		 834 GET_FEATURE_ID(aa64_condm_5, ARM_HWCAP2_A64_FLAGM2);
835 GET_FEATURE_ID(aa64_frint, ARM_HWCAP2_A64_FRINT);
cdc8d8b2
RH		 836 GET_FEATURE_ID(aa64_sve_i8mm, ARM_HWCAP2_A64_SVEI8MM);
837 GET_FEATURE_ID(aa64_sve_f32mm, ARM_HWCAP2_A64_SVEF32MM);
838 GET_FEATURE_ID(aa64_sve_f64mm, ARM_HWCAP2_A64_SVEF64MM);
6c47a905 839 GET_FEATURE_ID(aa64_sve_bf16, ARM_HWCAP2_A64_SVEBF16);
cdc8d8b2 840 GET_FEATURE_ID(aa64_i8mm, ARM_HWCAP2_A64_I8MM);
6c47a905 841 GET_FEATURE_ID(aa64_bf16, ARM_HWCAP2_A64_BF16);
68948d18
RH		 842 GET_FEATURE_ID(aa64_rndr, ARM_HWCAP2_A64_RNG);
843 GET_FEATURE_ID(aa64_bti, ARM_HWCAP2_A64_BTI);
844 GET_FEATURE_ID(aa64_mte, ARM_HWCAP2_A64_MTE);
5cfea248 845 GET_FEATURE_ID(aa64_mte3, ARM_HWCAP2_A64_MTE3);
f9982cea
RH		 846 GET_FEATURE_ID(aa64_sme, (ARM_HWCAP2_A64_SME |
847 ARM_HWCAP2_A64_SME_F32F32 |
848 ARM_HWCAP2_A64_SME_B16F32 |
849 ARM_HWCAP2_A64_SME_F16F32 |
850 ARM_HWCAP2_A64_SME_I8I32));
851 GET_FEATURE_ID(aa64_sme_f64f64, ARM_HWCAP2_A64_SME_F64F64);
852 GET_FEATURE_ID(aa64_sme_i16i64, ARM_HWCAP2_A64_SME_I16I64);
853 GET_FEATURE_ID(aa64_sme_fa64, ARM_HWCAP2_A64_SME_FA64);
3039b090 854 GET_FEATURE_ID(aa64_hbc, ARM_HWCAP2_A64_HBC);
706a92fb 855 GET_FEATURE_ID(aa64_mops, ARM_HWCAP2_A64_MOPS);
24e76ff0
PM		 856
857 return hwcaps;
858}
859
a55b9e72
HD		 860const char *elf_hwcap_str(uint32_t bit)
861{
862 static const char *hwcap_str[] = {
863 [__builtin_ctz(ARM_HWCAP_A64_FP )] = "fp",
864 [__builtin_ctz(ARM_HWCAP_A64_ASIMD )] = "asimd",
865 [__builtin_ctz(ARM_HWCAP_A64_EVTSTRM )] = "evtstrm",
866 [__builtin_ctz(ARM_HWCAP_A64_AES )] = "aes",
867 [__builtin_ctz(ARM_HWCAP_A64_PMULL )] = "pmull",
868 [__builtin_ctz(ARM_HWCAP_A64_SHA1 )] = "sha1",
869 [__builtin_ctz(ARM_HWCAP_A64_SHA2 )] = "sha2",
870 [__builtin_ctz(ARM_HWCAP_A64_CRC32 )] = "crc32",
871 [__builtin_ctz(ARM_HWCAP_A64_ATOMICS )] = "atomics",
872 [__builtin_ctz(ARM_HWCAP_A64_FPHP )] = "fphp",
873 [__builtin_ctz(ARM_HWCAP_A64_ASIMDHP )] = "asimdhp",
874 [__builtin_ctz(ARM_HWCAP_A64_CPUID )] = "cpuid",
875 [__builtin_ctz(ARM_HWCAP_A64_ASIMDRDM)] = "asimdrdm",
876 [__builtin_ctz(ARM_HWCAP_A64_JSCVT )] = "jscvt",
877 [__builtin_ctz(ARM_HWCAP_A64_FCMA )] = "fcma",
878 [__builtin_ctz(ARM_HWCAP_A64_LRCPC )] = "lrcpc",
879 [__builtin_ctz(ARM_HWCAP_A64_DCPOP )] = "dcpop",
880 [__builtin_ctz(ARM_HWCAP_A64_SHA3 )] = "sha3",
881 [__builtin_ctz(ARM_HWCAP_A64_SM3 )] = "sm3",
882 [__builtin_ctz(ARM_HWCAP_A64_SM4 )] = "sm4",
883 [__builtin_ctz(ARM_HWCAP_A64_ASIMDDP )] = "asimddp",
884 [__builtin_ctz(ARM_HWCAP_A64_SHA512 )] = "sha512",
885 [__builtin_ctz(ARM_HWCAP_A64_SVE )] = "sve",
886 [__builtin_ctz(ARM_HWCAP_A64_ASIMDFHM)] = "asimdfhm",
887 [__builtin_ctz(ARM_HWCAP_A64_DIT )] = "dit",
888 [__builtin_ctz(ARM_HWCAP_A64_USCAT )] = "uscat",
889 [__builtin_ctz(ARM_HWCAP_A64_ILRCPC )] = "ilrcpc",
890 [__builtin_ctz(ARM_HWCAP_A64_FLAGM )] = "flagm",
891 [__builtin_ctz(ARM_HWCAP_A64_SSBS )] = "ssbs",
892 [__builtin_ctz(ARM_HWCAP_A64_SB )] = "sb",
893 [__builtin_ctz(ARM_HWCAP_A64_PACA )] = "paca",
894 [__builtin_ctz(ARM_HWCAP_A64_PACG )] = "pacg",
895 };
896
897 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
898}
899
900const char *elf_hwcap2_str(uint32_t bit)
901{
902 static const char *hwcap_str[] = {
903 [__builtin_ctz(ARM_HWCAP2_A64_DCPODP )] = "dcpodp",
904 [__builtin_ctz(ARM_HWCAP2_A64_SVE2 )] = "sve2",
905 [__builtin_ctz(ARM_HWCAP2_A64_SVEAES )] = "sveaes",
906 [__builtin_ctz(ARM_HWCAP2_A64_SVEPMULL )] = "svepmull",
907 [__builtin_ctz(ARM_HWCAP2_A64_SVEBITPERM )] = "svebitperm",
908 [__builtin_ctz(ARM_HWCAP2_A64_SVESHA3 )] = "svesha3",
909 [__builtin_ctz(ARM_HWCAP2_A64_SVESM4 )] = "svesm4",
910 [__builtin_ctz(ARM_HWCAP2_A64_FLAGM2 )] = "flagm2",
911 [__builtin_ctz(ARM_HWCAP2_A64_FRINT )] = "frint",
912 [__builtin_ctz(ARM_HWCAP2_A64_SVEI8MM )] = "svei8mm",
913 [__builtin_ctz(ARM_HWCAP2_A64_SVEF32MM )] = "svef32mm",
914 [__builtin_ctz(ARM_HWCAP2_A64_SVEF64MM )] = "svef64mm",
915 [__builtin_ctz(ARM_HWCAP2_A64_SVEBF16 )] = "svebf16",
916 [__builtin_ctz(ARM_HWCAP2_A64_I8MM )] = "i8mm",
917 [__builtin_ctz(ARM_HWCAP2_A64_BF16 )] = "bf16",
918 [__builtin_ctz(ARM_HWCAP2_A64_DGH )] = "dgh",
919 [__builtin_ctz(ARM_HWCAP2_A64_RNG )] = "rng",
920 [__builtin_ctz(ARM_HWCAP2_A64_BTI )] = "bti",
921 [__builtin_ctz(ARM_HWCAP2_A64_MTE )] = "mte",
922 [__builtin_ctz(ARM_HWCAP2_A64_ECV )] = "ecv",
923 [__builtin_ctz(ARM_HWCAP2_A64_AFP )] = "afp",
924 [__builtin_ctz(ARM_HWCAP2_A64_RPRES )] = "rpres",
925 [__builtin_ctz(ARM_HWCAP2_A64_MTE3 )] = "mte3",
926 [__builtin_ctz(ARM_HWCAP2_A64_SME )] = "sme",
e2e40a77
PM		 927 [__builtin_ctz(ARM_HWCAP2_A64_SME_I16I64 )] = "smei16i64",
928 [__builtin_ctz(ARM_HWCAP2_A64_SME_F64F64 )] = "smef64f64",
929 [__builtin_ctz(ARM_HWCAP2_A64_SME_I8I32 )] = "smei8i32",
930 [__builtin_ctz(ARM_HWCAP2_A64_SME_F16F32 )] = "smef16f32",
931 [__builtin_ctz(ARM_HWCAP2_A64_SME_B16F32 )] = "smeb16f32",
932 [__builtin_ctz(ARM_HWCAP2_A64_SME_F32F32 )] = "smef32f32",
933 [__builtin_ctz(ARM_HWCAP2_A64_SME_FA64 )] = "smefa64",
23d7f14d
PM		 934 [__builtin_ctz(ARM_HWCAP2_A64_WFXT )] = "wfxt",
935 [__builtin_ctzll(ARM_HWCAP2_A64_EBF16 )] = "ebf16",
936 [__builtin_ctzll(ARM_HWCAP2_A64_SVE_EBF16 )] = "sveebf16",
937 [__builtin_ctzll(ARM_HWCAP2_A64_CSSC )] = "cssc",
938 [__builtin_ctzll(ARM_HWCAP2_A64_RPRFM )] = "rprfm",
939 [__builtin_ctzll(ARM_HWCAP2_A64_SVE2P1 )] = "sve2p1",
940 [__builtin_ctzll(ARM_HWCAP2_A64_SME2 )] = "sme2",
941 [__builtin_ctzll(ARM_HWCAP2_A64_SME2P1 )] = "sme2p1",
942 [__builtin_ctzll(ARM_HWCAP2_A64_SME_I16I32 )] = "smei16i32",
943 [__builtin_ctzll(ARM_HWCAP2_A64_SME_BI32I32)] = "smebi32i32",
944 [__builtin_ctzll(ARM_HWCAP2_A64_SME_B16B16 )] = "smeb16b16",
945 [__builtin_ctzll(ARM_HWCAP2_A64_SME_F16F16 )] = "smef16f16",
946 [__builtin_ctzll(ARM_HWCAP2_A64_MOPS )] = "mops",
947 [__builtin_ctzll(ARM_HWCAP2_A64_HBC )] = "hbc",
a55b9e72
HD		 948 };
949
950 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
951}
952
2041df4a
RH		 953#undef GET_FEATURE_ID
954
24e76ff0 955#endif /* not TARGET_AARCH64 */
a9f495b9 956
ee95fae0
RH		 957#if TARGET_BIG_ENDIAN
958# define VDSO_HEADER "vdso-be.c.inc"
959#else
960# define VDSO_HEADER "vdso-le.c.inc"
961#endif
962
24e76ff0 963#endif /* TARGET_ARM */
30ac07d4 964
853d6f7a 965#ifdef TARGET_SPARC
a315a145 966#ifdef TARGET_SPARC64
853d6f7a 967
cf973e46
AT		 968#define ELF_HWCAP (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | HWCAP_SPARC_SWAP \
969 | HWCAP_SPARC_MULDIV | HWCAP_SPARC_V9)
992f48a0 970#ifndef TARGET_ABI32
cb33da57 971#define elf_check_arch(x) ( (x) == EM_SPARCV9 || (x) == EM_SPARC32PLUS )
992f48a0
BS		 972#else
973#define elf_check_arch(x) ( (x) == EM_SPARC32PLUS || (x) == EM_SPARC )
974#endif
853d6f7a 975
a315a145 976#define ELF_CLASS ELFCLASS64
5ef54116 977#define ELF_ARCH EM_SPARCV9
a315a145 978#else
cf973e46
AT		 979#define ELF_HWCAP (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | HWCAP_SPARC_SWAP \
980 | HWCAP_SPARC_MULDIV)
853d6f7a 981#define ELF_CLASS ELFCLASS32
853d6f7a 982#define ELF_ARCH EM_SPARC
089a2256 983#endif /* TARGET_SPARC64 */
853d6f7a 984
d97ef72e
RH		 985static inline void init_thread(struct target_pt_regs *regs,
986 struct image_info *infop)
853d6f7a 987{
089a2256 988 /* Note that target_cpu_copy_regs does not read psr/tstate. */
f5155289
FB		 989 regs->pc = infop->entry;
990 regs->npc = regs->pc + 4;
991 regs->y = 0;
089a2256
RH		 992 regs->u_regs[14] = (infop->start_stack - 16 * sizeof(abi_ulong)
993 - TARGET_STACK_BIAS);
853d6f7a 994}
089a2256 995#endif /* TARGET_SPARC */
853d6f7a 996
67867308
FB		 997#ifdef TARGET_PPC
998
4ecd4d16 999#define ELF_MACHINE PPC_ELF_MACHINE
67867308 1000
74154d7e 1001#if defined(TARGET_PPC64)
84409ddb
JM		 1002
1003#define elf_check_arch(x) ( (x) == EM_PPC64 )
1004
d97ef72e 1005#define ELF_CLASS ELFCLASS64
84409ddb
JM		 1006
1007#else
1008
d97ef72e 1009#define ELF_CLASS ELFCLASS32
872f3d04 1010#define EXSTACK_DEFAULT true
84409ddb
JM		 1011
1012#endif
1013
d97ef72e 1014#define ELF_ARCH EM_PPC
67867308 1015
df84e4f3
NF		 1016/* Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP).
1017 See arch/powerpc/include/asm/cputable.h. */
1018enum {
3efa9a67 1019 QEMU_PPC_FEATURE_32 = 0x80000000,
1020 QEMU_PPC_FEATURE_64 = 0x40000000,
1021 QEMU_PPC_FEATURE_601_INSTR = 0x20000000,
1022 QEMU_PPC_FEATURE_HAS_ALTIVEC = 0x10000000,
1023 QEMU_PPC_FEATURE_HAS_FPU = 0x08000000,
1024 QEMU_PPC_FEATURE_HAS_MMU = 0x04000000,
1025 QEMU_PPC_FEATURE_HAS_4xxMAC = 0x02000000,
1026 QEMU_PPC_FEATURE_UNIFIED_CACHE = 0x01000000,
1027 QEMU_PPC_FEATURE_HAS_SPE = 0x00800000,
1028 QEMU_PPC_FEATURE_HAS_EFP_SINGLE = 0x00400000,
1029 QEMU_PPC_FEATURE_HAS_EFP_DOUBLE = 0x00200000,
1030 QEMU_PPC_FEATURE_NO_TB = 0x00100000,
1031 QEMU_PPC_FEATURE_POWER4 = 0x00080000,
1032 QEMU_PPC_FEATURE_POWER5 = 0x00040000,
1033 QEMU_PPC_FEATURE_POWER5_PLUS = 0x00020000,
1034 QEMU_PPC_FEATURE_CELL = 0x00010000,
1035 QEMU_PPC_FEATURE_BOOKE = 0x00008000,
1036 QEMU_PPC_FEATURE_SMT = 0x00004000,
1037 QEMU_PPC_FEATURE_ICACHE_SNOOP = 0x00002000,
1038 QEMU_PPC_FEATURE_ARCH_2_05 = 0x00001000,
1039 QEMU_PPC_FEATURE_PA6T = 0x00000800,
1040 QEMU_PPC_FEATURE_HAS_DFP = 0x00000400,
1041 QEMU_PPC_FEATURE_POWER6_EXT = 0x00000200,
1042 QEMU_PPC_FEATURE_ARCH_2_06 = 0x00000100,
1043 QEMU_PPC_FEATURE_HAS_VSX = 0x00000080,
1044 QEMU_PPC_FEATURE_PSERIES_PERFMON_COMPAT = 0x00000040,
1045
1046 QEMU_PPC_FEATURE_TRUE_LE = 0x00000002,
1047 QEMU_PPC_FEATURE_PPC_LE = 0x00000001,
a60438dd
TM		 1048
1049 /* Feature definitions in AT_HWCAP2. */
1050 QEMU_PPC_FEATURE2_ARCH_2_07 = 0x80000000, /* ISA 2.07 */
1051 QEMU_PPC_FEATURE2_HAS_HTM = 0x40000000, /* Hardware Transactional Memory */
1052 QEMU_PPC_FEATURE2_HAS_DSCR = 0x20000000, /* Data Stream Control Register */
1053 QEMU_PPC_FEATURE2_HAS_EBB = 0x10000000, /* Event Base Branching */
1054 QEMU_PPC_FEATURE2_HAS_ISEL = 0x08000000, /* Integer Select */
1055 QEMU_PPC_FEATURE2_HAS_TAR = 0x04000000, /* Target Address Register */
24c373ec
LV		 1056 QEMU_PPC_FEATURE2_VEC_CRYPTO = 0x02000000,
1057 QEMU_PPC_FEATURE2_HTM_NOSC = 0x01000000,
be0c46d4 1058 QEMU_PPC_FEATURE2_ARCH_3_00 = 0x00800000, /* ISA 3.00 */
24c373ec
LV		 1059 QEMU_PPC_FEATURE2_HAS_IEEE128 = 0x00400000, /* VSX IEEE Bin Float 128-bit */
1060 QEMU_PPC_FEATURE2_DARN = 0x00200000, /* darn random number insn */
1061 QEMU_PPC_FEATURE2_SCV = 0x00100000, /* scv syscall */
1062 QEMU_PPC_FEATURE2_HTM_NO_SUSPEND = 0x00080000, /* TM w/o suspended state */
96c343cc
JS		 1063 QEMU_PPC_FEATURE2_ARCH_3_1 = 0x00040000, /* ISA 3.1 */
1064 QEMU_PPC_FEATURE2_MMA = 0x00020000, /* Matrix-Multiply Assist */
df84e4f3
NF		 1065};
1066
1067#define ELF_HWCAP get_elf_hwcap()
1068
1069static uint32_t get_elf_hwcap(void)
1070{
a2247f8e 1071 PowerPCCPU *cpu = POWERPC_CPU(thread_cpu);
df84e4f3
NF		 1072 uint32_t features = 0;
1073
1074 /* We don't have to be terribly complete here; the high points are
1075 Altivec/FP/SPE support. Anything else is just a bonus. */
d97ef72e 1076#define GET_FEATURE(flag, feature) \
a2247f8e 1077 do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
58eb5308
MW		 1078#define GET_FEATURE2(flags, feature) \
1079 do { \
1080 if ((cpu->env.insns_flags2 & flags) == flags) { \
1081 features |= feature; \
1082 } \
1083 } while (0)
3efa9a67 1084 GET_FEATURE(PPC_64B, QEMU_PPC_FEATURE_64);
1085 GET_FEATURE(PPC_FLOAT, QEMU_PPC_FEATURE_HAS_FPU);
1086 GET_FEATURE(PPC_ALTIVEC, QEMU_PPC_FEATURE_HAS_ALTIVEC);
1087 GET_FEATURE(PPC_SPE, QEMU_PPC_FEATURE_HAS_SPE);
1088 GET_FEATURE(PPC_SPE_SINGLE, QEMU_PPC_FEATURE_HAS_EFP_SINGLE);
1089 GET_FEATURE(PPC_SPE_DOUBLE, QEMU_PPC_FEATURE_HAS_EFP_DOUBLE);
1090 GET_FEATURE(PPC_BOOKE, QEMU_PPC_FEATURE_BOOKE);
1091 GET_FEATURE(PPC_405_MAC, QEMU_PPC_FEATURE_HAS_4xxMAC);
0e019746
TM		 1092 GET_FEATURE2(PPC2_DFP, QEMU_PPC_FEATURE_HAS_DFP);
1093 GET_FEATURE2(PPC2_VSX, QEMU_PPC_FEATURE_HAS_VSX);
1094 GET_FEATURE2((PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 |
1095 PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206),
1096 QEMU_PPC_FEATURE_ARCH_2_06);
df84e4f3 1097#undef GET_FEATURE
0e019746 1098#undef GET_FEATURE2
df84e4f3
NF		 1099
1100 return features;
1101}
1102
a60438dd
TM		 1103#define ELF_HWCAP2 get_elf_hwcap2()
1104
1105static uint32_t get_elf_hwcap2(void)
1106{
1107 PowerPCCPU *cpu = POWERPC_CPU(thread_cpu);
1108 uint32_t features = 0;
1109
1110#define GET_FEATURE(flag, feature) \
1111 do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
1112#define GET_FEATURE2(flag, feature) \
1113 do { if (cpu->env.insns_flags2 & flag) { features |= feature; } } while (0)
1114
1115 GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL);
1116 GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR);
1117 GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
24c373ec
LV		 1118 PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07 |
1119 QEMU_PPC_FEATURE2_VEC_CRYPTO);
1120 GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00 |
8a589aeb 1121 QEMU_PPC_FEATURE2_DARN | QEMU_PPC_FEATURE2_HAS_IEEE128);
96c343cc
JS		 1122 GET_FEATURE2(PPC2_ISA310, QEMU_PPC_FEATURE2_ARCH_3_1 |
1123 QEMU_PPC_FEATURE2_MMA);
a60438dd
TM		 1124
1125#undef GET_FEATURE
1126#undef GET_FEATURE2
1127
1128 return features;
1129}
1130
f5155289
FB		 1131/*
1132 * The requirements here are:
1133 * - keep the final alignment of sp (sp & 0xf)
1134 * - make sure the 32-bit value at the first 16 byte aligned position of
1135 * AUXV is greater than 16 for glibc compatibility.
1136 * AT_IGNOREPPC is used for that.
1137 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
1138 * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
1139 */
0bccf03d 1140#define DLINFO_ARCH_ITEMS 5
d97ef72e
RH		 1141#define ARCH_DLINFO \
1142 do { \
623e250a 1143 PowerPCCPU *cpu = POWERPC_CPU(thread_cpu); \
d97ef72e 1144 /* \
82991bed
PM		 1145 * Handle glibc compatibility: these magic entries must \
1146 * be at the lowest addresses in the final auxv. \
d97ef72e
RH		 1147 */ \
1148 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
1149 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
82991bed
PM		 1150 NEW_AUX_ENT(AT_DCACHEBSIZE, cpu->env.dcache_line_size); \
1151 NEW_AUX_ENT(AT_ICACHEBSIZE, cpu->env.icache_line_size); \
1152 NEW_AUX_ENT(AT_UCACHEBSIZE, 0); \
d97ef72e 1153 } while (0)
f5155289 1154
67867308
FB		 1155static inline void init_thread(struct target_pt_regs *_regs, struct image_info *infop)
1156{
67867308 1157 _regs->gpr[1] = infop->start_stack;
74154d7e 1158#if defined(TARGET_PPC64)
d90b94cd 1159 if (get_ppc64_abi(infop) < 2) {
2ccf97ec
PM		 1160 uint64_t val;
1161 get_user_u64(val, infop->entry + 8);
1162 _regs->gpr[2] = val + infop->load_bias;
1163 get_user_u64(val, infop->entry);
1164 infop->entry = val + infop->load_bias;
d90b94cd
DK		 1165 } else {
1166 _regs->gpr[12] = infop->entry; /* r12 set to global entry address */
1167 }
84409ddb 1168#endif
67867308
FB		 1169 _regs->nip = infop->entry;
1170}
1171
e2f3e741
NF		 1172/* See linux kernel: arch/powerpc/include/asm/elf.h. */
1173#define ELF_NREG 48
1174typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1175
05390248 1176static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUPPCState *env)
e2f3e741
NF		 1177{
1178 int i;
1179 target_ulong ccr = 0;
1180
1181 for (i = 0; i < ARRAY_SIZE(env->gpr); i++) {
86cd7b2d 1182 (*regs)[i] = tswapreg(env->gpr[i]);
e2f3e741
NF		 1183 }
1184
86cd7b2d
PB		 1185 (*regs)[32] = tswapreg(env->nip);
1186 (*regs)[33] = tswapreg(env->msr);
1187 (*regs)[35] = tswapreg(env->ctr);
1188 (*regs)[36] = tswapreg(env->lr);
10de0521 1189 (*regs)[37] = tswapreg(cpu_read_xer(env));
e2f3e741 1190
2060436a 1191 ccr = ppc_get_cr(env);
86cd7b2d 1192 (*regs)[38] = tswapreg(ccr);
e2f3e741
NF		 1193}
1194
1195#define USE_ELF_CORE_DUMP
d97ef72e 1196#define ELF_EXEC_PAGESIZE 4096
67867308 1197
e34136d9
RH		 1198#ifndef TARGET_PPC64
1199# define VDSO_HEADER "vdso-32.c.inc"
1200#elif TARGET_BIG_ENDIAN
1201# define VDSO_HEADER "vdso-64.c.inc"
1202#else
1203# define VDSO_HEADER "vdso-64le.c.inc"
1204#endif
1205
67867308
FB		 1206#endif
1207
3418fe25
SG		 1208#ifdef TARGET_LOONGARCH64
1209
3418fe25
SG		 1210#define ELF_CLASS ELFCLASS64
1211#define ELF_ARCH EM_LOONGARCH
872f3d04 1212#define EXSTACK_DEFAULT true
3418fe25
SG		 1213
1214#define elf_check_arch(x) ((x) == EM_LOONGARCH)
1215
00cc2934
RH		 1216#define VDSO_HEADER "vdso.c.inc"
1217
3418fe25
SG		 1218static inline void init_thread(struct target_pt_regs *regs,
1219 struct image_info *infop)
1220{
1221 /*Set crmd PG,DA = 1,0 */
1222 regs->csr.crmd = 2 << 3;
1223 regs->csr.era = infop->entry;
1224 regs->regs[3] = infop->start_stack;
1225}
1226
1227/* See linux kernel: arch/loongarch/include/asm/elf.h */
1228#define ELF_NREG 45
1229typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1230
1231enum {
1232 TARGET_EF_R0 = 0,
1233 TARGET_EF_CSR_ERA = TARGET_EF_R0 + 33,
1234 TARGET_EF_CSR_BADV = TARGET_EF_R0 + 34,
1235};
1236
1237static void elf_core_copy_regs(target_elf_gregset_t *regs,
1238 const CPULoongArchState *env)
1239{
1240 int i;
1241
1242 (*regs)[TARGET_EF_R0] = 0;
1243
1244 for (i = 1; i < ARRAY_SIZE(env->gpr); i++) {
1245 (*regs)[TARGET_EF_R0 + i] = tswapreg(env->gpr[i]);
1246 }
1247
1248 (*regs)[TARGET_EF_CSR_ERA] = tswapreg(env->pc);
1249 (*regs)[TARGET_EF_CSR_BADV] = tswapreg(env->CSR_BADV);
1250}
1251
1252#define USE_ELF_CORE_DUMP
1253#define ELF_EXEC_PAGESIZE 4096
1254
1255#define ELF_HWCAP get_elf_hwcap()
1256
1257/* See arch/loongarch/include/uapi/asm/hwcap.h */
1258enum {
1259 HWCAP_LOONGARCH_CPUCFG = (1 << 0),
1260 HWCAP_LOONGARCH_LAM = (1 << 1),
1261 HWCAP_LOONGARCH_UAL = (1 << 2),
1262 HWCAP_LOONGARCH_FPU = (1 << 3),
1263 HWCAP_LOONGARCH_LSX = (1 << 4),
1264 HWCAP_LOONGARCH_LASX = (1 << 5),
1265 HWCAP_LOONGARCH_CRC32 = (1 << 6),
1266 HWCAP_LOONGARCH_COMPLEX = (1 << 7),
1267 HWCAP_LOONGARCH_CRYPTO = (1 << 8),
1268 HWCAP_LOONGARCH_LVZ = (1 << 9),
1269 HWCAP_LOONGARCH_LBT_X86 = (1 << 10),
1270 HWCAP_LOONGARCH_LBT_ARM = (1 << 11),
1271 HWCAP_LOONGARCH_LBT_MIPS = (1 << 12),
1272};
1273
1274static uint32_t get_elf_hwcap(void)
1275{
1276 LoongArchCPU *cpu = LOONGARCH_CPU(thread_cpu);
1277 uint32_t hwcaps = 0;
1278
1279 hwcaps |= HWCAP_LOONGARCH_CRC32;
1280
1281 if (FIELD_EX32(cpu->env.cpucfg[1], CPUCFG1, UAL)) {
1282 hwcaps |= HWCAP_LOONGARCH_UAL;
1283 }
1284
1285 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, FP)) {
1286 hwcaps |= HWCAP_LOONGARCH_FPU;
1287 }
1288
1289 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LAM)) {
1290 hwcaps |= HWCAP_LOONGARCH_LAM;
1291 }
1292
a9f6004f
JC		 1293 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
1294 hwcaps |= HWCAP_LOONGARCH_LSX;
1295 }
1296
1297 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
1298 hwcaps |= HWCAP_LOONGARCH_LASX;
1299 }
1300
3418fe25
SG		 1301 return hwcaps;
1302}
1303
1304#define ELF_PLATFORM "loongarch"
1305
1306#endif /* TARGET_LOONGARCH64 */
1307
048f6b4d
FB		 1308#ifdef TARGET_MIPS
1309
388bb21a
TS		 1310#ifdef TARGET_MIPS64
1311#define ELF_CLASS ELFCLASS64
1312#else
048f6b4d 1313#define ELF_CLASS ELFCLASS32
388bb21a 1314#endif
048f6b4d 1315#define ELF_ARCH EM_MIPS
872f3d04 1316#define EXSTACK_DEFAULT true
048f6b4d 1317
ace3d654
CMAB		 1318#ifdef TARGET_ABI_MIPSN32
1319#define elf_check_abi(x) ((x) & EF_MIPS_ABI2)
1320#else
1321#define elf_check_abi(x) (!((x) & EF_MIPS_ABI2))
1322#endif
1323
fbf47c18
JY		 1324#define ELF_BASE_PLATFORM get_elf_base_platform()
1325
1326#define MATCH_PLATFORM_INSN(_flags, _base_platform) \
1327 do { if ((cpu->env.insn_flags & (_flags)) == _flags) \
1328 { return _base_platform; } } while (0)
1329
1330static const char *get_elf_base_platform(void)
1331{
1332 MIPSCPU *cpu = MIPS_CPU(thread_cpu);
1333
1334 /* 64 bit ISAs goes first */
1335 MATCH_PLATFORM_INSN(CPU_MIPS64R6, "mips64r6");
1336 MATCH_PLATFORM_INSN(CPU_MIPS64R5, "mips64r5");
1337 MATCH_PLATFORM_INSN(CPU_MIPS64R2, "mips64r2");
1338 MATCH_PLATFORM_INSN(CPU_MIPS64R1, "mips64");
1339 MATCH_PLATFORM_INSN(CPU_MIPS5, "mips5");
1340 MATCH_PLATFORM_INSN(CPU_MIPS4, "mips4");
1341 MATCH_PLATFORM_INSN(CPU_MIPS3, "mips3");
1342
1343 /* 32 bit ISAs */
1344 MATCH_PLATFORM_INSN(CPU_MIPS32R6, "mips32r6");
1345 MATCH_PLATFORM_INSN(CPU_MIPS32R5, "mips32r5");
1346 MATCH_PLATFORM_INSN(CPU_MIPS32R2, "mips32r2");
1347 MATCH_PLATFORM_INSN(CPU_MIPS32R1, "mips32");
1348 MATCH_PLATFORM_INSN(CPU_MIPS2, "mips2");
1349
1350 /* Fallback */
1351 return "mips";
1352}
1353#undef MATCH_PLATFORM_INSN
1354
d97ef72e
RH		 1355static inline void init_thread(struct target_pt_regs *regs,
1356 struct image_info *infop)
048f6b4d 1357{
623a930e 1358 regs->cp0_status = 2 << CP0St_KSU;
048f6b4d
FB		 1359 regs->cp0_epc = infop->entry;
1360 regs->regs[29] = infop->start_stack;
1361}
1362
51e52606
NF		 1363/* See linux kernel: arch/mips/include/asm/elf.h. */
1364#define ELF_NREG 45
1365typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1366
1367/* See linux kernel: arch/mips/include/asm/reg.h. */
1368enum {
1369#ifdef TARGET_MIPS64
1370 TARGET_EF_R0 = 0,
1371#else
1372 TARGET_EF_R0 = 6,
1373#endif
1374 TARGET_EF_R26 = TARGET_EF_R0 + 26,
1375 TARGET_EF_R27 = TARGET_EF_R0 + 27,
1376 TARGET_EF_LO = TARGET_EF_R0 + 32,
1377 TARGET_EF_HI = TARGET_EF_R0 + 33,
1378 TARGET_EF_CP0_EPC = TARGET_EF_R0 + 34,
1379 TARGET_EF_CP0_BADVADDR = TARGET_EF_R0 + 35,
1380 TARGET_EF_CP0_STATUS = TARGET_EF_R0 + 36,
1381 TARGET_EF_CP0_CAUSE = TARGET_EF_R0 + 37
1382};
1383
1384/* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs. */
05390248 1385static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMIPSState *env)
51e52606
NF		 1386{
1387 int i;
1388
1389 for (i = 0; i < TARGET_EF_R0; i++) {
1390 (*regs)[i] = 0;
1391 }
1392 (*regs)[TARGET_EF_R0] = 0;
1393
1394 for (i = 1; i < ARRAY_SIZE(env->active_tc.gpr); i++) {
a29f998d 1395 (*regs)[TARGET_EF_R0 + i] = tswapreg(env->active_tc.gpr[i]);
51e52606
NF		 1396 }
1397
1398 (*regs)[TARGET_EF_R26] = 0;
1399 (*regs)[TARGET_EF_R27] = 0;
a29f998d
PB		 1400 (*regs)[TARGET_EF_LO] = tswapreg(env->active_tc.LO[0]);
1401 (*regs)[TARGET_EF_HI] = tswapreg(env->active_tc.HI[0]);
1402 (*regs)[TARGET_EF_CP0_EPC] = tswapreg(env->active_tc.PC);
1403 (*regs)[TARGET_EF_CP0_BADVADDR] = tswapreg(env->CP0_BadVAddr);
1404 (*regs)[TARGET_EF_CP0_STATUS] = tswapreg(env->CP0_Status);
1405 (*regs)[TARGET_EF_CP0_CAUSE] = tswapreg(env->CP0_Cause);
51e52606
NF		 1406}
1407
1408#define USE_ELF_CORE_DUMP
388bb21a
TS		 1409#define ELF_EXEC_PAGESIZE 4096
1410
46a1ee4f
JC		 1411/* See arch/mips/include/uapi/asm/hwcap.h. */
1412enum {
1413 HWCAP_MIPS_R6 = (1 << 0),
1414 HWCAP_MIPS_MSA = (1 << 1),
9ea313ba
PMD		 1415 HWCAP_MIPS_CRC32 = (1 << 2),
1416 HWCAP_MIPS_MIPS16 = (1 << 3),
1417 HWCAP_MIPS_MDMX = (1 << 4),
1418 HWCAP_MIPS_MIPS3D = (1 << 5),
1419 HWCAP_MIPS_SMARTMIPS = (1 << 6),
1420 HWCAP_MIPS_DSP = (1 << 7),
1421 HWCAP_MIPS_DSP2 = (1 << 8),
1422 HWCAP_MIPS_DSP3 = (1 << 9),
1423 HWCAP_MIPS_MIPS16E2 = (1 << 10),
1424 HWCAP_LOONGSON_MMI = (1 << 11),
1425 HWCAP_LOONGSON_EXT = (1 << 12),
1426 HWCAP_LOONGSON_EXT2 = (1 << 13),
1427 HWCAP_LOONGSON_CPUCFG = (1 << 14),
46a1ee4f
JC		 1428};
1429
1430#define ELF_HWCAP get_elf_hwcap()
1431
7d9a3d96 1432#define GET_FEATURE_INSN(_flag, _hwcap) \
6dd97bfc
PMD		 1433 do { if (cpu->env.insn_flags & (_flag)) { hwcaps |= _hwcap; } } while (0)
1434
388765a0
PMD		 1435#define GET_FEATURE_REG_SET(_reg, _mask, _hwcap) \
1436 do { if (cpu->env._reg & (_mask)) { hwcaps |= _hwcap; } } while (0)
1437
ce543844
PMD		 1438#define GET_FEATURE_REG_EQU(_reg, _start, _length, _val, _hwcap) \
1439 do { \
1440 if (extract32(cpu->env._reg, (_start), (_length)) == (_val)) { \
1441 hwcaps |= _hwcap; \
1442 } \
1443 } while (0)
1444
46a1ee4f
JC		 1445static uint32_t get_elf_hwcap(void)
1446{
1447 MIPSCPU *cpu = MIPS_CPU(thread_cpu);
1448 uint32_t hwcaps = 0;
1449
ce543844
PMD		 1450 GET_FEATURE_REG_EQU(CP0_Config0, CP0C0_AR, CP0C0_AR_LENGTH,
1451 2, HWCAP_MIPS_R6);
388765a0 1452 GET_FEATURE_REG_SET(CP0_Config3, 1 << CP0C3_MSAP, HWCAP_MIPS_MSA);
53673d0f
PMD		 1453 GET_FEATURE_INSN(ASE_LMMI, HWCAP_LOONGSON_MMI);
1454 GET_FEATURE_INSN(ASE_LEXT, HWCAP_LOONGSON_EXT);
46a1ee4f 1455
46a1ee4f
JC		 1456 return hwcaps;
1457}
1458
ce543844 1459#undef GET_FEATURE_REG_EQU
388765a0 1460#undef GET_FEATURE_REG_SET
7d9a3d96 1461#undef GET_FEATURE_INSN
6dd97bfc 1462
048f6b4d
FB		 1463#endif /* TARGET_MIPS */
1464
b779e29e
EI		 1465#ifdef TARGET_MICROBLAZE
1466
0d5d4699 1467#define elf_check_arch(x) ( (x) == EM_MICROBLAZE || (x) == EM_MICROBLAZE_OLD)
b779e29e
EI		 1468
1469#define ELF_CLASS ELFCLASS32
0d5d4699 1470#define ELF_ARCH EM_MICROBLAZE
b779e29e 1471
d97ef72e
RH		 1472static inline void init_thread(struct target_pt_regs *regs,
1473 struct image_info *infop)
b779e29e
EI		 1474{
1475 regs->pc = infop->entry;
1476 regs->r1 = infop->start_stack;
1477
1478}
1479
b779e29e
EI		 1480#define ELF_EXEC_PAGESIZE 4096
1481
e4cbd44d
EI		 1482#define USE_ELF_CORE_DUMP
1483#define ELF_NREG 38
1484typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1485
1486/* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs. */
05390248 1487static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMBState *env)
e4cbd44d
EI		 1488{
1489 int i, pos = 0;
1490
1491 for (i = 0; i < 32; i++) {
86cd7b2d 1492 (*regs)[pos++] = tswapreg(env->regs[i]);
e4cbd44d
EI		 1493 }
1494
af20a93a 1495 (*regs)[pos++] = tswapreg(env->pc);
1074c0fb 1496 (*regs)[pos++] = tswapreg(mb_cpu_read_msr(env));
af20a93a
RH		 1497 (*regs)[pos++] = 0;
1498 (*regs)[pos++] = tswapreg(env->ear);
1499 (*regs)[pos++] = 0;
1500 (*regs)[pos++] = tswapreg(env->esr);
e4cbd44d
EI		 1501}
1502
b779e29e
EI		 1503#endif /* TARGET_MICROBLAZE */
1504
a0a839b6
MV		 1505#ifdef TARGET_NIOS2
1506
a0a839b6
MV		 1507#define elf_check_arch(x) ((x) == EM_ALTERA_NIOS2)
1508
1509#define ELF_CLASS ELFCLASS32
1510#define ELF_ARCH EM_ALTERA_NIOS2
1511
1512static void init_thread(struct target_pt_regs *regs, struct image_info *infop)
1513{
1514 regs->ea = infop->entry;
1515 regs->sp = infop->start_stack;
a0a839b6
MV		 1516}
1517
f5ef0e51
RH		 1518#define LO_COMMPAGE TARGET_PAGE_SIZE
1519
1520static bool init_guest_commpage(void)
1521{
1522 static const uint8_t kuser_page[4 + 2 * 64] = {
1523 /* __kuser_helper_version */
1524 [0x00] = 0x02, 0x00, 0x00, 0x00,
1525
1526 /* __kuser_cmpxchg */
1527 [0x04] = 0x3a, 0x6c, 0x3b, 0x00, /* trap 16 */
1528 0x3a, 0x28, 0x00, 0xf8, /* ret */
1529
1530 /* __kuser_sigtramp */
1531 [0x44] = 0xc4, 0x22, 0x80, 0x00, /* movi r2, __NR_rt_sigreturn */
1532 0x3a, 0x68, 0x3b, 0x00, /* trap 0 */
1533 };
1534
1535 void *want = g2h_untagged(LO_COMMPAGE & -qemu_host_page_size);
1536 void *addr = mmap(want, qemu_host_page_size, PROT_READ | PROT_WRITE,
1537 MAP_ANONYMOUS | MAP_PRIVATE | MAP_FIXED, -1, 0);
1538
1539 if (addr == MAP_FAILED) {
1540 perror("Allocating guest commpage");
1541 exit(EXIT_FAILURE);
1542 }
1543 if (addr != want) {
1544 return false;
1545 }
1546
1547 memcpy(addr, kuser_page, sizeof(kuser_page));
1548
1549 if (mprotect(addr, qemu_host_page_size, PROT_READ)) {
1550 perror("Protecting guest commpage");
1551 exit(EXIT_FAILURE);
1552 }
1553
49840a4a 1554 page_set_flags(LO_COMMPAGE, LO_COMMPAGE | ~TARGET_PAGE_MASK,
f5ef0e51
RH		 1555 PAGE_READ | PAGE_EXEC | PAGE_VALID);
1556 return true;
1557}
1558
a0a839b6
MV		 1559#define ELF_EXEC_PAGESIZE 4096
1560
1561#define USE_ELF_CORE_DUMP
1562#define ELF_NREG 49
1563typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1564
1565/* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs. */
1566static void elf_core_copy_regs(target_elf_gregset_t *regs,
1567 const CPUNios2State *env)
1568{
1569 int i;
1570
1571 (*regs)[0] = -1;
1572 for (i = 1; i < 8; i++) /* r0-r7 */
1573 (*regs)[i] = tswapreg(env->regs[i + 7]);
1574
1575 for (i = 8; i < 16; i++) /* r8-r15 */
1576 (*regs)[i] = tswapreg(env->regs[i - 8]);
1577
1578 for (i = 16; i < 24; i++) /* r16-r23 */
1579 (*regs)[i] = tswapreg(env->regs[i + 7]);
1580 (*regs)[24] = -1; /* R_ET */
1581 (*regs)[25] = -1; /* R_BT */
1582 (*regs)[26] = tswapreg(env->regs[R_GP]);
1583 (*regs)[27] = tswapreg(env->regs[R_SP]);
1584 (*regs)[28] = tswapreg(env->regs[R_FP]);
1585 (*regs)[29] = tswapreg(env->regs[R_EA]);
1586 (*regs)[30] = -1; /* R_SSTATUS */
1587 (*regs)[31] = tswapreg(env->regs[R_RA]);
1588
17a406ee 1589 (*regs)[32] = tswapreg(env->pc);
a0a839b6
MV		 1590
1591 (*regs)[33] = -1; /* R_STATUS */
1592 (*regs)[34] = tswapreg(env->regs[CR_ESTATUS]);
1593
1594 for (i = 35; i < 49; i++) /* ... */
1595 (*regs)[i] = -1;
1596}
1597
1598#endif /* TARGET_NIOS2 */
1599
d962783e
JL		 1600#ifdef TARGET_OPENRISC
1601
d962783e
JL		 1602#define ELF_ARCH EM_OPENRISC
1603#define ELF_CLASS ELFCLASS32
1604#define ELF_DATA ELFDATA2MSB
1605
1606static inline void init_thread(struct target_pt_regs *regs,
1607 struct image_info *infop)
1608{
1609 regs->pc = infop->entry;
1610 regs->gpr[1] = infop->start_stack;
1611}
1612
1613#define USE_ELF_CORE_DUMP
1614#define ELF_EXEC_PAGESIZE 8192
1615
1616/* See linux kernel arch/openrisc/include/asm/elf.h. */
1617#define ELF_NREG 34 /* gprs and pc, sr */
1618typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1619
1620static void elf_core_copy_regs(target_elf_gregset_t *regs,
1621 const CPUOpenRISCState *env)
1622{
1623 int i;
1624
1625 for (i = 0; i < 32; i++) {
d89e71e8 1626 (*regs)[i] = tswapreg(cpu_get_gpr(env, i));
d962783e 1627 }
86cd7b2d 1628 (*regs)[32] = tswapreg(env->pc);
84775c43 1629 (*regs)[33] = tswapreg(cpu_get_sr(env));
d962783e
JL		 1630}
1631#define ELF_HWCAP 0
1632#define ELF_PLATFORM NULL
1633
1634#endif /* TARGET_OPENRISC */
1635
fdf9b3e8
FB		 1636#ifdef TARGET_SH4
1637
fdf9b3e8 1638#define ELF_CLASS ELFCLASS32
fdf9b3e8
FB		 1639#define ELF_ARCH EM_SH
1640
d97ef72e
RH		 1641static inline void init_thread(struct target_pt_regs *regs,
1642 struct image_info *infop)
fdf9b3e8 1643{
d97ef72e
RH		 1644 /* Check other registers XXXXX */
1645 regs->pc = infop->entry;
1646 regs->regs[15] = infop->start_stack;
fdf9b3e8
FB		 1647}
1648
7631c97e
NF		 1649/* See linux kernel: arch/sh/include/asm/elf.h. */
1650#define ELF_NREG 23
1651typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1652
1653/* See linux kernel: arch/sh/include/asm/ptrace.h. */
1654enum {
1655 TARGET_REG_PC = 16,
1656 TARGET_REG_PR = 17,
1657 TARGET_REG_SR = 18,
1658 TARGET_REG_GBR = 19,
1659 TARGET_REG_MACH = 20,
1660 TARGET_REG_MACL = 21,
1661 TARGET_REG_SYSCALL = 22
1662};
1663
d97ef72e 1664static inline void elf_core_copy_regs(target_elf_gregset_t *regs,
05390248 1665 const CPUSH4State *env)
7631c97e
NF		 1666{
1667 int i;
1668
1669 for (i = 0; i < 16; i++) {
72cd500b 1670 (*regs)[i] = tswapreg(env->gregs[i]);
7631c97e
NF		 1671 }
1672
86cd7b2d
PB		 1673 (*regs)[TARGET_REG_PC] = tswapreg(env->pc);
1674 (*regs)[TARGET_REG_PR] = tswapreg(env->pr);
1675 (*regs)[TARGET_REG_SR] = tswapreg(env->sr);
1676 (*regs)[TARGET_REG_GBR] = tswapreg(env->gbr);
1677 (*regs)[TARGET_REG_MACH] = tswapreg(env->mach);
1678 (*regs)[TARGET_REG_MACL] = tswapreg(env->macl);
7631c97e
NF		 1679 (*regs)[TARGET_REG_SYSCALL] = 0; /* FIXME */
1680}
1681
1682#define USE_ELF_CORE_DUMP
fdf9b3e8
FB		 1683#define ELF_EXEC_PAGESIZE 4096
1684
e42fd944
RH		 1685enum {
1686 SH_CPU_HAS_FPU = 0x0001, /* Hardware FPU support */
1687 SH_CPU_HAS_P2_FLUSH_BUG = 0x0002, /* Need to flush the cache in P2 area */
1688 SH_CPU_HAS_MMU_PAGE_ASSOC = 0x0004, /* SH3: TLB way selection bit support */
1689 SH_CPU_HAS_DSP = 0x0008, /* SH-DSP: DSP support */
1690 SH_CPU_HAS_PERF_COUNTER = 0x0010, /* Hardware performance counters */
1691 SH_CPU_HAS_PTEA = 0x0020, /* PTEA register */
1692 SH_CPU_HAS_LLSC = 0x0040, /* movli.l/movco.l */
1693 SH_CPU_HAS_L2_CACHE = 0x0080, /* Secondary cache / URAM */
1694 SH_CPU_HAS_OP32 = 0x0100, /* 32-bit instruction support */
1695 SH_CPU_HAS_PTEAEX = 0x0200, /* PTE ASID Extension support */
1696};
1697
1698#define ELF_HWCAP get_elf_hwcap()
1699
1700static uint32_t get_elf_hwcap(void)
1701{
1702 SuperHCPU *cpu = SUPERH_CPU(thread_cpu);
1703 uint32_t hwcap = 0;
1704
1705 hwcap |= SH_CPU_HAS_FPU;
1706
1707 if (cpu->env.features & SH_FEATURE_SH4A) {
1708 hwcap |= SH_CPU_HAS_LLSC;
1709 }
1710
1711 return hwcap;
1712}
1713
fdf9b3e8
FB		 1714#endif
1715
48733d19
TS		 1716#ifdef TARGET_CRIS
1717
48733d19 1718#define ELF_CLASS ELFCLASS32
48733d19
TS		 1719#define ELF_ARCH EM_CRIS
1720
d97ef72e
RH		 1721static inline void init_thread(struct target_pt_regs *regs,
1722 struct image_info *infop)
48733d19 1723{
d97ef72e 1724 regs->erp = infop->entry;
48733d19
TS		 1725}
1726
48733d19
TS		 1727#define ELF_EXEC_PAGESIZE 8192
1728
1729#endif
1730
e6e5906b
PB		 1731#ifdef TARGET_M68K
1732
d97ef72e 1733#define ELF_CLASS ELFCLASS32
d97ef72e 1734#define ELF_ARCH EM_68K
e6e5906b
PB		 1735
1736/* ??? Does this need to do anything?
d97ef72e 1737 #define ELF_PLAT_INIT(_r) */
e6e5906b 1738
d97ef72e
RH		 1739static inline void init_thread(struct target_pt_regs *regs,
1740 struct image_info *infop)
e6e5906b
PB		 1741{
1742 regs->usp = infop->start_stack;
1743 regs->sr = 0;
1744 regs->pc = infop->entry;
1745}
1746
7a93cc55
NF		 1747/* See linux kernel: arch/m68k/include/asm/elf.h. */
1748#define ELF_NREG 20
1749typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1750
05390248 1751static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUM68KState *env)
7a93cc55 1752{
86cd7b2d
PB		 1753 (*regs)[0] = tswapreg(env->dregs[1]);
1754 (*regs)[1] = tswapreg(env->dregs[2]);
1755 (*regs)[2] = tswapreg(env->dregs[3]);
1756 (*regs)[3] = tswapreg(env->dregs[4]);
1757 (*regs)[4] = tswapreg(env->dregs[5]);
1758 (*regs)[5] = tswapreg(env->dregs[6]);
1759 (*regs)[6] = tswapreg(env->dregs[7]);
1760 (*regs)[7] = tswapreg(env->aregs[0]);
1761 (*regs)[8] = tswapreg(env->aregs[1]);
1762 (*regs)[9] = tswapreg(env->aregs[2]);
1763 (*regs)[10] = tswapreg(env->aregs[3]);
1764 (*regs)[11] = tswapreg(env->aregs[4]);
1765 (*regs)[12] = tswapreg(env->aregs[5]);
1766 (*regs)[13] = tswapreg(env->aregs[6]);
1767 (*regs)[14] = tswapreg(env->dregs[0]);
1768 (*regs)[15] = tswapreg(env->aregs[7]);
1769 (*regs)[16] = tswapreg(env->dregs[0]); /* FIXME: orig_d0 */
1770 (*regs)[17] = tswapreg(env->sr);
1771 (*regs)[18] = tswapreg(env->pc);
7a93cc55
NF		 1772 (*regs)[19] = 0; /* FIXME: regs->format | regs->vector */
1773}
1774
1775#define USE_ELF_CORE_DUMP
d97ef72e 1776#define ELF_EXEC_PAGESIZE 8192
e6e5906b
PB		 1777
1778#endif
1779
7a3148a9
JM		 1780#ifdef TARGET_ALPHA
1781
7a3148a9 1782#define ELF_CLASS ELFCLASS64
7a3148a9
JM		 1783#define ELF_ARCH EM_ALPHA
1784
d97ef72e
RH		 1785static inline void init_thread(struct target_pt_regs *regs,
1786 struct image_info *infop)
7a3148a9
JM		 1787{
1788 regs->pc = infop->entry;
1789 regs->ps = 8;
1790 regs->usp = infop->start_stack;
7a3148a9
JM		 1791}
1792
7a3148a9
JM		 1793#define ELF_EXEC_PAGESIZE 8192
1794
1795#endif /* TARGET_ALPHA */
1796
a4c075f1
UH		 1797#ifdef TARGET_S390X
1798
a4c075f1
UH		 1799#define ELF_CLASS ELFCLASS64
1800#define ELF_DATA ELFDATA2MSB
1801#define ELF_ARCH EM_S390
1802
6d88baf1
DH		 1803#include "elf.h"
1804
1805#define ELF_HWCAP get_elf_hwcap()
1806
1807#define GET_FEATURE(_feat, _hwcap) \
1808 do { if (s390_has_feat(_feat)) { hwcap |= _hwcap; } } while (0)
1809
e1b819c8 1810uint32_t get_elf_hwcap(void)
6d88baf1
DH		 1811{
1812 /*
1813 * Let's assume we always have esan3 and zarch.
1814 * 31-bit processes can use 64-bit registers (high gprs).
1815 */
1816 uint32_t hwcap = HWCAP_S390_ESAN3 | HWCAP_S390_ZARCH | HWCAP_S390_HIGH_GPRS;
1817
1818 GET_FEATURE(S390_FEAT_STFLE, HWCAP_S390_STFLE);
1819 GET_FEATURE(S390_FEAT_MSA, HWCAP_S390_MSA);
1820 GET_FEATURE(S390_FEAT_LONG_DISPLACEMENT, HWCAP_S390_LDISP);
1821 GET_FEATURE(S390_FEAT_EXTENDED_IMMEDIATE, HWCAP_S390_EIMM);
1822 if (s390_has_feat(S390_FEAT_EXTENDED_TRANSLATION_3) &&
1823 s390_has_feat(S390_FEAT_ETF3_ENH)) {
1824 hwcap |= HWCAP_S390_ETF3EH;
1825 }
1826 GET_FEATURE(S390_FEAT_VECTOR, HWCAP_S390_VXRS);
da215c23 1827 GET_FEATURE(S390_FEAT_VECTOR_ENH, HWCAP_S390_VXRS_EXT);
ffc8453b 1828 GET_FEATURE(S390_FEAT_VECTOR_ENH2, HWCAP_S390_VXRS_EXT2);
6d88baf1
DH		 1829
1830 return hwcap;
1831}
1832
e19807be
IL		 1833const char *elf_hwcap_str(uint32_t bit)
1834{
1835 static const char *hwcap_str[] = {
7f114a58
IL		 1836 [HWCAP_S390_NR_ESAN3] = "esan3",
1837 [HWCAP_S390_NR_ZARCH] = "zarch",
1838 [HWCAP_S390_NR_STFLE] = "stfle",
1839 [HWCAP_S390_NR_MSA] = "msa",
1840 [HWCAP_S390_NR_LDISP] = "ldisp",
1841 [HWCAP_S390_NR_EIMM] = "eimm",
1842 [HWCAP_S390_NR_DFP] = "dfp",
1843 [HWCAP_S390_NR_HPAGE] = "edat",
1844 [HWCAP_S390_NR_ETF3EH] = "etf3eh",
1845 [HWCAP_S390_NR_HIGH_GPRS] = "highgprs",
1846 [HWCAP_S390_NR_TE] = "te",
1847 [HWCAP_S390_NR_VXRS] = "vx",
1848 [HWCAP_S390_NR_VXRS_BCD] = "vxd",
1849 [HWCAP_S390_NR_VXRS_EXT] = "vxe",
1850 [HWCAP_S390_NR_GS] = "gs",
1851 [HWCAP_S390_NR_VXRS_EXT2] = "vxe2",
1852 [HWCAP_S390_NR_VXRS_PDE] = "vxp",
1853 [HWCAP_S390_NR_SORT] = "sort",
1854 [HWCAP_S390_NR_DFLT] = "dflt",
1855 [HWCAP_S390_NR_NNPA] = "nnpa",
1856 [HWCAP_S390_NR_PCI_MIO] = "pcimio",
1857 [HWCAP_S390_NR_SIE] = "sie",
e19807be
IL		 1858 };
1859
1860 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
1861}
1862
a4c075f1
UH		 1863static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop)
1864{
1865 regs->psw.addr = infop->entry;
78a1e153
IL		 1866 regs->psw.mask = PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
1867 PSW_MASK_MCHECK | PSW_MASK_PSTATE | PSW_MASK_64 | \
1868 PSW_MASK_32;
a4c075f1
UH		 1869 regs->gprs[15] = infop->start_stack;
1870}
1871
4a1e8931
IL		 1872/* See linux kernel: arch/s390/include/uapi/asm/ptrace.h (s390_regs). */
1873#define ELF_NREG 27
1874typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1875
1876enum {
1877 TARGET_REG_PSWM = 0,
1878 TARGET_REG_PSWA = 1,
1879 TARGET_REG_GPRS = 2,
1880 TARGET_REG_ARS = 18,
1881 TARGET_REG_ORIG_R2 = 26,
1882};
1883
1884static void elf_core_copy_regs(target_elf_gregset_t *regs,
1885 const CPUS390XState *env)
1886{
1887 int i;
1888 uint32_t *aregs;
1889
1890 (*regs)[TARGET_REG_PSWM] = tswapreg(env->psw.mask);
1891 (*regs)[TARGET_REG_PSWA] = tswapreg(env->psw.addr);
1892 for (i = 0; i < 16; i++) {
1893 (*regs)[TARGET_REG_GPRS + i] = tswapreg(env->regs[i]);
1894 }
1895 aregs = (uint32_t *)&((*regs)[TARGET_REG_ARS]);
1896 for (i = 0; i < 16; i++) {
1897 aregs[i] = tswap32(env->aregs[i]);
1898 }
1899 (*regs)[TARGET_REG_ORIG_R2] = 0;
1900}
1901
1902#define USE_ELF_CORE_DUMP
1903#define ELF_EXEC_PAGESIZE 4096
1904
b63c6b97
RH		 1905#define VDSO_HEADER "vdso.c.inc"
1906
a4c075f1
UH		 1907#endif /* TARGET_S390X */
1908
47ae93cd
MC		 1909#ifdef TARGET_RISCV
1910
47ae93cd
MC		 1911#define ELF_ARCH EM_RISCV
1912
1913#ifdef TARGET_RISCV32
1914#define ELF_CLASS ELFCLASS32
468c1bb5 1915#define VDSO_HEADER "vdso-32.c.inc"
47ae93cd
MC		 1916#else
1917#define ELF_CLASS ELFCLASS64
468c1bb5 1918#define VDSO_HEADER "vdso-64.c.inc"
47ae93cd
MC		 1919#endif
1920
cb46938c
KC		 1921#define ELF_HWCAP get_elf_hwcap()
1922
1923static uint32_t get_elf_hwcap(void)
1924{
1925#define MISA_BIT(EXT) (1 << (EXT - 'A'))
1926 RISCVCPU *cpu = RISCV_CPU(thread_cpu);
1927 uint32_t mask = MISA_BIT('I') | MISA_BIT('M') | MISA_BIT('A')
4333f092
NE		 1928 | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C')
1929 | MISA_BIT('V');
cb46938c 1930
e91a7227 1931 return cpu->env.misa_ext & mask;
cb46938c
KC		 1932#undef MISA_BIT
1933}
1934
47ae93cd
MC		 1935static inline void init_thread(struct target_pt_regs *regs,
1936 struct image_info *infop)
1937{
1938 regs->sepc = infop->entry;
1939 regs->sp = infop->start_stack;
1940}
1941
1942#define ELF_EXEC_PAGESIZE 4096
1943
1944#endif /* TARGET_RISCV */
1945
7c248bcd
RH		 1946#ifdef TARGET_HPPA
1947
7c248bcd
RH		 1948#define ELF_CLASS ELFCLASS32
1949#define ELF_ARCH EM_PARISC
1950#define ELF_PLATFORM "PARISC"
1951#define STACK_GROWS_DOWN 0
1952#define STACK_ALIGNMENT 64
1953
c7bc2a8f
RH		 1954#define VDSO_HEADER "vdso.c.inc"
1955
7c248bcd
RH		 1956static inline void init_thread(struct target_pt_regs *regs,
1957 struct image_info *infop)
1958{
1959 regs->iaoq[0] = infop->entry;
1960 regs->iaoq[1] = infop->entry + 4;
1961 regs->gr[23] = 0;
60f1c801
RH		 1962 regs->gr[24] = infop->argv;
1963 regs->gr[25] = infop->argc;
7c248bcd
RH		 1964 /* The top-of-stack contains a linkage buffer. */
1965 regs->gr[30] = infop->start_stack + 64;
1966 regs->gr[31] = infop->entry;
1967}
1968
eee816c0
RH		 1969#define LO_COMMPAGE 0
1970
1971static bool init_guest_commpage(void)
1972{
1973 void *want = g2h_untagged(LO_COMMPAGE);
1974 void *addr = mmap(want, qemu_host_page_size, PROT_NONE,
1975 MAP_ANONYMOUS | MAP_PRIVATE | MAP_FIXED, -1, 0);
1976
1977 if (addr == MAP_FAILED) {
1978 perror("Allocating guest commpage");
1979 exit(EXIT_FAILURE);
1980 }
1981 if (addr != want) {
1982 return false;
1983 }
1984
1985 /*
1986 * On Linux, page zero is normally marked execute only + gateway.
1987 * Normal read or write is supposed to fail (thus PROT_NONE above),
1988 * but specific offsets have kernel code mapped to raise permissions
1989 * and implement syscalls. Here, simply mark the page executable.
1990 * Special case the entry points during translation (see do_page_zero).
1991 */
49840a4a 1992 page_set_flags(LO_COMMPAGE, LO_COMMPAGE | ~TARGET_PAGE_MASK,
eee816c0
RH		 1993 PAGE_EXEC | PAGE_VALID);
1994 return true;
1995}
1996
7c248bcd
RH		 1997#endif /* TARGET_HPPA */
1998
ba7651fb
MF		 1999#ifdef TARGET_XTENSA
2000
ba7651fb
MF		 2001#define ELF_CLASS ELFCLASS32
2002#define ELF_ARCH EM_XTENSA
2003
2004static inline void init_thread(struct target_pt_regs *regs,
2005 struct image_info *infop)
2006{
2007 regs->windowbase = 0;
2008 regs->windowstart = 1;
2009 regs->areg[1] = infop->start_stack;
2010 regs->pc = infop->entry;
d2796be6
MF		 2011 if (info_is_fdpic(infop)) {
2012 regs->areg[4] = infop->loadmap_addr;
2013 regs->areg[5] = infop->interpreter_loadmap_addr;
2014 if (infop->interpreter_loadmap_addr) {
2015 regs->areg[6] = infop->interpreter_pt_dynamic_addr;
2016 } else {
2017 regs->areg[6] = infop->pt_dynamic_addr;
2018 }
2019 }
ba7651fb
MF		 2020}
2021
2022/* See linux kernel: arch/xtensa/include/asm/elf.h. */
2023#define ELF_NREG 128
2024typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
2025
2026enum {
2027 TARGET_REG_PC,
2028 TARGET_REG_PS,
2029 TARGET_REG_LBEG,
2030 TARGET_REG_LEND,
2031 TARGET_REG_LCOUNT,
2032 TARGET_REG_SAR,
2033 TARGET_REG_WINDOWSTART,
2034 TARGET_REG_WINDOWBASE,
2035 TARGET_REG_THREADPTR,
2036 TARGET_REG_AR0 = 64,
2037};
2038
2039static void elf_core_copy_regs(target_elf_gregset_t *regs,
2040 const CPUXtensaState *env)
2041{
2042 unsigned i;
2043
2044 (*regs)[TARGET_REG_PC] = tswapreg(env->pc);
2045 (*regs)[TARGET_REG_PS] = tswapreg(env->sregs[PS] & ~PS_EXCM);
2046 (*regs)[TARGET_REG_LBEG] = tswapreg(env->sregs[LBEG]);
2047 (*regs)[TARGET_REG_LEND] = tswapreg(env->sregs[LEND]);
2048 (*regs)[TARGET_REG_LCOUNT] = tswapreg(env->sregs[LCOUNT]);
2049 (*regs)[TARGET_REG_SAR] = tswapreg(env->sregs[SAR]);
2050 (*regs)[TARGET_REG_WINDOWSTART] = tswapreg(env->sregs[WINDOW_START]);
2051 (*regs)[TARGET_REG_WINDOWBASE] = tswapreg(env->sregs[WINDOW_BASE]);
2052 (*regs)[TARGET_REG_THREADPTR] = tswapreg(env->uregs[THREADPTR]);
2053 xtensa_sync_phys_from_window((CPUXtensaState *)env);
2054 for (i = 0; i < env->config->nareg; ++i) {
2055 (*regs)[TARGET_REG_AR0 + i] = tswapreg(env->phys_regs[i]);
2056 }
2057}
2058
2059#define USE_ELF_CORE_DUMP
2060#define ELF_EXEC_PAGESIZE 4096
2061
2062#endif /* TARGET_XTENSA */
2063
d2a56bd2
TS		 2064#ifdef TARGET_HEXAGON
2065
d2a56bd2
TS		 2066#define ELF_CLASS ELFCLASS32
2067#define ELF_ARCH EM_HEXAGON
2068
2069static inline void init_thread(struct target_pt_regs *regs,
2070 struct image_info *infop)
2071{
2072 regs->sepc = infop->entry;
2073 regs->sp = infop->start_stack;
2074}
2075
2076#endif /* TARGET_HEXAGON */
2077
fcdc0ab4
JY		 2078#ifndef ELF_BASE_PLATFORM
2079#define ELF_BASE_PLATFORM (NULL)
2080#endif
2081
15338fd7
FB		 2082#ifndef ELF_PLATFORM
2083#define ELF_PLATFORM (NULL)
2084#endif
2085
75be901c
PC		 2086#ifndef ELF_MACHINE
2087#define ELF_MACHINE ELF_ARCH
2088#endif
2089
d276a604
PC		 2090#ifndef elf_check_arch
2091#define elf_check_arch(x) ((x) == ELF_ARCH)
2092#endif
2093
ace3d654
CMAB		 2094#ifndef elf_check_abi
2095#define elf_check_abi(x) (1)
2096#endif
2097
15338fd7
FB		 2098#ifndef ELF_HWCAP
2099#define ELF_HWCAP 0
2100#endif
2101
7c4ee5bc
RH		 2102#ifndef STACK_GROWS_DOWN
2103#define STACK_GROWS_DOWN 1
2104#endif
2105
2106#ifndef STACK_ALIGNMENT
2107#define STACK_ALIGNMENT 16
2108#endif
2109
992f48a0 2110#ifdef TARGET_ABI32
cb33da57 2111#undef ELF_CLASS
992f48a0 2112#define ELF_CLASS ELFCLASS32
cb33da57
BS		 2113#undef bswaptls
2114#define bswaptls(ptr) bswap32s(ptr)
2115#endif
2116
872f3d04
RH		 2117#ifndef EXSTACK_DEFAULT
2118#define EXSTACK_DEFAULT false
2119#endif
2120
31e31b8a 2121#include "elf.h"
09bfb054 2122
e8384b37
RH		 2123/* We must delay the following stanzas until after "elf.h". */
2124#if defined(TARGET_AARCH64)
2125
2126static bool arch_parse_elf_property(uint32_t pr_type, uint32_t pr_datasz,
2127 const uint32_t *data,
2128 struct image_info *info,
2129 Error **errp)
2130{
2131 if (pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND) {
2132 if (pr_datasz != sizeof(uint32_t)) {
2133 error_setg(errp, "Ill-formed GNU_PROPERTY_AARCH64_FEATURE_1_AND");
2134 return false;
2135 }
2136 /* We will extract GNU_PROPERTY_AARCH64_FEATURE_1_BTI later. */
2137 info->note_flags = *data;
2138 }
2139 return true;
2140}
2141#define ARCH_USE_GNU_PROPERTY 1
2142
2143#else
2144
83f990eb
RH		 2145static bool arch_parse_elf_property(uint32_t pr_type, uint32_t pr_datasz,
2146 const uint32_t *data,
2147 struct image_info *info,
2148 Error **errp)
2149{
2150 g_assert_not_reached();
2151}
2152#define ARCH_USE_GNU_PROPERTY 0
2153
e8384b37
RH		 2154#endif
2155
09bfb054
FB		 2156struct exec
2157{
d97ef72e
RH		 2158 unsigned int a_info; /* Use macros N_MAGIC, etc for access */
2159 unsigned int a_text; /* length of text, in bytes */
2160 unsigned int a_data; /* length of data, in bytes */
2161 unsigned int a_bss; /* length of uninitialized data area, in bytes */
2162 unsigned int a_syms; /* length of symbol table data in file, in bytes */
2163 unsigned int a_entry; /* start address */
2164 unsigned int a_trsize; /* length of relocation info for text, in bytes */
2165 unsigned int a_drsize; /* length of relocation info for data, in bytes */
09bfb054
FB		 2166};
2167
2168
2169#define N_MAGIC(exec) ((exec).a_info & 0xffff)
2170#define OMAGIC 0407
2171#define NMAGIC 0410
2172#define ZMAGIC 0413
2173#define QMAGIC 0314
2174
e0d1673d 2175#define DLINFO_ITEMS 16
31e31b8a 2176
09bfb054
FB		 2177static inline void memcpy_fromfs(void * to, const void * from, unsigned long n)
2178{
d97ef72e 2179 memcpy(to, from, n);
09bfb054 2180}
d691f669 2181
31e31b8a 2182#ifdef BSWAP_NEEDED
92a31b1f 2183static void bswap_ehdr(struct elfhdr *ehdr)
31e31b8a 2184{
d97ef72e
RH		 2185 bswap16s(&ehdr->e_type); /* Object file type */
2186 bswap16s(&ehdr->e_machine); /* Architecture */
2187 bswap32s(&ehdr->e_version); /* Object file version */
2188 bswaptls(&ehdr->e_entry); /* Entry point virtual address */
2189 bswaptls(&ehdr->e_phoff); /* Program header table file offset */
2190 bswaptls(&ehdr->e_shoff); /* Section header table file offset */
2191 bswap32s(&ehdr->e_flags); /* Processor-specific flags */
2192 bswap16s(&ehdr->e_ehsize); /* ELF header size in bytes */
2193 bswap16s(&ehdr->e_phentsize); /* Program header table entry size */
2194 bswap16s(&ehdr->e_phnum); /* Program header table entry count */
2195 bswap16s(&ehdr->e_shentsize); /* Section header table entry size */
2196 bswap16s(&ehdr->e_shnum); /* Section header table entry count */
2197 bswap16s(&ehdr->e_shstrndx); /* Section header string table index */
31e31b8a
FB		 2198}
2199
991f8f0c 2200static void bswap_phdr(struct elf_phdr *phdr, int phnum)
31e31b8a 2201{
991f8f0c
RH		 2202 int i;
2203 for (i = 0; i < phnum; ++i, ++phdr) {
2204 bswap32s(&phdr->p_type); /* Segment type */
2205 bswap32s(&phdr->p_flags); /* Segment flags */
2206 bswaptls(&phdr->p_offset); /* Segment file offset */
2207 bswaptls(&phdr->p_vaddr); /* Segment virtual address */
2208 bswaptls(&phdr->p_paddr); /* Segment physical address */
2209 bswaptls(&phdr->p_filesz); /* Segment size in file */
2210 bswaptls(&phdr->p_memsz); /* Segment size in memory */
2211 bswaptls(&phdr->p_align); /* Segment alignment */
2212 }
31e31b8a 2213}
689f936f 2214
991f8f0c 2215static void bswap_shdr(struct elf_shdr *shdr, int shnum)
689f936f 2216{
991f8f0c
RH		 2217 int i;
2218 for (i = 0; i < shnum; ++i, ++shdr) {
2219 bswap32s(&shdr->sh_name);
2220 bswap32s(&shdr->sh_type);
2221 bswaptls(&shdr->sh_flags);
2222 bswaptls(&shdr->sh_addr);
2223 bswaptls(&shdr->sh_offset);
2224 bswaptls(&shdr->sh_size);
2225 bswap32s(&shdr->sh_link);
2226 bswap32s(&shdr->sh_info);
2227 bswaptls(&shdr->sh_addralign);
2228 bswaptls(&shdr->sh_entsize);
2229 }
689f936f
FB		 2230}
2231
7a3148a9 2232static void bswap_sym(struct elf_sym *sym)
689f936f
FB		 2233{
2234 bswap32s(&sym->st_name);
7a3148a9
JM		 2235 bswaptls(&sym->st_value);
2236 bswaptls(&sym->st_size);
689f936f
FB		 2237 bswap16s(&sym->st_shndx);
2238}
5dd0db52
SM		 2239
2240#ifdef TARGET_MIPS
2241static void bswap_mips_abiflags(Mips_elf_abiflags_v0 *abiflags)
2242{
2243 bswap16s(&abiflags->version);
2244 bswap32s(&abiflags->ases);
2245 bswap32s(&abiflags->isa_ext);
2246 bswap32s(&abiflags->flags1);
2247 bswap32s(&abiflags->flags2);
2248}
2249#endif
991f8f0c
RH		 2250#else
2251static inline void bswap_ehdr(struct elfhdr *ehdr) { }
2252static inline void bswap_phdr(struct elf_phdr *phdr, int phnum) { }
2253static inline void bswap_shdr(struct elf_shdr *shdr, int shnum) { }
2254static inline void bswap_sym(struct elf_sym *sym) { }
5dd0db52
SM		 2255#ifdef TARGET_MIPS
2256static inline void bswap_mips_abiflags(Mips_elf_abiflags_v0 *abiflags) { }
2257#endif
31e31b8a
FB		 2258#endif
2259
edf8e2af 2260#ifdef USE_ELF_CORE_DUMP
9349b4f9 2261static int elf_core_dump(int, const CPUArchState *);
edf8e2af 2262#endif /* USE_ELF_CORE_DUMP */
86cf82dc
RH		 2263static void load_symbols(struct elfhdr *hdr, const ImageSource *src,
2264 abi_ulong load_bias);
edf8e2af 2265
9058abdd
RH		 2266/* Verify the portions of EHDR within E_IDENT for the target.
2267 This can be performed before bswapping the entire header. */
2268static bool elf_check_ident(struct elfhdr *ehdr)
2269{
2270 return (ehdr->e_ident[EI_MAG0] == ELFMAG0
2271 && ehdr->e_ident[EI_MAG1] == ELFMAG1
2272 && ehdr->e_ident[EI_MAG2] == ELFMAG2
2273 && ehdr->e_ident[EI_MAG3] == ELFMAG3
2274 && ehdr->e_ident[EI_CLASS] == ELF_CLASS
2275 && ehdr->e_ident[EI_DATA] == ELF_DATA
2276 && ehdr->e_ident[EI_VERSION] == EV_CURRENT);
2277}
2278
2279/* Verify the portions of EHDR outside of E_IDENT for the target.
2280 This has to wait until after bswapping the header. */
2281static bool elf_check_ehdr(struct elfhdr *ehdr)
2282{
2283 return (elf_check_arch(ehdr->e_machine)
ace3d654 2284 && elf_check_abi(ehdr->e_flags)
9058abdd
RH		 2285 && ehdr->e_ehsize == sizeof(struct elfhdr)
2286 && ehdr->e_phentsize == sizeof(struct elf_phdr)
9058abdd
RH		 2287 && (ehdr->e_type == ET_EXEC || ehdr->e_type == ET_DYN));
2288}
2289
31e31b8a 2290/*
e5fe0c52 2291 * 'copy_elf_strings()' copies argument/envelope strings from user
31e31b8a
FB		 2292 * memory to free pages in kernel mem. These are in a format ready
2293 * to be put directly into the top of new user memory.
2294 *
2295 */
59baae9a
SB		 2296static abi_ulong copy_elf_strings(int argc, char **argv, char *scratch,
2297 abi_ulong p, abi_ulong stack_limit)
31e31b8a 2298{
59baae9a 2299 char *tmp;
7c4ee5bc 2300 int len, i;
59baae9a 2301 abi_ulong top = p;
31e31b8a
FB		 2302
2303 if (!p) {
d97ef72e 2304 return 0; /* bullet-proofing */
31e31b8a 2305 }
59baae9a 2306
7c4ee5bc
RH		 2307 if (STACK_GROWS_DOWN) {
2308 int offset = ((p - 1) % TARGET_PAGE_SIZE) + 1;
2309 for (i = argc - 1; i >= 0; --i) {
2310 tmp = argv[i];
2311 if (!tmp) {
2312 fprintf(stderr, "VFS: argc is wrong");
2313 exit(-1);
2314 }
2315 len = strlen(tmp) + 1;
2316 tmp += len;
59baae9a 2317
7c4ee5bc
RH		 2318 if (len > (p - stack_limit)) {
2319 return 0;
2320 }
2321 while (len) {
2322 int bytes_to_copy = (len > offset) ? offset : len;
2323 tmp -= bytes_to_copy;
2324 p -= bytes_to_copy;
2325 offset -= bytes_to_copy;
2326 len -= bytes_to_copy;
2327
2328 memcpy_fromfs(scratch + offset, tmp, bytes_to_copy);
2329
2330 if (offset == 0) {
2331 memcpy_to_target(p, scratch, top - p);
2332 top = p;
2333 offset = TARGET_PAGE_SIZE;
2334 }
2335 }
d97ef72e 2336 }
7c4ee5bc
RH		 2337 if (p != top) {
2338 memcpy_to_target(p, scratch + offset, top - p);
d97ef72e 2339 }
7c4ee5bc
RH		 2340 } else {
2341 int remaining = TARGET_PAGE_SIZE - (p % TARGET_PAGE_SIZE);
2342 for (i = 0; i < argc; ++i) {
2343 tmp = argv[i];
2344 if (!tmp) {
2345 fprintf(stderr, "VFS: argc is wrong");
2346 exit(-1);
2347 }
2348 len = strlen(tmp) + 1;
2349 if (len > (stack_limit - p)) {
2350 return 0;
2351 }
2352 while (len) {
2353 int bytes_to_copy = (len > remaining) ? remaining : len;
2354
2355 memcpy_fromfs(scratch + (p - top), tmp, bytes_to_copy);
2356
2357 tmp += bytes_to_copy;
2358 remaining -= bytes_to_copy;
2359 p += bytes_to_copy;
2360 len -= bytes_to_copy;
2361
2362 if (remaining == 0) {
2363 memcpy_to_target(top, scratch, p - top);
2364 top = p;
2365 remaining = TARGET_PAGE_SIZE;
2366 }
d97ef72e
RH		 2367 }
2368 }
7c4ee5bc
RH		 2369 if (p != top) {
2370 memcpy_to_target(top, scratch, p - top);
2371 }
59baae9a
SB		 2372 }
2373
31e31b8a
FB		 2374 return p;
2375}
2376
59baae9a
SB		 2377/* Older linux kernels provide up to MAX_ARG_PAGES (default: 32) of
2378 * argument/environment space. Newer kernels (>2.6.33) allow more,
2379 * dependent on stack size, but guarantee at least 32 pages for
2380 * backwards compatibility.
2381 */
2382#define STACK_LOWER_LIMIT (32 * TARGET_PAGE_SIZE)
2383
2384static abi_ulong setup_arg_pages(struct linux_binprm *bprm,
992f48a0 2385 struct image_info *info)
53a5960a 2386{
59baae9a 2387 abi_ulong size, error, guard;
872f3d04 2388 int prot;
31e31b8a 2389
703e0e89 2390 size = guest_stack_size;
59baae9a
SB		 2391 if (size < STACK_LOWER_LIMIT) {
2392 size = STACK_LOWER_LIMIT;
60dcbcb5 2393 }
f4388205
HD		 2394
2395 if (STACK_GROWS_DOWN) {
2396 guard = TARGET_PAGE_SIZE;
2397 if (guard < qemu_real_host_page_size()) {
2398 guard = qemu_real_host_page_size();
2399 }
2400 } else {
2401 /* no guard page for hppa target where stack grows upwards. */
2402 guard = 0;
60dcbcb5
RH		 2403 }
2404
872f3d04
RH		 2405 prot = PROT_READ | PROT_WRITE;
2406 if (info->exec_stack) {
2407 prot |= PROT_EXEC;
2408 }
2409 error = target_mmap(0, size + guard, prot,
60dcbcb5 2410 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
09bfb054 2411 if (error == -1) {
60dcbcb5 2412 perror("mmap stack");
09bfb054
FB		 2413 exit(-1);
2414 }
31e31b8a 2415
60dcbcb5 2416 /* We reserve one extra page at the top of the stack as guard. */
7c4ee5bc
RH		 2417 if (STACK_GROWS_DOWN) {
2418 target_mprotect(error, guard, PROT_NONE);
2419 info->stack_limit = error + guard;
2420 return info->stack_limit + size - sizeof(void *);
2421 } else {
7c4ee5bc
RH		 2422 info->stack_limit = error + size;
2423 return error;
2424 }
31e31b8a
FB		 2425}
2426
2d385be6
RH		 2427/**
2428 * zero_bss:
2429 *
2430 * Map and zero the bss. We need to explicitly zero any fractional pages
2431 * after the data section (i.e. bss). Return false on mapping failure.
2432 */
e6e66b03
RH		 2433static bool zero_bss(abi_ulong start_bss, abi_ulong end_bss,
2434 int prot, Error **errp)
2d385be6
RH		 2435{
2436 abi_ulong align_bss;
853d6f7a 2437
e6e66b03
RH		 2438 /* We only expect writable bss; the code segment shouldn't need this. */
2439 if (!(prot & PROT_WRITE)) {
2440 error_setg(errp, "PT_LOAD with non-writable bss");
2441 return false;
2442 }
2443
2d385be6
RH		 2444 align_bss = TARGET_PAGE_ALIGN(start_bss);
2445 end_bss = TARGET_PAGE_ALIGN(end_bss);
2446
2447 if (start_bss < align_bss) {
2448 int flags = page_get_flags(start_bss);
31e31b8a 2449
e6e66b03
RH		 2450 if (!(flags & PAGE_BITS)) {
2451 /*
2452 * The whole address space of the executable was reserved
2453 * at the start, therefore all pages will be VALID.
2454 * But assuming there are no PROT_NONE PT_LOAD segments,
2455 * a PROT_NONE page means no data all bss, and we can
2456 * simply extend the new anon mapping back to the start
2457 * of the page of bss.
2458 */
2d385be6 2459 align_bss -= TARGET_PAGE_SIZE;
2d385be6 2460 } else {
e6e66b03
RH		 2461 /*
2462 * The start of the bss shares a page with something.
2463 * The only thing that we expect is the data section,
2464 * which would already be marked writable.
2465 * Overlapping the RX code segment seems malformed.
2466 */
2467 if (!(flags & PAGE_WRITE)) {
2468 error_setg(errp, "PT_LOAD with bss overlapping "
2469 "non-writable page");
2470 return false;
2471 }
2472
2473 /* The page is already mapped and writable. */
2474 memset(g2h_untagged(start_bss), 0, align_bss - start_bss);
2d385be6 2475 }
cf129f3a 2476 }
2d385be6 2477
e6e66b03
RH		 2478 if (align_bss < end_bss &&
2479 target_mmap(align_bss, end_bss - align_bss, prot,
2480 MAP_FIXED | MAP_PRIVATE | MAP_ANON, -1, 0) == -1) {
2481 error_setg_errno(errp, errno, "Error mapping bss");
2482 return false;
2483 }
2484 return true;
cf129f3a 2485}
53a5960a 2486
d2796be6 2487#if defined(TARGET_ARM)
cf58affe
CL		 2488static int elf_is_fdpic(struct elfhdr *exec)
2489{
2490 return exec->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC;
2491}
d2796be6
MF		 2492#elif defined(TARGET_XTENSA)
2493static int elf_is_fdpic(struct elfhdr *exec)
2494{
2495 return exec->e_ident[EI_OSABI] == ELFOSABI_XTENSA_FDPIC;
2496}
cf58affe 2497#else
a99856cd
CL		 2498/* Default implementation, always false. */
2499static int elf_is_fdpic(struct elfhdr *exec)
2500{
2501 return 0;
2502}
cf58affe 2503#endif
a99856cd 2504
1af02e83
MF		 2505static abi_ulong loader_build_fdpic_loadmap(struct image_info *info, abi_ulong sp)
2506{
2507 uint16_t n;
2508 struct elf32_fdpic_loadseg *loadsegs = info->loadsegs;
2509
2510 /* elf32_fdpic_loadseg */
2511 n = info->nsegs;
2512 while (n--) {
2513 sp -= 12;
2514 put_user_u32(loadsegs[n].addr, sp+0);
2515 put_user_u32(loadsegs[n].p_vaddr, sp+4);
2516 put_user_u32(loadsegs[n].p_memsz, sp+8);
2517 }
2518
2519 /* elf32_fdpic_loadmap */
2520 sp -= 4;
2521 put_user_u16(0, sp+0); /* version */
2522 put_user_u16(info->nsegs, sp+2); /* nsegs */
2523
2524 info->personality = PER_LINUX_FDPIC;
2525 info->loadmap_addr = sp;
2526
2527 return sp;
2528}
1af02e83 2529
992f48a0 2530static abi_ulong create_elf_tables(abi_ulong p, int argc, int envc,
8e62a717
RH		 2531 struct elfhdr *exec,
2532 struct image_info *info,
c40f621a
RH		 2533 struct image_info *interp_info,
2534 struct image_info *vdso_info)
31e31b8a 2535{
d97ef72e 2536 abi_ulong sp;
7c4ee5bc 2537 abi_ulong u_argc, u_argv, u_envp, u_auxv;
d97ef72e 2538 int size;
14322bad
LA		 2539 int i;
2540 abi_ulong u_rand_bytes;
2541 uint8_t k_rand_bytes[16];
fcdc0ab4
JY		 2542 abi_ulong u_platform, u_base_platform;
2543 const char *k_platform, *k_base_platform;
d97ef72e
RH		 2544 const int n = sizeof(elf_addr_t);
2545
2546 sp = p;
1af02e83 2547
1af02e83
MF		 2548 /* Needs to be before we load the env/argc/... */
2549 if (elf_is_fdpic(exec)) {
2550 /* Need 4 byte alignment for these structs */
2551 sp &= ~3;
2552 sp = loader_build_fdpic_loadmap(info, sp);
2553 info->other_info = interp_info;
2554 if (interp_info) {
2555 interp_info->other_info = info;
2556 sp = loader_build_fdpic_loadmap(interp_info, sp);
3cb10cfa
CL		 2557 info->interpreter_loadmap_addr = interp_info->loadmap_addr;
2558 info->interpreter_pt_dynamic_addr = interp_info->pt_dynamic_addr;
2559 } else {
2560 info->interpreter_loadmap_addr = 0;
2561 info->interpreter_pt_dynamic_addr = 0;
1af02e83
MF		 2562 }
2563 }
1af02e83 2564
fcdc0ab4
JY		 2565 u_base_platform = 0;
2566 k_base_platform = ELF_BASE_PLATFORM;
2567 if (k_base_platform) {
2568 size_t len = strlen(k_base_platform) + 1;
2569 if (STACK_GROWS_DOWN) {
2570 sp -= (len + n - 1) & ~(n - 1);
2571 u_base_platform = sp;
2572 /* FIXME - check return value of memcpy_to_target() for failure */
2573 memcpy_to_target(sp, k_base_platform, len);
2574 } else {
2575 memcpy_to_target(sp, k_base_platform, len);
2576 u_base_platform = sp;
2577 sp += len + 1;
2578 }
2579 }
2580
d97ef72e
RH		 2581 u_platform = 0;
2582 k_platform = ELF_PLATFORM;
2583 if (k_platform) {
2584 size_t len = strlen(k_platform) + 1;
7c4ee5bc
RH		 2585 if (STACK_GROWS_DOWN) {
2586 sp -= (len + n - 1) & ~(n - 1);
2587 u_platform = sp;
2588 /* FIXME - check return value of memcpy_to_target() for failure */
2589 memcpy_to_target(sp, k_platform, len);
2590 } else {
2591 memcpy_to_target(sp, k_platform, len);
2592 u_platform = sp;
2593 sp += len + 1;
2594 }
2595 }
2596
2597 /* Provide 16 byte alignment for the PRNG, and basic alignment for
2598 * the argv and envp pointers.
2599 */
2600 if (STACK_GROWS_DOWN) {
2601 sp = QEMU_ALIGN_DOWN(sp, 16);
2602 } else {
2603 sp = QEMU_ALIGN_UP(sp, 16);
d97ef72e 2604 }
14322bad
LA		 2605
2606 /*
c6a2377f 2607 * Generate 16 random bytes for userspace PRNG seeding.
14322bad 2608 */
c6a2377f 2609 qemu_guest_getrandom_nofail(k_rand_bytes, sizeof(k_rand_bytes));
7c4ee5bc
RH		 2610 if (STACK_GROWS_DOWN) {
2611 sp -= 16;
2612 u_rand_bytes = sp;
2613 /* FIXME - check return value of memcpy_to_target() for failure */
2614 memcpy_to_target(sp, k_rand_bytes, 16);
2615 } else {
2616 memcpy_to_target(sp, k_rand_bytes, 16);
2617 u_rand_bytes = sp;
2618 sp += 16;
2619 }
14322bad 2620
d97ef72e 2621 size = (DLINFO_ITEMS + 1) * 2;
c40f621a 2622 if (k_base_platform) {
fcdc0ab4 2623 size += 2;
c40f621a
RH		 2624 }
2625 if (k_platform) {
fcdc0ab4 2626 size += 2;
c40f621a
RH		 2627 }
2628 if (vdso_info) {
d97ef72e 2629 size += 2;
c40f621a 2630 }
f5155289 2631#ifdef DLINFO_ARCH_ITEMS
d97ef72e 2632 size += DLINFO_ARCH_ITEMS * 2;
ad6919dc
PM		 2633#endif
2634#ifdef ELF_HWCAP2
2635 size += 2;
f5155289 2636#endif
f516511e
PM		 2637 info->auxv_len = size * n;
2638
d97ef72e 2639 size += envc + argc + 2;
b9329d4b 2640 size += 1; /* argc itself */
d97ef72e 2641 size *= n;
7c4ee5bc
RH		 2642
2643 /* Allocate space and finalize stack alignment for entry now. */
2644 if (STACK_GROWS_DOWN) {
2645 u_argc = QEMU_ALIGN_DOWN(sp - size, STACK_ALIGNMENT);
2646 sp = u_argc;
2647 } else {
2648 u_argc = sp;
2649 sp = QEMU_ALIGN_UP(sp + size, STACK_ALIGNMENT);
2650 }
2651
2652 u_argv = u_argc + n;
2653 u_envp = u_argv + (argc + 1) * n;
2654 u_auxv = u_envp + (envc + 1) * n;
2655 info->saved_auxv = u_auxv;
60f1c801
RH		 2656 info->argc = argc;
2657 info->envc = envc;
2658 info->argv = u_argv;
2659 info->envp = u_envp;
d97ef72e
RH		 2660
2661 /* This is correct because Linux defines
2662 * elf_addr_t as Elf32_Off / Elf64_Off
2663 */
2664#define NEW_AUX_ENT(id, val) do { \
7c4ee5bc
RH		 2665 put_user_ual(id, u_auxv); u_auxv += n; \
2666 put_user_ual(val, u_auxv); u_auxv += n; \
d97ef72e
RH		 2667 } while(0)
2668
82991bed
PM		 2669#ifdef ARCH_DLINFO
2670 /*
2671 * ARCH_DLINFO must come first so platform specific code can enforce
2672 * special alignment requirements on the AUXV if necessary (eg. PPC).
2673 */
2674 ARCH_DLINFO;
2675#endif
f516511e
PM		 2676 /* There must be exactly DLINFO_ITEMS entries here, or the assert
2677 * on info->auxv_len will trigger.
2678 */
8e62a717 2679 NEW_AUX_ENT(AT_PHDR, (abi_ulong)(info->load_addr + exec->e_phoff));
d97ef72e
RH		 2680 NEW_AUX_ENT(AT_PHENT, (abi_ulong)(sizeof (struct elf_phdr)));
2681 NEW_AUX_ENT(AT_PHNUM, (abi_ulong)(exec->e_phnum));
33143c44
LV		 2682 if ((info->alignment & ~qemu_host_page_mask) != 0) {
2683 /* Target doesn't support host page size alignment */
2684 NEW_AUX_ENT(AT_PAGESZ, (abi_ulong)(TARGET_PAGE_SIZE));
2685 } else {
2686 NEW_AUX_ENT(AT_PAGESZ, (abi_ulong)(MAX(TARGET_PAGE_SIZE,
2687 qemu_host_page_size)));
2688 }
8e62a717 2689 NEW_AUX_ENT(AT_BASE, (abi_ulong)(interp_info ? interp_info->load_addr : 0));
d97ef72e 2690 NEW_AUX_ENT(AT_FLAGS, (abi_ulong)0);
8e62a717 2691 NEW_AUX_ENT(AT_ENTRY, info->entry);
d97ef72e
RH		 2692 NEW_AUX_ENT(AT_UID, (abi_ulong) getuid());
2693 NEW_AUX_ENT(AT_EUID, (abi_ulong) geteuid());
2694 NEW_AUX_ENT(AT_GID, (abi_ulong) getgid());
2695 NEW_AUX_ENT(AT_EGID, (abi_ulong) getegid());
2696 NEW_AUX_ENT(AT_HWCAP, (abi_ulong) ELF_HWCAP);
2697 NEW_AUX_ENT(AT_CLKTCK, (abi_ulong) sysconf(_SC_CLK_TCK));
14322bad 2698 NEW_AUX_ENT(AT_RANDOM, (abi_ulong) u_rand_bytes);
444cd5c3 2699 NEW_AUX_ENT(AT_SECURE, (abi_ulong) qemu_getauxval(AT_SECURE));
e0d1673d 2700 NEW_AUX_ENT(AT_EXECFN, info->file_string);
14322bad 2701
ad6919dc
PM		 2702#ifdef ELF_HWCAP2
2703 NEW_AUX_ENT(AT_HWCAP2, (abi_ulong) ELF_HWCAP2);
2704#endif
2705
fcdc0ab4
JY		 2706 if (u_base_platform) {
2707 NEW_AUX_ENT(AT_BASE_PLATFORM, u_base_platform);
2708 }
7c4ee5bc 2709 if (u_platform) {
d97ef72e 2710 NEW_AUX_ENT(AT_PLATFORM, u_platform);
7c4ee5bc 2711 }
c40f621a
RH		 2712 if (vdso_info) {
2713 NEW_AUX_ENT(AT_SYSINFO_EHDR, vdso_info->load_addr);
2714 }
7c4ee5bc 2715 NEW_AUX_ENT (AT_NULL, 0);
f5155289
FB		 2716#undef NEW_AUX_ENT
2717
f516511e
PM		 2718 /* Check that our initial calculation of the auxv length matches how much
2719 * we actually put into it.
2720 */
2721 assert(info->auxv_len == u_auxv - info->saved_auxv);
7c4ee5bc
RH		 2722
2723 put_user_ual(argc, u_argc);
2724
2725 p = info->arg_strings;
2726 for (i = 0; i < argc; ++i) {
2727 put_user_ual(p, u_argv);
2728 u_argv += n;
2729 p += target_strlen(p) + 1;
2730 }
2731 put_user_ual(0, u_argv);
2732
2733 p = info->env_strings;
2734 for (i = 0; i < envc; ++i) {
2735 put_user_ual(p, u_envp);
2736 u_envp += n;
2737 p += target_strlen(p) + 1;
2738 }
2739 put_user_ual(0, u_envp);
edf8e2af 2740
d97ef72e 2741 return sp;
31e31b8a
FB		 2742}
2743
f5ef0e51 2744#if defined(HI_COMMPAGE)
eee816c0 2745#define LO_COMMPAGE -1
f5ef0e51
RH		 2746#elif defined(LO_COMMPAGE)
2747#define HI_COMMPAGE 0
2748#else
66346faf 2749#define HI_COMMPAGE 0
eee816c0 2750#define LO_COMMPAGE -1
d461b73e 2751#ifndef INIT_GUEST_COMMPAGE
ee947430 2752#define init_guest_commpage() true
8756e136 2753#endif
d461b73e 2754#endif
dce10401 2755
06f38c66
RH		 2756/**
2757 * pgb_try_mmap:
2758 * @addr: host start address
2759 * @addr_last: host last address
2760 * @keep: do not unmap the probe region
2761 *
2762 * Return 1 if [@addr, @addr_last] is not mapped in the host,
2763 * return 0 if it is not available to map, and -1 on mmap error.
2764 * If @keep, the region is left mapped on success, otherwise unmapped.
2765 */
2766static int pgb_try_mmap(uintptr_t addr, uintptr_t addr_last, bool keep)
2767{
2768 size_t size = addr_last - addr + 1;
2769 void *p = mmap((void *)addr, size, PROT_NONE,
2770 MAP_ANONYMOUS | MAP_PRIVATE |
2771 MAP_NORESERVE | MAP_FIXED_NOREPLACE, -1, 0);
2772 int ret;
2773
2774 if (p == MAP_FAILED) {
2775 return errno == EEXIST ? 0 : -1;
2776 }
2777 ret = p == (void *)addr;
2778 if (!keep || !ret) {
2779 munmap(p, size);
2780 }
2781 return ret;
2782}
2783
2784/**
2785 * pgb_try_mmap_skip_brk(uintptr_t addr, uintptr_t size, uintptr_t brk)
2786 * @addr: host address
2787 * @addr_last: host last address
2788 * @brk: host brk
2789 *
2790 * Like pgb_try_mmap, but additionally reserve some memory following brk.
2791 */
2792static int pgb_try_mmap_skip_brk(uintptr_t addr, uintptr_t addr_last,
2793 uintptr_t brk, bool keep)
2794{
2795 uintptr_t brk_last = brk + 16 * MiB - 1;
2796
2797 /* Do not map anything close to the host brk. */
2798 if (addr <= brk_last && brk <= addr_last) {
2799 return 0;
2800 }
2801 return pgb_try_mmap(addr, addr_last, keep);
2802}
2803
2804/**
2805 * pgb_try_mmap_set:
2806 * @ga: set of guest addrs
2807 * @base: guest_base
2808 * @brk: host brk
2809 *
2810 * Return true if all @ga can be mapped by the host at @base.
2811 * On success, retain the mapping at index 0 for reserved_va.
2812 */
2813
2814typedef struct PGBAddrs {
2815 uintptr_t bounds[3][2]; /* start/last pairs */
2816 int nbounds;
2817} PGBAddrs;
2818
2819static bool pgb_try_mmap_set(const PGBAddrs *ga, uintptr_t base, uintptr_t brk)
2820{
2821 for (int i = ga->nbounds - 1; i >= 0; --i) {
2822 if (pgb_try_mmap_skip_brk(ga->bounds[i][0] + base,
2823 ga->bounds[i][1] + base,
2824 brk, i == 0 && reserved_va) <= 0) {
2825 return false;
2826 }
2827 }
2828 return true;
2829}
2830
2831/**
2832 * pgb_addr_set:
2833 * @ga: output set of guest addrs
2834 * @guest_loaddr: guest image low address
2835 * @guest_loaddr: guest image high address
2836 * @identity: create for identity mapping
2837 *
2838 * Fill in @ga with the image, COMMPAGE and NULL page.
2839 */
2840static bool pgb_addr_set(PGBAddrs *ga, abi_ulong guest_loaddr,
2841 abi_ulong guest_hiaddr, bool try_identity)
2842{
2843 int n;
2844
2845 /*
2846 * With a low commpage, or a guest mapped very low,
2847 * we may not be able to use the identity map.
2848 */
2849 if (try_identity) {
2850 if (LO_COMMPAGE != -1 && LO_COMMPAGE < mmap_min_addr) {
2851 return false;
2852 }
2853 if (guest_loaddr != 0 && guest_loaddr < mmap_min_addr) {
2854 return false;
2855 }
2856 }
2857
2858 memset(ga, 0, sizeof(*ga));
2859 n = 0;
2860
2861 if (reserved_va) {
2862 ga->bounds[n][0] = try_identity ? mmap_min_addr : 0;
2863 ga->bounds[n][1] = reserved_va;
2864 n++;
2865 /* LO_COMMPAGE and NULL handled by reserving from 0. */
2866 } else {
2867 /* Add any LO_COMMPAGE or NULL page. */
2868 if (LO_COMMPAGE != -1) {
2869 ga->bounds[n][0] = 0;
2870 ga->bounds[n][1] = LO_COMMPAGE + TARGET_PAGE_SIZE - 1;
2871 n++;
2872 } else if (!try_identity) {
2873 ga->bounds[n][0] = 0;
2874 ga->bounds[n][1] = TARGET_PAGE_SIZE - 1;
2875 n++;
2876 }
2877
2878 /* Add the guest image for ET_EXEC. */
2879 if (guest_loaddr) {
2880 ga->bounds[n][0] = guest_loaddr;
2881 ga->bounds[n][1] = guest_hiaddr;
2882 n++;
2883 }
2884 }
2885
2886 /*
2887 * Temporarily disable
2888 * "comparison is always false due to limited range of data type"
2889 * due to comparison between unsigned and (possible) 0.
2890 */
2891#pragma GCC diagnostic push
2892#pragma GCC diagnostic ignored "-Wtype-limits"
2893
2894 /* Add any HI_COMMPAGE not covered by reserved_va. */
2895 if (reserved_va < HI_COMMPAGE) {
2896 ga->bounds[n][0] = HI_COMMPAGE & qemu_host_page_mask;
2897 ga->bounds[n][1] = HI_COMMPAGE + TARGET_PAGE_SIZE - 1;
2898 n++;
2899 }
2900
2901#pragma GCC diagnostic pop
2902
2903 ga->nbounds = n;
2904 return true;
2905}
2906
ee947430
AB		 2907static void pgb_fail_in_use(const char *image_name)
2908{
2909 error_report("%s: requires virtual address space that is in use "
2910 "(omit the -B option or choose a different value)",
2911 image_name);
2912 exit(EXIT_FAILURE);
2913}
dce10401 2914
06f38c66
RH		 2915static void pgb_fixed(const char *image_name, uintptr_t guest_loaddr,
2916 uintptr_t guest_hiaddr, uintptr_t align)
ee947430 2917{
06f38c66
RH		 2918 PGBAddrs ga;
2919 uintptr_t brk = (uintptr_t)sbrk(0);
2a53535a 2920
ee947430 2921 if (!QEMU_IS_ALIGNED(guest_base, align)) {
5ca870b9 2922 fprintf(stderr, "Requested guest base %p does not satisfy "
06f38c66 2923 "host minimum alignment (0x%" PRIxPTR ")\n",
5ca870b9 2924 (void *)guest_base, align);
ee947430
AB		 2925 exit(EXIT_FAILURE);
2926 }
2927
06f38c66
RH		 2928 if (!pgb_addr_set(&ga, guest_loaddr, guest_hiaddr, !guest_base)
2929 || !pgb_try_mmap_set(&ga, guest_base, brk)) {
ee947430
AB		 2930 pgb_fail_in_use(image_name);
2931 }
2932}
2933
ad592e37 2934/**
dd558855 2935 * pgb_find_fallback:
ad592e37 2936 *
dd558855
RH		 2937 * This is a fallback method for finding holes in the host address space
2938 * if we don't have the benefit of being able to access /proc/self/map.
2939 * It can potentially take a very long time as we can only dumbly iterate
2940 * up the host address space seeing if the allocation would work.
ad592e37 2941 */
dd558855
RH		 2942static uintptr_t pgb_find_fallback(const PGBAddrs *ga, uintptr_t align,
2943 uintptr_t brk)
ad592e37 2944{
dd558855
RH		 2945 /* TODO: come up with a better estimate of how much to skip. */
2946 uintptr_t skip = sizeof(uintptr_t) == 4 ? MiB : GiB;
ad592e37 2947
dd558855
RH		 2948 for (uintptr_t base = skip; ; base += skip) {
2949 base = ROUND_UP(base, align);
2950 if (pgb_try_mmap_set(ga, base, brk)) {
2951 return base;
2952 }
2953 if (base >= -skip) {
ad592e37 2954 return -1;
ad592e37
AB		 2955 }
2956 }
2957}
2958
dd558855
RH		 2959static uintptr_t pgb_try_itree(const PGBAddrs *ga, uintptr_t base,
2960 IntervalTreeRoot *root)
ee947430 2961{
dd558855
RH		 2962 for (int i = ga->nbounds - 1; i >= 0; --i) {
2963 uintptr_t s = base + ga->bounds[i][0];
2964 uintptr_t l = base + ga->bounds[i][1];
2965 IntervalTreeNode *n;
dce10401 2966
dd558855
RH		 2967 if (l < s) {
2968 /* Wraparound. Skip to advance S to mmap_min_addr. */
2969 return mmap_min_addr - s;
2970 }
ee947430 2971
dd558855
RH		 2972 n = interval_tree_iter_first(root, s, l);
2973 if (n != NULL) {
2974 /* Conflict. Skip to advance S to LAST + 1. */
2975 return n->last - s + 1;
2976 }
ad592e37 2977 }
dd558855
RH		 2978 return 0; /* success */
2979}
ad592e37 2980
dd558855
RH		 2981static uintptr_t pgb_find_itree(const PGBAddrs *ga, IntervalTreeRoot *root,
2982 uintptr_t align, uintptr_t brk)
2983{
2984 uintptr_t last = mmap_min_addr;
2985 uintptr_t base, skip;
ee947430 2986
dd558855
RH		 2987 while (true) {
2988 base = ROUND_UP(last, align);
2989 if (base < last) {
2990 return -1;
aac362e4
LS		 2991 }
2992
dd558855
RH		 2993 skip = pgb_try_itree(ga, base, root);
2994 if (skip == 0) {
2995 break;
806d1021
MI		 2996 }
2997
dd558855
RH		 2998 last = base + skip;
2999 if (last < base) {
3000 return -1;
dce10401
MI		 3001 }
3002 }
dd558855
RH		 3003
3004 /*
3005 * We've chosen 'base' based on holes in the interval tree,
3006 * but we don't yet know if it is a valid host address.
3007 * Because it is the first matching hole, if the host addresses
3008 * are invalid we know there are no further matches.
3009 */
3010 return pgb_try_mmap_set(ga, base, brk) ? base : -1;
dce10401
MI		 3011}
3012
dd558855
RH		 3013static void pgb_dynamic(const char *image_name, uintptr_t guest_loaddr,
3014 uintptr_t guest_hiaddr, uintptr_t align)
f3ed1f5d 3015{
dd558855
RH		 3016 IntervalTreeRoot *root;
3017 uintptr_t brk, ret;
3018 PGBAddrs ga;
f3ed1f5d 3019
dd558855 3020 assert(QEMU_IS_ALIGNED(guest_loaddr, align));
dce10401 3021
dd558855
RH		 3022 /* Try the identity map first. */
3023 if (pgb_addr_set(&ga, guest_loaddr, guest_hiaddr, true)) {
3024 brk = (uintptr_t)sbrk(0);
3025 if (pgb_try_mmap_set(&ga, 0, brk)) {
3026 guest_base = 0;
3027 return;
3028 }
ee947430
AB		 3029 }
3030
ee947430 3031 /*
dd558855
RH		 3032 * Rebuild the address set for non-identity map.
3033 * This differs in the mapping of the guest NULL page.
ee947430 3034 */
dd558855 3035 pgb_addr_set(&ga, guest_loaddr, guest_hiaddr, false);
ee947430 3036
dd558855
RH		 3037 root = read_self_maps();
3038
3039 /* Read brk after we've read the maps, which will malloc. */
3040 brk = (uintptr_t)sbrk(0);
ee947430 3041
dd558855
RH		 3042 if (!root) {
3043 ret = pgb_find_fallback(&ga, align, brk);
3044 } else {
ee947430 3045 /*
dd558855
RH		 3046 * Reserve the area close to the host brk.
3047 * This will be freed with the rest of the tree.
ee947430 3048 */
dd558855
RH		 3049 IntervalTreeNode *b = g_new0(IntervalTreeNode, 1);
3050 b->start = brk;
3051 b->last = brk + 16 * MiB - 1;
3052 interval_tree_insert(b, root);
ee947430 3053
dd558855
RH		 3054 ret = pgb_find_itree(&ga, root, align, brk);
3055 free_self_maps(root);
3056 }
ee947430 3057
dd558855
RH		 3058 if (ret == -1) {
3059 int w = TARGET_LONG_BITS / 4;
ee947430 3060
dd558855
RH		 3061 error_report("%s: Unable to find a guest_base to satisfy all "
3062 "guest address mapping requirements", image_name);
c1f6ad79 3063
dd558855
RH		 3064 for (int i = 0; i < ga.nbounds; ++i) {
3065 error_printf(" %0*" PRIx64 "-%0*" PRIx64 "\n",
3066 w, (uint64_t)ga.bounds[i][0],
3067 w, (uint64_t)ga.bounds[i][1]);
3068 }
ee947430
AB		 3069 exit(EXIT_FAILURE);
3070 }
dd558855 3071 guest_base = ret;
f3ed1f5d
PM		 3072}
3073
ee947430
AB		 3074void probe_guest_base(const char *image_name, abi_ulong guest_loaddr,
3075 abi_ulong guest_hiaddr)
3076{
3077 /* In order to use host shmat, we must be able to honor SHMLBA. */
3078 uintptr_t align = MAX(SHMLBA, qemu_host_page_size);
3079
0c441aeb
RH		 3080 /* Sanity check the guest binary. */
3081 if (reserved_va) {
3082 if (guest_hiaddr > reserved_va) {
3083 error_report("%s: requires more than reserved virtual "
3084 "address space (0x%" PRIx64 " > 0x%lx)",
3085 image_name, (uint64_t)guest_hiaddr, reserved_va);
3086 exit(EXIT_FAILURE);
3087 }
3088 } else {
3089 if (guest_hiaddr != (uintptr_t)guest_hiaddr) {
3090 error_report("%s: requires more virtual address space "
3091 "than the host can provide (0x%" PRIx64 ")",
3092 image_name, (uint64_t)guest_hiaddr + 1);
3093 exit(EXIT_FAILURE);
3094 }
3095 }
3096
ee947430 3097 if (have_guest_base) {
06f38c66 3098 pgb_fixed(image_name, guest_loaddr, guest_hiaddr, align);
ee947430 3099 } else {
dd558855 3100 pgb_dynamic(image_name, guest_loaddr, guest_hiaddr, align);
ee947430
AB		 3101 }
3102
3103 /* Reserve and initialize the commpage. */
3104 if (!init_guest_commpage()) {
06f38c66
RH		 3105 /* We have already probed for the commpage being free. */
3106 g_assert_not_reached();
ee947430
AB		 3107 }
3108
3109 assert(QEMU_IS_ALIGNED(guest_base, align));
3110 qemu_log_mask(CPU_LOG_PAGE, "Locating guest address space "
3111 "@ 0x%" PRIx64 "\n", (uint64_t)guest_base);
3112}
f3ed1f5d 3113
83f990eb
RH		 3114enum {
3115 /* The string "GNU\0" as a magic number. */
3116 GNU0_MAGIC = const_le32('G' | 'N' << 8 | 'U' << 16),
3117 NOTE_DATA_SZ = 1 * KiB,
3118 NOTE_NAME_SZ = 4,
3119 ELF_GNU_PROPERTY_ALIGN = ELF_CLASS == ELFCLASS32 ? 4 : 8,
3120};
3121
3122/*
3123 * Process a single gnu_property entry.
3124 * Return false for error.
3125 */
3126static bool parse_elf_property(const uint32_t *data, int *off, int datasz,
3127 struct image_info *info, bool have_prev_type,
3128 uint32_t *prev_type, Error **errp)
3129{
3130 uint32_t pr_type, pr_datasz, step;
3131
3132 if (*off > datasz || !QEMU_IS_ALIGNED(*off, ELF_GNU_PROPERTY_ALIGN)) {
3133 goto error_data;
3134 }
3135 datasz -= *off;
3136 data += *off / sizeof(uint32_t);
3137
3138 if (datasz < 2 * sizeof(uint32_t)) {
3139 goto error_data;
3140 }
3141 pr_type = data[0];
3142 pr_datasz = data[1];
3143 data += 2;
3144 datasz -= 2 * sizeof(uint32_t);
3145 step = ROUND_UP(pr_datasz, ELF_GNU_PROPERTY_ALIGN);
3146 if (step > datasz) {
3147 goto error_data;
3148 }
3149
3150 /* Properties are supposed to be unique and sorted on pr_type. */
3151 if (have_prev_type && pr_type <= *prev_type) {
3152 if (pr_type == *prev_type) {
3153 error_setg(errp, "Duplicate property in PT_GNU_PROPERTY");
3154 } else {
3155 error_setg(errp, "Unsorted property in PT_GNU_PROPERTY");
3156 }
3157 return false;
3158 }
3159 *prev_type = pr_type;
3160
3161 if (!arch_parse_elf_property(pr_type, pr_datasz, data, info, errp)) {
3162 return false;
3163 }
3164
3165 *off += 2 * sizeof(uint32_t) + step;
3166 return true;
3167
3168 error_data:
3169 error_setg(errp, "Ill-formed property in PT_GNU_PROPERTY");
3170 return false;
3171}
3172
3173/* Process NT_GNU_PROPERTY_TYPE_0. */
3bd02386 3174static bool parse_elf_properties(const ImageSource *src,
83f990eb
RH		 3175 struct image_info *info,
3176 const struct elf_phdr *phdr,
83f990eb
RH		 3177 Error **errp)
3178{
3179 union {
3180 struct elf_note nhdr;
3181 uint32_t data[NOTE_DATA_SZ / sizeof(uint32_t)];
3182 } note;
3183
3184 int n, off, datasz;
3185 bool have_prev_type;
3186 uint32_t prev_type;
3187
3188 /* Unless the arch requires properties, ignore them. */
3189 if (!ARCH_USE_GNU_PROPERTY) {
3190 return true;
3191 }
3192
3193 /* If the properties are crazy large, that's too bad. */
3194 n = phdr->p_filesz;
3195 if (n > sizeof(note)) {
3196 error_setg(errp, "PT_GNU_PROPERTY too large");
3197 return false;
3198 }
3199 if (n < sizeof(note.nhdr)) {
3200 error_setg(errp, "PT_GNU_PROPERTY too small");
3201 return false;
3202 }
3203
3bd02386
RH		 3204 if (!imgsrc_read(&note, phdr->p_offset, n, src, errp)) {
3205 return false;
83f990eb
RH		 3206 }
3207
3208 /*
3209 * The contents of a valid PT_GNU_PROPERTY is a sequence
3210 * of uint32_t -- swap them all now.
3211 */
3212#ifdef BSWAP_NEEDED
3213 for (int i = 0; i < n / 4; i++) {
3214 bswap32s(note.data + i);
3215 }
3216#endif
3217
3218 /*
3219 * Note that nhdr is 3 words, and that the "name" described by namesz
3220 * immediately follows nhdr and is thus at the 4th word. Further, all
3221 * of the inputs to the kernel's round_up are multiples of 4.
3222 */
3223 if (note.nhdr.n_type != NT_GNU_PROPERTY_TYPE_0 ||
3224 note.nhdr.n_namesz != NOTE_NAME_SZ ||
3225 note.data[3] != GNU0_MAGIC) {
3226 error_setg(errp, "Invalid note in PT_GNU_PROPERTY");
3227 return false;
3228 }
3229 off = sizeof(note.nhdr) + NOTE_NAME_SZ;
3230
3231 datasz = note.nhdr.n_descsz + off;
3232 if (datasz > n) {
3233 error_setg(errp, "Invalid note size in PT_GNU_PROPERTY");
3234 return false;
3235 }
3236
3237 have_prev_type = false;
3238 prev_type = 0;
3239 while (1) {
3240 if (off == datasz) {
3241 return true; /* end, exit ok */
3242 }
3243 if (!parse_elf_property(note.data, &off, datasz, info,
3244 have_prev_type, &prev_type, errp)) {
3245 return false;
3246 }
3247 have_prev_type = true;
3248 }
3249}
3250
3bd02386
RH		 3251/**
3252 * load_elf_image: Load an ELF image into the address space.
3253 * @image_name: the filename of the image, to use in error messages.
3254 * @src: the ImageSource from which to read.
3255 * @info: info collected from the loaded image.
3256 * @ehdr: the ELF header, not yet bswapped.
3257 * @pinterp_name: record any PT_INTERP string found.
3258 *
3259 * On return: @info values will be filled in, as necessary or available.
3260 */
8e62a717 3261
3bd02386 3262static void load_elf_image(const char *image_name, const ImageSource *src,
40d487ee 3263 struct image_info *info, struct elfhdr *ehdr,
3bd02386 3264 char **pinterp_name)
31e31b8a 3265{
3bd02386 3266 g_autofree struct elf_phdr *phdr = NULL;
8e62a717 3267 abi_ulong load_addr, load_bias, loaddr, hiaddr, error;
3bd02386 3268 int i, prot_exec;
c7f17e7b 3269 Error *err = NULL;
5fafdf24 3270
3bd02386
RH		 3271 /*
3272 * First of all, some simple consistency checks.
3273 * Note that we rely on the bswapped ehdr staying in bprm_buf,
3274 * for later use by load_elf_binary and create_elf_tables.
3275 */
3276 if (!imgsrc_read(ehdr, 0, sizeof(*ehdr), src, &err)) {
3277 goto exit_errmsg;
3278 }
8e62a717 3279 if (!elf_check_ident(ehdr)) {
c7f17e7b 3280 error_setg(&err, "Invalid ELF image for this architecture");
8e62a717
RH		 3281 goto exit_errmsg;
3282 }
3283 bswap_ehdr(ehdr);
3284 if (!elf_check_ehdr(ehdr)) {
c7f17e7b 3285 error_setg(&err, "Invalid ELF image for this architecture");
8e62a717 3286 goto exit_errmsg;
d97ef72e 3287 }
5fafdf24 3288
3bd02386
RH		 3289 phdr = imgsrc_read_alloc(ehdr->e_phoff,
3290 ehdr->e_phnum * sizeof(struct elf_phdr),
3291 src, &err);
3292 if (phdr == NULL) {
3293 goto exit_errmsg;
d97ef72e 3294 }
8e62a717 3295 bswap_phdr(phdr, ehdr->e_phnum);
09bfb054 3296
1af02e83
MF		 3297 info->nsegs = 0;
3298 info->pt_dynamic_addr = 0;
1af02e83 3299
98c1076c
AB		 3300 mmap_lock();
3301
8a1a5274
RH		 3302 /*
3303 * Find the maximum size of the image and allocate an appropriate
3304 * amount of memory to handle that. Locate the interpreter, if any.
3305 */
682674b8 3306 loaddr = -1, hiaddr = 0;
33143c44 3307 info->alignment = 0;
872f3d04 3308 info->exec_stack = EXSTACK_DEFAULT;
8e62a717 3309 for (i = 0; i < ehdr->e_phnum; ++i) {
4d9d535a
RH		 3310 struct elf_phdr *eppnt = phdr + i;
3311 if (eppnt->p_type == PT_LOAD) {
82d70a84 3312 abi_ulong a = eppnt->p_vaddr & TARGET_PAGE_MASK;
682674b8
RH		 3313 if (a < loaddr) {
3314 loaddr = a;
3315 }
a3a67f54 3316 a = eppnt->p_vaddr + eppnt->p_memsz - 1;
682674b8
RH		 3317 if (a > hiaddr) {
3318 hiaddr = a;
3319 }
1af02e83 3320 ++info->nsegs;
4d9d535a 3321 info->alignment |= eppnt->p_align;
8a1a5274
RH		 3322 } else if (eppnt->p_type == PT_INTERP && pinterp_name) {
3323 g_autofree char *interp_name = NULL;
3324
3325 if (*pinterp_name) {
c7f17e7b 3326 error_setg(&err, "Multiple PT_INTERP entries");
8a1a5274
RH		 3327 goto exit_errmsg;
3328 }
c7f17e7b 3329
3bd02386
RH		 3330 interp_name = imgsrc_read_alloc(eppnt->p_offset, eppnt->p_filesz,
3331 src, &err);
3332 if (interp_name == NULL) {
3333 goto exit_errmsg;
8a1a5274
RH		 3334 }
3335 if (interp_name[eppnt->p_filesz - 1] != 0) {
c7f17e7b 3336 error_setg(&err, "Invalid PT_INTERP entry");
8a1a5274
RH		 3337 goto exit_errmsg;
3338 }
3339 *pinterp_name = g_steal_pointer(&interp_name);
83f990eb 3340 } else if (eppnt->p_type == PT_GNU_PROPERTY) {
3bd02386 3341 if (!parse_elf_properties(src, info, eppnt, &err)) {
83f990eb
RH		 3342 goto exit_errmsg;
3343 }
872f3d04
RH		 3344 } else if (eppnt->p_type == PT_GNU_STACK) {
3345 info->exec_stack = eppnt->p_flags & PF_X;
682674b8
RH		 3346 }
3347 }
3348
1ea06ded
RH		 3349 load_addr = loaddr;
3350
6fd59449 3351 if (pinterp_name != NULL) {
6fd59449
RH		 3352 if (ehdr->e_type == ET_EXEC) {
3353 /*
3354 * Make sure that the low address does not conflict with
3355 * MMAP_MIN_ADDR or the QEMU application itself.
3356 */
3357 probe_guest_base(image_name, loaddr, hiaddr);
ee947430 3358 } else {
1ea06ded
RH		 3359 abi_ulong align;
3360
ee947430
AB		 3361 /*
3362 * The binary is dynamic, but we still need to
3363 * select guest_base. In this case we pass a size.
3364 */
3365 probe_guest_base(image_name, 0, hiaddr - loaddr);
1ea06ded
RH		 3366
3367 /*
3368 * Avoid collision with the loader by providing a different
3369 * default load address.
3370 */
3371 load_addr += elf_et_dyn_base;
3372
3373 /*
3374 * TODO: Better support for mmap alignment is desirable.
3375 * Since we do not have complete control over the guest
3376 * address space, we prefer the kernel to choose some address
3377 * rather than force the use of LOAD_ADDR via MAP_FIXED.
3378 * But without MAP_FIXED we cannot guarantee alignment,
3379 * only suggest it.
3380 */
3381 align = pow2ceil(info->alignment);
3382 if (align) {
3383 load_addr &= -align;
3384 }
d97ef72e 3385 }
6fd59449
RH		 3386 }
3387
3388 /*
3389 * Reserve address space for all of this.
3390 *
ad25051b
RH		 3391 * In the case of ET_EXEC, we supply MAP_FIXED_NOREPLACE so that we get
3392 * exactly the address range that is required. Without reserved_va,
3393 * the guest address space is not isolated. We have attempted to avoid
3394 * conflict with the host program itself via probe_guest_base, but using
3395 * MAP_FIXED_NOREPLACE instead of MAP_FIXED provides an extra check.
6fd59449
RH		 3396 *
3397 * Otherwise this is ET_DYN, and we are searching for a location
3398 * that can hold the memory space required. If the image is
1ea06ded 3399 * pre-linked, LOAD_ADDR will be non-zero, and the kernel should
6fd59449
RH		 3400 * honor that address if it happens to be free.
3401 *
3402 * In both cases, we will overwrite pages in this range with mappings
3403 * from the executable.
3404 */
1ea06ded 3405 load_addr = target_mmap(load_addr, (size_t)hiaddr - loaddr + 1, PROT_NONE,
6fd59449 3406 MAP_PRIVATE | MAP_ANON | MAP_NORESERVE |
ad25051b 3407 (ehdr->e_type == ET_EXEC ? MAP_FIXED_NOREPLACE : 0),
6fd59449
RH		 3408 -1, 0);
3409 if (load_addr == -1) {
c7f17e7b 3410 goto exit_mmap;
d97ef72e 3411 }
682674b8 3412 load_bias = load_addr - loaddr;
d97ef72e 3413
a99856cd 3414 if (elf_is_fdpic(ehdr)) {
1af02e83 3415 struct elf32_fdpic_loadseg *loadsegs = info->loadsegs =
7267c094 3416 g_malloc(sizeof(*loadsegs) * info->nsegs);
1af02e83
MF		 3417
3418 for (i = 0; i < ehdr->e_phnum; ++i) {
3419 switch (phdr[i].p_type) {
3420 case PT_DYNAMIC:
3421 info->pt_dynamic_addr = phdr[i].p_vaddr + load_bias;
3422 break;
3423 case PT_LOAD:
3424 loadsegs->addr = phdr[i].p_vaddr + load_bias;
3425 loadsegs->p_vaddr = phdr[i].p_vaddr;
3426 loadsegs->p_memsz = phdr[i].p_memsz;
3427 ++loadsegs;
3428 break;
3429 }
3430 }
3431 }
1af02e83 3432
8e62a717 3433 info->load_bias = load_bias;
dc12567a
JK		 3434 info->code_offset = load_bias;
3435 info->data_offset = load_bias;
8e62a717
RH		 3436 info->load_addr = load_addr;
3437 info->entry = ehdr->e_entry + load_bias;
3438 info->start_code = -1;
3439 info->end_code = 0;
3440 info->start_data = -1;
3441 info->end_data = 0;
1f356e8c 3442 /* Usual start for brk is after all sections of the main executable. */
aec338d6 3443 info->brk = TARGET_PAGE_ALIGN(hiaddr + load_bias);
d8fd2954 3444 info->elf_flags = ehdr->e_flags;
8e62a717 3445
e8384b37
RH		 3446 prot_exec = PROT_EXEC;
3447#ifdef TARGET_AARCH64
3448 /*
3449 * If the BTI feature is present, this indicates that the executable
3450 * pages of the startup binary should be mapped with PROT_BTI, so that
3451 * branch targets are enforced.
3452 *
3453 * The startup binary is either the interpreter or the static executable.
3454 * The interpreter is responsible for all pages of a dynamic executable.
3455 *
3456 * Elf notes are backward compatible to older cpus.
3457 * Do not enable BTI unless it is supported.
3458 */
3459 if ((info->note_flags & GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
3460 && (pinterp_name == NULL || *pinterp_name == 0)
3461 && cpu_isar_feature(aa64_bti, ARM_CPU(thread_cpu))) {
3462 prot_exec |= TARGET_PROT_BTI;
3463 }
3464#endif
3465
8e62a717
RH		 3466 for (i = 0; i < ehdr->e_phnum; i++) {
3467 struct elf_phdr *eppnt = phdr + i;
d97ef72e 3468 if (eppnt->p_type == PT_LOAD) {
5f4e5b34 3469 abi_ulong vaddr, vaddr_po, vaddr_ps, vaddr_ef, vaddr_em;
d97ef72e 3470 int elf_prot = 0;
d97ef72e 3471
e5eaf570
RH		 3472 if (eppnt->p_flags & PF_R) {
3473 elf_prot |= PROT_READ;
3474 }
3475 if (eppnt->p_flags & PF_W) {
3476 elf_prot |= PROT_WRITE;
3477 }
3478 if (eppnt->p_flags & PF_X) {
e8384b37 3479 elf_prot |= prot_exec;
e5eaf570 3480 }
d97ef72e 3481
682674b8 3482 vaddr = load_bias + eppnt->p_vaddr;
e3d97d5c
RH		 3483 vaddr_po = vaddr & ~TARGET_PAGE_MASK;
3484 vaddr_ps = vaddr & TARGET_PAGE_MASK;
22d113b5
GM		 3485
3486 vaddr_ef = vaddr + eppnt->p_filesz;
3487 vaddr_em = vaddr + eppnt->p_memsz;
682674b8 3488
d87146bc 3489 /*
22d113b5
GM		 3490 * Some segments may be completely empty, with a non-zero p_memsz
3491 * but no backing file segment.
d87146bc
GM		 3492 */
3493 if (eppnt->p_filesz != 0) {
3bd02386 3494 error = imgsrc_mmap(vaddr_ps, eppnt->p_filesz + vaddr_po,
5f4e5b34 3495 elf_prot, MAP_PRIVATE | MAP_FIXED,
3bd02386 3496 src, eppnt->p_offset - vaddr_po);
d87146bc 3497 if (error == -1) {
c7f17e7b 3498 goto exit_mmap;
d87146bc 3499 }
5f4e5b34 3500 }
09bfb054 3501
5f4e5b34
RH		 3502 /* If the load segment requests extra zeros (e.g. bss), map it. */
3503 if (vaddr_ef < vaddr_em &&
e6e66b03
RH		 3504 !zero_bss(vaddr_ef, vaddr_em, elf_prot, &err)) {
3505 goto exit_errmsg;
cf129f3a 3506 }
8e62a717
RH		 3507
3508 /* Find the full program boundaries. */
3509 if (elf_prot & PROT_EXEC) {
3510 if (vaddr < info->start_code) {
3511 info->start_code = vaddr;
3512 }
3513 if (vaddr_ef > info->end_code) {
3514 info->end_code = vaddr_ef;
3515 }
3516 }
3517 if (elf_prot & PROT_WRITE) {
3518 if (vaddr < info->start_data) {
3519 info->start_data = vaddr;
3520 }
3521 if (vaddr_ef > info->end_data) {
3522 info->end_data = vaddr_ef;
3523 }
8a045188 3524 }
5dd0db52
SM		 3525#ifdef TARGET_MIPS
3526 } else if (eppnt->p_type == PT_MIPS_ABIFLAGS) {
3527 Mips_elf_abiflags_v0 abiflags;
3bd02386
RH		 3528
3529 if (!imgsrc_read(&abiflags, eppnt->p_offset, sizeof(abiflags),
3530 src, &err)) {
5dd0db52
SM		 3531 goto exit_errmsg;
3532 }
5dd0db52 3533 bswap_mips_abiflags(&abiflags);
c94cb6c9 3534 info->fp_abi = abiflags.fp_abi;
5dd0db52 3535#endif
d97ef72e 3536 }
682674b8 3537 }
5fafdf24 3538
8e62a717
RH		 3539 if (info->end_data == 0) {
3540 info->start_data = info->end_code;
3541 info->end_data = info->end_code;
8e62a717
RH		 3542 }
3543
682674b8 3544 if (qemu_log_enabled()) {
86cf82dc 3545 load_symbols(ehdr, src, load_bias);
682674b8 3546 }
31e31b8a 3547
3bd02386 3548 debuginfo_report_elf(image_name, src->fd, load_bias);
7c10cb38 3549
98c1076c
AB		 3550 mmap_unlock();
3551
3bd02386 3552 close(src->fd);
8e62a717
RH		 3553 return;
3554
c7f17e7b
RH		 3555 exit_mmap:
3556 error_setg_errno(&err, errno, "Error mapping file");
3557 goto exit_errmsg;
8e62a717 3558 exit_errmsg:
c7f17e7b 3559 error_reportf_err(err, "%s: ", image_name);
8e62a717
RH		 3560 exit(-1);
3561}
3562
3563static void load_elf_interp(const char *filename, struct image_info *info,
3564 char bprm_buf[BPRM_BUF_SIZE])
3565{
40d487ee 3566 struct elfhdr ehdr;
3bd02386 3567 ImageSource src;
8e62a717 3568 int fd, retval;
808f6563 3569 Error *err = NULL;
8e62a717
RH		 3570
3571 fd = open(path(filename), O_RDONLY);
3572 if (fd < 0) {
808f6563
RH		 3573 error_setg_file_open(&err, errno, filename);
3574 error_report_err(err);
3575 exit(-1);
8e62a717 3576 }
31e31b8a 3577
8e62a717
RH		 3578 retval = read(fd, bprm_buf, BPRM_BUF_SIZE);
3579 if (retval < 0) {
808f6563
RH		 3580 error_setg_errno(&err, errno, "Error reading file header");
3581 error_reportf_err(err, "%s: ", filename);
3582 exit(-1);
8e62a717 3583 }
808f6563 3584
3bd02386
RH		 3585 src.fd = fd;
3586 src.cache = bprm_buf;
3587 src.cache_size = retval;
8e62a717 3588
3bd02386 3589 load_elf_image(filename, &src, info, &ehdr, NULL);
31e31b8a
FB		 3590}
3591
c40f621a
RH		 3592#ifdef VDSO_HEADER
3593#include VDSO_HEADER
3594#define vdso_image_info() &vdso_image_info
3595#else
3596#define vdso_image_info() NULL
3597#endif
3598
3599static void load_elf_vdso(struct image_info *info, const VdsoImageInfo *vdso)
3600{
3601 ImageSource src;
3602 struct elfhdr ehdr;
3603 abi_ulong load_bias, load_addr;
3604
3605 src.fd = -1;
3606 src.cache = vdso->image;
3607 src.cache_size = vdso->image_size;
3608
3609 load_elf_image("<internal-vdso>", &src, info, &ehdr, NULL);
3610 load_addr = info->load_addr;
3611 load_bias = info->load_bias;
3612
3613 /*
3614 * We need to relocate the VDSO image. The one built into the kernel
3615 * is built for a fixed address. The one built for QEMU is not, since
3616 * that requires close control of the guest address space.
3617 * We pre-processed the image to locate all of the addresses that need
3618 * to be updated.
3619 */
3620 for (unsigned i = 0, n = vdso->reloc_count; i < n; i++) {
3621 abi_ulong *addr = g2h_untagged(load_addr + vdso->relocs[i]);
3622 *addr = tswapal(tswapal(*addr) + load_bias);
3623 }
3624
3625 /* Install signal trampolines, if present. */
3626 if (vdso->sigreturn_ofs) {
3627 default_sigreturn = load_addr + vdso->sigreturn_ofs;
3628 }
3629 if (vdso->rt_sigreturn_ofs) {
3630 default_rt_sigreturn = load_addr + vdso->rt_sigreturn_ofs;
8e62a717
RH		 3631 }
3632
c40f621a
RH		 3633 /* Remove write from VDSO segment. */
3634 target_mprotect(info->start_data, info->end_data - info->start_data,
3635 PROT_READ | PROT_EXEC);
31e31b8a
FB		 3636}
3637
49918a75
PB		 3638static int symfind(const void *s0, const void *s1)
3639{
49918a75 3640 struct elf_sym *sym = (struct elf_sym *)s1;
b6235a75 3641 __typeof(sym->st_value) addr = *(uint64_t *)s0;
49918a75 3642 int result = 0;
b6235a75 3643
c7c530cd 3644 if (addr < sym->st_value) {
49918a75 3645 result = -1;
c7c530cd 3646 } else if (addr >= sym->st_value + sym->st_size) {
49918a75
PB		 3647 result = 1;
3648 }
3649 return result;
3650}
3651
b6235a75 3652static const char *lookup_symbolxx(struct syminfo *s, uint64_t orig_addr)
49918a75
PB		 3653{
3654#if ELF_CLASS == ELFCLASS32
3655 struct elf_sym *syms = s->disas_symtab.elf32;
3656#else
3657 struct elf_sym *syms = s->disas_symtab.elf64;
3658#endif
3659
3660 // binary search
49918a75
PB		 3661 struct elf_sym *sym;
3662
c7c530cd 3663 sym = bsearch(&orig_addr, syms, s->disas_num_syms, sizeof(*syms), symfind);
7cba04f6 3664 if (sym != NULL) {
49918a75
PB		 3665 return s->disas_strtab + sym->st_name;
3666 }
3667
3668 return "";
3669}
3670
3671/* FIXME: This should use elf_ops.h */
3672static int symcmp(const void *s0, const void *s1)
3673{
3674 struct elf_sym *sym0 = (struct elf_sym *)s0;
3675 struct elf_sym *sym1 = (struct elf_sym *)s1;
3676 return (sym0->st_value < sym1->st_value)
3677 ? -1
3678 : ((sym0->st_value > sym1->st_value) ? 1 : 0);
3679}
3680
689f936f 3681/* Best attempt to load symbols from this ELF object. */
86cf82dc
RH		 3682static void load_symbols(struct elfhdr *hdr, const ImageSource *src,
3683 abi_ulong load_bias)
689f936f 3684{
682674b8 3685 int i, shnum, nsyms, sym_idx = 0, str_idx = 0;
86cf82dc 3686 g_autofree struct elf_shdr *shdr = NULL;
b9475279 3687 char *strings = NULL;
86cf82dc
RH		 3688 struct elf_sym *syms = NULL;
3689 struct elf_sym *new_syms;
3690 uint64_t segsz;
689f936f 3691
682674b8 3692 shnum = hdr->e_shnum;
86cf82dc
RH		 3693 shdr = imgsrc_read_alloc(hdr->e_shoff, shnum * sizeof(struct elf_shdr),
3694 src, NULL);
3695 if (shdr == NULL) {
682674b8
RH		 3696 return;
3697 }
3698
3699 bswap_shdr(shdr, shnum);
3700 for (i = 0; i < shnum; ++i) {
3701 if (shdr[i].sh_type == SHT_SYMTAB) {
3702 sym_idx = i;
3703 str_idx = shdr[i].sh_link;
49918a75
PB		 3704 goto found;
3705 }
689f936f 3706 }
682674b8
RH		 3707
3708 /* There will be no symbol table if the file was stripped. */
3709 return;
689f936f
FB		 3710
3711 found:
682674b8 3712 /* Now know where the strtab and symtab are. Snarf them. */
5fafdf24 3713
1e06262d 3714 segsz = shdr[str_idx].sh_size;
86cf82dc
RH		 3715 strings = g_try_malloc(segsz);
3716 if (!strings) {
b9475279 3717 goto give_up;
682674b8 3718 }
86cf82dc 3719 if (!imgsrc_read(strings, shdr[str_idx].sh_offset, segsz, src, NULL)) {
b9475279 3720 goto give_up;
682674b8 3721 }
31e31b8a 3722
86cf82dc 3723 segsz = shdr[sym_idx].sh_size;
1e06262d 3724 if (segsz / sizeof(struct elf_sym) > INT_MAX) {
86cf82dc
RH		 3725 /*
3726 * Implausibly large symbol table: give up rather than ploughing
3727 * on with the number of symbols calculation overflowing.
1e06262d
PM		 3728 */
3729 goto give_up;
3730 }
3731 nsyms = segsz / sizeof(struct elf_sym);
86cf82dc
RH		 3732 syms = g_try_malloc(segsz);
3733 if (!syms) {
3734 goto give_up;
3735 }
3736 if (!imgsrc_read(syms, shdr[sym_idx].sh_offset, segsz, src, NULL)) {
3737 goto give_up;
3738 }
3739
682674b8 3740 for (i = 0; i < nsyms; ) {
49918a75 3741 bswap_sym(syms + i);
682674b8
RH		 3742 /* Throw away entries which we do not need. */
3743 if (syms[i].st_shndx == SHN_UNDEF
3744 || syms[i].st_shndx >= SHN_LORESERVE
3745 || ELF_ST_TYPE(syms[i].st_info) != STT_FUNC) {
3746 if (i < --nsyms) {
49918a75
PB		 3747 syms[i] = syms[nsyms];
3748 }
682674b8 3749 } else {
49918a75 3750#if defined(TARGET_ARM) || defined (TARGET_MIPS)
682674b8
RH		 3751 /* The bottom address bit marks a Thumb or MIPS16 symbol. */
3752 syms[i].st_value &= ~(target_ulong)1;
0774bed1 3753#endif
682674b8
RH		 3754 syms[i].st_value += load_bias;
3755 i++;
3756 }
0774bed1 3757 }
49918a75 3758
b9475279
CV		 3759 /* No "useful" symbol. */
3760 if (nsyms == 0) {
3761 goto give_up;
3762 }
3763
86cf82dc
RH		 3764 /*
3765 * Attempt to free the storage associated with the local symbols
3766 * that we threw away. Whether or not this has any effect on the
3767 * memory allocation depends on the malloc implementation and how
3768 * many symbols we managed to discard.
3769 */
0ef9ea29 3770 new_syms = g_try_renew(struct elf_sym, syms, nsyms);
8d79de6e 3771 if (new_syms == NULL) {
b9475279 3772 goto give_up;
5d5c9930 3773 }
8d79de6e 3774 syms = new_syms;
5d5c9930 3775
49918a75 3776 qsort(syms, nsyms, sizeof(*syms), symcmp);
689f936f 3777
86cf82dc
RH		 3778 {
3779 struct syminfo *s = g_new(struct syminfo, 1);
3780
3781 s->disas_strtab = strings;
3782 s->disas_num_syms = nsyms;
49918a75 3783#if ELF_CLASS == ELFCLASS32
86cf82dc 3784 s->disas_symtab.elf32 = syms;
49918a75 3785#else
86cf82dc 3786 s->disas_symtab.elf64 = syms;
49918a75 3787#endif
86cf82dc
RH		 3788 s->lookup_symbol = lookup_symbolxx;
3789 s->next = syminfos;
3790 syminfos = s;
3791 }
b9475279
CV		 3792 return;
3793
86cf82dc 3794 give_up:
0ef9ea29
PM		 3795 g_free(strings);
3796 g_free(syms);
689f936f 3797}
31e31b8a 3798
768fe76e
YS		 3799uint32_t get_elf_eflags(int fd)
3800{
3801 struct elfhdr ehdr;
3802 off_t offset;
3803 int ret;
3804
3805 /* Read ELF header */
3806 offset = lseek(fd, 0, SEEK_SET);
3807 if (offset == (off_t) -1) {
3808 return 0;
3809 }
3810 ret = read(fd, &ehdr, sizeof(ehdr));
3811 if (ret < sizeof(ehdr)) {
3812 return 0;
3813 }
3814 offset = lseek(fd, offset, SEEK_SET);
3815 if (offset == (off_t) -1) {
3816 return 0;
3817 }
3818
3819 /* Check ELF signature */
3820 if (!elf_check_ident(&ehdr)) {
3821 return 0;
3822 }
3823
3824 /* check header */
3825 bswap_ehdr(&ehdr);
3826 if (!elf_check_ehdr(&ehdr)) {
3827 return 0;
3828 }
3829
3830 /* return architecture id */
3831 return ehdr.e_flags;
3832}
3833
f0116c54 3834int load_elf_binary(struct linux_binprm *bprm, struct image_info *info)
31e31b8a 3835{
40d487ee
RH		 3836 /*
3837 * We need a copy of the elf header for passing to create_elf_tables.
3838 * We will have overwritten the original when we re-use bprm->buf
3839 * while loading the interpreter. Allocate the storage for this now
3840 * and let elf_load_image do any swapping that may be required.
3841 */
3842 struct elfhdr ehdr;
c40f621a 3843 struct image_info interp_info, vdso_info;
8e62a717 3844 char *elf_interpreter = NULL;
59baae9a 3845 char *scratch;
31e31b8a 3846
abcac736
DS		 3847 memset(&interp_info, 0, sizeof(interp_info));
3848#ifdef TARGET_MIPS
3849 interp_info.fp_abi = MIPS_ABI_FP_UNKNOWN;
3850#endif
3851
3bd02386 3852 load_elf_image(bprm->filename, &bprm->src, info, &ehdr, &elf_interpreter);
31e31b8a 3853
59baae9a
SB		 3854 /* Do this so that we can load the interpreter, if need be. We will
3855 change some of these later */
3856 bprm->p = setup_arg_pages(bprm, info);
3857
3858 scratch = g_new0(char, TARGET_PAGE_SIZE);
7c4ee5bc
RH		 3859 if (STACK_GROWS_DOWN) {
3860 bprm->p = copy_elf_strings(1, &bprm->filename, scratch,
3861 bprm->p, info->stack_limit);
3862 info->file_string = bprm->p;
3863 bprm->p = copy_elf_strings(bprm->envc, bprm->envp, scratch,
3864 bprm->p, info->stack_limit);
3865 info->env_strings = bprm->p;
3866 bprm->p = copy_elf_strings(bprm->argc, bprm->argv, scratch,
3867 bprm->p, info->stack_limit);
3868 info->arg_strings = bprm->p;
3869 } else {
3870 info->arg_strings = bprm->p;
3871 bprm->p = copy_elf_strings(bprm->argc, bprm->argv, scratch,
3872 bprm->p, info->stack_limit);
3873 info->env_strings = bprm->p;
3874 bprm->p = copy_elf_strings(bprm->envc, bprm->envp, scratch,
3875 bprm->p, info->stack_limit);
3876 info->file_string = bprm->p;
3877 bprm->p = copy_elf_strings(1, &bprm->filename, scratch,
3878 bprm->p, info->stack_limit);
3879 }
3880
59baae9a
SB		 3881 g_free(scratch);
3882
e5fe0c52 3883 if (!bprm->p) {
bf858897
RH		 3884 fprintf(stderr, "%s: %s\n", bprm->filename, strerror(E2BIG));
3885 exit(-1);
379f6698 3886 }
379f6698 3887
8e62a717
RH		 3888 if (elf_interpreter) {
3889 load_elf_interp(elf_interpreter, &interp_info, bprm->buf);
31e31b8a 3890
1f356e8c
HD		 3891 /*
3892 * While unusual because of ELF_ET_DYN_BASE, if we are unlucky
3893 * with the mappings the interpreter can be loaded above but
3894 * near the main executable, which can leave very little room
3895 * for the heap.
3896 * If the current brk has less than 16MB, use the end of the
3897 * interpreter.
3898 */
3899 if (interp_info.brk > info->brk &&
3900 interp_info.load_bias - info->brk < 16 * MiB) {
3901 info->brk = interp_info.brk;
3902 }
3903
8e62a717
RH		 3904 /* If the program interpreter is one of these two, then assume
3905 an iBCS2 image. Otherwise assume a native linux image. */
3906
3907 if (strcmp(elf_interpreter, "/usr/lib/libc.so.1") == 0
3908 || strcmp(elf_interpreter, "/usr/lib/ld.so.1") == 0) {
3909 info->personality = PER_SVR4;
31e31b8a 3910
8e62a717
RH		 3911 /* Why this, you ask??? Well SVr4 maps page 0 as read-only,
3912 and some applications "depend" upon this behavior. Since
3913 we do not have the power to recompile these, we emulate
3914 the SVr4 behavior. Sigh. */
3915 target_mmap(0, qemu_host_page_size, PROT_READ | PROT_EXEC,
68754b44 3916 MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
8e62a717 3917 }
c94cb6c9
SM		 3918#ifdef TARGET_MIPS
3919 info->interp_fp_abi = interp_info.fp_abi;
3920#endif
31e31b8a
FB		 3921 }
3922
db2af69d 3923 /*
c40f621a
RH		 3924 * Load a vdso if available, which will amongst other things contain the
3925 * signal trampolines. Otherwise, allocate a separate page for them.
db2af69d 3926 */
c40f621a
RH		 3927 const VdsoImageInfo *vdso = vdso_image_info();
3928 if (vdso) {
3929 load_elf_vdso(&vdso_info, vdso);
5d94c2ff 3930 info->vdso = vdso_info.load_bias;
c40f621a 3931 } else if (TARGET_ARCH_HAS_SIGTRAMP_PAGE) {
802ae45e
LV		 3932 abi_long tramp_page = target_mmap(0, TARGET_PAGE_SIZE,
3933 PROT_READ | PROT_WRITE,
3934 MAP_PRIVATE | MAP_ANON, -1, 0);
3935 if (tramp_page == -1) {
3936 return -errno;
3937 }
3938
db2af69d
RH		 3939 setup_sigtramp(tramp_page);
3940 target_mprotect(tramp_page, TARGET_PAGE_SIZE, PROT_READ | PROT_EXEC);
3941 }
3942
c40f621a
RH		 3943 bprm->p = create_elf_tables(bprm->p, bprm->argc, bprm->envc, &ehdr, info,
3944 elf_interpreter ? &interp_info : NULL,
3945 vdso ? &vdso_info : NULL);
8e62a717
RH		 3946 info->start_stack = bprm->p;
3947
3948 /* If we have an interpreter, set that as the program's entry point.
8e78064e 3949 Copy the load_bias as well, to help PPC64 interpret the entry
8e62a717
RH		 3950 point as a function descriptor. Do this after creating elf tables
3951 so that we copy the original program entry point into the AUXV. */
3952 if (elf_interpreter) {
8e78064e 3953 info->load_bias = interp_info.load_bias;
8e62a717 3954 info->entry = interp_info.entry;
2b323087 3955 g_free(elf_interpreter);
8e62a717 3956 }
31e31b8a 3957
edf8e2af
MW		 3958#ifdef USE_ELF_CORE_DUMP
3959 bprm->core_dump = &elf_core_dump;
3960#endif
3961
31e31b8a
FB		 3962 return 0;
3963}
3964
edf8e2af 3965#ifdef USE_ELF_CORE_DUMP
edf8e2af
MW		 3966/*
3967 * Definitions to generate Intel SVR4-like core files.
a2547a13 3968 * These mostly have the same names as the SVR4 types with "target_elf_"
edf8e2af
MW		 3969 * tacked on the front to prevent clashes with linux definitions,
3970 * and the typedef forms have been avoided. This is mostly like
3971 * the SVR4 structure, but more Linuxy, with things that Linux does
3972 * not support and which gdb doesn't really use excluded.
3973 *
3974 * Fields we don't dump (their contents is zero) in linux-user qemu
3975 * are marked with XXX.
3976 *
3977 * Core dump code is copied from linux kernel (fs/binfmt_elf.c).
3978 *
3979 * Porting ELF coredump for target is (quite) simple process. First you
dd0a3651 3980 * define USE_ELF_CORE_DUMP in target ELF code (where init_thread() for
edf8e2af
MW		 3981 * the target resides):
3982 *
3983 * #define USE_ELF_CORE_DUMP
3984 *
3985 * Next you define type of register set used for dumping. ELF specification
3986 * says that it needs to be array of elf_greg_t that has size of ELF_NREG.
3987 *
c227f099 3988 * typedef <target_regtype> target_elf_greg_t;
edf8e2af 3989 * #define ELF_NREG <number of registers>
c227f099 3990 * typedef taret_elf_greg_t target_elf_gregset_t[ELF_NREG];
edf8e2af 3991 *
edf8e2af
MW		 3992 * Last step is to implement target specific function that copies registers
3993 * from given cpu into just specified register set. Prototype is:
3994 *
c227f099 3995 * static void elf_core_copy_regs(taret_elf_gregset_t *regs,
9349b4f9 3996 * const CPUArchState *env);
edf8e2af
MW		 3997 *
3998 * Parameters:
3999 * regs - copy register values into here (allocated and zeroed by caller)
4000 * env - copy registers from here
4001 *
4002 * Example for ARM target is provided in this file.
4003 */
4004
4005/* An ELF note in memory */
4006struct memelfnote {
4007 const char *name;
4008 size_t namesz;
4009 size_t namesz_rounded;
4010 int type;
4011 size_t datasz;
80f5ce75 4012 size_t datasz_rounded;
edf8e2af
MW		 4013 void *data;
4014 size_t notesz;
4015};
4016
a2547a13 4017struct target_elf_siginfo {
f8fd4fc4
PB		 4018 abi_int si_signo; /* signal number */
4019 abi_int si_code; /* extra code */
4020 abi_int si_errno; /* errno */
edf8e2af
MW		 4021};
4022
a2547a13
LD		 4023struct target_elf_prstatus {
4024 struct target_elf_siginfo pr_info; /* Info associated with signal */
1ddd592f 4025 abi_short pr_cursig; /* Current signal */
ca98ac83
PB		 4026 abi_ulong pr_sigpend; /* XXX */
4027 abi_ulong pr_sighold; /* XXX */
c227f099
AL		 4028 target_pid_t pr_pid;
4029 target_pid_t pr_ppid;
4030 target_pid_t pr_pgrp;
4031 target_pid_t pr_sid;
edf8e2af
MW		 4032 struct target_timeval pr_utime; /* XXX User time */
4033 struct target_timeval pr_stime; /* XXX System time */
4034 struct target_timeval pr_cutime; /* XXX Cumulative user time */
4035 struct target_timeval pr_cstime; /* XXX Cumulative system time */
c227f099 4036 target_elf_gregset_t pr_reg; /* GP registers */
f8fd4fc4 4037 abi_int pr_fpvalid; /* XXX */
edf8e2af
MW		 4038};
4039
4040#define ELF_PRARGSZ (80) /* Number of chars for args */
4041
a2547a13 4042struct target_elf_prpsinfo {
edf8e2af
MW		 4043 char pr_state; /* numeric process state */
4044 char pr_sname; /* char for pr_state */
4045 char pr_zomb; /* zombie */
4046 char pr_nice; /* nice val */
ca98ac83 4047 abi_ulong pr_flag; /* flags */
c227f099
AL		 4048 target_uid_t pr_uid;
4049 target_gid_t pr_gid;
4050 target_pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid;
edf8e2af 4051 /* Lots missing */
d7eb2b92 4052 char pr_fname[16] QEMU_NONSTRING; /* filename of executable */
edf8e2af
MW		 4053 char pr_psargs[ELF_PRARGSZ]; /* initial part of arg list */
4054};
4055
4056/* Here is the structure in which status of each thread is captured. */
4057struct elf_thread_status {
72cf2d4f 4058 QTAILQ_ENTRY(elf_thread_status) ets_link;
a2547a13 4059 struct target_elf_prstatus prstatus; /* NT_PRSTATUS */
edf8e2af
MW		 4060#if 0
4061 elf_fpregset_t fpu; /* NT_PRFPREG */
4062 struct task_struct *thread;
4063 elf_fpxregset_t xfpu; /* ELF_CORE_XFPREG_TYPE */
4064#endif
4065 struct memelfnote notes[1];
4066 int num_notes;
4067};
4068
4069struct elf_note_info {
4070 struct memelfnote *notes;
a2547a13
LD		 4071 struct target_elf_prstatus *prstatus; /* NT_PRSTATUS */
4072 struct target_elf_prpsinfo *psinfo; /* NT_PRPSINFO */
edf8e2af 4073
b58deb34 4074 QTAILQ_HEAD(, elf_thread_status) thread_list;
edf8e2af
MW		 4075#if 0
4076 /*
4077 * Current version of ELF coredump doesn't support
4078 * dumping fp regs etc.
4079 */
4080 elf_fpregset_t *fpu;
4081 elf_fpxregset_t *xfpu;
4082 int thread_status_size;
4083#endif
4084 int notes_size;
4085 int numnote;
4086};
4087
4088struct vm_area_struct {
1a1c4db9
MI		 4089 target_ulong vma_start; /* start vaddr of memory region */
4090 target_ulong vma_end; /* end vaddr of memory region */
4091 abi_ulong vma_flags; /* protection etc. flags for the region */
72cf2d4f 4092 QTAILQ_ENTRY(vm_area_struct) vma_link;
edf8e2af
MW		 4093};
4094
4095struct mm_struct {
72cf2d4f 4096 QTAILQ_HEAD(, vm_area_struct) mm_mmap;
edf8e2af
MW		 4097 int mm_count; /* number of mappings */
4098};
4099
4100static struct mm_struct *vma_init(void);
4101static void vma_delete(struct mm_struct *);
1a1c4db9
MI		 4102static int vma_add_mapping(struct mm_struct *, target_ulong,
4103 target_ulong, abi_ulong);
edf8e2af
MW		 4104static int vma_get_mapping_count(const struct mm_struct *);
4105static struct vm_area_struct *vma_first(const struct mm_struct *);
4106static struct vm_area_struct *vma_next(struct vm_area_struct *);
4107static abi_ulong vma_dump_size(const struct vm_area_struct *);
1a1c4db9 4108static int vma_walker(void *priv, target_ulong start, target_ulong end,
d97ef72e 4109 unsigned long flags);
edf8e2af
MW		 4110
4111static void fill_elf_header(struct elfhdr *, int, uint16_t, uint32_t);
4112static void fill_note(struct memelfnote *, const char *, int,
d97ef72e 4113 unsigned int, void *);
a2547a13
LD		 4114static void fill_prstatus(struct target_elf_prstatus *, const TaskState *, int);
4115static int fill_psinfo(struct target_elf_prpsinfo *, const TaskState *);
edf8e2af
MW		 4116static void fill_auxv_note(struct memelfnote *, const TaskState *);
4117static void fill_elf_note_phdr(struct elf_phdr *, int, off_t);
4118static size_t note_size(const struct memelfnote *);
4119static void free_note_info(struct elf_note_info *);
9349b4f9
AF		 4120static int fill_note_info(struct elf_note_info *, long, const CPUArchState *);
4121static void fill_thread_info(struct elf_note_info *, const CPUArchState *);
edf8e2af
MW		 4122
4123static int dump_write(int, const void *, size_t);
4124static int write_note(struct memelfnote *, int);
4125static int write_note_info(struct elf_note_info *, int);
4126
4127#ifdef BSWAP_NEEDED
a2547a13 4128static void bswap_prstatus(struct target_elf_prstatus *prstatus)
edf8e2af 4129{
ca98ac83
PB		 4130 prstatus->pr_info.si_signo = tswap32(prstatus->pr_info.si_signo);
4131 prstatus->pr_info.si_code = tswap32(prstatus->pr_info.si_code);
4132 prstatus->pr_info.si_errno = tswap32(prstatus->pr_info.si_errno);
edf8e2af 4133 prstatus->pr_cursig = tswap16(prstatus->pr_cursig);
ca98ac83
PB		 4134 prstatus->pr_sigpend = tswapal(prstatus->pr_sigpend);
4135 prstatus->pr_sighold = tswapal(prstatus->pr_sighold);
edf8e2af
MW		 4136 prstatus->pr_pid = tswap32(prstatus->pr_pid);
4137 prstatus->pr_ppid = tswap32(prstatus->pr_ppid);
4138 prstatus->pr_pgrp = tswap32(prstatus->pr_pgrp);
4139 prstatus->pr_sid = tswap32(prstatus->pr_sid);
4140 /* cpu times are not filled, so we skip them */
4141 /* regs should be in correct format already */
4142 prstatus->pr_fpvalid = tswap32(prstatus->pr_fpvalid);
4143}
4144
a2547a13 4145static void bswap_psinfo(struct target_elf_prpsinfo *psinfo)
edf8e2af 4146{
ca98ac83 4147 psinfo->pr_flag = tswapal(psinfo->pr_flag);
edf8e2af
MW		 4148 psinfo->pr_uid = tswap16(psinfo->pr_uid);
4149 psinfo->pr_gid = tswap16(psinfo->pr_gid);
4150 psinfo->pr_pid = tswap32(psinfo->pr_pid);
4151 psinfo->pr_ppid = tswap32(psinfo->pr_ppid);
4152 psinfo->pr_pgrp = tswap32(psinfo->pr_pgrp);
4153 psinfo->pr_sid = tswap32(psinfo->pr_sid);
4154}
991f8f0c
RH		 4155
4156static void bswap_note(struct elf_note *en)
4157{
4158 bswap32s(&en->n_namesz);
4159 bswap32s(&en->n_descsz);
4160 bswap32s(&en->n_type);
4161}
4162#else
4163static inline void bswap_prstatus(struct target_elf_prstatus *p) { }
4164static inline void bswap_psinfo(struct target_elf_prpsinfo *p) {}
4165static inline void bswap_note(struct elf_note *en) { }
edf8e2af
MW		 4166#endif /* BSWAP_NEEDED */
4167
4168/*
4169 * Minimal support for linux memory regions. These are needed
4170 * when we are finding out what memory exactly belongs to
4171 * emulated process. No locks needed here, as long as
4172 * thread that received the signal is stopped.
4173 */
4174
4175static struct mm_struct *vma_init(void)
4176{
4177 struct mm_struct *mm;
4178
7267c094 4179 if ((mm = g_malloc(sizeof (*mm))) == NULL)
edf8e2af
MW		 4180 return (NULL);
4181
4182 mm->mm_count = 0;
72cf2d4f 4183 QTAILQ_INIT(&mm->mm_mmap);
edf8e2af
MW		 4184
4185 return (mm);
4186}
4187
4188static void vma_delete(struct mm_struct *mm)
4189{
4190 struct vm_area_struct *vma;
4191
4192 while ((vma = vma_first(mm)) != NULL) {
72cf2d4f 4193 QTAILQ_REMOVE(&mm->mm_mmap, vma, vma_link);
7267c094 4194 g_free(vma);
edf8e2af 4195 }
7267c094 4196 g_free(mm);
edf8e2af
MW		 4197}
4198
1a1c4db9
MI		 4199static int vma_add_mapping(struct mm_struct *mm, target_ulong start,
4200 target_ulong end, abi_ulong flags)
edf8e2af
MW		 4201{
4202 struct vm_area_struct *vma;
4203
7267c094 4204 if ((vma = g_malloc0(sizeof (*vma))) == NULL)
edf8e2af
MW		 4205 return (-1);
4206
4207 vma->vma_start = start;
4208 vma->vma_end = end;
4209 vma->vma_flags = flags;
4210
72cf2d4f 4211 QTAILQ_INSERT_TAIL(&mm->mm_mmap, vma, vma_link);
edf8e2af
MW		 4212 mm->mm_count++;
4213
4214 return (0);
4215}
4216
4217static struct vm_area_struct *vma_first(const struct mm_struct *mm)
4218{
72cf2d4f 4219 return (QTAILQ_FIRST(&mm->mm_mmap));
edf8e2af
MW		 4220}
4221
4222static struct vm_area_struct *vma_next(struct vm_area_struct *vma)
4223{
72cf2d4f 4224 return (QTAILQ_NEXT(vma, vma_link));
edf8e2af
MW		 4225}
4226
4227static int vma_get_mapping_count(const struct mm_struct *mm)
4228{
4229 return (mm->mm_count);
4230}
4231
4232/*
4233 * Calculate file (dump) size of given memory region.
4234 */
4235static abi_ulong vma_dump_size(const struct vm_area_struct *vma)
4236{
4237 /* if we cannot even read the first page, skip it */
c7169b02 4238 if (!access_ok_untagged(VERIFY_READ, vma->vma_start, TARGET_PAGE_SIZE))
edf8e2af
MW		 4239 return (0);
4240
4241 /*
4242 * Usually we don't dump executable pages as they contain
4243 * non-writable code that debugger can read directly from
4244 * target library etc. However, thread stacks are marked
4245 * also executable so we read in first page of given region
4246 * and check whether it contains elf header. If there is
4247 * no elf header, we dump it.
4248 */
4249 if (vma->vma_flags & PROT_EXEC) {
4250 char page[TARGET_PAGE_SIZE];
4251
022625a8
PM		 4252 if (copy_from_user(page, vma->vma_start, sizeof (page))) {
4253 return 0;
4254 }
edf8e2af
MW		 4255 if ((page[EI_MAG0] == ELFMAG0) &&
4256 (page[EI_MAG1] == ELFMAG1) &&
4257 (page[EI_MAG2] == ELFMAG2) &&
4258 (page[EI_MAG3] == ELFMAG3)) {
4259 /*
4260 * Mappings are possibly from ELF binary. Don't dump
4261 * them.
4262 */
4263 return (0);
4264 }
4265 }
4266
4267 return (vma->vma_end - vma->vma_start);
4268}
4269
1a1c4db9 4270static int vma_walker(void *priv, target_ulong start, target_ulong end,
d97ef72e 4271 unsigned long flags)
edf8e2af
MW		 4272{
4273 struct mm_struct *mm = (struct mm_struct *)priv;
4274
edf8e2af
MW		 4275 vma_add_mapping(mm, start, end, flags);
4276 return (0);
4277}
4278
4279static void fill_note(struct memelfnote *note, const char *name, int type,
d97ef72e 4280 unsigned int sz, void *data)
edf8e2af
MW		 4281{
4282 unsigned int namesz;
4283
4284 namesz = strlen(name) + 1;
4285 note->name = name;
4286 note->namesz = namesz;
4287 note->namesz_rounded = roundup(namesz, sizeof (int32_t));
4288 note->type = type;
80f5ce75
LV		 4289 note->datasz = sz;
4290 note->datasz_rounded = roundup(sz, sizeof (int32_t));
4291
edf8e2af
MW		 4292 note->data = data;
4293
4294 /*
4295 * We calculate rounded up note size here as specified by
4296 * ELF document.
4297 */
4298 note->notesz = sizeof (struct elf_note) +
80f5ce75 4299 note->namesz_rounded + note->datasz_rounded;
edf8e2af
MW		 4300}
4301
4302static void fill_elf_header(struct elfhdr *elf, int segs, uint16_t machine,
d97ef72e 4303 uint32_t flags)
edf8e2af
MW		 4304{
4305 (void) memset(elf, 0, sizeof(*elf));
4306
4307 (void) memcpy(elf->e_ident, ELFMAG, SELFMAG);
4308 elf->e_ident[EI_CLASS] = ELF_CLASS;
4309 elf->e_ident[EI_DATA] = ELF_DATA;
4310 elf->e_ident[EI_VERSION] = EV_CURRENT;
4311 elf->e_ident[EI_OSABI] = ELF_OSABI;
4312
4313 elf->e_type = ET_CORE;
4314 elf->e_machine = machine;
4315 elf->e_version = EV_CURRENT;
4316 elf->e_phoff = sizeof(struct elfhdr);
4317 elf->e_flags = flags;
4318 elf->e_ehsize = sizeof(struct elfhdr);
4319 elf->e_phentsize = sizeof(struct elf_phdr);
4320 elf->e_phnum = segs;
4321
edf8e2af 4322 bswap_ehdr(elf);
edf8e2af
MW		 4323}
4324
4325static void fill_elf_note_phdr(struct elf_phdr *phdr, int sz, off_t offset)
4326{
4327 phdr->p_type = PT_NOTE;
4328 phdr->p_offset = offset;
4329 phdr->p_vaddr = 0;
4330 phdr->p_paddr = 0;
4331 phdr->p_filesz = sz;
4332 phdr->p_memsz = 0;
4333 phdr->p_flags = 0;
4334 phdr->p_align = 0;
4335
991f8f0c 4336 bswap_phdr(phdr, 1);
edf8e2af
MW		 4337}
4338
4339static size_t note_size(const struct memelfnote *note)
4340{
4341 return (note->notesz);
4342}
4343
a2547a13 4344static void fill_prstatus(struct target_elf_prstatus *prstatus,
d97ef72e 4345 const TaskState *ts, int signr)
edf8e2af
MW		 4346{
4347 (void) memset(prstatus, 0, sizeof (*prstatus));
4348 prstatus->pr_info.si_signo = prstatus->pr_cursig = signr;
4349 prstatus->pr_pid = ts->ts_tid;
4350 prstatus->pr_ppid = getppid();
4351 prstatus->pr_pgrp = getpgrp();
4352 prstatus->pr_sid = getsid(0);
4353
edf8e2af 4354 bswap_prstatus(prstatus);
edf8e2af
MW		 4355}
4356
a2547a13 4357static int fill_psinfo(struct target_elf_prpsinfo *psinfo, const TaskState *ts)
edf8e2af 4358{
900cfbca 4359 char *base_filename;
edf8e2af
MW		 4360 unsigned int i, len;
4361
4362 (void) memset(psinfo, 0, sizeof (*psinfo));
4363
5f779a3a 4364 len = ts->info->env_strings - ts->info->arg_strings;
edf8e2af
MW		 4365 if (len >= ELF_PRARGSZ)
4366 len = ELF_PRARGSZ - 1;
5f779a3a 4367 if (copy_from_user(&psinfo->pr_psargs, ts->info->arg_strings, len)) {
edf8e2af 4368 return -EFAULT;
5f779a3a 4369 }
edf8e2af
MW		 4370 for (i = 0; i < len; i++)
4371 if (psinfo->pr_psargs[i] == 0)
4372 psinfo->pr_psargs[i] = ' ';
4373 psinfo->pr_psargs[len] = 0;
4374
4375 psinfo->pr_pid = getpid();
4376 psinfo->pr_ppid = getppid();
4377 psinfo->pr_pgrp = getpgrp();
4378 psinfo->pr_sid = getsid(0);
4379 psinfo->pr_uid = getuid();
4380 psinfo->pr_gid = getgid();
4381
900cfbca
JM		 4382 base_filename = g_path_get_basename(ts->bprm->filename);
4383 /*
4384 * Using strncpy here is fine: at max-length,
4385 * this field is not NUL-terminated.
4386 */
edf8e2af 4387 (void) strncpy(psinfo->pr_fname, base_filename,
d97ef72e 4388 sizeof(psinfo->pr_fname));
edf8e2af 4389
900cfbca 4390 g_free(base_filename);
edf8e2af 4391 bswap_psinfo(psinfo);
edf8e2af
MW		 4392 return (0);
4393}
4394
4395static void fill_auxv_note(struct memelfnote *note, const TaskState *ts)
4396{
4397 elf_addr_t auxv = (elf_addr_t)ts->info->saved_auxv;
4398 elf_addr_t orig_auxv = auxv;
edf8e2af 4399 void *ptr;
125b0f55 4400 int len = ts->info->auxv_len;
edf8e2af
MW		 4401
4402 /*
4403 * Auxiliary vector is stored in target process stack. It contains
4404 * {type, value} pairs that we need to dump into note. This is not
4405 * strictly necessary but we do it here for sake of completeness.
4406 */
4407
edf8e2af
MW		 4408 /* read in whole auxv vector and copy it to memelfnote */
4409 ptr = lock_user(VERIFY_READ, orig_auxv, len, 0);
4410 if (ptr != NULL) {
4411 fill_note(note, "CORE", NT_AUXV, len, ptr);
4412 unlock_user(ptr, auxv, len);
4413 }
4414}
4415
4416/*
4417 * Constructs name of coredump file. We have following convention
4418 * for the name:
4419 * qemu_<basename-of-target-binary>_<date>-<time>_<pid>.core
4420 *
68af19ad 4421 * Returns the filename
edf8e2af 4422 */
68af19ad 4423static char *core_dump_filename(const TaskState *ts)
edf8e2af 4424{
68af19ad
DB		 4425 g_autoptr(GDateTime) now = g_date_time_new_now_local();
4426 g_autofree char *nowstr = g_date_time_format(now, "%Y%m%d-%H%M%S");
4427 g_autofree char *base_filename = g_path_get_basename(ts->bprm->filename);
edf8e2af 4428
68af19ad
DB		 4429 return g_strdup_printf("qemu_%s_%s_%d.core",
4430 base_filename, nowstr, (int)getpid());
edf8e2af
MW		 4431}
4432
4433static int dump_write(int fd, const void *ptr, size_t size)
4434{
4435 const char *bufp = (const char *)ptr;
4436 ssize_t bytes_written, bytes_left;
4437 struct rlimit dumpsize;
4438 off_t pos;
4439
4440 bytes_written = 0;
4441 getrlimit(RLIMIT_CORE, &dumpsize);
4442 if ((pos = lseek(fd, 0, SEEK_CUR))==-1) {
4443 if (errno == ESPIPE) { /* not a seekable stream */
4444 bytes_left = size;
4445 } else {
4446 return pos;
4447 }
4448 } else {
4449 if (dumpsize.rlim_cur <= pos) {
4450 return -1;
4451 } else if (dumpsize.rlim_cur == RLIM_INFINITY) {
4452 bytes_left = size;
4453 } else {
4454 size_t limit_left=dumpsize.rlim_cur - pos;
4455 bytes_left = limit_left >= size ? size : limit_left ;
4456 }
4457 }
4458
4459 /*
4460 * In normal conditions, single write(2) should do but
4461 * in case of socket etc. this mechanism is more portable.
4462 */
4463 do {
4464 bytes_written = write(fd, bufp, bytes_left);
4465 if (bytes_written < 0) {
4466 if (errno == EINTR)
4467 continue;
4468 return (-1);
4469 } else if (bytes_written == 0) { /* eof */
4470 return (-1);
4471 }
4472 bufp += bytes_written;
4473 bytes_left -= bytes_written;
4474 } while (bytes_left > 0);
4475
4476 return (0);
4477}
4478
4479static int write_note(struct memelfnote *men, int fd)
4480{
4481 struct elf_note en;
4482
4483 en.n_namesz = men->namesz;
4484 en.n_type = men->type;
4485 en.n_descsz = men->datasz;
4486
edf8e2af 4487 bswap_note(&en);
edf8e2af
MW		 4488
4489 if (dump_write(fd, &en, sizeof(en)) != 0)
4490 return (-1);
4491 if (dump_write(fd, men->name, men->namesz_rounded) != 0)
4492 return (-1);
80f5ce75 4493 if (dump_write(fd, men->data, men->datasz_rounded) != 0)
edf8e2af
MW		 4494 return (-1);
4495
4496 return (0);
4497}
4498
9349b4f9 4499static void fill_thread_info(struct elf_note_info *info, const CPUArchState *env)
edf8e2af 4500{
29a0af61 4501 CPUState *cpu = env_cpu((CPUArchState *)env);
0429a971 4502 TaskState *ts = (TaskState *)cpu->opaque;
edf8e2af
MW		 4503 struct elf_thread_status *ets;
4504
7267c094 4505 ets = g_malloc0(sizeof (*ets));
edf8e2af
MW		 4506 ets->num_notes = 1; /* only prstatus is dumped */
4507 fill_prstatus(&ets->prstatus, ts, 0);
4508 elf_core_copy_regs(&ets->prstatus.pr_reg, env);
4509 fill_note(&ets->notes[0], "CORE", NT_PRSTATUS, sizeof (ets->prstatus),
d97ef72e 4510 &ets->prstatus);
edf8e2af 4511
72cf2d4f 4512 QTAILQ_INSERT_TAIL(&info->thread_list, ets, ets_link);
edf8e2af
MW		 4513
4514 info->notes_size += note_size(&ets->notes[0]);
4515}
4516
6afafa86
PM		 4517static void init_note_info(struct elf_note_info *info)
4518{
4519 /* Initialize the elf_note_info structure so that it is at
4520 * least safe to call free_note_info() on it. Must be
4521 * called before calling fill_note_info().
4522 */
4523 memset(info, 0, sizeof (*info));
4524 QTAILQ_INIT(&info->thread_list);
4525}
4526
edf8e2af 4527static int fill_note_info(struct elf_note_info *info,
9349b4f9 4528 long signr, const CPUArchState *env)
edf8e2af
MW		 4529{
4530#define NUMNOTES 3
29a0af61 4531 CPUState *cpu = env_cpu((CPUArchState *)env);
0429a971 4532 TaskState *ts = (TaskState *)cpu->opaque;
edf8e2af
MW		 4533 int i;
4534
c78d65e8 4535 info->notes = g_new0(struct memelfnote, NUMNOTES);
edf8e2af
MW		 4536 if (info->notes == NULL)
4537 return (-ENOMEM);
7267c094 4538 info->prstatus = g_malloc0(sizeof (*info->prstatus));
edf8e2af
MW		 4539 if (info->prstatus == NULL)
4540 return (-ENOMEM);
7267c094 4541 info->psinfo = g_malloc0(sizeof (*info->psinfo));
edf8e2af
MW		 4542 if (info->prstatus == NULL)
4543 return (-ENOMEM);
4544
4545 /*
4546 * First fill in status (and registers) of current thread
4547 * including process info & aux vector.
4548 */
4549 fill_prstatus(info->prstatus, ts, signr);
4550 elf_core_copy_regs(&info->prstatus->pr_reg, env);
4551 fill_note(&info->notes[0], "CORE", NT_PRSTATUS,
d97ef72e 4552 sizeof (*info->prstatus), info->prstatus);
edf8e2af
MW		 4553 fill_psinfo(info->psinfo, ts);
4554 fill_note(&info->notes[1], "CORE", NT_PRPSINFO,
d97ef72e 4555 sizeof (*info->psinfo), info->psinfo);
edf8e2af
MW		 4556 fill_auxv_note(&info->notes[2], ts);
4557 info->numnote = 3;
4558
4559 info->notes_size = 0;
4560 for (i = 0; i < info->numnote; i++)
4561 info->notes_size += note_size(&info->notes[i]);
4562
4563 /* read and fill status of all threads */
370ed600
JI		 4564 WITH_QEMU_LOCK_GUARD(&qemu_cpu_list_lock) {
4565 CPU_FOREACH(cpu) {
4566 if (cpu == thread_cpu) {
4567 continue;
4568 }
b77af26e 4569 fill_thread_info(info, cpu_env(cpu));
182735ef 4570 }
edf8e2af 4571 }
edf8e2af
MW		 4572
4573 return (0);
4574}
4575
4576static void free_note_info(struct elf_note_info *info)
4577{
4578 struct elf_thread_status *ets;
4579
72cf2d4f
BS		 4580 while (!QTAILQ_EMPTY(&info->thread_list)) {
4581 ets = QTAILQ_FIRST(&info->thread_list);
4582 QTAILQ_REMOVE(&info->thread_list, ets, ets_link);
7267c094 4583 g_free(ets);
edf8e2af
MW		 4584 }
4585
7267c094
AL		 4586 g_free(info->prstatus);
4587 g_free(info->psinfo);
4588 g_free(info->notes);
edf8e2af
MW		 4589}
4590
4591static int write_note_info(struct elf_note_info *info, int fd)
4592{
4593 struct elf_thread_status *ets;
4594 int i, error = 0;
4595
4596 /* write prstatus, psinfo and auxv for current thread */
4597 for (i = 0; i < info->numnote; i++)
4598 if ((error = write_note(&info->notes[i], fd)) != 0)
4599 return (error);
4600
4601 /* write prstatus for each thread */
52a53afe 4602 QTAILQ_FOREACH(ets, &info->thread_list, ets_link) {
edf8e2af
MW		 4603 if ((error = write_note(&ets->notes[0], fd)) != 0)
4604 return (error);
4605 }
4606
4607 return (0);
4608}
4609
4610/*
4611 * Write out ELF coredump.
4612 *
4613 * See documentation of ELF object file format in:
4614 * http://www.caldera.com/developers/devspecs/gabi41.pdf
4615 *
4616 * Coredump format in linux is following:
4617 *
4618 * 0 +----------------------+ \
4619 * | ELF header | ET_CORE |
4620 * +----------------------+ |
4621 * | ELF program headers | |--- headers
4622 * | - NOTE section | |
4623 * | - PT_LOAD sections | |
4624 * +----------------------+ /
4625 * | NOTEs: |
4626 * | - NT_PRSTATUS |
4627 * | - NT_PRSINFO |
4628 * | - NT_AUXV |
4629 * +----------------------+ <-- aligned to target page
4630 * | Process memory dump |
4631 * : :
4632 * . .
4633 * : :
4634 * | |
4635 * +----------------------+
4636 *
4637 * NT_PRSTATUS -> struct elf_prstatus (per thread)
4638 * NT_PRSINFO -> struct elf_prpsinfo
4639 * NT_AUXV is array of { type, value } pairs (see fill_auxv_note()).
4640 *
4641 * Format follows System V format as close as possible. Current
4642 * version limitations are as follows:
4643 * - no floating point registers are dumped
4644 *
4645 * Function returns 0 in case of success, negative errno otherwise.
4646 *
4647 * TODO: make this work also during runtime: it should be
4648 * possible to force coredump from running process and then
4649 * continue processing. For example qemu could set up SIGUSR2
4650 * handler (provided that target process haven't registered
4651 * handler for that) that does the dump when signal is received.
4652 */
9349b4f9 4653static int elf_core_dump(int signr, const CPUArchState *env)
edf8e2af 4654{
29a0af61 4655 const CPUState *cpu = env_cpu((CPUArchState *)env);
0429a971 4656 const TaskState *ts = (const TaskState *)cpu->opaque;
edf8e2af 4657 struct vm_area_struct *vma = NULL;
68af19ad 4658 g_autofree char *corefile = NULL;
edf8e2af
MW		 4659 struct elf_note_info info;
4660 struct elfhdr elf;
4661 struct elf_phdr phdr;
4662 struct rlimit dumpsize;
4663 struct mm_struct *mm = NULL;
4664 off_t offset = 0, data_offset = 0;
4665 int segs = 0;
4666 int fd = -1;
4667
6afafa86
PM		 4668 init_note_info(&info);
4669
edf8e2af 4670 errno = 0;
0ea731db
TW		 4671
4672 if (prctl(PR_GET_DUMPABLE) == 0) {
4673 return 0;
4674 }
4675
3805d428 4676 if (getrlimit(RLIMIT_CORE, &dumpsize) == 0 && dumpsize.rlim_cur == 0) {
d97ef72e 4677 return 0;
3805d428 4678 }
edf8e2af 4679
68af19ad 4680 corefile = core_dump_filename(ts);
edf8e2af
MW		 4681
4682 if ((fd = open(corefile, O_WRONLY | O_CREAT,
d97ef72e 4683 S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH)) < 0)
edf8e2af
MW		 4684 return (-errno);
4685
4686 /*
4687 * Walk through target process memory mappings and
4688 * set up structure containing this information. After
4689 * this point vma_xxx functions can be used.
4690 */
4691 if ((mm = vma_init()) == NULL)
4692 goto out;
4693
4694 walk_memory_regions(mm, vma_walker);
4695 segs = vma_get_mapping_count(mm);
4696
4697 /*
4698 * Construct valid coredump ELF header. We also
4699 * add one more segment for notes.
4700 */
4701 fill_elf_header(&elf, segs + 1, ELF_MACHINE, 0);
4702 if (dump_write(fd, &elf, sizeof (elf)) != 0)
4703 goto out;
4704
b6af0975 4705 /* fill in the in-memory version of notes */
edf8e2af
MW		 4706 if (fill_note_info(&info, signr, env) < 0)
4707 goto out;
4708
4709 offset += sizeof (elf); /* elf header */
4710 offset += (segs + 1) * sizeof (struct elf_phdr); /* program headers */
4711
4712 /* write out notes program header */
4713 fill_elf_note_phdr(&phdr, info.notes_size, offset);
4714
4715 offset += info.notes_size;
4716 if (dump_write(fd, &phdr, sizeof (phdr)) != 0)
4717 goto out;
4718
4719 /*
4720 * ELF specification wants data to start at page boundary so
4721 * we align it here.
4722 */
80f5ce75 4723 data_offset = offset = roundup(offset, ELF_EXEC_PAGESIZE);
edf8e2af
MW		 4724
4725 /*
4726 * Write program headers for memory regions mapped in
4727 * the target process.
4728 */
4729 for (vma = vma_first(mm); vma != NULL; vma = vma_next(vma)) {
4730 (void) memset(&phdr, 0, sizeof (phdr));
4731
4732 phdr.p_type = PT_LOAD;
4733 phdr.p_offset = offset;
4734 phdr.p_vaddr = vma->vma_start;
4735 phdr.p_paddr = 0;
4736 phdr.p_filesz = vma_dump_size(vma);
4737 offset += phdr.p_filesz;
4738 phdr.p_memsz = vma->vma_end - vma->vma_start;
4739 phdr.p_flags = vma->vma_flags & PROT_READ ? PF_R : 0;
4740 if (vma->vma_flags & PROT_WRITE)
4741 phdr.p_flags |= PF_W;
4742 if (vma->vma_flags & PROT_EXEC)
4743 phdr.p_flags |= PF_X;
4744 phdr.p_align = ELF_EXEC_PAGESIZE;
4745
80f5ce75 4746 bswap_phdr(&phdr, 1);
772034b6
PM		 4747 if (dump_write(fd, &phdr, sizeof(phdr)) != 0) {
4748 goto out;
4749 }
edf8e2af
MW		 4750 }
4751
4752 /*
4753 * Next we write notes just after program headers. No
4754 * alignment needed here.
4755 */
4756 if (write_note_info(&info, fd) < 0)
4757 goto out;
4758
4759 /* align data to page boundary */
edf8e2af
MW		 4760 if (lseek(fd, data_offset, SEEK_SET) != data_offset)
4761 goto out;
4762
4763 /*
4764 * Finally we can dump process memory into corefile as well.
4765 */
4766 for (vma = vma_first(mm); vma != NULL; vma = vma_next(vma)) {
4767 abi_ulong addr;
4768 abi_ulong end;
4769
4770 end = vma->vma_start + vma_dump_size(vma);
4771
4772 for (addr = vma->vma_start; addr < end;
d97ef72e 4773 addr += TARGET_PAGE_SIZE) {
edf8e2af
MW		 4774 char page[TARGET_PAGE_SIZE];
4775 int error;
4776
4777 /*
4778 * Read in page from target process memory and
4779 * write it to coredump file.
4780 */
4781 error = copy_from_user(page, addr, sizeof (page));
4782 if (error != 0) {
49995e17 4783 (void) fprintf(stderr, "unable to dump " TARGET_ABI_FMT_lx "\n",
d97ef72e 4784 addr);
edf8e2af
MW		 4785 errno = -error;
4786 goto out;
4787 }
4788 if (dump_write(fd, page, TARGET_PAGE_SIZE) < 0)
4789 goto out;
4790 }
4791 }
4792
d97ef72e 4793 out:
edf8e2af
MW		 4794 free_note_info(&info);
4795 if (mm != NULL)
4796 vma_delete(mm);
4797 (void) close(fd);
4798
4799 if (errno != 0)
4800 return (-errno);
4801 return (0);
4802}
edf8e2af
MW		 4803#endif /* USE_ELF_CORE_DUMP */
4804
e5fe0c52
PB		 4805void do_init_thread(struct target_pt_regs *regs, struct image_info *infop)
4806{
4807 init_thread(regs, infop);
4808}
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