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d2a56bd2 TS |
1 | /* |
2 | * qemu user cpu loop | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
21 | #include "qemu/osdep.h" | |
70a37f7f | 22 | #include "qemu-common.h" |
d2a56bd2 | 23 | #include "qemu.h" |
3b249d26 | 24 | #include "user-internals.h" |
d2a56bd2 | 25 | #include "cpu_loop-common.h" |
2113aed6 | 26 | #include "signal-common.h" |
d2a56bd2 TS |
27 | #include "internal.h" |
28 | ||
29 | void cpu_loop(CPUHexagonState *env) | |
30 | { | |
7d9ab202 | 31 | CPUState *cs = env_cpu(env); |
70863887 | 32 | int trapnr; |
d2a56bd2 TS |
33 | target_ulong syscallnum; |
34 | target_ulong ret; | |
35 | ||
36 | for (;;) { | |
37 | cpu_exec_start(cs); | |
38 | trapnr = cpu_exec(cs); | |
39 | cpu_exec_end(cs); | |
40 | process_queued_cpu_work(cs); | |
41 | ||
d2a56bd2 TS |
42 | switch (trapnr) { |
43 | case EXCP_INTERRUPT: | |
44 | /* just indicate that signals should be handled asap */ | |
45 | break; | |
46 | case HEX_EXCP_TRAP0: | |
47 | syscallnum = env->gpr[6]; | |
48 | env->gpr[HEX_REG_PC] += 4; | |
49 | ret = do_syscall(env, | |
50 | syscallnum, | |
51 | env->gpr[0], | |
52 | env->gpr[1], | |
53 | env->gpr[2], | |
54 | env->gpr[3], | |
55 | env->gpr[4], | |
56 | env->gpr[5], | |
57 | 0, 0); | |
58 | if (ret == -TARGET_ERESTARTSYS) { | |
59 | env->gpr[HEX_REG_PC] -= 4; | |
60 | } else if (ret != -TARGET_QEMU_ESIGRETURN) { | |
61 | env->gpr[0] = ret; | |
62 | } | |
63 | break; | |
d2a56bd2 TS |
64 | case EXCP_ATOMIC: |
65 | cpu_exec_step_atomic(cs); | |
66 | break; | |
67 | default: | |
68 | EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n", | |
69 | trapnr); | |
70 | exit(EXIT_FAILURE); | |
71 | } | |
d2a56bd2 TS |
72 | process_pending_signals(env); |
73 | } | |
74 | } | |
75 | ||
76 | void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) | |
77 | { | |
78 | env->gpr[HEX_REG_PC] = regs->sepc; | |
79 | env->gpr[HEX_REG_SP] = regs->sp; | |
80 | env->gpr[HEX_REG_USR] = 0x56000; | |
81 | } |