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linux-user: fill target sigcontext struct accordingly
[mirror_qemu.git] / linux-user / main.c
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31e31b8a 1/*
93ac68bc 2 * qemu user main
5fafdf24 3 *
68d0f70e 4 * Copyright (c) 2003-2008 Fabrice Bellard
31e31b8a
FB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
8167ee88 17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
31e31b8a 18 */
d39594e9 19#include "qemu/osdep.h"
67a1de0d 20#include "qemu-version.h"
edf8e2af 21#include <sys/syscall.h>
703e0e89 22#include <sys/resource.h>
31e31b8a 23
daa76aa4 24#include "qapi/error.h"
3ef693a0 25#include "qemu.h"
f348b6d1 26#include "qemu/path.h"
6533dd6e 27#include "qemu/config-file.h"
f348b6d1
VB		 28#include "qemu/cutils.h"
29#include "qemu/help_option.h"
2b41f10e 30#include "cpu.h"
63c91552 31#include "exec/exec-all.h"
9002ec79 32#include "tcg.h"
1de7afc9
PB		 33#include "qemu/timer.h"
34#include "qemu/envlist.h"
d8fd2954 35#include "elf.h"
508127e2 36#include "exec/log.h"
6533dd6e
LV		 37#include "trace/control.h"
38#include "glib-compat.h"
04a6dfeb 39
d088d664
AJ		 40char *exec_path;
41
1b530a6d 42int singlestep;
8cb76755
SW		 43static const char *filename;
44static const char *argv0;
45static int gdbstub_port;
46static envlist_t *envlist;
51fb256a 47static const char *cpu_model;
379f6698
PB		 48unsigned long mmap_min_addr;
49unsigned long guest_base;
50int have_guest_base;
120a9848
PB		 51
52#define EXCP_DUMP(env, fmt, ...) \
53do { \
54 CPUState *cs = ENV_GET_CPU(env); \
55 fprintf(stderr, fmt , ## __VA_ARGS__); \
56 cpu_dump_state(cs, stderr, fprintf, 0); \
57 if (qemu_log_separate()) { \
58 qemu_log(fmt, ## __VA_ARGS__); \
59 log_cpu_state(cs, 0); \
60 } \
61} while (0)
62
288e65b9
AG		 63#if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
64/*
65 * When running 32-on-64 we should make sure we can fit all of the possible
66 * guest address space into a contiguous chunk of virtual host memory.
67 *
68 * This way we will never overlap with our own libraries or binaries or stack
69 * or anything else that QEMU maps.
70 */
a0a839b6
MV		 71# if defined(TARGET_MIPS) || defined(TARGET_NIOS2)
72/*
73 * MIPS only supports 31 bits of virtual address space for user space.
74 * Nios2 also only supports 31 bits.
75 */
314992b1
AG		 76unsigned long reserved_va = 0x77000000;
77# else
288e65b9 78unsigned long reserved_va = 0xf7000000;
314992b1 79# endif
288e65b9 80#else
68a1c816 81unsigned long reserved_va;
379f6698 82#endif
1b530a6d 83
d03f9c32 84static void usage(int exitcode);
fc9c5412 85
7ee2822c 86static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
e586822a 87const char *qemu_uname_release;
586314f2 88
9de5e440
FB		 89/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
90 we allocate a bigger stack. Need a better solution, for example
91 by remapping the process stack directly at the right place */
703e0e89 92unsigned long guest_stack_size = 8 * 1024 * 1024UL;
31e31b8a
FB		 93
94void gemu_log(const char *fmt, ...)
95{
96 va_list ap;
97
98 va_start(ap, fmt);
99 vfprintf(stderr, fmt, ap);
100 va_end(ap);
101}
102
8fcd3692 103#if defined(TARGET_I386)
05390248 104int cpu_get_pic_interrupt(CPUX86State *env)
92ccca6a
FB		 105{
106 return -1;
107}
8fcd3692 108#endif
92ccca6a 109
d5975363
PB		 110/***********************************************************/
111/* Helper routines for implementing atomic operations. */
112
d5975363
PB		 113/* Make sure everything is in a consistent state for calling fork(). */
114void fork_start(void)
115{
267f685b 116 cpu_list_lock();
677ef623 117 qemu_mutex_lock(&tcg_ctx.tb_ctx.tb_lock);
d032d1b4 118 mmap_fork_start();
d5975363
PB		 119}
120
121void fork_end(int child)
122{
d032d1b4 123 mmap_fork_end(child);
d5975363 124 if (child) {
bdc44640 125 CPUState *cpu, *next_cpu;
d5975363
PB		 126 /* Child processes created by fork() only have a single thread.
127 Discard information about the parent threads. */
bdc44640
AF		 128 CPU_FOREACH_SAFE(cpu, next_cpu) {
129 if (cpu != thread_cpu) {
014628a7 130 QTAILQ_REMOVE(&cpus, cpu, node);
bdc44640
AF		 131 }
132 }
677ef623 133 qemu_mutex_init(&tcg_ctx.tb_ctx.tb_lock);
267f685b 134 qemu_init_cpu_list();
f7ec7f7b 135 gdbserver_fork(thread_cpu);
d5975363 136 } else {
677ef623 137 qemu_mutex_unlock(&tcg_ctx.tb_ctx.tb_lock);
267f685b 138 cpu_list_unlock();
d5975363 139 }
d5975363
PB		 140}
141
a541f297
FB		 142#ifdef TARGET_I386
143/***********************************************************/
144/* CPUX86 core interface */
145
28ab0e2e
FB		 146uint64_t cpu_get_tsc(CPUX86State *env)
147{
4a7428c5 148 return cpu_get_host_ticks();
28ab0e2e
FB		 149}
150
5fafdf24 151static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
f4beb510 152 int flags)
6dbad63e 153{
f4beb510 154 unsigned int e1, e2;
53a5960a 155 uint32_t *p;
6dbad63e
FB		 156 e1 = (addr << 16) | (limit & 0xffff);
157 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
f4beb510 158 e2 |= flags;
53a5960a 159 p = ptr;
d538e8f5 160 p[0] = tswap32(e1);
161 p[1] = tswap32(e2);
f4beb510
FB		 162}
163
e441570f 164static uint64_t *idt_table;
eb38c52c 165#ifdef TARGET_X86_64
d2fd1af7
FB		 166static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
167 uint64_t addr, unsigned int sel)
f4beb510 168{
4dbc422b 169 uint32_t *p, e1, e2;
f4beb510
FB		 170 e1 = (addr & 0xffff) | (sel << 16);
171 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
53a5960a 172 p = ptr;
4dbc422b
FB		 173 p[0] = tswap32(e1);
174 p[1] = tswap32(e2);
175 p[2] = tswap32(addr >> 32);
176 p[3] = 0;
6dbad63e 177}
d2fd1af7
FB		 178/* only dpl matters as we do only user space emulation */
179static void set_idt(int n, unsigned int dpl)
180{
181 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
182}
183#else
d2fd1af7
FB		 184static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
185 uint32_t addr, unsigned int sel)
186{
4dbc422b 187 uint32_t *p, e1, e2;
d2fd1af7
FB		 188 e1 = (addr & 0xffff) | (sel << 16);
189 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
190 p = ptr;
4dbc422b
FB		 191 p[0] = tswap32(e1);
192 p[1] = tswap32(e2);
d2fd1af7
FB		 193}
194
f4beb510
FB		 195/* only dpl matters as we do only user space emulation */
196static void set_idt(int n, unsigned int dpl)
197{
198 set_gate(idt_table + n, 0, dpl, 0, 0);
199}
d2fd1af7 200#endif
31e31b8a 201
89e957e7 202void cpu_loop(CPUX86State *env)
1b6b029e 203{
db6b81d4 204 CPUState *cs = CPU(x86_env_get_cpu(env));
bc8a22cc 205 int trapnr;
992f48a0 206 abi_ulong pc;
0284b03b 207 abi_ulong ret;
c227f099 208 target_siginfo_t info;
851e67a1 209
1b6b029e 210 for(;;) {
b040bc9c 211 cpu_exec_start(cs);
8642c1b8 212 trapnr = cpu_exec(cs);
b040bc9c 213 cpu_exec_end(cs);
d148d90e
SF		 214 process_queued_cpu_work(cs);
215
bc8a22cc 216 switch(trapnr) {
f4beb510 217 case 0x80:
d2fd1af7 218 /* linux syscall from int $0x80 */
0284b03b
TB		 219 ret = do_syscall(env,
220 env->regs[R_EAX],
221 env->regs[R_EBX],
222 env->regs[R_ECX],
223 env->regs[R_EDX],
224 env->regs[R_ESI],
225 env->regs[R_EDI],
226 env->regs[R_EBP],
227 0, 0);
228 if (ret == -TARGET_ERESTARTSYS) {
229 env->eip -= 2;
230 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
231 env->regs[R_EAX] = ret;
232 }
f4beb510 233 break;
d2fd1af7
FB		 234#ifndef TARGET_ABI32
235 case EXCP_SYSCALL:
5ba18547 236 /* linux syscall from syscall instruction */
0284b03b
TB		 237 ret = do_syscall(env,
238 env->regs[R_EAX],
239 env->regs[R_EDI],
240 env->regs[R_ESI],
241 env->regs[R_EDX],
242 env->regs[10],
243 env->regs[8],
244 env->regs[9],
245 0, 0);
246 if (ret == -TARGET_ERESTARTSYS) {
247 env->eip -= 2;
248 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
249 env->regs[R_EAX] = ret;
250 }
d2fd1af7
FB		 251 break;
252#endif
f4beb510
FB		 253 case EXCP0B_NOSEG:
254 case EXCP0C_STACK:
a86b3c64 255 info.si_signo = TARGET_SIGBUS;
f4beb510
FB		 256 info.si_errno = 0;
257 info.si_code = TARGET_SI_KERNEL;
258 info._sifields._sigfault._addr = 0;
9d2803f7 259 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
f4beb510 260 break;
1b6b029e 261 case EXCP0D_GPF:
d2fd1af7 262 /* XXX: potential problem if ABI32 */
84409ddb 263#ifndef TARGET_X86_64
851e67a1 264 if (env->eflags & VM_MASK) {
89e957e7 265 handle_vm86_fault(env);
84409ddb
JM		 266 } else
267#endif
268 {
a86b3c64 269 info.si_signo = TARGET_SIGSEGV;
f4beb510
FB		 270 info.si_errno = 0;
271 info.si_code = TARGET_SI_KERNEL;
272 info._sifields._sigfault._addr = 0;
9d2803f7 273 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1b6b029e
FB		 274 }
275 break;
b689bc57 276 case EXCP0E_PAGE:
a86b3c64 277 info.si_signo = TARGET_SIGSEGV;
b689bc57
FB		 278 info.si_errno = 0;
279 if (!(env->error_code & 1))
280 info.si_code = TARGET_SEGV_MAPERR;
281 else
282 info.si_code = TARGET_SEGV_ACCERR;
970a87a6 283 info._sifields._sigfault._addr = env->cr[2];
9d2803f7 284 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
b689bc57 285 break;
9de5e440 286 case EXCP00_DIVZ:
84409ddb 287#ifndef TARGET_X86_64
bc8a22cc 288 if (env->eflags & VM_MASK) {
447db213 289 handle_vm86_trap(env, trapnr);
84409ddb
JM		 290 } else
291#endif
292 {
bc8a22cc 293 /* division by zero */
a86b3c64 294 info.si_signo = TARGET_SIGFPE;
bc8a22cc
FB		 295 info.si_errno = 0;
296 info.si_code = TARGET_FPE_INTDIV;
297 info._sifields._sigfault._addr = env->eip;
9d2803f7 298 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
bc8a22cc 299 }
9de5e440 300 break;
01df040b 301 case EXCP01_DB:
447db213 302 case EXCP03_INT3:
84409ddb 303#ifndef TARGET_X86_64
447db213
FB		 304 if (env->eflags & VM_MASK) {
305 handle_vm86_trap(env, trapnr);
84409ddb
JM		 306 } else
307#endif
308 {
a86b3c64 309 info.si_signo = TARGET_SIGTRAP;
447db213 310 info.si_errno = 0;
01df040b 311 if (trapnr == EXCP01_DB) {
447db213
FB		 312 info.si_code = TARGET_TRAP_BRKPT;
313 info._sifields._sigfault._addr = env->eip;
314 } else {
315 info.si_code = TARGET_SI_KERNEL;
316 info._sifields._sigfault._addr = 0;
317 }
9d2803f7 318 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
447db213
FB		 319 }
320 break;
9de5e440
FB		 321 case EXCP04_INTO:
322 case EXCP05_BOUND:
84409ddb 323#ifndef TARGET_X86_64
bc8a22cc 324 if (env->eflags & VM_MASK) {
447db213 325 handle_vm86_trap(env, trapnr);
84409ddb
JM		 326 } else
327#endif
328 {
a86b3c64 329 info.si_signo = TARGET_SIGSEGV;
bc8a22cc 330 info.si_errno = 0;
b689bc57 331 info.si_code = TARGET_SI_KERNEL;
bc8a22cc 332 info._sifields._sigfault._addr = 0;
9d2803f7 333 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
bc8a22cc 334 }
9de5e440
FB		 335 break;
336 case EXCP06_ILLOP:
a86b3c64 337 info.si_signo = TARGET_SIGILL;
9de5e440
FB		 338 info.si_errno = 0;
339 info.si_code = TARGET_ILL_ILLOPN;
340 info._sifields._sigfault._addr = env->eip;
9d2803f7 341 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
9de5e440
FB		 342 break;
343 case EXCP_INTERRUPT:
344 /* just indicate that signals should be handled asap */
345 break;
1fddef4b
FB		 346 case EXCP_DEBUG:
347 {
348 int sig;
349
db6b81d4 350 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
1fddef4b
FB		 351 if (sig)
352 {
353 info.si_signo = sig;
354 info.si_errno = 0;
355 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 356 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1fddef4b
FB		 357 }
358 }
359 break;
fdbc2b57
RH		 360 case EXCP_ATOMIC:
361 cpu_exec_step_atomic(cs);
362 break;
1b6b029e 363 default:
970a87a6 364 pc = env->segs[R_CS].base + env->eip;
120a9848
PB		 365 EXCP_DUMP(env, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
366 (long)pc, trapnr);
1b6b029e
FB		 367 abort();
368 }
66fb9763 369 process_pending_signals(env);
1b6b029e
FB		 370 }
371}
b346ff46
FB		 372#endif
373
374#ifdef TARGET_ARM
375
49017bd8 376#define get_user_code_u32(x, gaddr, env) \
d8fd2954 377 ({ abi_long __r = get_user_u32((x), (gaddr)); \
f9fd40eb 378 if (!__r && bswap_code(arm_sctlr_b(env))) { \
d8fd2954
PB		 379 (x) = bswap32(x); \
380 } \
381 __r; \
382 })
383
49017bd8 384#define get_user_code_u16(x, gaddr, env) \
d8fd2954 385 ({ abi_long __r = get_user_u16((x), (gaddr)); \
f9fd40eb 386 if (!__r && bswap_code(arm_sctlr_b(env))) { \
d8fd2954
PB		 387 (x) = bswap16(x); \
388 } \
389 __r; \
390 })
391
c3ae85fc
PB		 392#define get_user_data_u32(x, gaddr, env) \
393 ({ abi_long __r = get_user_u32((x), (gaddr)); \
394 if (!__r && arm_cpu_bswap_data(env)) { \
395 (x) = bswap32(x); \
396 } \
397 __r; \
398 })
399
400#define get_user_data_u16(x, gaddr, env) \
401 ({ abi_long __r = get_user_u16((x), (gaddr)); \
402 if (!__r && arm_cpu_bswap_data(env)) { \
403 (x) = bswap16(x); \
404 } \
405 __r; \
406 })
407
408#define put_user_data_u32(x, gaddr, env) \
409 ({ typeof(x) __x = (x); \
410 if (arm_cpu_bswap_data(env)) { \
411 __x = bswap32(__x); \
412 } \
413 put_user_u32(__x, (gaddr)); \
414 })
415
416#define put_user_data_u16(x, gaddr, env) \
417 ({ typeof(x) __x = (x); \
418 if (arm_cpu_bswap_data(env)) { \
419 __x = bswap16(__x); \
420 } \
421 put_user_u16(__x, (gaddr)); \
422 })
423
1861c454
PM		 424#ifdef TARGET_ABI32
425/* Commpage handling -- there is no commpage for AArch64 */
426
97cc7560
DDAG		 427/*
428 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
429 * Input:
430 * r0 = pointer to oldval
431 * r1 = pointer to newval
432 * r2 = pointer to target value
433 *
434 * Output:
435 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
436 * C set if *ptr was changed, clear if no exchange happened
437 *
438 * Note segv's in kernel helpers are a bit tricky, we can set the
439 * data address sensibly but the PC address is just the entry point.
440 */
441static void arm_kernel_cmpxchg64_helper(CPUARMState *env)
442{
443 uint64_t oldval, newval, val;
444 uint32_t addr, cpsr;
445 target_siginfo_t info;
446
447 /* Based on the 32 bit code in do_kernel_trap */
448
449 /* XXX: This only works between threads, not between processes.
450 It's probably possible to implement this with native host
451 operations. However things like ldrex/strex are much harder so
452 there's not much point trying. */
453 start_exclusive();
454 cpsr = cpsr_read(env);
455 addr = env->regs[2];
456
457 if (get_user_u64(oldval, env->regs[0])) {
abf1172f 458 env->exception.vaddress = env->regs[0];
97cc7560
DDAG		 459 goto segv;
460 };
461
462 if (get_user_u64(newval, env->regs[1])) {
abf1172f 463 env->exception.vaddress = env->regs[1];
97cc7560
DDAG		 464 goto segv;
465 };
466
467 if (get_user_u64(val, addr)) {
abf1172f 468 env->exception.vaddress = addr;
97cc7560
DDAG		 469 goto segv;
470 }
471
472 if (val == oldval) {
473 val = newval;
474
475 if (put_user_u64(val, addr)) {
abf1172f 476 env->exception.vaddress = addr;
97cc7560
DDAG		 477 goto segv;
478 };
479
480 env->regs[0] = 0;
481 cpsr |= CPSR_C;
482 } else {
483 env->regs[0] = -1;
484 cpsr &= ~CPSR_C;
485 }
50866ba5 486 cpsr_write(env, cpsr, CPSR_C, CPSRWriteByInstr);
97cc7560
DDAG		 487 end_exclusive();
488 return;
489
490segv:
491 end_exclusive();
492 /* We get the PC of the entry address - which is as good as anything,
493 on a real kernel what you get depends on which mode it uses. */
a86b3c64 494 info.si_signo = TARGET_SIGSEGV;
97cc7560
DDAG		 495 info.si_errno = 0;
496 /* XXX: check env->error_code */
497 info.si_code = TARGET_SEGV_MAPERR;
abf1172f 498 info._sifields._sigfault._addr = env->exception.vaddress;
9d2803f7 499 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
97cc7560
DDAG		 500}
501
fbb4a2e3
PB		 502/* Handle a jump to the kernel code page. */
503static int
504do_kernel_trap(CPUARMState *env)
505{
506 uint32_t addr;
507 uint32_t cpsr;
508 uint32_t val;
509
510 switch (env->regs[15]) {
511 case 0xffff0fa0: /* __kernel_memory_barrier */
512 /* ??? No-op. Will need to do better for SMP. */
513 break;
514 case 0xffff0fc0: /* __kernel_cmpxchg */
d5975363
PB		 515 /* XXX: This only works between threads, not between processes.
516 It's probably possible to implement this with native host
517 operations. However things like ldrex/strex are much harder so
518 there's not much point trying. */
519 start_exclusive();
fbb4a2e3
PB		 520 cpsr = cpsr_read(env);
521 addr = env->regs[2];
522 /* FIXME: This should SEGV if the access fails. */
523 if (get_user_u32(val, addr))
524 val = ~env->regs[0];
525 if (val == env->regs[0]) {
526 val = env->regs[1];
527 /* FIXME: Check for segfaults. */
528 put_user_u32(val, addr);
529 env->regs[0] = 0;
530 cpsr |= CPSR_C;
531 } else {
532 env->regs[0] = -1;
533 cpsr &= ~CPSR_C;
534 }
50866ba5 535 cpsr_write(env, cpsr, CPSR_C, CPSRWriteByInstr);
d5975363 536 end_exclusive();
fbb4a2e3
PB		 537 break;
538 case 0xffff0fe0: /* __kernel_get_tls */
b8d43285 539 env->regs[0] = cpu_get_tls(env);
fbb4a2e3 540 break;
97cc7560
DDAG		 541 case 0xffff0f60: /* __kernel_cmpxchg64 */
542 arm_kernel_cmpxchg64_helper(env);
543 break;
544
fbb4a2e3
PB		 545 default:
546 return 1;
547 }
548 /* Jump back to the caller. */
549 addr = env->regs[14];
550 if (addr & 1) {
551 env->thumb = 1;
552 addr &= ~1;
553 }
554 env->regs[15] = addr;
555
556 return 0;
557}
558
b346ff46
FB		 559void cpu_loop(CPUARMState *env)
560{
0315c31c 561 CPUState *cs = CPU(arm_env_get_cpu(env));
b346ff46
FB		 562 int trapnr;
563 unsigned int n, insn;
c227f099 564 target_siginfo_t info;
b5ff1b31 565 uint32_t addr;
f0267ef7 566 abi_ulong ret;
3b46e624 567
b346ff46 568 for(;;) {
0315c31c 569 cpu_exec_start(cs);
8642c1b8 570 trapnr = cpu_exec(cs);
0315c31c 571 cpu_exec_end(cs);
d148d90e
SF		 572 process_queued_cpu_work(cs);
573
b346ff46
FB		 574 switch(trapnr) {
575 case EXCP_UDEF:
7517748e 576 case EXCP_NOCP:
c6981055 577 {
0429a971 578 TaskState *ts = cs->opaque;
c6981055 579 uint32_t opcode;
6d9a42be 580 int rc;
c6981055
FB		 581
582 /* we handle the FPU emulation here, as Linux */
583 /* we get the opcode */
2f619698 584 /* FIXME - what to do if get_user() fails? */
49017bd8 585 get_user_code_u32(opcode, env->regs[15], env);
3b46e624 586
6d9a42be
AJ		 587 rc = EmulateAll(opcode, &ts->fpa, env);
588 if (rc == 0) { /* illegal instruction */
a86b3c64 589 info.si_signo = TARGET_SIGILL;
c6981055
FB		 590 info.si_errno = 0;
591 info.si_code = TARGET_ILL_ILLOPN;
592 info._sifields._sigfault._addr = env->regs[15];
9d2803f7 593 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
6d9a42be
AJ		 594 } else if (rc < 0) { /* FP exception */
595 int arm_fpe=0;
596
597 /* translate softfloat flags to FPSR flags */
598 if (-rc & float_flag_invalid)
599 arm_fpe |= BIT_IOC;
600 if (-rc & float_flag_divbyzero)
601 arm_fpe |= BIT_DZC;
602 if (-rc & float_flag_overflow)
603 arm_fpe |= BIT_OFC;
604 if (-rc & float_flag_underflow)
605 arm_fpe |= BIT_UFC;
606 if (-rc & float_flag_inexact)
607 arm_fpe |= BIT_IXC;
608
609 FPSR fpsr = ts->fpa.fpsr;
610 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
611
612 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
a86b3c64 613 info.si_signo = TARGET_SIGFPE;
6d9a42be
AJ		 614 info.si_errno = 0;
615
616 /* ordered by priority, least first */
617 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
618 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
619 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
620 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
621 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
622
623 info._sifields._sigfault._addr = env->regs[15];
9d2803f7 624 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
6d9a42be
AJ		 625 } else {
626 env->regs[15] += 4;
627 }
628
629 /* accumulate unenabled exceptions */
630 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
631 fpsr |= BIT_IXC;
632 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
633 fpsr |= BIT_UFC;
634 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
635 fpsr |= BIT_OFC;
636 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
637 fpsr |= BIT_DZC;
638 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
639 fpsr |= BIT_IOC;
640 ts->fpa.fpsr=fpsr;
641 } else { /* everything OK */
c6981055
FB		 642 /* increment PC */
643 env->regs[15] += 4;
644 }
645 }
b346ff46
FB		 646 break;
647 case EXCP_SWI:
06c949e6 648 case EXCP_BKPT:
b346ff46 649 {
ce4defa0 650 env->eabi = 1;
b346ff46 651 /* system call */
06c949e6
PB		 652 if (trapnr == EXCP_BKPT) {
653 if (env->thumb) {
2f619698 654 /* FIXME - what to do if get_user() fails? */
49017bd8 655 get_user_code_u16(insn, env->regs[15], env);
06c949e6
PB		 656 n = insn & 0xff;
657 env->regs[15] += 2;
658 } else {
2f619698 659 /* FIXME - what to do if get_user() fails? */
49017bd8 660 get_user_code_u32(insn, env->regs[15], env);
06c949e6
PB		 661 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
662 env->regs[15] += 4;
663 }
192c7bd9 664 } else {
06c949e6 665 if (env->thumb) {
2f619698 666 /* FIXME - what to do if get_user() fails? */
49017bd8 667 get_user_code_u16(insn, env->regs[15] - 2, env);
06c949e6
PB		 668 n = insn & 0xff;
669 } else {
2f619698 670 /* FIXME - what to do if get_user() fails? */
49017bd8 671 get_user_code_u32(insn, env->regs[15] - 4, env);
06c949e6
PB		 672 n = insn & 0xffffff;
673 }
192c7bd9
FB		 674 }
675
6f1f31c0 676 if (n == ARM_NR_cacheflush) {
dcfd14b3 677 /* nop */
a4f81979
FB		 678 } else if (n == ARM_NR_semihosting
679 || n == ARM_NR_thumb_semihosting) {
680 env->regs[0] = do_arm_semihosting (env);
3a1363ac 681 } else if (n == 0 || n >= ARM_SYSCALL_BASE || env->thumb) {
b346ff46 682 /* linux syscall */
ce4defa0 683 if (env->thumb || n == 0) {
192c7bd9
FB		 684 n = env->regs[7];
685 } else {
686 n -= ARM_SYSCALL_BASE;
ce4defa0 687 env->eabi = 0;
192c7bd9 688 }
fbb4a2e3
PB		 689 if ( n > ARM_NR_BASE) {
690 switch (n) {
691 case ARM_NR_cacheflush:
dcfd14b3 692 /* nop */
fbb4a2e3
PB		 693 break;
694 case ARM_NR_set_tls:
695 cpu_set_tls(env, env->regs[0]);
696 env->regs[0] = 0;
697 break;
d5355087
HL		 698 case ARM_NR_breakpoint:
699 env->regs[15] -= env->thumb ? 2 : 4;
700 goto excp_debug;
fbb4a2e3
PB		 701 default:
702 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
703 n);
704 env->regs[0] = -TARGET_ENOSYS;
705 break;
706 }
707 } else {
f0267ef7
TB		 708 ret = do_syscall(env,
709 n,
710 env->regs[0],
711 env->regs[1],
712 env->regs[2],
713 env->regs[3],
714 env->regs[4],
715 env->regs[5],
716 0, 0);
717 if (ret == -TARGET_ERESTARTSYS) {
718 env->regs[15] -= env->thumb ? 2 : 4;
719 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
720 env->regs[0] = ret;
721 }
fbb4a2e3 722 }
b346ff46
FB		 723 } else {
724 goto error;
725 }
726 }
727 break;
19a6e31c
PM		 728 case EXCP_SEMIHOST:
729 env->regs[0] = do_arm_semihosting(env);
730 break;
43fff238
FB		 731 case EXCP_INTERRUPT:
732 /* just indicate that signals should be handled asap */
733 break;
68016c62
FB		 734 case EXCP_PREFETCH_ABORT:
735 case EXCP_DATA_ABORT:
abf1172f 736 addr = env->exception.vaddress;
68016c62 737 {
a86b3c64 738 info.si_signo = TARGET_SIGSEGV;
68016c62
FB		 739 info.si_errno = 0;
740 /* XXX: check env->error_code */
741 info.si_code = TARGET_SEGV_MAPERR;
b5ff1b31 742 info._sifields._sigfault._addr = addr;
9d2803f7 743 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
68016c62
FB		 744 }
745 break;
1fddef4b 746 case EXCP_DEBUG:
d5355087 747 excp_debug:
1fddef4b
FB		 748 {
749 int sig;
750
db6b81d4 751 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
1fddef4b
FB		 752 if (sig)
753 {
754 info.si_signo = sig;
755 info.si_errno = 0;
756 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 757 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1fddef4b
FB		 758 }
759 }
760 break;
fbb4a2e3
PB		 761 case EXCP_KERNEL_TRAP:
762 if (do_kernel_trap(env))
763 goto error;
764 break;
f911e0a3
PM		 765 case EXCP_YIELD:
766 /* nothing to do here for user-mode, just resume guest code */
767 break;
fdbc2b57
RH		 768 case EXCP_ATOMIC:
769 cpu_exec_step_atomic(cs);
770 break;
b346ff46
FB		 771 default:
772 error:
120a9848 773 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
b346ff46
FB		 774 abort();
775 }
776 process_pending_signals(env);
777 }
778}
779
1861c454
PM		 780#else
781
782/* AArch64 main loop */
783void cpu_loop(CPUARMState *env)
784{
785 CPUState *cs = CPU(arm_env_get_cpu(env));
786 int trapnr, sig;
f0267ef7 787 abi_long ret;
1861c454 788 target_siginfo_t info;
1861c454
PM		 789
790 for (;;) {
791 cpu_exec_start(cs);
8642c1b8 792 trapnr = cpu_exec(cs);
1861c454 793 cpu_exec_end(cs);
d148d90e 794 process_queued_cpu_work(cs);
1861c454
PM		 795
796 switch (trapnr) {
797 case EXCP_SWI:
f0267ef7
TB		 798 ret = do_syscall(env,
799 env->xregs[8],
800 env->xregs[0],
801 env->xregs[1],
802 env->xregs[2],
803 env->xregs[3],
804 env->xregs[4],
805 env->xregs[5],
806 0, 0);
807 if (ret == -TARGET_ERESTARTSYS) {
808 env->pc -= 4;
809 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
810 env->xregs[0] = ret;
811 }
1861c454
PM		 812 break;
813 case EXCP_INTERRUPT:
814 /* just indicate that signals should be handled asap */
815 break;
816 case EXCP_UDEF:
a86b3c64 817 info.si_signo = TARGET_SIGILL;
1861c454
PM		 818 info.si_errno = 0;
819 info.si_code = TARGET_ILL_ILLOPN;
820 info._sifields._sigfault._addr = env->pc;
9d2803f7 821 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1861c454
PM		 822 break;
823 case EXCP_PREFETCH_ABORT:
1861c454 824 case EXCP_DATA_ABORT:
a86b3c64 825 info.si_signo = TARGET_SIGSEGV;
1861c454
PM		 826 info.si_errno = 0;
827 /* XXX: check env->error_code */
828 info.si_code = TARGET_SEGV_MAPERR;
686581ad 829 info._sifields._sigfault._addr = env->exception.vaddress;
9d2803f7 830 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1861c454
PM		 831 break;
832 case EXCP_DEBUG:
833 case EXCP_BKPT:
834 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
835 if (sig) {
836 info.si_signo = sig;
837 info.si_errno = 0;
838 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 839 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1861c454
PM		 840 }
841 break;
8012c84f
PM		 842 case EXCP_SEMIHOST:
843 env->xregs[0] = do_arm_semihosting(env);
844 break;
f911e0a3
PM		 845 case EXCP_YIELD:
846 /* nothing to do here for user-mode, just resume guest code */
847 break;
fdbc2b57
RH		 848 case EXCP_ATOMIC:
849 cpu_exec_step_atomic(cs);
850 break;
1861c454 851 default:
120a9848 852 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
1861c454
PM		 853 abort();
854 }
855 process_pending_signals(env);
fa2ef212
MM		 856 /* Exception return on AArch64 always clears the exclusive monitor,
857 * so any return to running guest code implies this.
fa2ef212
MM		 858 */
859 env->exclusive_addr = -1;
1861c454
PM		 860 }
861}
862#endif /* ndef TARGET_ABI32 */
863
b346ff46 864#endif
1b6b029e 865
d2fbca94
GX		 866#ifdef TARGET_UNICORE32
867
05390248 868void cpu_loop(CPUUniCore32State *env)
d2fbca94 869{
0315c31c 870 CPUState *cs = CPU(uc32_env_get_cpu(env));
d2fbca94
GX		 871 int trapnr;
872 unsigned int n, insn;
873 target_siginfo_t info;
874
875 for (;;) {
0315c31c 876 cpu_exec_start(cs);
8642c1b8 877 trapnr = cpu_exec(cs);
0315c31c 878 cpu_exec_end(cs);
d148d90e
SF		 879 process_queued_cpu_work(cs);
880
d2fbca94
GX		 881 switch (trapnr) {
882 case UC32_EXCP_PRIV:
883 {
884 /* system call */
885 get_user_u32(insn, env->regs[31] - 4);
886 n = insn & 0xffffff;
887
888 if (n >= UC32_SYSCALL_BASE) {
889 /* linux syscall */
890 n -= UC32_SYSCALL_BASE;
891 if (n == UC32_SYSCALL_NR_set_tls) {
892 cpu_set_tls(env, env->regs[0]);
893 env->regs[0] = 0;
894 } else {
256cb6af 895 abi_long ret = do_syscall(env,
d2fbca94
GX		 896 n,
897 env->regs[0],
898 env->regs[1],
899 env->regs[2],
900 env->regs[3],
901 env->regs[4],
5945cfcb
PM		 902 env->regs[5],
903 0, 0);
256cb6af
TB		 904 if (ret == -TARGET_ERESTARTSYS) {
905 env->regs[31] -= 4;
906 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
907 env->regs[0] = ret;
908 }
d2fbca94
GX		 909 }
910 } else {
911 goto error;
912 }
913 }
914 break;
d48813dd
GX		 915 case UC32_EXCP_DTRAP:
916 case UC32_EXCP_ITRAP:
a86b3c64 917 info.si_signo = TARGET_SIGSEGV;
d2fbca94
GX		 918 info.si_errno = 0;
919 /* XXX: check env->error_code */
920 info.si_code = TARGET_SEGV_MAPERR;
921 info._sifields._sigfault._addr = env->cp0.c4_faultaddr;
9d2803f7 922 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
d2fbca94
GX		 923 break;
924 case EXCP_INTERRUPT:
925 /* just indicate that signals should be handled asap */
926 break;
927 case EXCP_DEBUG:
928 {
929 int sig;
930
db6b81d4 931 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
d2fbca94
GX		 932 if (sig) {
933 info.si_signo = sig;
934 info.si_errno = 0;
935 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 936 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
d2fbca94
GX		 937 }
938 }
939 break;
fdbc2b57
RH		 940 case EXCP_ATOMIC:
941 cpu_exec_step_atomic(cs);
942 break;
d2fbca94
GX		 943 default:
944 goto error;
945 }
946 process_pending_signals(env);
947 }
948
949error:
120a9848 950 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
d2fbca94
GX		 951 abort();
952}
953#endif
954
93ac68bc 955#ifdef TARGET_SPARC
ed23fbd9 956#define SPARC64_STACK_BIAS 2047
93ac68bc 957
060366c5
FB		 958//#define DEBUG_WIN
959
2623cbaf
FB		 960/* WARNING: dealing with register windows _is_ complicated. More info
961 can be found at http://www.sics.se/~psm/sparcstack.html */
060366c5
FB		 962static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
963{
1a14026e 964 index = (index + cwp * 16) % (16 * env->nwindows);
060366c5
FB		 965 /* wrap handling : if cwp is on the last window, then we use the
966 registers 'after' the end */
1a14026e
BS		 967 if (index < 8 && env->cwp == env->nwindows - 1)
968 index += 16 * env->nwindows;
060366c5
FB		 969 return index;
970}
971
2623cbaf
FB		 972/* save the register window 'cwp1' */
973static inline void save_window_offset(CPUSPARCState *env, int cwp1)
060366c5 974{
2623cbaf 975 unsigned int i;
992f48a0 976 abi_ulong sp_ptr;
3b46e624 977
53a5960a 978 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 979#ifdef TARGET_SPARC64
980 if (sp_ptr & 3)
981 sp_ptr += SPARC64_STACK_BIAS;
982#endif
060366c5 983#if defined(DEBUG_WIN)
2daf0284
BS		 984 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
985 sp_ptr, cwp1);
060366c5 986#endif
2623cbaf 987 for(i = 0; i < 16; i++) {
2f619698
FB		 988 /* FIXME - what to do if put_user() fails? */
989 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 990 sp_ptr += sizeof(abi_ulong);
2623cbaf 991 }
060366c5
FB		 992}
993
994static void save_window(CPUSPARCState *env)
995{
5ef54116 996#ifndef TARGET_SPARC64
2623cbaf 997 unsigned int new_wim;
1a14026e
BS		 998 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
999 ((1LL << env->nwindows) - 1);
1000 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
2623cbaf 1001 env->wim = new_wim;
5ef54116 1002#else
1a14026e 1003 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
5ef54116
FB		 1004 env->cansave++;
1005 env->canrestore--;
1006#endif
060366c5
FB		 1007}
1008
1009static void restore_window(CPUSPARCState *env)
1010{
eda52953
BS		 1011#ifndef TARGET_SPARC64
1012 unsigned int new_wim;
1013#endif
1014 unsigned int i, cwp1;
992f48a0 1015 abi_ulong sp_ptr;
3b46e624 1016
eda52953 1017#ifndef TARGET_SPARC64
1a14026e
BS		 1018 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
1019 ((1LL << env->nwindows) - 1);
eda52953 1020#endif
3b46e624 1021
060366c5 1022 /* restore the invalid window */
1a14026e 1023 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
53a5960a 1024 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 1025#ifdef TARGET_SPARC64
1026 if (sp_ptr & 3)
1027 sp_ptr += SPARC64_STACK_BIAS;
1028#endif
060366c5 1029#if defined(DEBUG_WIN)
2daf0284
BS		 1030 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
1031 sp_ptr, cwp1);
060366c5 1032#endif
2623cbaf 1033 for(i = 0; i < 16; i++) {
2f619698
FB		 1034 /* FIXME - what to do if get_user() fails? */
1035 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 1036 sp_ptr += sizeof(abi_ulong);
2623cbaf 1037 }
5ef54116
FB		 1038#ifdef TARGET_SPARC64
1039 env->canrestore++;
1a14026e
BS		 1040 if (env->cleanwin < env->nwindows - 1)
1041 env->cleanwin++;
5ef54116 1042 env->cansave--;
eda52953
BS		 1043#else
1044 env->wim = new_wim;
5ef54116 1045#endif
060366c5
FB		 1046}
1047
1048static void flush_windows(CPUSPARCState *env)
1049{
1050 int offset, cwp1;
2623cbaf
FB		 1051
1052 offset = 1;
060366c5
FB		 1053 for(;;) {
1054 /* if restore would invoke restore_window(), then we can stop */
1a14026e 1055 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
eda52953 1056#ifndef TARGET_SPARC64
060366c5
FB		 1057 if (env->wim & (1 << cwp1))
1058 break;
eda52953
BS		 1059#else
1060 if (env->canrestore == 0)
1061 break;
1062 env->cansave++;
1063 env->canrestore--;
1064#endif
2623cbaf 1065 save_window_offset(env, cwp1);
060366c5
FB		 1066 offset++;
1067 }
1a14026e 1068 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
eda52953
BS		 1069#ifndef TARGET_SPARC64
1070 /* set wim so that restore will reload the registers */
2623cbaf 1071 env->wim = 1 << cwp1;
eda52953 1072#endif
2623cbaf
FB		 1073#if defined(DEBUG_WIN)
1074 printf("flush_windows: nb=%d\n", offset - 1);
80a9d035 1075#endif
2623cbaf 1076}
060366c5 1077
93ac68bc
FB		 1078void cpu_loop (CPUSPARCState *env)
1079{
878096ee 1080 CPUState *cs = CPU(sparc_env_get_cpu(env));
2cc20260
RH		 1081 int trapnr;
1082 abi_long ret;
c227f099 1083 target_siginfo_t info;
3b46e624 1084
060366c5 1085 while (1) {
b040bc9c 1086 cpu_exec_start(cs);
8642c1b8 1087 trapnr = cpu_exec(cs);
b040bc9c 1088 cpu_exec_end(cs);
d148d90e 1089 process_queued_cpu_work(cs);
3b46e624 1090
20132b96
RH		 1091 /* Compute PSR before exposing state. */
1092 if (env->cc_op != CC_OP_FLAGS) {
1093 cpu_get_psr(env);
1094 }
1095
060366c5 1096 switch (trapnr) {
5ef54116 1097#ifndef TARGET_SPARC64
5fafdf24 1098 case 0x88:
060366c5 1099 case 0x90:
5ef54116 1100#else
cb33da57 1101 case 0x110:
5ef54116
FB		 1102 case 0x16d:
1103#endif
060366c5 1104 ret = do_syscall (env, env->gregs[1],
5fafdf24
TS		 1105 env->regwptr[0], env->regwptr[1],
1106 env->regwptr[2], env->regwptr[3],
5945cfcb
PM		 1107 env->regwptr[4], env->regwptr[5],
1108 0, 0);
c0bea68f
TB		 1109 if (ret == -TARGET_ERESTARTSYS || ret == -TARGET_QEMU_ESIGRETURN) {
1110 break;
1111 }
2cc20260 1112 if ((abi_ulong)ret >= (abi_ulong)(-515)) {
992f48a0 1113#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 1114 env->xcc |= PSR_CARRY;
1115#else
060366c5 1116 env->psr |= PSR_CARRY;
27908725 1117#endif
060366c5
FB		 1118 ret = -ret;
1119 } else {
992f48a0 1120#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 1121 env->xcc &= ~PSR_CARRY;
1122#else
060366c5 1123 env->psr &= ~PSR_CARRY;
27908725 1124#endif
060366c5
FB		 1125 }
1126 env->regwptr[0] = ret;
1127 /* next instruction */
1128 env->pc = env->npc;
1129 env->npc = env->npc + 4;
1130 break;
1131 case 0x83: /* flush windows */
992f48a0
BS		 1132#ifdef TARGET_ABI32
1133 case 0x103:
1134#endif
2623cbaf 1135 flush_windows(env);
060366c5
FB		 1136 /* next instruction */
1137 env->pc = env->npc;
1138 env->npc = env->npc + 4;
1139 break;
3475187d 1140#ifndef TARGET_SPARC64
060366c5
FB		 1141 case TT_WIN_OVF: /* window overflow */
1142 save_window(env);
1143 break;
1144 case TT_WIN_UNF: /* window underflow */
1145 restore_window(env);
1146 break;
61ff6f58
FB		 1147 case TT_TFAULT:
1148 case TT_DFAULT:
1149 {
59f7182f 1150 info.si_signo = TARGET_SIGSEGV;
61ff6f58
FB		 1151 info.si_errno = 0;
1152 /* XXX: check env->error_code */
1153 info.si_code = TARGET_SEGV_MAPERR;
1154 info._sifields._sigfault._addr = env->mmuregs[4];
9d2803f7 1155 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
61ff6f58
FB		 1156 }
1157 break;
3475187d 1158#else
5ef54116
FB		 1159 case TT_SPILL: /* window overflow */
1160 save_window(env);
1161 break;
1162 case TT_FILL: /* window underflow */
1163 restore_window(env);
1164 break;
7f84a729
BS		 1165 case TT_TFAULT:
1166 case TT_DFAULT:
1167 {
59f7182f 1168 info.si_signo = TARGET_SIGSEGV;
7f84a729
BS		 1169 info.si_errno = 0;
1170 /* XXX: check env->error_code */
1171 info.si_code = TARGET_SEGV_MAPERR;
1172 if (trapnr == TT_DFAULT)
96df2bc9 1173 info._sifields._sigfault._addr = env->dmmu.mmuregs[4];
7f84a729 1174 else
8194f35a 1175 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
9d2803f7 1176 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
7f84a729
BS		 1177 }
1178 break;
27524dc3 1179#ifndef TARGET_ABI32
5bfb56b2
BS		 1180 case 0x16e:
1181 flush_windows(env);
1182 sparc64_get_context(env);
1183 break;
1184 case 0x16f:
1185 flush_windows(env);
1186 sparc64_set_context(env);
1187 break;
27524dc3 1188#endif
3475187d 1189#endif
48dc41eb
FB		 1190 case EXCP_INTERRUPT:
1191 /* just indicate that signals should be handled asap */
1192 break;
75f22e4e
RH		 1193 case TT_ILL_INSN:
1194 {
1195 info.si_signo = TARGET_SIGILL;
1196 info.si_errno = 0;
1197 info.si_code = TARGET_ILL_ILLOPC;
1198 info._sifields._sigfault._addr = env->pc;
9d2803f7 1199 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
75f22e4e
RH		 1200 }
1201 break;
1fddef4b
FB		 1202 case EXCP_DEBUG:
1203 {
1204 int sig;
1205
db6b81d4 1206 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
1fddef4b
FB		 1207 if (sig)
1208 {
1209 info.si_signo = sig;
1210 info.si_errno = 0;
1211 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 1212 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1fddef4b
FB		 1213 }
1214 }
1215 break;
fdbc2b57
RH		 1216 case EXCP_ATOMIC:
1217 cpu_exec_step_atomic(cs);
1218 break;
060366c5
FB		 1219 default:
1220 printf ("Unhandled trap: 0x%x\n", trapnr);
878096ee 1221 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 1222 exit(EXIT_FAILURE);
060366c5
FB		 1223 }
1224 process_pending_signals (env);
1225 }
93ac68bc
FB		 1226}
1227
1228#endif
1229
67867308 1230#ifdef TARGET_PPC
05390248 1231static inline uint64_t cpu_ppc_get_tb(CPUPPCState *env)
9fddaa0c 1232{
4a7428c5 1233 return cpu_get_host_ticks();
9fddaa0c 1234}
3b46e624 1235
05390248 1236uint64_t cpu_ppc_load_tbl(CPUPPCState *env)
9fddaa0c 1237{
e3ea6529 1238 return cpu_ppc_get_tb(env);
9fddaa0c 1239}
3b46e624 1240
05390248 1241uint32_t cpu_ppc_load_tbu(CPUPPCState *env)
9fddaa0c
FB		 1242{
1243 return cpu_ppc_get_tb(env) >> 32;
1244}
3b46e624 1245
05390248 1246uint64_t cpu_ppc_load_atbl(CPUPPCState *env)
9fddaa0c 1247{
b711de95 1248 return cpu_ppc_get_tb(env);
9fddaa0c 1249}
5fafdf24 1250
05390248 1251uint32_t cpu_ppc_load_atbu(CPUPPCState *env)
9fddaa0c 1252{
a062e36c 1253 return cpu_ppc_get_tb(env) >> 32;
9fddaa0c 1254}
76a66253 1255
05390248 1256uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env)
76a66253
JM		 1257__attribute__ (( alias ("cpu_ppc_load_tbu") ));
1258
05390248 1259uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env)
9fddaa0c 1260{
76a66253 1261 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
9fddaa0c 1262}
76a66253 1263
a750fc0b 1264/* XXX: to be fixed */
73b01960 1265int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp)
a750fc0b
JM		 1266{
1267 return -1;
1268}
1269
73b01960 1270int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val)
a750fc0b
JM		 1271{
1272 return -1;
1273}
1274
56f066bb
NF		 1275static int do_store_exclusive(CPUPPCState *env)
1276{
1277 target_ulong addr;
1278 target_ulong page_addr;
e22c357b 1279 target_ulong val, val2 __attribute__((unused)) = 0;
56f066bb
NF		 1280 int flags;
1281 int segv = 0;
1282
1283 addr = env->reserve_ea;
1284 page_addr = addr & TARGET_PAGE_MASK;
1285 start_exclusive();
1286 mmap_lock();
1287 flags = page_get_flags(page_addr);
1288 if ((flags & PAGE_READ) == 0) {
1289 segv = 1;
1290 } else {
1291 int reg = env->reserve_info & 0x1f;
4b1daa72 1292 int size = env->reserve_info >> 5;
56f066bb
NF		 1293 int stored = 0;
1294
1295 if (addr == env->reserve_addr) {
1296 switch (size) {
1297 case 1: segv = get_user_u8(val, addr); break;
1298 case 2: segv = get_user_u16(val, addr); break;
1299 case 4: segv = get_user_u32(val, addr); break;
1300#if defined(TARGET_PPC64)
1301 case 8: segv = get_user_u64(val, addr); break;
27b95bfe
TM		 1302 case 16: {
1303 segv = get_user_u64(val, addr);
1304 if (!segv) {
1305 segv = get_user_u64(val2, addr + 8);
1306 }
1307 break;
1308 }
56f066bb
NF		 1309#endif
1310 default: abort();
1311 }
1312 if (!segv && val == env->reserve_val) {
1313 val = env->gpr[reg];
1314 switch (size) {
1315 case 1: segv = put_user_u8(val, addr); break;
1316 case 2: segv = put_user_u16(val, addr); break;
1317 case 4: segv = put_user_u32(val, addr); break;
1318#if defined(TARGET_PPC64)
1319 case 8: segv = put_user_u64(val, addr); break;
27b95bfe
TM		 1320 case 16: {
1321 if (val2 == env->reserve_val2) {
e22c357b
DK		 1322 if (msr_le) {
1323 val2 = val;
1324 val = env->gpr[reg+1];
1325 } else {
1326 val2 = env->gpr[reg+1];
1327 }
27b95bfe
TM		 1328 segv = put_user_u64(val, addr);
1329 if (!segv) {
1330 segv = put_user_u64(val2, addr + 8);
1331 }
1332 }
1333 break;
1334 }
56f066bb
NF		 1335#endif
1336 default: abort();
1337 }
1338 if (!segv) {
1339 stored = 1;
1340 }
1341 }
1342 }
1343 env->crf[0] = (stored << 1) | xer_so;
1344 env->reserve_addr = (target_ulong)-1;
1345 }
1346 if (!segv) {
1347 env->nip += 4;
1348 }
1349 mmap_unlock();
1350 end_exclusive();
1351 return segv;
1352}
1353
67867308
FB		 1354void cpu_loop(CPUPPCState *env)
1355{
0315c31c 1356 CPUState *cs = CPU(ppc_env_get_cpu(env));
c227f099 1357 target_siginfo_t info;
61190b14 1358 int trapnr;
9e0e2f96 1359 target_ulong ret;
3b46e624 1360
67867308 1361 for(;;) {
0315c31c 1362 cpu_exec_start(cs);
8642c1b8 1363 trapnr = cpu_exec(cs);
0315c31c 1364 cpu_exec_end(cs);
d148d90e
SF		 1365 process_queued_cpu_work(cs);
1366
67867308 1367 switch(trapnr) {
e1833e1f
JM		 1368 case POWERPC_EXCP_NONE:
1369 /* Just go on */
67867308 1370 break;
e1833e1f 1371 case POWERPC_EXCP_CRITICAL: /* Critical input */
a47dddd7 1372 cpu_abort(cs, "Critical interrupt while in user mode. "
e1833e1f 1373 "Aborting\n");
61190b14 1374 break;
e1833e1f 1375 case POWERPC_EXCP_MCHECK: /* Machine check exception */
a47dddd7 1376 cpu_abort(cs, "Machine check exception while in user mode. "
e1833e1f
JM		 1377 "Aborting\n");
1378 break;
1379 case POWERPC_EXCP_DSI: /* Data storage exception */
e1833e1f 1380 /* XXX: check this. Seems bugged */
2be0071f
FB		 1381 switch (env->error_code & 0xFF000000) {
1382 case 0x40000000:
ba4a8df8 1383 case 0x42000000:
61190b14
FB		 1384 info.si_signo = TARGET_SIGSEGV;
1385 info.si_errno = 0;
1386 info.si_code = TARGET_SEGV_MAPERR;
1387 break;
2be0071f 1388 case 0x04000000:
61190b14
FB		 1389 info.si_signo = TARGET_SIGILL;
1390 info.si_errno = 0;
1391 info.si_code = TARGET_ILL_ILLADR;
1392 break;
2be0071f 1393 case 0x08000000:
61190b14
FB		 1394 info.si_signo = TARGET_SIGSEGV;
1395 info.si_errno = 0;
1396 info.si_code = TARGET_SEGV_ACCERR;
1397 break;
61190b14
FB		 1398 default:
1399 /* Let's send a regular segfault... */
e1833e1f
JM		 1400 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1401 env->error_code);
61190b14
FB		 1402 info.si_signo = TARGET_SIGSEGV;
1403 info.si_errno = 0;
1404 info.si_code = TARGET_SEGV_MAPERR;
1405 break;
1406 }
67867308 1407 info._sifields._sigfault._addr = env->nip;
9d2803f7 1408 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
67867308 1409 break;
e1833e1f 1410 case POWERPC_EXCP_ISI: /* Instruction storage exception */
e1833e1f 1411 /* XXX: check this */
2be0071f
FB		 1412 switch (env->error_code & 0xFF000000) {
1413 case 0x40000000:
61190b14 1414 info.si_signo = TARGET_SIGSEGV;
67867308 1415 info.si_errno = 0;
61190b14
FB		 1416 info.si_code = TARGET_SEGV_MAPERR;
1417 break;
2be0071f
FB		 1418 case 0x10000000:
1419 case 0x08000000:
61190b14
FB		 1420 info.si_signo = TARGET_SIGSEGV;
1421 info.si_errno = 0;
1422 info.si_code = TARGET_SEGV_ACCERR;
1423 break;
1424 default:
1425 /* Let's send a regular segfault... */
e1833e1f
JM		 1426 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1427 env->error_code);
61190b14
FB		 1428 info.si_signo = TARGET_SIGSEGV;
1429 info.si_errno = 0;
1430 info.si_code = TARGET_SEGV_MAPERR;
1431 break;
1432 }
1433 info._sifields._sigfault._addr = env->nip - 4;
9d2803f7 1434 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
67867308 1435 break;
e1833e1f 1436 case POWERPC_EXCP_EXTERNAL: /* External input */
a47dddd7 1437 cpu_abort(cs, "External interrupt while in user mode. "
e1833e1f
JM		 1438 "Aborting\n");
1439 break;
1440 case POWERPC_EXCP_ALIGN: /* Alignment exception */
e1833e1f 1441 /* XXX: check this */
61190b14 1442 info.si_signo = TARGET_SIGBUS;
67867308 1443 info.si_errno = 0;
61190b14 1444 info.si_code = TARGET_BUS_ADRALN;
6bb9a0a9 1445 info._sifields._sigfault._addr = env->nip;
9d2803f7 1446 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
67867308 1447 break;
e1833e1f 1448 case POWERPC_EXCP_PROGRAM: /* Program exception */
9b2fadda 1449 case POWERPC_EXCP_HV_EMU: /* HV emulation */
e1833e1f 1450 /* XXX: check this */
61190b14 1451 switch (env->error_code & ~0xF) {
e1833e1f 1452 case POWERPC_EXCP_FP:
61190b14
FB		 1453 info.si_signo = TARGET_SIGFPE;
1454 info.si_errno = 0;
1455 switch (env->error_code & 0xF) {
e1833e1f 1456 case POWERPC_EXCP_FP_OX:
61190b14
FB		 1457 info.si_code = TARGET_FPE_FLTOVF;
1458 break;
e1833e1f 1459 case POWERPC_EXCP_FP_UX:
61190b14
FB		 1460 info.si_code = TARGET_FPE_FLTUND;
1461 break;
e1833e1f
JM		 1462 case POWERPC_EXCP_FP_ZX:
1463 case POWERPC_EXCP_FP_VXZDZ:
61190b14
FB		 1464 info.si_code = TARGET_FPE_FLTDIV;
1465 break;
e1833e1f 1466 case POWERPC_EXCP_FP_XX:
61190b14
FB		 1467 info.si_code = TARGET_FPE_FLTRES;
1468 break;
e1833e1f 1469 case POWERPC_EXCP_FP_VXSOFT:
61190b14
FB		 1470 info.si_code = TARGET_FPE_FLTINV;
1471 break;
7c58044c 1472 case POWERPC_EXCP_FP_VXSNAN:
e1833e1f
JM		 1473 case POWERPC_EXCP_FP_VXISI:
1474 case POWERPC_EXCP_FP_VXIDI:
1475 case POWERPC_EXCP_FP_VXIMZ:
1476 case POWERPC_EXCP_FP_VXVC:
1477 case POWERPC_EXCP_FP_VXSQRT:
1478 case POWERPC_EXCP_FP_VXCVI:
61190b14
FB		 1479 info.si_code = TARGET_FPE_FLTSUB;
1480 break;
1481 default:
e1833e1f
JM		 1482 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1483 env->error_code);
1484 break;
61190b14 1485 }
e1833e1f
JM		 1486 break;
1487 case POWERPC_EXCP_INVAL:
61190b14
FB		 1488 info.si_signo = TARGET_SIGILL;
1489 info.si_errno = 0;
1490 switch (env->error_code & 0xF) {
e1833e1f 1491 case POWERPC_EXCP_INVAL_INVAL:
61190b14
FB		 1492 info.si_code = TARGET_ILL_ILLOPC;
1493 break;
e1833e1f 1494 case POWERPC_EXCP_INVAL_LSWX:
a750fc0b 1495 info.si_code = TARGET_ILL_ILLOPN;
61190b14 1496 break;
e1833e1f 1497 case POWERPC_EXCP_INVAL_SPR:
61190b14
FB		 1498 info.si_code = TARGET_ILL_PRVREG;
1499 break;
e1833e1f 1500 case POWERPC_EXCP_INVAL_FP:
61190b14
FB		 1501 info.si_code = TARGET_ILL_COPROC;
1502 break;
1503 default:
e1833e1f
JM		 1504 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1505 env->error_code & 0xF);
61190b14
FB		 1506 info.si_code = TARGET_ILL_ILLADR;
1507 break;
1508 }
1509 break;
e1833e1f 1510 case POWERPC_EXCP_PRIV:
61190b14
FB		 1511 info.si_signo = TARGET_SIGILL;
1512 info.si_errno = 0;
1513 switch (env->error_code & 0xF) {
e1833e1f 1514 case POWERPC_EXCP_PRIV_OPC:
61190b14
FB		 1515 info.si_code = TARGET_ILL_PRVOPC;
1516 break;
e1833e1f 1517 case POWERPC_EXCP_PRIV_REG:
61190b14 1518 info.si_code = TARGET_ILL_PRVREG;
e1833e1f 1519 break;
61190b14 1520 default:
e1833e1f
JM		 1521 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1522 env->error_code & 0xF);
61190b14
FB		 1523 info.si_code = TARGET_ILL_PRVOPC;
1524 break;
1525 }
1526 break;
e1833e1f 1527 case POWERPC_EXCP_TRAP:
a47dddd7 1528 cpu_abort(cs, "Tried to call a TRAP\n");
e1833e1f 1529 break;
61190b14
FB		 1530 default:
1531 /* Should not happen ! */
a47dddd7 1532 cpu_abort(cs, "Unknown program exception (%02x)\n",
e1833e1f
JM		 1533 env->error_code);
1534 break;
61190b14 1535 }
bd6fefe7 1536 info._sifields._sigfault._addr = env->nip;
9d2803f7 1537 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
67867308 1538 break;
e1833e1f 1539 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
61190b14 1540 info.si_signo = TARGET_SIGILL;
67867308 1541 info.si_errno = 0;
61190b14 1542 info.si_code = TARGET_ILL_COPROC;
bd6fefe7 1543 info._sifields._sigfault._addr = env->nip;
9d2803f7 1544 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
67867308 1545 break;
e1833e1f 1546 case POWERPC_EXCP_SYSCALL: /* System call exception */
a47dddd7 1547 cpu_abort(cs, "Syscall exception while in user mode. "
e1833e1f 1548 "Aborting\n");
61190b14 1549 break;
e1833e1f 1550 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
e1833e1f
JM		 1551 info.si_signo = TARGET_SIGILL;
1552 info.si_errno = 0;
1553 info.si_code = TARGET_ILL_COPROC;
bd6fefe7 1554 info._sifields._sigfault._addr = env->nip;
9d2803f7 1555 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
61190b14 1556 break;
e1833e1f 1557 case POWERPC_EXCP_DECR: /* Decrementer exception */
a47dddd7 1558 cpu_abort(cs, "Decrementer interrupt while in user mode. "
e1833e1f 1559 "Aborting\n");
61190b14 1560 break;
e1833e1f 1561 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
a47dddd7 1562 cpu_abort(cs, "Fix interval timer interrupt while in user mode. "
e1833e1f
JM		 1563 "Aborting\n");
1564 break;
1565 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
a47dddd7 1566 cpu_abort(cs, "Watchdog timer interrupt while in user mode. "
e1833e1f
JM		 1567 "Aborting\n");
1568 break;
1569 case POWERPC_EXCP_DTLB: /* Data TLB error */
a47dddd7 1570 cpu_abort(cs, "Data TLB exception while in user mode. "
e1833e1f
JM		 1571 "Aborting\n");
1572 break;
1573 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
a47dddd7 1574 cpu_abort(cs, "Instruction TLB exception while in user mode. "
e1833e1f
JM		 1575 "Aborting\n");
1576 break;
e1833e1f 1577 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
e1833e1f
JM		 1578 info.si_signo = TARGET_SIGILL;
1579 info.si_errno = 0;
1580 info.si_code = TARGET_ILL_COPROC;
bd6fefe7 1581 info._sifields._sigfault._addr = env->nip;
9d2803f7 1582 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
e1833e1f
JM		 1583 break;
1584 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
a47dddd7 1585 cpu_abort(cs, "Embedded floating-point data IRQ not handled\n");
e1833e1f
JM		 1586 break;
1587 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
a47dddd7 1588 cpu_abort(cs, "Embedded floating-point round IRQ not handled\n");
e1833e1f
JM		 1589 break;
1590 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
a47dddd7 1591 cpu_abort(cs, "Performance monitor exception not handled\n");
e1833e1f
JM		 1592 break;
1593 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
a47dddd7 1594 cpu_abort(cs, "Doorbell interrupt while in user mode. "
e1833e1f
JM		 1595 "Aborting\n");
1596 break;
1597 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
a47dddd7 1598 cpu_abort(cs, "Doorbell critical interrupt while in user mode. "
e1833e1f
JM		 1599 "Aborting\n");
1600 break;
1601 case POWERPC_EXCP_RESET: /* System reset exception */
a47dddd7 1602 cpu_abort(cs, "Reset interrupt while in user mode. "
e1833e1f
JM		 1603 "Aborting\n");
1604 break;
e1833e1f 1605 case POWERPC_EXCP_DSEG: /* Data segment exception */
a47dddd7 1606 cpu_abort(cs, "Data segment exception while in user mode. "
e1833e1f
JM		 1607 "Aborting\n");
1608 break;
1609 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
a47dddd7 1610 cpu_abort(cs, "Instruction segment exception "
e1833e1f
JM		 1611 "while in user mode. Aborting\n");
1612 break;
e85e7c6e 1613 /* PowerPC 64 with hypervisor mode support */
e1833e1f 1614 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
a47dddd7 1615 cpu_abort(cs, "Hypervisor decrementer interrupt "
e1833e1f
JM		 1616 "while in user mode. Aborting\n");
1617 break;
e1833e1f
JM		 1618 case POWERPC_EXCP_TRACE: /* Trace exception */
1619 /* Nothing to do:
1620 * we use this exception to emulate step-by-step execution mode.
1621 */
1622 break;
e85e7c6e 1623 /* PowerPC 64 with hypervisor mode support */
e1833e1f 1624 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
a47dddd7 1625 cpu_abort(cs, "Hypervisor data storage exception "
e1833e1f
JM		 1626 "while in user mode. Aborting\n");
1627 break;
1628 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
a47dddd7 1629 cpu_abort(cs, "Hypervisor instruction storage exception "
e1833e1f
JM		 1630 "while in user mode. Aborting\n");
1631 break;
1632 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
a47dddd7 1633 cpu_abort(cs, "Hypervisor data segment exception "
e1833e1f
JM		 1634 "while in user mode. Aborting\n");
1635 break;
1636 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
a47dddd7 1637 cpu_abort(cs, "Hypervisor instruction segment exception "
e1833e1f
JM		 1638 "while in user mode. Aborting\n");
1639 break;
e1833e1f 1640 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
e1833e1f
JM		 1641 info.si_signo = TARGET_SIGILL;
1642 info.si_errno = 0;
1643 info.si_code = TARGET_ILL_COPROC;
bd6fefe7 1644 info._sifields._sigfault._addr = env->nip;
9d2803f7 1645 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
e1833e1f
JM		 1646 break;
1647 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
a47dddd7 1648 cpu_abort(cs, "Programmable interval timer interrupt "
e1833e1f
JM		 1649 "while in user mode. Aborting\n");
1650 break;
1651 case POWERPC_EXCP_IO: /* IO error exception */
a47dddd7 1652 cpu_abort(cs, "IO error exception while in user mode. "
e1833e1f
JM		 1653 "Aborting\n");
1654 break;
1655 case POWERPC_EXCP_RUNM: /* Run mode exception */
a47dddd7 1656 cpu_abort(cs, "Run mode exception while in user mode. "
e1833e1f
JM		 1657 "Aborting\n");
1658 break;
1659 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
a47dddd7 1660 cpu_abort(cs, "Emulation trap exception not handled\n");
e1833e1f
JM		 1661 break;
1662 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
a47dddd7 1663 cpu_abort(cs, "Instruction fetch TLB exception "
e1833e1f
JM		 1664 "while in user-mode. Aborting");
1665 break;
1666 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
a47dddd7 1667 cpu_abort(cs, "Data load TLB exception while in user-mode. "
e1833e1f
JM		 1668 "Aborting");
1669 break;
1670 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
a47dddd7 1671 cpu_abort(cs, "Data store TLB exception while in user-mode. "
e1833e1f
JM		 1672 "Aborting");
1673 break;
1674 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
a47dddd7 1675 cpu_abort(cs, "Floating-point assist exception not handled\n");
e1833e1f
JM		 1676 break;
1677 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
a47dddd7 1678 cpu_abort(cs, "Instruction address breakpoint exception "
e1833e1f
JM		 1679 "not handled\n");
1680 break;
1681 case POWERPC_EXCP_SMI: /* System management interrupt */
a47dddd7 1682 cpu_abort(cs, "System management interrupt while in user mode. "
e1833e1f
JM		 1683 "Aborting\n");
1684 break;
1685 case POWERPC_EXCP_THERM: /* Thermal interrupt */
a47dddd7 1686 cpu_abort(cs, "Thermal interrupt interrupt while in user mode. "
e1833e1f
JM		 1687 "Aborting\n");
1688 break;
1689 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
a47dddd7 1690 cpu_abort(cs, "Performance monitor exception not handled\n");
e1833e1f
JM		 1691 break;
1692 case POWERPC_EXCP_VPUA: /* Vector assist exception */
a47dddd7 1693 cpu_abort(cs, "Vector assist exception not handled\n");
e1833e1f
JM		 1694 break;
1695 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
a47dddd7 1696 cpu_abort(cs, "Soft patch exception not handled\n");
e1833e1f
JM		 1697 break;
1698 case POWERPC_EXCP_MAINT: /* Maintenance exception */
a47dddd7 1699 cpu_abort(cs, "Maintenance exception while in user mode. "
e1833e1f
JM		 1700 "Aborting\n");
1701 break;
1702 case POWERPC_EXCP_STOP: /* stop translation */
1703 /* We did invalidate the instruction cache. Go on */
1704 break;
1705 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1706 /* We just stopped because of a branch. Go on */
1707 break;
1708 case POWERPC_EXCP_SYSCALL_USER:
1709 /* system call in user-mode emulation */
1710 /* WARNING:
1711 * PPC ABI uses overflow flag in cr0 to signal an error
1712 * in syscalls.
1713 */
e1833e1f
JM		 1714 env->crf[0] &= ~0x1;
1715 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1716 env->gpr[5], env->gpr[6], env->gpr[7],
5945cfcb 1717 env->gpr[8], 0, 0);
6db9d00e 1718 if (ret == -TARGET_ERESTARTSYS) {
6db9d00e
TB		 1719 break;
1720 }
9e0e2f96 1721 if (ret == (target_ulong)(-TARGET_QEMU_ESIGRETURN)) {
bcd4933a
NF		 1722 /* Returning from a successful sigreturn syscall.
1723 Avoid corrupting register state. */
1724 break;
1725 }
95cda4c4 1726 env->nip += 4;
9e0e2f96 1727 if (ret > (target_ulong)(-515)) {
e1833e1f
JM		 1728 env->crf[0] |= 0x1;
1729 ret = -ret;
61190b14 1730 }
e1833e1f 1731 env->gpr[3] = ret;
e1833e1f 1732 break;
56f066bb
NF		 1733 case POWERPC_EXCP_STCX:
1734 if (do_store_exclusive(env)) {
1735 info.si_signo = TARGET_SIGSEGV;
1736 info.si_errno = 0;
1737 info.si_code = TARGET_SEGV_MAPERR;
1738 info._sifields._sigfault._addr = env->nip;
9d2803f7 1739 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
56f066bb
NF		 1740 }
1741 break;
71f75756
AJ		 1742 case EXCP_DEBUG:
1743 {
1744 int sig;
1745
db6b81d4 1746 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
71f75756
AJ		 1747 if (sig) {
1748 info.si_signo = sig;
1749 info.si_errno = 0;
1750 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 1751 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
71f75756
AJ		 1752 }
1753 }
1754 break;
56ba31ff
JM		 1755 case EXCP_INTERRUPT:
1756 /* just indicate that signals should be handled asap */
1757 break;
fdbc2b57
RH		 1758 case EXCP_ATOMIC:
1759 cpu_exec_step_atomic(cs);
1760 break;
e1833e1f 1761 default:
8223f345 1762 cpu_abort(cs, "Unknown exception 0x%x. Aborting\n", trapnr);
e1833e1f 1763 break;
67867308
FB		 1764 }
1765 process_pending_signals(env);
1766 }
1767}
1768#endif
1769
048f6b4d
FB		 1770#ifdef TARGET_MIPS
1771
ff4f7382
RH		 1772# ifdef TARGET_ABI_MIPSO32
1773# define MIPS_SYS(name, args) args,
048f6b4d 1774static const uint8_t mips_syscall_args[] = {
29fb0f25 1775 MIPS_SYS(sys_syscall , 8) /* 4000 */
048f6b4d
FB		 1776 MIPS_SYS(sys_exit , 1)
1777 MIPS_SYS(sys_fork , 0)
1778 MIPS_SYS(sys_read , 3)
1779 MIPS_SYS(sys_write , 3)
1780 MIPS_SYS(sys_open , 3) /* 4005 */
1781 MIPS_SYS(sys_close , 1)
1782 MIPS_SYS(sys_waitpid , 3)
1783 MIPS_SYS(sys_creat , 2)
1784 MIPS_SYS(sys_link , 2)
1785 MIPS_SYS(sys_unlink , 1) /* 4010 */
1786 MIPS_SYS(sys_execve , 0)
1787 MIPS_SYS(sys_chdir , 1)
1788 MIPS_SYS(sys_time , 1)
1789 MIPS_SYS(sys_mknod , 3)
1790 MIPS_SYS(sys_chmod , 2) /* 4015 */
1791 MIPS_SYS(sys_lchown , 3)
1792 MIPS_SYS(sys_ni_syscall , 0)
1793 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1794 MIPS_SYS(sys_lseek , 3)
1795 MIPS_SYS(sys_getpid , 0) /* 4020 */
1796 MIPS_SYS(sys_mount , 5)
868e34d7 1797 MIPS_SYS(sys_umount , 1)
048f6b4d
FB		 1798 MIPS_SYS(sys_setuid , 1)
1799 MIPS_SYS(sys_getuid , 0)
1800 MIPS_SYS(sys_stime , 1) /* 4025 */
1801 MIPS_SYS(sys_ptrace , 4)
1802 MIPS_SYS(sys_alarm , 1)
1803 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1804 MIPS_SYS(sys_pause , 0)
1805 MIPS_SYS(sys_utime , 2) /* 4030 */
1806 MIPS_SYS(sys_ni_syscall , 0)
1807 MIPS_SYS(sys_ni_syscall , 0)
1808 MIPS_SYS(sys_access , 2)
1809 MIPS_SYS(sys_nice , 1)
1810 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1811 MIPS_SYS(sys_sync , 0)
1812 MIPS_SYS(sys_kill , 2)
1813 MIPS_SYS(sys_rename , 2)
1814 MIPS_SYS(sys_mkdir , 2)
1815 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1816 MIPS_SYS(sys_dup , 1)
1817 MIPS_SYS(sys_pipe , 0)
1818 MIPS_SYS(sys_times , 1)
1819 MIPS_SYS(sys_ni_syscall , 0)
1820 MIPS_SYS(sys_brk , 1) /* 4045 */
1821 MIPS_SYS(sys_setgid , 1)
1822 MIPS_SYS(sys_getgid , 0)
1823 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1824 MIPS_SYS(sys_geteuid , 0)
1825 MIPS_SYS(sys_getegid , 0) /* 4050 */
1826 MIPS_SYS(sys_acct , 0)
868e34d7 1827 MIPS_SYS(sys_umount2 , 2)
048f6b4d
FB		 1828 MIPS_SYS(sys_ni_syscall , 0)
1829 MIPS_SYS(sys_ioctl , 3)
1830 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1831 MIPS_SYS(sys_ni_syscall , 2)
1832 MIPS_SYS(sys_setpgid , 2)
1833 MIPS_SYS(sys_ni_syscall , 0)
1834 MIPS_SYS(sys_olduname , 1)
1835 MIPS_SYS(sys_umask , 1) /* 4060 */
1836 MIPS_SYS(sys_chroot , 1)
1837 MIPS_SYS(sys_ustat , 2)
1838 MIPS_SYS(sys_dup2 , 2)
1839 MIPS_SYS(sys_getppid , 0)
1840 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1841 MIPS_SYS(sys_setsid , 0)
1842 MIPS_SYS(sys_sigaction , 3)
1843 MIPS_SYS(sys_sgetmask , 0)
1844 MIPS_SYS(sys_ssetmask , 1)
1845 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1846 MIPS_SYS(sys_setregid , 2)
1847 MIPS_SYS(sys_sigsuspend , 0)
1848 MIPS_SYS(sys_sigpending , 1)
1849 MIPS_SYS(sys_sethostname , 2)
1850 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1851 MIPS_SYS(sys_getrlimit , 2)
1852 MIPS_SYS(sys_getrusage , 2)
1853 MIPS_SYS(sys_gettimeofday, 2)
1854 MIPS_SYS(sys_settimeofday, 2)
1855 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1856 MIPS_SYS(sys_setgroups , 2)
1857 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1858 MIPS_SYS(sys_symlink , 2)
1859 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1860 MIPS_SYS(sys_readlink , 3) /* 4085 */
1861 MIPS_SYS(sys_uselib , 1)
1862 MIPS_SYS(sys_swapon , 2)
1863 MIPS_SYS(sys_reboot , 3)
1864 MIPS_SYS(old_readdir , 3)
1865 MIPS_SYS(old_mmap , 6) /* 4090 */
1866 MIPS_SYS(sys_munmap , 2)
1867 MIPS_SYS(sys_truncate , 2)
1868 MIPS_SYS(sys_ftruncate , 2)
1869 MIPS_SYS(sys_fchmod , 2)
1870 MIPS_SYS(sys_fchown , 3) /* 4095 */
1871 MIPS_SYS(sys_getpriority , 2)
1872 MIPS_SYS(sys_setpriority , 3)
1873 MIPS_SYS(sys_ni_syscall , 0)
1874 MIPS_SYS(sys_statfs , 2)
1875 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1876 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1877 MIPS_SYS(sys_socketcall , 2)
1878 MIPS_SYS(sys_syslog , 3)
1879 MIPS_SYS(sys_setitimer , 3)
1880 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1881 MIPS_SYS(sys_newstat , 2)
1882 MIPS_SYS(sys_newlstat , 2)
1883 MIPS_SYS(sys_newfstat , 2)
1884 MIPS_SYS(sys_uname , 1)
1885 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1886 MIPS_SYS(sys_vhangup , 0)
1887 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1888 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1889 MIPS_SYS(sys_wait4 , 4)
1890 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1891 MIPS_SYS(sys_sysinfo , 1)
1892 MIPS_SYS(sys_ipc , 6)
1893 MIPS_SYS(sys_fsync , 1)
1894 MIPS_SYS(sys_sigreturn , 0)
18113962 1895 MIPS_SYS(sys_clone , 6) /* 4120 */
048f6b4d
FB		 1896 MIPS_SYS(sys_setdomainname, 2)
1897 MIPS_SYS(sys_newuname , 1)
1898 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1899 MIPS_SYS(sys_adjtimex , 1)
1900 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1901 MIPS_SYS(sys_sigprocmask , 3)
1902 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1903 MIPS_SYS(sys_init_module , 5)
1904 MIPS_SYS(sys_delete_module, 1)
1905 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1906 MIPS_SYS(sys_quotactl , 0)
1907 MIPS_SYS(sys_getpgid , 1)
1908 MIPS_SYS(sys_fchdir , 1)
1909 MIPS_SYS(sys_bdflush , 2)
1910 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1911 MIPS_SYS(sys_personality , 1)
1912 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1913 MIPS_SYS(sys_setfsuid , 1)
1914 MIPS_SYS(sys_setfsgid , 1)
1915 MIPS_SYS(sys_llseek , 5) /* 4140 */
1916 MIPS_SYS(sys_getdents , 3)
1917 MIPS_SYS(sys_select , 5)
1918 MIPS_SYS(sys_flock , 2)
1919 MIPS_SYS(sys_msync , 3)
1920 MIPS_SYS(sys_readv , 3) /* 4145 */
1921 MIPS_SYS(sys_writev , 3)
1922 MIPS_SYS(sys_cacheflush , 3)
1923 MIPS_SYS(sys_cachectl , 3)
1924 MIPS_SYS(sys_sysmips , 4)
1925 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1926 MIPS_SYS(sys_getsid , 1)
1927 MIPS_SYS(sys_fdatasync , 0)
1928 MIPS_SYS(sys_sysctl , 1)
1929 MIPS_SYS(sys_mlock , 2)
1930 MIPS_SYS(sys_munlock , 2) /* 4155 */
1931 MIPS_SYS(sys_mlockall , 1)
1932 MIPS_SYS(sys_munlockall , 0)
1933 MIPS_SYS(sys_sched_setparam, 2)
1934 MIPS_SYS(sys_sched_getparam, 2)
1935 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1936 MIPS_SYS(sys_sched_getscheduler, 1)
1937 MIPS_SYS(sys_sched_yield , 0)
1938 MIPS_SYS(sys_sched_get_priority_max, 1)
1939 MIPS_SYS(sys_sched_get_priority_min, 1)
1940 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1941 MIPS_SYS(sys_nanosleep, 2)
b0932e06 1942 MIPS_SYS(sys_mremap , 5)
048f6b4d
FB		 1943 MIPS_SYS(sys_accept , 3)
1944 MIPS_SYS(sys_bind , 3)
1945 MIPS_SYS(sys_connect , 3) /* 4170 */
1946 MIPS_SYS(sys_getpeername , 3)
1947 MIPS_SYS(sys_getsockname , 3)
1948 MIPS_SYS(sys_getsockopt , 5)
1949 MIPS_SYS(sys_listen , 2)
1950 MIPS_SYS(sys_recv , 4) /* 4175 */
1951 MIPS_SYS(sys_recvfrom , 6)
1952 MIPS_SYS(sys_recvmsg , 3)
1953 MIPS_SYS(sys_send , 4)
1954 MIPS_SYS(sys_sendmsg , 3)
1955 MIPS_SYS(sys_sendto , 6) /* 4180 */
1956 MIPS_SYS(sys_setsockopt , 5)
1957 MIPS_SYS(sys_shutdown , 2)
1958 MIPS_SYS(sys_socket , 3)
1959 MIPS_SYS(sys_socketpair , 4)
1960 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1961 MIPS_SYS(sys_getresuid , 3)
1962 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1963 MIPS_SYS(sys_poll , 3)
1964 MIPS_SYS(sys_nfsservctl , 3)
1965 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1966 MIPS_SYS(sys_getresgid , 3)
1967 MIPS_SYS(sys_prctl , 5)
1968 MIPS_SYS(sys_rt_sigreturn, 0)
1969 MIPS_SYS(sys_rt_sigaction, 4)
1970 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1971 MIPS_SYS(sys_rt_sigpending, 2)
1972 MIPS_SYS(sys_rt_sigtimedwait, 4)
1973 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1974 MIPS_SYS(sys_rt_sigsuspend, 0)
1975 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1976 MIPS_SYS(sys_pwrite64 , 6)
1977 MIPS_SYS(sys_chown , 3)
1978 MIPS_SYS(sys_getcwd , 2)
1979 MIPS_SYS(sys_capget , 2)
1980 MIPS_SYS(sys_capset , 2) /* 4205 */
053ebb27 1981 MIPS_SYS(sys_sigaltstack , 2)
048f6b4d
FB		 1982 MIPS_SYS(sys_sendfile , 4)
1983 MIPS_SYS(sys_ni_syscall , 0)
1984 MIPS_SYS(sys_ni_syscall , 0)
1985 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1986 MIPS_SYS(sys_truncate64 , 4)
1987 MIPS_SYS(sys_ftruncate64 , 4)
1988 MIPS_SYS(sys_stat64 , 2)
1989 MIPS_SYS(sys_lstat64 , 2)
1990 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1991 MIPS_SYS(sys_pivot_root , 2)
1992 MIPS_SYS(sys_mincore , 3)
1993 MIPS_SYS(sys_madvise , 3)
1994 MIPS_SYS(sys_getdents64 , 3)
1995 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1996 MIPS_SYS(sys_ni_syscall , 0)
1997 MIPS_SYS(sys_gettid , 0)
1998 MIPS_SYS(sys_readahead , 5)
1999 MIPS_SYS(sys_setxattr , 5)
2000 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
2001 MIPS_SYS(sys_fsetxattr , 5)
2002 MIPS_SYS(sys_getxattr , 4)
2003 MIPS_SYS(sys_lgetxattr , 4)
2004 MIPS_SYS(sys_fgetxattr , 4)
2005 MIPS_SYS(sys_listxattr , 3) /* 4230 */
2006 MIPS_SYS(sys_llistxattr , 3)
2007 MIPS_SYS(sys_flistxattr , 3)
2008 MIPS_SYS(sys_removexattr , 2)
2009 MIPS_SYS(sys_lremovexattr, 2)
2010 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
2011 MIPS_SYS(sys_tkill , 2)
2012 MIPS_SYS(sys_sendfile64 , 5)
43be1343 2013 MIPS_SYS(sys_futex , 6)
048f6b4d
FB		 2014 MIPS_SYS(sys_sched_setaffinity, 3)
2015 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
2016 MIPS_SYS(sys_io_setup , 2)
2017 MIPS_SYS(sys_io_destroy , 1)
2018 MIPS_SYS(sys_io_getevents, 5)
2019 MIPS_SYS(sys_io_submit , 3)
2020 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
2021 MIPS_SYS(sys_exit_group , 1)
2022 MIPS_SYS(sys_lookup_dcookie, 3)
2023 MIPS_SYS(sys_epoll_create, 1)
2024 MIPS_SYS(sys_epoll_ctl , 4)
2025 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
2026 MIPS_SYS(sys_remap_file_pages, 5)
2027 MIPS_SYS(sys_set_tid_address, 1)
2028 MIPS_SYS(sys_restart_syscall, 0)
2029 MIPS_SYS(sys_fadvise64_64, 7)
2030 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
2031 MIPS_SYS(sys_fstatfs64 , 2)
2032 MIPS_SYS(sys_timer_create, 3)
2033 MIPS_SYS(sys_timer_settime, 4)
2034 MIPS_SYS(sys_timer_gettime, 2)
2035 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
2036 MIPS_SYS(sys_timer_delete, 1)
2037 MIPS_SYS(sys_clock_settime, 2)
2038 MIPS_SYS(sys_clock_gettime, 2)
2039 MIPS_SYS(sys_clock_getres, 2)
2040 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
2041 MIPS_SYS(sys_tgkill , 3)
2042 MIPS_SYS(sys_utimes , 2)
2043 MIPS_SYS(sys_mbind , 4)
2044 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
2045 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
2046 MIPS_SYS(sys_mq_open , 4)
2047 MIPS_SYS(sys_mq_unlink , 1)
2048 MIPS_SYS(sys_mq_timedsend, 5)
2049 MIPS_SYS(sys_mq_timedreceive, 5)
2050 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
2051 MIPS_SYS(sys_mq_getsetattr, 3)
2052 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
2053 MIPS_SYS(sys_waitid , 4)
2054 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
2055 MIPS_SYS(sys_add_key , 5)
388bb21a 2056 MIPS_SYS(sys_request_key, 4)
048f6b4d 2057 MIPS_SYS(sys_keyctl , 5)
6f5b89a0 2058 MIPS_SYS(sys_set_thread_area, 1)
388bb21a
TS		 2059 MIPS_SYS(sys_inotify_init, 0)
2060 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
2061 MIPS_SYS(sys_inotify_rm_watch, 2)
2062 MIPS_SYS(sys_migrate_pages, 4)
2063 MIPS_SYS(sys_openat, 4)
2064 MIPS_SYS(sys_mkdirat, 3)
2065 MIPS_SYS(sys_mknodat, 4) /* 4290 */
2066 MIPS_SYS(sys_fchownat, 5)
2067 MIPS_SYS(sys_futimesat, 3)
2068 MIPS_SYS(sys_fstatat64, 4)
2069 MIPS_SYS(sys_unlinkat, 3)
2070 MIPS_SYS(sys_renameat, 4) /* 4295 */
2071 MIPS_SYS(sys_linkat, 5)
2072 MIPS_SYS(sys_symlinkat, 3)
2073 MIPS_SYS(sys_readlinkat, 4)
2074 MIPS_SYS(sys_fchmodat, 3)
2075 MIPS_SYS(sys_faccessat, 3) /* 4300 */
2076 MIPS_SYS(sys_pselect6, 6)
2077 MIPS_SYS(sys_ppoll, 5)
2078 MIPS_SYS(sys_unshare, 1)
b0932e06 2079 MIPS_SYS(sys_splice, 6)
388bb21a
TS		 2080 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
2081 MIPS_SYS(sys_tee, 4)
2082 MIPS_SYS(sys_vmsplice, 4)
2083 MIPS_SYS(sys_move_pages, 6)
2084 MIPS_SYS(sys_set_robust_list, 2)
2085 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
2086 MIPS_SYS(sys_kexec_load, 4)
2087 MIPS_SYS(sys_getcpu, 3)
2088 MIPS_SYS(sys_epoll_pwait, 6)
2089 MIPS_SYS(sys_ioprio_set, 3)
2090 MIPS_SYS(sys_ioprio_get, 2)
d979e8eb
PM		 2091 MIPS_SYS(sys_utimensat, 4)
2092 MIPS_SYS(sys_signalfd, 3)
2093 MIPS_SYS(sys_ni_syscall, 0) /* was timerfd */
2094 MIPS_SYS(sys_eventfd, 1)
2095 MIPS_SYS(sys_fallocate, 6) /* 4320 */
2096 MIPS_SYS(sys_timerfd_create, 2)
2097 MIPS_SYS(sys_timerfd_gettime, 2)
2098 MIPS_SYS(sys_timerfd_settime, 4)
2099 MIPS_SYS(sys_signalfd4, 4)
2100 MIPS_SYS(sys_eventfd2, 2) /* 4325 */
2101 MIPS_SYS(sys_epoll_create1, 1)
2102 MIPS_SYS(sys_dup3, 3)
2103 MIPS_SYS(sys_pipe2, 2)
2104 MIPS_SYS(sys_inotify_init1, 1)
2e6eeb67
AM		 2105 MIPS_SYS(sys_preadv, 5) /* 4330 */
2106 MIPS_SYS(sys_pwritev, 5)
d979e8eb
PM		 2107 MIPS_SYS(sys_rt_tgsigqueueinfo, 4)
2108 MIPS_SYS(sys_perf_event_open, 5)
2109 MIPS_SYS(sys_accept4, 4)
2110 MIPS_SYS(sys_recvmmsg, 5) /* 4335 */
2111 MIPS_SYS(sys_fanotify_init, 2)
2112 MIPS_SYS(sys_fanotify_mark, 6)
2113 MIPS_SYS(sys_prlimit64, 4)
2114 MIPS_SYS(sys_name_to_handle_at, 5)
2115 MIPS_SYS(sys_open_by_handle_at, 3) /* 4340 */
2116 MIPS_SYS(sys_clock_adjtime, 2)
2117 MIPS_SYS(sys_syncfs, 1)
2e6eeb67
AM		 2118 MIPS_SYS(sys_sendmmsg, 4)
2119 MIPS_SYS(sys_setns, 2)
2120 MIPS_SYS(sys_process_vm_readv, 6) /* 345 */
2121 MIPS_SYS(sys_process_vm_writev, 6)
2122 MIPS_SYS(sys_kcmp, 5)
2123 MIPS_SYS(sys_finit_module, 3)
2124 MIPS_SYS(sys_sched_setattr, 2)
2125 MIPS_SYS(sys_sched_getattr, 3) /* 350 */
2126 MIPS_SYS(sys_renameat2, 5)
2127 MIPS_SYS(sys_seccomp, 3)
2128 MIPS_SYS(sys_getrandom, 3)
2129 MIPS_SYS(sys_memfd_create, 2)
2130 MIPS_SYS(sys_bpf, 3) /* 355 */
2131 MIPS_SYS(sys_execveat, 5)
2132 MIPS_SYS(sys_userfaultfd, 1)
2133 MIPS_SYS(sys_membarrier, 2)
2134 MIPS_SYS(sys_mlock2, 3)
2135 MIPS_SYS(sys_copy_file_range, 6) /* 360 */
2136 MIPS_SYS(sys_preadv2, 6)
2137 MIPS_SYS(sys_pwritev2, 6)
048f6b4d 2138};
ff4f7382
RH		 2139# undef MIPS_SYS
2140# endif /* O32 */
048f6b4d 2141
590bc601
PB		 2142static int do_store_exclusive(CPUMIPSState *env)
2143{
2144 target_ulong addr;
2145 target_ulong page_addr;
2146 target_ulong val;
2147 int flags;
2148 int segv = 0;
2149 int reg;
2150 int d;
2151
5499b6ff 2152 addr = env->lladdr;
590bc601
PB		 2153 page_addr = addr & TARGET_PAGE_MASK;
2154 start_exclusive();
2155 mmap_lock();
2156 flags = page_get_flags(page_addr);
2157 if ((flags & PAGE_READ) == 0) {
2158 segv = 1;
2159 } else {
2160 reg = env->llreg & 0x1f;
2161 d = (env->llreg & 0x20) != 0;
2162 if (d) {
2163 segv = get_user_s64(val, addr);
2164 } else {
2165 segv = get_user_s32(val, addr);
2166 }
2167 if (!segv) {
2168 if (val != env->llval) {
2169 env->active_tc.gpr[reg] = 0;
2170 } else {
2171 if (d) {
2172 segv = put_user_u64(env->llnewval, addr);
2173 } else {
2174 segv = put_user_u32(env->llnewval, addr);
2175 }
2176 if (!segv) {
2177 env->active_tc.gpr[reg] = 1;
2178 }
2179 }
2180 }
2181 }
5499b6ff 2182 env->lladdr = -1;
590bc601
PB		 2183 if (!segv) {
2184 env->active_tc.PC += 4;
2185 }
2186 mmap_unlock();
2187 end_exclusive();
2188 return segv;
2189}
2190
54b2f42c
MI		 2191/* Break codes */
2192enum {
2193 BRK_OVERFLOW = 6,
2194 BRK_DIVZERO = 7
2195};
2196
2197static int do_break(CPUMIPSState *env, target_siginfo_t *info,
2198 unsigned int code)
2199{
2200 int ret = -1;
2201
2202 switch (code) {
2203 case BRK_OVERFLOW:
2204 case BRK_DIVZERO:
2205 info->si_signo = TARGET_SIGFPE;
2206 info->si_errno = 0;
2207 info->si_code = (code == BRK_OVERFLOW) ? FPE_INTOVF : FPE_INTDIV;
9d2803f7 2208 queue_signal(env, info->si_signo, QEMU_SI_FAULT, &*info);
54b2f42c
MI		 2209 ret = 0;
2210 break;
2211 default:
b51910ba
PJ		 2212 info->si_signo = TARGET_SIGTRAP;
2213 info->si_errno = 0;
9d2803f7 2214 queue_signal(env, info->si_signo, QEMU_SI_FAULT, &*info);
b51910ba 2215 ret = 0;
54b2f42c
MI		 2216 break;
2217 }
2218
2219 return ret;
2220}
2221
048f6b4d
FB		 2222void cpu_loop(CPUMIPSState *env)
2223{
0315c31c 2224 CPUState *cs = CPU(mips_env_get_cpu(env));
c227f099 2225 target_siginfo_t info;
ff4f7382
RH		 2226 int trapnr;
2227 abi_long ret;
2228# ifdef TARGET_ABI_MIPSO32
048f6b4d 2229 unsigned int syscall_num;
ff4f7382 2230# endif
048f6b4d
FB		 2231
2232 for(;;) {
0315c31c 2233 cpu_exec_start(cs);
8642c1b8 2234 trapnr = cpu_exec(cs);
0315c31c 2235 cpu_exec_end(cs);
d148d90e
SF		 2236 process_queued_cpu_work(cs);
2237
048f6b4d
FB		 2238 switch(trapnr) {
2239 case EXCP_SYSCALL:
b5dc7732 2240 env->active_tc.PC += 4;
ff4f7382
RH		 2241# ifdef TARGET_ABI_MIPSO32
2242 syscall_num = env->active_tc.gpr[2] - 4000;
388bb21a 2243 if (syscall_num >= sizeof(mips_syscall_args)) {
7c2f6157 2244 ret = -TARGET_ENOSYS;
388bb21a
TS		 2245 } else {
2246 int nb_args;
992f48a0
BS		 2247 abi_ulong sp_reg;
2248 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
388bb21a
TS		 2249
2250 nb_args = mips_syscall_args[syscall_num];
b5dc7732 2251 sp_reg = env->active_tc.gpr[29];
388bb21a
TS		 2252 switch (nb_args) {
2253 /* these arguments are taken from the stack */
94c19610
ACH		 2254 case 8:
2255 if ((ret = get_user_ual(arg8, sp_reg + 28)) != 0) {
2256 goto done_syscall;
2257 }
2258 case 7:
2259 if ((ret = get_user_ual(arg7, sp_reg + 24)) != 0) {
2260 goto done_syscall;
2261 }
2262 case 6:
2263 if ((ret = get_user_ual(arg6, sp_reg + 20)) != 0) {
2264 goto done_syscall;
2265 }
2266 case 5:
2267 if ((ret = get_user_ual(arg5, sp_reg + 16)) != 0) {
2268 goto done_syscall;
2269 }
388bb21a
TS		 2270 default:
2271 break;
048f6b4d 2272 }
b5dc7732
TS		 2273 ret = do_syscall(env, env->active_tc.gpr[2],
2274 env->active_tc.gpr[4],
2275 env->active_tc.gpr[5],
2276 env->active_tc.gpr[6],
2277 env->active_tc.gpr[7],
5945cfcb 2278 arg5, arg6, arg7, arg8);
388bb21a 2279 }
94c19610 2280done_syscall:
ff4f7382
RH		 2281# else
2282 ret = do_syscall(env, env->active_tc.gpr[2],
2283 env->active_tc.gpr[4], env->active_tc.gpr[5],
2284 env->active_tc.gpr[6], env->active_tc.gpr[7],
2285 env->active_tc.gpr[8], env->active_tc.gpr[9],
2286 env->active_tc.gpr[10], env->active_tc.gpr[11]);
2287# endif /* O32 */
2eb3ae27
TB		 2288 if (ret == -TARGET_ERESTARTSYS) {
2289 env->active_tc.PC -= 4;
2290 break;
2291 }
0b1bcb00
PB		 2292 if (ret == -TARGET_QEMU_ESIGRETURN) {
2293 /* Returning from a successful sigreturn syscall.
2294 Avoid clobbering register state. */
2295 break;
2296 }
ff4f7382 2297 if ((abi_ulong)ret >= (abi_ulong)-1133) {
b5dc7732 2298 env->active_tc.gpr[7] = 1; /* error flag */
388bb21a
TS		 2299 ret = -ret;
2300 } else {
b5dc7732 2301 env->active_tc.gpr[7] = 0; /* error flag */
048f6b4d 2302 }
b5dc7732 2303 env->active_tc.gpr[2] = ret;
048f6b4d 2304 break;
ca7c2b1b
TS		 2305 case EXCP_TLBL:
2306 case EXCP_TLBS:
e6e5bd2d
WT		 2307 case EXCP_AdEL:
2308 case EXCP_AdES:
e4474235
PB		 2309 info.si_signo = TARGET_SIGSEGV;
2310 info.si_errno = 0;
2311 /* XXX: check env->error_code */
2312 info.si_code = TARGET_SEGV_MAPERR;
2313 info._sifields._sigfault._addr = env->CP0_BadVAddr;
9d2803f7 2314 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
e4474235 2315 break;
6900e84b 2316 case EXCP_CpU:
048f6b4d 2317 case EXCP_RI:
bc1ad2de
FB		 2318 info.si_signo = TARGET_SIGILL;
2319 info.si_errno = 0;
2320 info.si_code = 0;
9d2803f7 2321 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
048f6b4d 2322 break;
106ec879
FB		 2323 case EXCP_INTERRUPT:
2324 /* just indicate that signals should be handled asap */
2325 break;
d08b2a28
PB		 2326 case EXCP_DEBUG:
2327 {
2328 int sig;
2329
db6b81d4 2330 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
d08b2a28
PB		 2331 if (sig)
2332 {
2333 info.si_signo = sig;
2334 info.si_errno = 0;
2335 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 2336 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
d08b2a28
PB		 2337 }
2338 }
2339 break;
590bc601
PB		 2340 case EXCP_SC:
2341 if (do_store_exclusive(env)) {
2342 info.si_signo = TARGET_SIGSEGV;
2343 info.si_errno = 0;
2344 info.si_code = TARGET_SEGV_MAPERR;
2345 info._sifields._sigfault._addr = env->active_tc.PC;
9d2803f7 2346 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
590bc601
PB		 2347 }
2348 break;
853c3240
JL		 2349 case EXCP_DSPDIS:
2350 info.si_signo = TARGET_SIGILL;
2351 info.si_errno = 0;
2352 info.si_code = TARGET_ILL_ILLOPC;
9d2803f7 2353 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
853c3240 2354 break;
54b2f42c
MI		 2355 /* The code below was inspired by the MIPS Linux kernel trap
2356 * handling code in arch/mips/kernel/traps.c.
2357 */
2358 case EXCP_BREAK:
2359 {
2360 abi_ulong trap_instr;
2361 unsigned int code;
2362
a0333817
KCY		 2363 if (env->hflags & MIPS_HFLAG_M16) {
2364 if (env->insn_flags & ASE_MICROMIPS) {
2365 /* microMIPS mode */
1308c464
KCY		 2366 ret = get_user_u16(trap_instr, env->active_tc.PC);
2367 if (ret != 0) {
2368 goto error;
2369 }
a0333817 2370
1308c464
KCY		 2371 if ((trap_instr >> 10) == 0x11) {
2372 /* 16-bit instruction */
2373 code = trap_instr & 0xf;
2374 } else {
2375 /* 32-bit instruction */
2376 abi_ulong instr_lo;
2377
2378 ret = get_user_u16(instr_lo,
2379 env->active_tc.PC + 2);
2380 if (ret != 0) {
2381 goto error;
2382 }
2383 trap_instr = (trap_instr << 16) | instr_lo;
2384 code = ((trap_instr >> 6) & ((1 << 20) - 1));
2385 /* Unfortunately, microMIPS also suffers from
2386 the old assembler bug... */
2387 if (code >= (1 << 10)) {
2388 code >>= 10;
2389 }
2390 }
a0333817
KCY		 2391 } else {
2392 /* MIPS16e mode */
2393 ret = get_user_u16(trap_instr, env->active_tc.PC);
2394 if (ret != 0) {
2395 goto error;
2396 }
2397 code = (trap_instr >> 6) & 0x3f;
a0333817
KCY		 2398 }
2399 } else {
f01a361b 2400 ret = get_user_u32(trap_instr, env->active_tc.PC);
1308c464
KCY		 2401 if (ret != 0) {
2402 goto error;
2403 }
54b2f42c 2404
1308c464
KCY		 2405 /* As described in the original Linux kernel code, the
2406 * below checks on 'code' are to work around an old
2407 * assembly bug.
2408 */
2409 code = ((trap_instr >> 6) & ((1 << 20) - 1));
2410 if (code >= (1 << 10)) {
2411 code >>= 10;
2412 }
54b2f42c
MI		 2413 }
2414
2415 if (do_break(env, &info, code) != 0) {
2416 goto error;
2417 }
2418 }
2419 break;
2420 case EXCP_TRAP:
2421 {
2422 abi_ulong trap_instr;
2423 unsigned int code = 0;
2424
a0333817
KCY		 2425 if (env->hflags & MIPS_HFLAG_M16) {
2426 /* microMIPS mode */
2427 abi_ulong instr[2];
2428
2429 ret = get_user_u16(instr[0], env->active_tc.PC) ||
2430 get_user_u16(instr[1], env->active_tc.PC + 2);
2431
2432 trap_instr = (instr[0] << 16) | instr[1];
2433 } else {
f01a361b 2434 ret = get_user_u32(trap_instr, env->active_tc.PC);
a0333817
KCY		 2435 }
2436
54b2f42c
MI		 2437 if (ret != 0) {
2438 goto error;
2439 }
2440
2441 /* The immediate versions don't provide a code. */
2442 if (!(trap_instr & 0xFC000000)) {
a0333817
KCY		 2443 if (env->hflags & MIPS_HFLAG_M16) {
2444 /* microMIPS mode */
2445 code = ((trap_instr >> 12) & ((1 << 4) - 1));
2446 } else {
2447 code = ((trap_instr >> 6) & ((1 << 10) - 1));
2448 }
54b2f42c
MI		 2449 }
2450
2451 if (do_break(env, &info, code) != 0) {
2452 goto error;
2453 }
2454 }
2455 break;
fdbc2b57
RH		 2456 case EXCP_ATOMIC:
2457 cpu_exec_step_atomic(cs);
2458 break;
048f6b4d 2459 default:
54b2f42c 2460error:
120a9848 2461 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
048f6b4d
FB		 2462 abort();
2463 }
2464 process_pending_signals(env);
2465 }
2466}
2467#endif
2468
a0a839b6
MV		 2469#ifdef TARGET_NIOS2
2470
2471void cpu_loop(CPUNios2State *env)
2472{
2473 CPUState *cs = ENV_GET_CPU(env);
2474 Nios2CPU *cpu = NIOS2_CPU(cs);
2475 target_siginfo_t info;
2476 int trapnr, gdbsig, ret;
2477
2478 for (;;) {
2479 cpu_exec_start(cs);
2480 trapnr = cpu_exec(cs);
2481 cpu_exec_end(cs);
2482 gdbsig = 0;
2483
2484 switch (trapnr) {
2485 case EXCP_INTERRUPT:
2486 /* just indicate that signals should be handled asap */
2487 break;
2488 case EXCP_TRAP:
2489 if (env->regs[R_AT] == 0) {
2490 abi_long ret;
2491 qemu_log_mask(CPU_LOG_INT, "\nSyscall\n");
2492
2493 ret = do_syscall(env, env->regs[2],
2494 env->regs[4], env->regs[5], env->regs[6],
2495 env->regs[7], env->regs[8], env->regs[9],
2496 0, 0);
2497
2498 if (env->regs[2] == 0) { /* FIXME: syscall 0 workaround */
2499 ret = 0;
2500 }
2501
2502 env->regs[2] = abs(ret);
2503 /* Return value is 0..4096 */
2504 env->regs[7] = (ret > 0xfffffffffffff000ULL);
2505 env->regs[CR_ESTATUS] = env->regs[CR_STATUS];
2506 env->regs[CR_STATUS] &= ~0x3;
2507 env->regs[R_EA] = env->regs[R_PC] + 4;
2508 env->regs[R_PC] += 4;
2509 break;
2510 } else {
2511 qemu_log_mask(CPU_LOG_INT, "\nTrap\n");
2512
2513 env->regs[CR_ESTATUS] = env->regs[CR_STATUS];
2514 env->regs[CR_STATUS] &= ~0x3;
2515 env->regs[R_EA] = env->regs[R_PC] + 4;
2516 env->regs[R_PC] = cpu->exception_addr;
2517
2518 gdbsig = TARGET_SIGTRAP;
2519 break;
2520 }
2521 case 0xaa:
2522 switch (env->regs[R_PC]) {
2523 /*case 0x1000:*/ /* TODO:__kuser_helper_version */
2524 case 0x1004: /* __kuser_cmpxchg */
2525 start_exclusive();
2526 if (env->regs[4] & 0x3) {
2527 goto kuser_fail;
2528 }
2529 ret = get_user_u32(env->regs[2], env->regs[4]);
2530 if (ret) {
2531 end_exclusive();
2532 goto kuser_fail;
2533 }
2534 env->regs[2] -= env->regs[5];
2535 if (env->regs[2] == 0) {
2536 put_user_u32(env->regs[6], env->regs[4]);
2537 }
2538 end_exclusive();
2539 env->regs[R_PC] = env->regs[R_RA];
2540 break;
2541 /*case 0x1040:*/ /* TODO:__kuser_sigtramp */
2542 default:
2543 ;
2544kuser_fail:
2545 info.si_signo = TARGET_SIGSEGV;
2546 info.si_errno = 0;
2547 /* TODO: check env->error_code */
2548 info.si_code = TARGET_SEGV_MAPERR;
2549 info._sifields._sigfault._addr = env->regs[R_PC];
2550 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2551 }
2552 break;
2553 default:
2554 EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n",
2555 trapnr);
2556 gdbsig = TARGET_SIGILL;
2557 break;
2558 }
2559 if (gdbsig) {
2560 gdb_handlesig(cs, gdbsig);
2561 if (gdbsig != TARGET_SIGTRAP) {
2562 exit(EXIT_FAILURE);
2563 }
2564 }
2565
2566 process_pending_signals(env);
2567 }
2568}
2569
2570#endif /* TARGET_NIOS2 */
2571
d962783e
JL		 2572#ifdef TARGET_OPENRISC
2573
2574void cpu_loop(CPUOpenRISCState *env)
2575{
878096ee 2576 CPUState *cs = CPU(openrisc_env_get_cpu(env));
a0adc417 2577 int trapnr;
7fe7231a 2578 abi_long ret;
a0adc417 2579 target_siginfo_t info;
d962783e
JL		 2580
2581 for (;;) {
b040bc9c 2582 cpu_exec_start(cs);
8642c1b8 2583 trapnr = cpu_exec(cs);
b040bc9c 2584 cpu_exec_end(cs);
d148d90e 2585 process_queued_cpu_work(cs);
d962783e
JL		 2586
2587 switch (trapnr) {
d962783e
JL		 2588 case EXCP_SYSCALL:
2589 env->pc += 4; /* 0xc00; */
7fe7231a
TB		 2590 ret = do_syscall(env,
2591 env->gpr[11], /* return value */
2592 env->gpr[3], /* r3 - r7 are params */
2593 env->gpr[4],
2594 env->gpr[5],
2595 env->gpr[6],
2596 env->gpr[7],
2597 env->gpr[8], 0, 0);
2598 if (ret == -TARGET_ERESTARTSYS) {
2599 env->pc -= 4;
2600 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2601 env->gpr[11] = ret;
2602 }
d962783e 2603 break;
a0adc417
RH		 2604 case EXCP_DPF:
2605 case EXCP_IPF:
2606 case EXCP_RANGE:
2607 info.si_signo = TARGET_SIGSEGV;
2608 info.si_errno = 0;
2609 info.si_code = TARGET_SEGV_MAPERR;
2610 info._sifields._sigfault._addr = env->pc;
2611 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2612 break;
2613 case EXCP_ALIGN:
2614 info.si_signo = TARGET_SIGBUS;
2615 info.si_errno = 0;
2616 info.si_code = TARGET_BUS_ADRALN;
2617 info._sifields._sigfault._addr = env->pc;
2618 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2619 break;
2620 case EXCP_ILLEGAL:
2621 info.si_signo = TARGET_SIGILL;
2622 info.si_errno = 0;
2623 info.si_code = TARGET_ILL_ILLOPC;
2624 info._sifields._sigfault._addr = env->pc;
2625 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2626 break;
d962783e 2627 case EXCP_FPE:
a0adc417
RH		 2628 info.si_signo = TARGET_SIGFPE;
2629 info.si_errno = 0;
2630 info.si_code = 0;
2631 info._sifields._sigfault._addr = env->pc;
2632 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
d962783e 2633 break;
a0adc417
RH		 2634 case EXCP_INTERRUPT:
2635 /* We processed the pending cpu work above. */
d962783e 2636 break;
a0adc417
RH		 2637 case EXCP_DEBUG:
2638 trapnr = gdb_handlesig(cs, TARGET_SIGTRAP);
2639 if (trapnr) {
2640 info.si_signo = trapnr;
2641 info.si_errno = 0;
2642 info.si_code = TARGET_TRAP_BRKPT;
2643 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2644 }
d962783e 2645 break;
fdbc2b57
RH		 2646 case EXCP_ATOMIC:
2647 cpu_exec_step_atomic(cs);
2648 break;
d962783e 2649 default:
a0adc417 2650 g_assert_not_reached();
d962783e 2651 }
d962783e
JL		 2652 process_pending_signals(env);
2653 }
2654}
2655
2656#endif /* TARGET_OPENRISC */
2657
fdf9b3e8 2658#ifdef TARGET_SH4
05390248 2659void cpu_loop(CPUSH4State *env)
fdf9b3e8 2660{
878096ee 2661 CPUState *cs = CPU(sh_env_get_cpu(env));
fdf9b3e8 2662 int trapnr, ret;
c227f099 2663 target_siginfo_t info;
3b46e624 2664
fdf9b3e8 2665 while (1) {
b040bc9c 2666 cpu_exec_start(cs);
8642c1b8 2667 trapnr = cpu_exec(cs);
b040bc9c 2668 cpu_exec_end(cs);
d148d90e 2669 process_queued_cpu_work(cs);
3b46e624 2670
fdf9b3e8
FB		 2671 switch (trapnr) {
2672 case 0x160:
0b6d3ae0 2673 env->pc += 2;
5fafdf24
TS		 2674 ret = do_syscall(env,
2675 env->gregs[3],
2676 env->gregs[4],
2677 env->gregs[5],
2678 env->gregs[6],
2679 env->gregs[7],
2680 env->gregs[0],
5945cfcb
PM		 2681 env->gregs[1],
2682 0, 0);
ba412496
TB		 2683 if (ret == -TARGET_ERESTARTSYS) {
2684 env->pc -= 2;
2685 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2686 env->gregs[0] = ret;
2687 }
fdf9b3e8 2688 break;
c3b5bc8a
TS		 2689 case EXCP_INTERRUPT:
2690 /* just indicate that signals should be handled asap */
2691 break;
355fb23d
PB		 2692 case EXCP_DEBUG:
2693 {
2694 int sig;
2695
db6b81d4 2696 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
355fb23d
PB		 2697 if (sig)
2698 {
2699 info.si_signo = sig;
2700 info.si_errno = 0;
2701 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 2702 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
355fb23d
PB		 2703 }
2704 }
2705 break;
c3b5bc8a
TS		 2706 case 0xa0:
2707 case 0xc0:
a86b3c64 2708 info.si_signo = TARGET_SIGSEGV;
c3b5bc8a
TS		 2709 info.si_errno = 0;
2710 info.si_code = TARGET_SEGV_MAPERR;
2711 info._sifields._sigfault._addr = env->tea;
9d2803f7 2712 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
c3b5bc8a
TS		 2713 break;
2714
fdbc2b57
RH		 2715 case EXCP_ATOMIC:
2716 cpu_exec_step_atomic(cs);
2717 break;
fdf9b3e8
FB		 2718 default:
2719 printf ("Unhandled trap: 0x%x\n", trapnr);
878096ee 2720 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 2721 exit(EXIT_FAILURE);
fdf9b3e8
FB		 2722 }
2723 process_pending_signals (env);
2724 }
2725}
2726#endif
2727
48733d19 2728#ifdef TARGET_CRIS
05390248 2729void cpu_loop(CPUCRISState *env)
48733d19 2730{
878096ee 2731 CPUState *cs = CPU(cris_env_get_cpu(env));
48733d19 2732 int trapnr, ret;
c227f099 2733 target_siginfo_t info;
48733d19
TS		 2734
2735 while (1) {
b040bc9c 2736 cpu_exec_start(cs);
8642c1b8 2737 trapnr = cpu_exec(cs);
b040bc9c 2738 cpu_exec_end(cs);
d148d90e
SF		 2739 process_queued_cpu_work(cs);
2740
48733d19
TS		 2741 switch (trapnr) {
2742 case 0xaa:
2743 {
a86b3c64 2744 info.si_signo = TARGET_SIGSEGV;
48733d19
TS		 2745 info.si_errno = 0;
2746 /* XXX: check env->error_code */
2747 info.si_code = TARGET_SEGV_MAPERR;
e00c1e71 2748 info._sifields._sigfault._addr = env->pregs[PR_EDA];
9d2803f7 2749 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
48733d19
TS		 2750 }
2751 break;
b6d3abda
EI		 2752 case EXCP_INTERRUPT:
2753 /* just indicate that signals should be handled asap */
2754 break;
48733d19
TS		 2755 case EXCP_BREAK:
2756 ret = do_syscall(env,
2757 env->regs[9],
2758 env->regs[10],
2759 env->regs[11],
2760 env->regs[12],
2761 env->regs[13],
2762 env->pregs[7],
5945cfcb
PM		 2763 env->pregs[11],
2764 0, 0);
62050865
TB		 2765 if (ret == -TARGET_ERESTARTSYS) {
2766 env->pc -= 2;
2767 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2768 env->regs[10] = ret;
2769 }
48733d19
TS		 2770 break;
2771 case EXCP_DEBUG:
2772 {
2773 int sig;
2774
db6b81d4 2775 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
48733d19
TS		 2776 if (sig)
2777 {
2778 info.si_signo = sig;
2779 info.si_errno = 0;
2780 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 2781 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
48733d19
TS		 2782 }
2783 }
2784 break;
fdbc2b57
RH		 2785 case EXCP_ATOMIC:
2786 cpu_exec_step_atomic(cs);
2787 break;
48733d19
TS		 2788 default:
2789 printf ("Unhandled trap: 0x%x\n", trapnr);
878096ee 2790 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 2791 exit(EXIT_FAILURE);
48733d19
TS		 2792 }
2793 process_pending_signals (env);
2794 }
2795}
2796#endif
2797
b779e29e 2798#ifdef TARGET_MICROBLAZE
05390248 2799void cpu_loop(CPUMBState *env)
b779e29e 2800{
878096ee 2801 CPUState *cs = CPU(mb_env_get_cpu(env));
b779e29e 2802 int trapnr, ret;
c227f099 2803 target_siginfo_t info;
b779e29e
EI		 2804
2805 while (1) {
b040bc9c 2806 cpu_exec_start(cs);
8642c1b8 2807 trapnr = cpu_exec(cs);
b040bc9c 2808 cpu_exec_end(cs);
d148d90e
SF		 2809 process_queued_cpu_work(cs);
2810
b779e29e
EI		 2811 switch (trapnr) {
2812 case 0xaa:
2813 {
a86b3c64 2814 info.si_signo = TARGET_SIGSEGV;
b779e29e
EI		 2815 info.si_errno = 0;
2816 /* XXX: check env->error_code */
2817 info.si_code = TARGET_SEGV_MAPERR;
2818 info._sifields._sigfault._addr = 0;
9d2803f7 2819 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
b779e29e
EI		 2820 }
2821 break;
2822 case EXCP_INTERRUPT:
2823 /* just indicate that signals should be handled asap */
2824 break;
2825 case EXCP_BREAK:
2826 /* Return address is 4 bytes after the call. */
2827 env->regs[14] += 4;
d7dce494 2828 env->sregs[SR_PC] = env->regs[14];
b779e29e
EI		 2829 ret = do_syscall(env,
2830 env->regs[12],
2831 env->regs[5],
2832 env->regs[6],
2833 env->regs[7],
2834 env->regs[8],
2835 env->regs[9],
5945cfcb
PM		 2836 env->regs[10],
2837 0, 0);
4134ecfe
TB		 2838 if (ret == -TARGET_ERESTARTSYS) {
2839 /* Wind back to before the syscall. */
2840 env->sregs[SR_PC] -= 4;
2841 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2842 env->regs[3] = ret;
2843 }
d7749ab7
PM		 2844 /* All syscall exits result in guest r14 being equal to the
2845 * PC we return to, because the kernel syscall exit "rtbd" does
2846 * this. (This is true even for sigreturn(); note that r14 is
2847 * not a userspace-usable register, as the kernel may clobber it
2848 * at any point.)
2849 */
2850 env->regs[14] = env->sregs[SR_PC];
b779e29e 2851 break;
b76da7e3
EI		 2852 case EXCP_HW_EXCP:
2853 env->regs[17] = env->sregs[SR_PC] + 4;
2854 if (env->iflags & D_FLAG) {
2855 env->sregs[SR_ESR] |= 1 << 12;
2856 env->sregs[SR_PC] -= 4;
b4916d7b 2857 /* FIXME: if branch was immed, replay the imm as well. */
b76da7e3
EI		 2858 }
2859
2860 env->iflags &= ~(IMM_FLAG | D_FLAG);
2861
2862 switch (env->sregs[SR_ESR] & 31) {
22a78d64 2863 case ESR_EC_DIVZERO:
a86b3c64 2864 info.si_signo = TARGET_SIGFPE;
22a78d64
EI		 2865 info.si_errno = 0;
2866 info.si_code = TARGET_FPE_FLTDIV;
2867 info._sifields._sigfault._addr = 0;
9d2803f7 2868 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
22a78d64 2869 break;
b76da7e3 2870 case ESR_EC_FPU:
a86b3c64 2871 info.si_signo = TARGET_SIGFPE;
b76da7e3
EI		 2872 info.si_errno = 0;
2873 if (env->sregs[SR_FSR] & FSR_IO) {
2874 info.si_code = TARGET_FPE_FLTINV;
2875 }
2876 if (env->sregs[SR_FSR] & FSR_DZ) {
2877 info.si_code = TARGET_FPE_FLTDIV;
2878 }
2879 info._sifields._sigfault._addr = 0;
9d2803f7 2880 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
b76da7e3
EI		 2881 break;
2882 default:
2883 printf ("Unhandled hw-exception: 0x%x\n",
2e42d52d 2884 env->sregs[SR_ESR] & ESR_EC_MASK);
878096ee 2885 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 2886 exit(EXIT_FAILURE);
b76da7e3
EI		 2887 break;
2888 }
2889 break;
b779e29e
EI		 2890 case EXCP_DEBUG:
2891 {
2892 int sig;
2893
db6b81d4 2894 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
b779e29e
EI		 2895 if (sig)
2896 {
2897 info.si_signo = sig;
2898 info.si_errno = 0;
2899 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 2900 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
b779e29e
EI		 2901 }
2902 }
2903 break;
fdbc2b57
RH		 2904 case EXCP_ATOMIC:
2905 cpu_exec_step_atomic(cs);
2906 break;
b779e29e
EI		 2907 default:
2908 printf ("Unhandled trap: 0x%x\n", trapnr);
878096ee 2909 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 2910 exit(EXIT_FAILURE);
b779e29e
EI		 2911 }
2912 process_pending_signals (env);
2913 }
2914}
2915#endif
2916
e6e5906b
PB		 2917#ifdef TARGET_M68K
2918
2919void cpu_loop(CPUM68KState *env)
2920{
878096ee 2921 CPUState *cs = CPU(m68k_env_get_cpu(env));
e6e5906b
PB		 2922 int trapnr;
2923 unsigned int n;
c227f099 2924 target_siginfo_t info;
0429a971 2925 TaskState *ts = cs->opaque;
3b46e624 2926
e6e5906b 2927 for(;;) {
b040bc9c 2928 cpu_exec_start(cs);
8642c1b8 2929 trapnr = cpu_exec(cs);
b040bc9c 2930 cpu_exec_end(cs);
d148d90e
SF		 2931 process_queued_cpu_work(cs);
2932
e6e5906b
PB		 2933 switch(trapnr) {
2934 case EXCP_ILLEGAL:
2935 {
2936 if (ts->sim_syscalls) {
2937 uint16_t nr;
d8d5119c 2938 get_user_u16(nr, env->pc + 2);
e6e5906b
PB		 2939 env->pc += 4;
2940 do_m68k_simcall(env, nr);
2941 } else {
2942 goto do_sigill;
2943 }
2944 }
2945 break;
a87295e8 2946 case EXCP_HALT_INSN:
e6e5906b 2947 /* Semihosing syscall. */
a87295e8 2948 env->pc += 4;
e6e5906b
PB		 2949 do_m68k_semihosting(env, env->dregs[0]);
2950 break;
2951 case EXCP_LINEA:
2952 case EXCP_LINEF:
2953 case EXCP_UNSUPPORTED:
2954 do_sigill:
a86b3c64 2955 info.si_signo = TARGET_SIGILL;
e6e5906b
PB		 2956 info.si_errno = 0;
2957 info.si_code = TARGET_ILL_ILLOPN;
2958 info._sifields._sigfault._addr = env->pc;
0ccb9c1d
LV		 2959 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2960 break;
2961 case EXCP_DIV0:
2962 info.si_signo = TARGET_SIGFPE;
2963 info.si_errno = 0;
2964 info.si_code = TARGET_FPE_INTDIV;
2965 info._sifields._sigfault._addr = env->pc;
9d2803f7 2966 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
e6e5906b
PB		 2967 break;
2968 case EXCP_TRAP0:
2969 {
7ccb84a9 2970 abi_long ret;
e6e5906b
PB		 2971 ts->sim_syscalls = 0;
2972 n = env->dregs[0];
2973 env->pc += 2;
7ccb84a9
TB		 2974 ret = do_syscall(env,
2975 n,
2976 env->dregs[1],
2977 env->dregs[2],
2978 env->dregs[3],
2979 env->dregs[4],
2980 env->dregs[5],
2981 env->aregs[0],
2982 0, 0);
2983 if (ret == -TARGET_ERESTARTSYS) {
2984 env->pc -= 2;
2985 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2986 env->dregs[0] = ret;
2987 }
e6e5906b
PB		 2988 }
2989 break;
2990 case EXCP_INTERRUPT:
2991 /* just indicate that signals should be handled asap */
2992 break;
2993 case EXCP_ACCESS:
2994 {
a86b3c64 2995 info.si_signo = TARGET_SIGSEGV;
e6e5906b
PB		 2996 info.si_errno = 0;
2997 /* XXX: check env->error_code */
2998 info.si_code = TARGET_SEGV_MAPERR;
2999 info._sifields._sigfault._addr = env->mmu.ar;
9d2803f7 3000 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
e6e5906b
PB		 3001 }
3002 break;
3003 case EXCP_DEBUG:
3004 {
3005 int sig;
3006
db6b81d4 3007 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
e6e5906b
PB		 3008 if (sig)
3009 {
3010 info.si_signo = sig;
3011 info.si_errno = 0;
3012 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 3013 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
e6e5906b
PB		 3014 }
3015 }
3016 break;
fdbc2b57
RH		 3017 case EXCP_ATOMIC:
3018 cpu_exec_step_atomic(cs);
3019 break;
e6e5906b 3020 default:
120a9848 3021 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
e6e5906b
PB		 3022 abort();
3023 }
3024 process_pending_signals(env);
3025 }
3026}
3027#endif /* TARGET_M68K */
3028
7a3148a9 3029#ifdef TARGET_ALPHA
05390248 3030void cpu_loop(CPUAlphaState *env)
7a3148a9 3031{
878096ee 3032 CPUState *cs = CPU(alpha_env_get_cpu(env));
e96efcfc 3033 int trapnr;
c227f099 3034 target_siginfo_t info;
6049f4f8 3035 abi_long sysret;
3b46e624 3036
7a3148a9 3037 while (1) {
b040bc9c 3038 cpu_exec_start(cs);
8642c1b8 3039 trapnr = cpu_exec(cs);
b040bc9c 3040 cpu_exec_end(cs);
d148d90e 3041 process_queued_cpu_work(cs);
3b46e624 3042
ac316ca4
RH		 3043 /* All of the traps imply a transition through PALcode, which
3044 implies an REI instruction has been executed. Which means
3045 that the intr_flag should be cleared. */
3046 env->intr_flag = 0;
3047
7a3148a9
JM		 3048 switch (trapnr) {
3049 case EXCP_RESET:
3050 fprintf(stderr, "Reset requested. Exit\n");
4d1275c2 3051 exit(EXIT_FAILURE);
7a3148a9
JM		 3052 break;
3053 case EXCP_MCHK:
3054 fprintf(stderr, "Machine check exception. Exit\n");
4d1275c2 3055 exit(EXIT_FAILURE);
7a3148a9 3056 break;
07b6c13b
RH		 3057 case EXCP_SMP_INTERRUPT:
3058 case EXCP_CLK_INTERRUPT:
3059 case EXCP_DEV_INTERRUPT:
5fafdf24 3060 fprintf(stderr, "External interrupt. Exit\n");
4d1275c2 3061 exit(EXIT_FAILURE);
7a3148a9 3062 break;
07b6c13b 3063 case EXCP_MMFAULT:
6910b8f6 3064 env->lock_addr = -1;
6049f4f8
RH		 3065 info.si_signo = TARGET_SIGSEGV;
3066 info.si_errno = 0;
129d8aa5 3067 info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID
0be1d07c 3068 ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);
129d8aa5 3069 info._sifields._sigfault._addr = env->trap_arg0;
9d2803f7 3070 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
7a3148a9 3071 break;
7a3148a9 3072 case EXCP_UNALIGN:
6910b8f6 3073 env->lock_addr = -1;
6049f4f8
RH		 3074 info.si_signo = TARGET_SIGBUS;
3075 info.si_errno = 0;
3076 info.si_code = TARGET_BUS_ADRALN;
129d8aa5 3077 info._sifields._sigfault._addr = env->trap_arg0;
9d2803f7 3078 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
7a3148a9
JM		 3079 break;
3080 case EXCP_OPCDEC:
6049f4f8 3081 do_sigill:
6910b8f6 3082 env->lock_addr = -1;
6049f4f8
RH		 3083 info.si_signo = TARGET_SIGILL;
3084 info.si_errno = 0;
3085 info.si_code = TARGET_ILL_ILLOPC;
3086 info._sifields._sigfault._addr = env->pc;
9d2803f7 3087 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
7a3148a9 3088 break;
07b6c13b
RH		 3089 case EXCP_ARITH:
3090 env->lock_addr = -1;
3091 info.si_signo = TARGET_SIGFPE;
3092 info.si_errno = 0;
3093 info.si_code = TARGET_FPE_FLTINV;
3094 info._sifields._sigfault._addr = env->pc;
9d2803f7 3095 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
07b6c13b 3096 break;
7a3148a9 3097 case EXCP_FEN:
6049f4f8 3098 /* No-op. Linux simply re-enables the FPU. */
7a3148a9 3099 break;
07b6c13b 3100 case EXCP_CALL_PAL:
6910b8f6 3101 env->lock_addr = -1;
07b6c13b 3102 switch (env->error_code) {
6049f4f8
RH		 3103 case 0x80:
3104 /* BPT */
3105 info.si_signo = TARGET_SIGTRAP;
3106 info.si_errno = 0;
3107 info.si_code = TARGET_TRAP_BRKPT;
3108 info._sifields._sigfault._addr = env->pc;
9d2803f7 3109 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
6049f4f8
RH		 3110 break;
3111 case 0x81:
3112 /* BUGCHK */
3113 info.si_signo = TARGET_SIGTRAP;
3114 info.si_errno = 0;
3115 info.si_code = 0;
3116 info._sifields._sigfault._addr = env->pc;
9d2803f7 3117 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
6049f4f8
RH		 3118 break;
3119 case 0x83:
3120 /* CALLSYS */
3121 trapnr = env->ir[IR_V0];
3122 sysret = do_syscall(env, trapnr,
3123 env->ir[IR_A0], env->ir[IR_A1],
3124 env->ir[IR_A2], env->ir[IR_A3],
5945cfcb
PM		 3125 env->ir[IR_A4], env->ir[IR_A5],
3126 0, 0);
338c858c
TB		 3127 if (sysret == -TARGET_ERESTARTSYS) {
3128 env->pc -= 4;
3129 break;
3130 }
3131 if (sysret == -TARGET_QEMU_ESIGRETURN) {
a5b3b13b
RH		 3132 break;
3133 }
3134 /* Syscall writes 0 to V0 to bypass error check, similar
0e141977
RH		 3135 to how this is handled internal to Linux kernel.
3136 (Ab)use trapnr temporarily as boolean indicating error. */
3137 trapnr = (env->ir[IR_V0] != 0 && sysret < 0);
3138 env->ir[IR_V0] = (trapnr ? -sysret : sysret);
3139 env->ir[IR_A3] = trapnr;
6049f4f8
RH		 3140 break;
3141 case 0x86:
3142 /* IMB */
3143 /* ??? We can probably elide the code using page_unprotect
3144 that is checking for self-modifying code. Instead we
3145 could simply call tb_flush here. Until we work out the
3146 changes required to turn off the extra write protection,
3147 this can be a no-op. */
3148 break;
3149 case 0x9E:
3150 /* RDUNIQUE */
3151 /* Handled in the translator for usermode. */
3152 abort();
3153 case 0x9F:
3154 /* WRUNIQUE */
3155 /* Handled in the translator for usermode. */
3156 abort();
3157 case 0xAA:
3158 /* GENTRAP */
3159 info.si_signo = TARGET_SIGFPE;
3160 switch (env->ir[IR_A0]) {
3161 case TARGET_GEN_INTOVF:
3162 info.si_code = TARGET_FPE_INTOVF;
3163 break;
3164 case TARGET_GEN_INTDIV:
3165 info.si_code = TARGET_FPE_INTDIV;
3166 break;
3167 case TARGET_GEN_FLTOVF:
3168 info.si_code = TARGET_FPE_FLTOVF;
3169 break;
3170 case TARGET_GEN_FLTUND:
3171 info.si_code = TARGET_FPE_FLTUND;
3172 break;
3173 case TARGET_GEN_FLTINV:
3174 info.si_code = TARGET_FPE_FLTINV;
3175 break;
3176 case TARGET_GEN_FLTINE:
3177 info.si_code = TARGET_FPE_FLTRES;
3178 break;
3179 case TARGET_GEN_ROPRAND:
3180 info.si_code = 0;
3181 break;
3182 default:
3183 info.si_signo = TARGET_SIGTRAP;
3184 info.si_code = 0;
3185 break;
3186 }
3187 info.si_errno = 0;
3188 info._sifields._sigfault._addr = env->pc;
9d2803f7 3189 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
6049f4f8
RH		 3190 break;
3191 default:
3192 goto do_sigill;
3193 }
7a3148a9 3194 break;
7a3148a9 3195 case EXCP_DEBUG:
db6b81d4 3196 info.si_signo = gdb_handlesig(cs, TARGET_SIGTRAP);
6049f4f8 3197 if (info.si_signo) {
6910b8f6 3198 env->lock_addr = -1;
6049f4f8
RH		 3199 info.si_errno = 0;
3200 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 3201 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
7a3148a9
JM		 3202 }
3203 break;
d0f20495
RH		 3204 case EXCP_INTERRUPT:
3205 /* Just indicate that signals should be handled asap. */
3206 break;
fdbc2b57
RH		 3207 case EXCP_ATOMIC:
3208 cpu_exec_step_atomic(cs);
3209 break;
7a3148a9
JM		 3210 default:
3211 printf ("Unhandled trap: 0x%x\n", trapnr);
878096ee 3212 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 3213 exit(EXIT_FAILURE);
7a3148a9
JM		 3214 }
3215 process_pending_signals (env);
3216 }
3217}
3218#endif /* TARGET_ALPHA */
3219
a4c075f1
UH		 3220#ifdef TARGET_S390X
3221void cpu_loop(CPUS390XState *env)
3222{
878096ee 3223 CPUState *cs = CPU(s390_env_get_cpu(env));
d5a103cd 3224 int trapnr, n, sig;
a4c075f1 3225 target_siginfo_t info;
d5a103cd 3226 target_ulong addr;
47405ab6 3227 abi_long ret;
a4c075f1
UH		 3228
3229 while (1) {
b040bc9c 3230 cpu_exec_start(cs);
8642c1b8 3231 trapnr = cpu_exec(cs);
b040bc9c 3232 cpu_exec_end(cs);
d148d90e
SF		 3233 process_queued_cpu_work(cs);
3234
a4c075f1
UH		 3235 switch (trapnr) {
3236 case EXCP_INTERRUPT:
d5a103cd 3237 /* Just indicate that signals should be handled asap. */
a4c075f1 3238 break;
a4c075f1 3239
d5a103cd
RH		 3240 case EXCP_SVC:
3241 n = env->int_svc_code;
3242 if (!n) {
3243 /* syscalls > 255 */
3244 n = env->regs[1];
a4c075f1 3245 }
d5a103cd 3246 env->psw.addr += env->int_svc_ilen;
47405ab6
TB		 3247 ret = do_syscall(env, n, env->regs[2], env->regs[3],
3248 env->regs[4], env->regs[5],
3249 env->regs[6], env->regs[7], 0, 0);
3250 if (ret == -TARGET_ERESTARTSYS) {
3251 env->psw.addr -= env->int_svc_ilen;
3252 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
3253 env->regs[2] = ret;
3254 }
a4c075f1 3255 break;
d5a103cd
RH		 3256
3257 case EXCP_DEBUG:
db6b81d4 3258 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
d5a103cd
RH		 3259 if (sig) {
3260 n = TARGET_TRAP_BRKPT;
3261 goto do_signal_pc;
a4c075f1
UH		 3262 }
3263 break;
d5a103cd
RH		 3264 case EXCP_PGM:
3265 n = env->int_pgm_code;
3266 switch (n) {
3267 case PGM_OPERATION:
3268 case PGM_PRIVILEGED:
a86b3c64 3269 sig = TARGET_SIGILL;
d5a103cd
RH		 3270 n = TARGET_ILL_ILLOPC;
3271 goto do_signal_pc;
3272 case PGM_PROTECTION:
3273 case PGM_ADDRESSING:
a86b3c64 3274 sig = TARGET_SIGSEGV;
a4c075f1 3275 /* XXX: check env->error_code */
d5a103cd
RH		 3276 n = TARGET_SEGV_MAPERR;
3277 addr = env->__excp_addr;
3278 goto do_signal;
3279 case PGM_EXECUTE:
3280 case PGM_SPECIFICATION:
3281 case PGM_SPECIAL_OP:
3282 case PGM_OPERAND:
3283 do_sigill_opn:
a86b3c64 3284 sig = TARGET_SIGILL;
d5a103cd
RH		 3285 n = TARGET_ILL_ILLOPN;
3286 goto do_signal_pc;
3287
3288 case PGM_FIXPT_OVERFLOW:
a86b3c64 3289 sig = TARGET_SIGFPE;
d5a103cd
RH		 3290 n = TARGET_FPE_INTOVF;
3291 goto do_signal_pc;
3292 case PGM_FIXPT_DIVIDE:
a86b3c64 3293 sig = TARGET_SIGFPE;
d5a103cd
RH		 3294 n = TARGET_FPE_INTDIV;
3295 goto do_signal_pc;
3296
3297 case PGM_DATA:
3298 n = (env->fpc >> 8) & 0xff;
3299 if (n == 0xff) {
3300 /* compare-and-trap */
3301 goto do_sigill_opn;
3302 } else {
3303 /* An IEEE exception, simulated or otherwise. */
3304 if (n & 0x80) {
3305 n = TARGET_FPE_FLTINV;
3306 } else if (n & 0x40) {
3307 n = TARGET_FPE_FLTDIV;
3308 } else if (n & 0x20) {
3309 n = TARGET_FPE_FLTOVF;
3310 } else if (n & 0x10) {
3311 n = TARGET_FPE_FLTUND;
3312 } else if (n & 0x08) {
3313 n = TARGET_FPE_FLTRES;
3314 } else {
3315 /* ??? Quantum exception; BFP, DFP error. */
3316 goto do_sigill_opn;
3317 }
a86b3c64 3318 sig = TARGET_SIGFPE;
d5a103cd
RH		 3319 goto do_signal_pc;
3320 }
3321
3322 default:
3323 fprintf(stderr, "Unhandled program exception: %#x\n", n);
878096ee 3324 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 3325 exit(EXIT_FAILURE);
a4c075f1
UH		 3326 }
3327 break;
d5a103cd
RH		 3328
3329 do_signal_pc:
3330 addr = env->psw.addr;
3331 do_signal:
3332 info.si_signo = sig;
3333 info.si_errno = 0;
3334 info.si_code = n;
3335 info._sifields._sigfault._addr = addr;
9d2803f7 3336 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
a4c075f1 3337 break;
d5a103cd 3338
fdbc2b57
RH		 3339 case EXCP_ATOMIC:
3340 cpu_exec_step_atomic(cs);
3341 break;
a4c075f1 3342 default:
d5a103cd 3343 fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr);
878096ee 3344 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 3345 exit(EXIT_FAILURE);
a4c075f1
UH		 3346 }
3347 process_pending_signals (env);
3348 }
3349}
3350
3351#endif /* TARGET_S390X */
3352
b16189b2
CG		 3353#ifdef TARGET_TILEGX
3354
b16189b2
CG		 3355static void gen_sigill_reg(CPUTLGState *env)
3356{
3357 target_siginfo_t info;
3358
3359 info.si_signo = TARGET_SIGILL;
3360 info.si_errno = 0;
3361 info.si_code = TARGET_ILL_PRVREG;
3362 info._sifields._sigfault._addr = env->pc;
9d2803f7 3363 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
b16189b2
CG		 3364}
3365
a0577d2a 3366static void do_signal(CPUTLGState *env, int signo, int sigcode)
dd8070d8
CG		 3367{
3368 target_siginfo_t info;
3369
a0577d2a 3370 info.si_signo = signo;
dd8070d8 3371 info.si_errno = 0;
dd8070d8 3372 info._sifields._sigfault._addr = env->pc;
a0577d2a
RH		 3373
3374 if (signo == TARGET_SIGSEGV) {
3375 /* The passed in sigcode is a dummy; check for a page mapping
3376 and pass either MAPERR or ACCERR. */
3377 target_ulong addr = env->excaddr;
3378 info._sifields._sigfault._addr = addr;
3379 if (page_check_range(addr, 1, PAGE_VALID) < 0) {
3380 sigcode = TARGET_SEGV_MAPERR;
3381 } else {
3382 sigcode = TARGET_SEGV_ACCERR;
3383 }
3384 }
3385 info.si_code = sigcode;
3386
9d2803f7 3387 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
dd8070d8
CG		 3388}
3389
a0577d2a
RH		 3390static void gen_sigsegv_maperr(CPUTLGState *env, target_ulong addr)
3391{
3392 env->excaddr = addr;
3393 do_signal(env, TARGET_SIGSEGV, 0);
3394}
3395
0583b233
RH		 3396static void set_regval(CPUTLGState *env, uint8_t reg, uint64_t val)
3397{
3398 if (unlikely(reg >= TILEGX_R_COUNT)) {
3399 switch (reg) {
3400 case TILEGX_R_SN:
3401 case TILEGX_R_ZERO:
3402 return;
3403 case TILEGX_R_IDN0:
3404 case TILEGX_R_IDN1:
3405 case TILEGX_R_UDN0:
3406 case TILEGX_R_UDN1:
3407 case TILEGX_R_UDN2:
3408 case TILEGX_R_UDN3:
3409 gen_sigill_reg(env);
3410 return;
3411 default:
3412 g_assert_not_reached();
3413 }
3414 }
3415 env->regs[reg] = val;
3416}
3417
3418/*
3419 * Compare the 8-byte contents of the CmpValue SPR with the 8-byte value in
3420 * memory at the address held in the first source register. If the values are
3421 * not equal, then no memory operation is performed. If the values are equal,
3422 * the 8-byte quantity from the second source register is written into memory
3423 * at the address held in the first source register. In either case, the result
3424 * of the instruction is the value read from memory. The compare and write to
3425 * memory are atomic and thus can be used for synchronization purposes. This
3426 * instruction only operates for addresses aligned to a 8-byte boundary.
3427 * Unaligned memory access causes an Unaligned Data Reference interrupt.
3428 *
3429 * Functional Description (64-bit)
3430 * uint64_t memVal = memoryReadDoubleWord (rf[SrcA]);
3431 * rf[Dest] = memVal;
3432 * if (memVal == SPR[CmpValueSPR])
3433 * memoryWriteDoubleWord (rf[SrcA], rf[SrcB]);
3434 *
3435 * Functional Description (32-bit)
3436 * uint64_t memVal = signExtend32 (memoryReadWord (rf[SrcA]));
3437 * rf[Dest] = memVal;
3438 * if (memVal == signExtend32 (SPR[CmpValueSPR]))
3439 * memoryWriteWord (rf[SrcA], rf[SrcB]);
3440 *
3441 *
3442 * This function also processes exch and exch4 which need not process SPR.
3443 */
3444static void do_exch(CPUTLGState *env, bool quad, bool cmp)
3445{
3446 target_ulong addr;
3447 target_long val, sprval;
3448
3449 start_exclusive();
3450
3451 addr = env->atomic_srca;
3452 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
3453 goto sigsegv_maperr;
3454 }
3455
3456 if (cmp) {
3457 if (quad) {
3458 sprval = env->spregs[TILEGX_SPR_CMPEXCH];
3459 } else {
3460 sprval = sextract64(env->spregs[TILEGX_SPR_CMPEXCH], 0, 32);
3461 }
3462 }
3463
3464 if (!cmp || val == sprval) {
3465 target_long valb = env->atomic_srcb;
3466 if (quad ? put_user_u64(valb, addr) : put_user_u32(valb, addr)) {
3467 goto sigsegv_maperr;
3468 }
3469 }
3470
3471 set_regval(env, env->atomic_dstr, val);
3472 end_exclusive();
3473 return;
3474
3475 sigsegv_maperr:
3476 end_exclusive();
3477 gen_sigsegv_maperr(env, addr);
3478}
3479
3480static void do_fetch(CPUTLGState *env, int trapnr, bool quad)
3481{
3482 int8_t write = 1;
3483 target_ulong addr;
3484 target_long val, valb;
3485
3486 start_exclusive();
3487
3488 addr = env->atomic_srca;
3489 valb = env->atomic_srcb;
3490 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
3491 goto sigsegv_maperr;
3492 }
3493
3494 switch (trapnr) {
3495 case TILEGX_EXCP_OPCODE_FETCHADD:
3496 case TILEGX_EXCP_OPCODE_FETCHADD4:
3497 valb += val;
3498 break;
3499 case TILEGX_EXCP_OPCODE_FETCHADDGEZ:
3500 valb += val;
3501 if (valb < 0) {
3502 write = 0;
3503 }
3504 break;
3505 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4:
3506 valb += val;
3507 if ((int32_t)valb < 0) {
3508 write = 0;
3509 }
3510 break;
3511 case TILEGX_EXCP_OPCODE_FETCHAND:
3512 case TILEGX_EXCP_OPCODE_FETCHAND4:
3513 valb &= val;
3514 break;
3515 case TILEGX_EXCP_OPCODE_FETCHOR:
3516 case TILEGX_EXCP_OPCODE_FETCHOR4:
3517 valb |= val;
3518 break;
3519 default:
3520 g_assert_not_reached();
3521 }
3522
3523 if (write) {
3524 if (quad ? put_user_u64(valb, addr) : put_user_u32(valb, addr)) {
3525 goto sigsegv_maperr;
3526 }
3527 }
3528
3529 set_regval(env, env->atomic_dstr, val);
3530 end_exclusive();
3531 return;
3532
3533 sigsegv_maperr:
3534 end_exclusive();
3535 gen_sigsegv_maperr(env, addr);
3536}
3537
b16189b2
CG		 3538void cpu_loop(CPUTLGState *env)
3539{
3540 CPUState *cs = CPU(tilegx_env_get_cpu(env));
3541 int trapnr;
3542
3543 while (1) {
3544 cpu_exec_start(cs);
8642c1b8 3545 trapnr = cpu_exec(cs);
b16189b2 3546 cpu_exec_end(cs);
d148d90e
SF		 3547 process_queued_cpu_work(cs);
3548
b16189b2
CG		 3549 switch (trapnr) {
3550 case TILEGX_EXCP_SYSCALL:
a9175169
PM		 3551 {
3552 abi_ulong ret = do_syscall(env, env->regs[TILEGX_R_NR],
3553 env->regs[0], env->regs[1],
3554 env->regs[2], env->regs[3],
3555 env->regs[4], env->regs[5],
3556 env->regs[6], env->regs[7]);
3557 if (ret == -TARGET_ERESTARTSYS) {
3558 env->pc -= 8;
3559 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
3560 env->regs[TILEGX_R_RE] = ret;
3561 env->regs[TILEGX_R_ERR] = TILEGX_IS_ERRNO(ret) ? -ret : 0;
3562 }
b16189b2 3563 break;
a9175169 3564 }
0583b233
RH		 3565 case TILEGX_EXCP_OPCODE_EXCH:
3566 do_exch(env, true, false);
3567 break;
3568 case TILEGX_EXCP_OPCODE_EXCH4:
3569 do_exch(env, false, false);
3570 break;
3571 case TILEGX_EXCP_OPCODE_CMPEXCH:
3572 do_exch(env, true, true);
3573 break;
3574 case TILEGX_EXCP_OPCODE_CMPEXCH4:
3575 do_exch(env, false, true);
3576 break;
3577 case TILEGX_EXCP_OPCODE_FETCHADD:
3578 case TILEGX_EXCP_OPCODE_FETCHADDGEZ:
3579 case TILEGX_EXCP_OPCODE_FETCHAND:
3580 case TILEGX_EXCP_OPCODE_FETCHOR:
3581 do_fetch(env, trapnr, true);
3582 break;
3583 case TILEGX_EXCP_OPCODE_FETCHADD4:
3584 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4:
3585 case TILEGX_EXCP_OPCODE_FETCHAND4:
3586 case TILEGX_EXCP_OPCODE_FETCHOR4:
3587 do_fetch(env, trapnr, false);
3588 break;
dd8070d8 3589 case TILEGX_EXCP_SIGNAL:
a0577d2a 3590 do_signal(env, env->signo, env->sigcode);
dd8070d8 3591 break;
b16189b2
CG		 3592 case TILEGX_EXCP_REG_IDN_ACCESS:
3593 case TILEGX_EXCP_REG_UDN_ACCESS:
3594 gen_sigill_reg(env);
3595 break;
fdbc2b57
RH		 3596 case EXCP_ATOMIC:
3597 cpu_exec_step_atomic(cs);
3598 break;
b16189b2
CG		 3599 default:
3600 fprintf(stderr, "trapnr is %d[0x%x].\n", trapnr, trapnr);
3601 g_assert_not_reached();
3602 }
3603 process_pending_signals(env);
3604 }
3605}
3606
3607#endif
3608
7c248bcd
RH		 3609#ifdef TARGET_HPPA
3610
3611static abi_ulong hppa_lws(CPUHPPAState *env)
3612{
3613 uint32_t which = env->gr[20];
3614 abi_ulong addr = env->gr[26];
3615 abi_ulong old = env->gr[25];
3616 abi_ulong new = env->gr[24];
3617 abi_ulong size, ret;
3618
3619 switch (which) {
3620 default:
3621 return -TARGET_ENOSYS;
3622
3623 case 0: /* elf32 atomic 32bit cmpxchg */
3624 if ((addr & 3) || !access_ok(VERIFY_WRITE, addr, 4)) {
3625 return -TARGET_EFAULT;
3626 }
3627 old = tswap32(old);
3628 new = tswap32(new);
3629 ret = atomic_cmpxchg((uint32_t *)g2h(addr), old, new);
3630 ret = tswap32(ret);
3631 break;
3632
3633 case 2: /* elf32 atomic "new" cmpxchg */
3634 size = env->gr[23];
3635 if (size >= 4) {
3636 return -TARGET_ENOSYS;
3637 }
3638 if (((addr | old | new) & ((1 << size) - 1))
3639 || !access_ok(VERIFY_WRITE, addr, 1 << size)
3640 || !access_ok(VERIFY_READ, old, 1 << size)
3641 || !access_ok(VERIFY_READ, new, 1 << size)) {
3642 return -TARGET_EFAULT;
3643 }
3644 /* Note that below we use host-endian loads so that the cmpxchg
3645 can be host-endian as well. */
3646 switch (size) {
3647 case 0:
3648 old = *(uint8_t *)g2h(old);
3649 new = *(uint8_t *)g2h(new);
3650 ret = atomic_cmpxchg((uint8_t *)g2h(addr), old, new);
3651 ret = ret != old;
3652 break;
3653 case 1:
3654 old = *(uint16_t *)g2h(old);
3655 new = *(uint16_t *)g2h(new);
3656 ret = atomic_cmpxchg((uint16_t *)g2h(addr), old, new);
3657 ret = ret != old;
3658 break;
3659 case 2:
3660 old = *(uint32_t *)g2h(old);
3661 new = *(uint32_t *)g2h(new);
3662 ret = atomic_cmpxchg((uint32_t *)g2h(addr), old, new);
3663 ret = ret != old;
3664 break;
3665 case 3:
3666 {
3667 uint64_t o64, n64, r64;
3668 o64 = *(uint64_t *)g2h(old);
3669 n64 = *(uint64_t *)g2h(new);
3670#ifdef CONFIG_ATOMIC64
3671 r64 = atomic_cmpxchg__nocheck((uint64_t *)g2h(addr), o64, n64);
3672 ret = r64 != o64;
3673#else
3674 start_exclusive();
3675 r64 = *(uint64_t *)g2h(addr);
3676 ret = 1;
3677 if (r64 == o64) {
3678 *(uint64_t *)g2h(addr) = n64;
3679 ret = 0;
3680 }
3681 end_exclusive();
3682#endif
3683 }
3684 break;
3685 }
3686 break;
3687 }
3688
3689 env->gr[28] = ret;
3690 return 0;
3691}
3692
3693void cpu_loop(CPUHPPAState *env)
3694{
3695 CPUState *cs = CPU(hppa_env_get_cpu(env));
3696 target_siginfo_t info;
3697 abi_ulong ret;
3698 int trapnr;
3699
3700 while (1) {
3701 cpu_exec_start(cs);
3702 trapnr = cpu_exec(cs);
3703 cpu_exec_end(cs);
3704 process_queued_cpu_work(cs);
3705
3706 switch (trapnr) {
3707 case EXCP_SYSCALL:
3708 ret = do_syscall(env, env->gr[20],
3709 env->gr[26], env->gr[25],
3710 env->gr[24], env->gr[23],
3711 env->gr[22], env->gr[21], 0, 0);
3712 switch (ret) {
3713 default:
3714 env->gr[28] = ret;
3715 /* We arrived here by faking the gateway page. Return. */
3716 env->iaoq_f = env->gr[31];
3717 env->iaoq_b = env->gr[31] + 4;
3718 break;
3719 case -TARGET_ERESTARTSYS:
3720 case -TARGET_QEMU_ESIGRETURN:
3721 break;
3722 }
3723 break;
3724 case EXCP_SYSCALL_LWS:
3725 env->gr[21] = hppa_lws(env);
3726 /* We arrived here by faking the gateway page. Return. */
3727 env->iaoq_f = env->gr[31];
3728 env->iaoq_b = env->gr[31] + 4;
3729 break;
3730 case EXCP_SIGSEGV:
3731 info.si_signo = TARGET_SIGSEGV;
3732 info.si_errno = 0;
3733 info.si_code = TARGET_SEGV_ACCERR;
3734 info._sifields._sigfault._addr = env->ior;
3735 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3736 break;
3737 case EXCP_SIGILL:
3738 info.si_signo = TARGET_SIGILL;
3739 info.si_errno = 0;
3740 info.si_code = TARGET_ILL_ILLOPN;
3741 info._sifields._sigfault._addr = env->iaoq_f;
3742 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3743 break;
3744 case EXCP_SIGFPE:
3745 info.si_signo = TARGET_SIGFPE;
3746 info.si_errno = 0;
3747 info.si_code = 0;
3748 info._sifields._sigfault._addr = env->iaoq_f;
3749 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3750 break;
3751 case EXCP_DEBUG:
3752 trapnr = gdb_handlesig(cs, TARGET_SIGTRAP);
3753 if (trapnr) {
3754 info.si_signo = trapnr;
3755 info.si_errno = 0;
3756 info.si_code = TARGET_TRAP_BRKPT;
3757 queue_signal(env, trapnr, QEMU_SI_FAULT, &info);
3758 }
3759 break;
3760 case EXCP_INTERRUPT:
3761 /* just indicate that signals should be handled asap */
3762 break;
3763 default:
3764 g_assert_not_reached();
3765 }
3766 process_pending_signals(env);
3767 }
3768}
3769
3770#endif /* TARGET_HPPA */
3771
a2247f8e 3772THREAD CPUState *thread_cpu;
59faf6d6 3773
178f9429
SF		 3774bool qemu_cpu_is_self(CPUState *cpu)
3775{
3776 return thread_cpu == cpu;
3777}
3778
3779void qemu_cpu_kick(CPUState *cpu)
3780{
3781 cpu_exit(cpu);
3782}
3783
edf8e2af
MW		 3784void task_settid(TaskState *ts)
3785{
3786 if (ts->ts_tid == 0) {
edf8e2af 3787 ts->ts_tid = (pid_t)syscall(SYS_gettid);
edf8e2af
MW		 3788 }
3789}
3790
3791void stop_all_tasks(void)
3792{
3793 /*
3794 * We trust that when using NPTL, start_exclusive()
3795 * handles thread stopping correctly.
3796 */
3797 start_exclusive();
3798}
3799
c3a92833 3800/* Assumes contents are already zeroed. */
624f7979
PB		 3801void init_task_state(TaskState *ts)
3802{
624f7979 3803 ts->used = 1;
624f7979 3804}
fc9c5412 3805
30ba0ee5
AF		 3806CPUArchState *cpu_copy(CPUArchState *env)
3807{
ff4700b0 3808 CPUState *cpu = ENV_GET_CPU(env);
2994fd96 3809 CPUState *new_cpu = cpu_init(cpu_model);
61c7480f 3810 CPUArchState *new_env = new_cpu->env_ptr;
30ba0ee5
AF		 3811 CPUBreakpoint *bp;
3812 CPUWatchpoint *wp;
30ba0ee5
AF		 3813
3814 /* Reset non arch specific state */
75a34036 3815 cpu_reset(new_cpu);
30ba0ee5
AF		 3816
3817 memcpy(new_env, env, sizeof(CPUArchState));
3818
3819 /* Clone all break/watchpoints.
3820 Note: Once we support ptrace with hw-debug register access, make sure
3821 BP_CPU break/watchpoints are handled correctly on clone. */
1d085f6c
TB		 3822 QTAILQ_INIT(&new_cpu->breakpoints);
3823 QTAILQ_INIT(&new_cpu->watchpoints);
f0c3c505 3824 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
b3310ab3 3825 cpu_breakpoint_insert(new_cpu, bp->pc, bp->flags, NULL);
30ba0ee5 3826 }
ff4700b0 3827 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
05068c0d 3828 cpu_watchpoint_insert(new_cpu, wp->vaddr, wp->len, wp->flags, NULL);
30ba0ee5 3829 }
30ba0ee5
AF		 3830
3831 return new_env;
3832}
3833
fc9c5412
JS		 3834static void handle_arg_help(const char *arg)
3835{
4d1275c2 3836 usage(EXIT_SUCCESS);
fc9c5412
JS		 3837}
3838
3839static void handle_arg_log(const char *arg)
3840{
3841 int mask;
fc9c5412 3842
4fde1eba 3843 mask = qemu_str_to_log_mask(arg);
fc9c5412 3844 if (!mask) {
59a6fa6e 3845 qemu_print_log_usage(stdout);
4d1275c2 3846 exit(EXIT_FAILURE);
fc9c5412 3847 }
f2937a33 3848 qemu_log_needs_buffers();
24537a01 3849 qemu_set_log(mask);
fc9c5412
JS		 3850}
3851
50171d42
CWR		 3852static void handle_arg_log_filename(const char *arg)
3853{
daa76aa4 3854 qemu_set_log_filename(arg, &error_fatal);
50171d42
CWR		 3855}
3856
fc9c5412
JS		 3857static void handle_arg_set_env(const char *arg)
3858{
3859 char *r, *p, *token;
3860 r = p = strdup(arg);
3861 while ((token = strsep(&p, ",")) != NULL) {
3862 if (envlist_setenv(envlist, token) != 0) {
4d1275c2 3863 usage(EXIT_FAILURE);
fc9c5412
JS		 3864 }
3865 }
3866 free(r);
3867}
3868
3869static void handle_arg_unset_env(const char *arg)
3870{
3871 char *r, *p, *token;
3872 r = p = strdup(arg);
3873 while ((token = strsep(&p, ",")) != NULL) {
3874 if (envlist_unsetenv(envlist, token) != 0) {
4d1275c2 3875 usage(EXIT_FAILURE);
fc9c5412
JS		 3876 }
3877 }
3878 free(r);
3879}
3880
3881static void handle_arg_argv0(const char *arg)
3882{
3883 argv0 = strdup(arg);
3884}
3885
3886static void handle_arg_stack_size(const char *arg)
3887{
3888 char *p;
3889 guest_stack_size = strtoul(arg, &p, 0);
3890 if (guest_stack_size == 0) {
4d1275c2 3891 usage(EXIT_FAILURE);
fc9c5412
JS		 3892 }
3893
3894 if (*p == 'M') {
3895 guest_stack_size *= 1024 * 1024;
3896 } else if (*p == 'k' || *p == 'K') {
3897 guest_stack_size *= 1024;
3898 }
3899}
3900
3901static void handle_arg_ld_prefix(const char *arg)
3902{
3903 interp_prefix = strdup(arg);
3904}
3905
3906static void handle_arg_pagesize(const char *arg)
3907{
3908 qemu_host_page_size = atoi(arg);
3909 if (qemu_host_page_size == 0 ||
3910 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
3911 fprintf(stderr, "page size must be a power of two\n");
4d1275c2 3912 exit(EXIT_FAILURE);
fc9c5412
JS		 3913 }
3914}
3915
c5e4a5a9
MR		 3916static void handle_arg_randseed(const char *arg)
3917{
3918 unsigned long long seed;
3919
3920 if (parse_uint_full(arg, &seed, 0) != 0 || seed > UINT_MAX) {
3921 fprintf(stderr, "Invalid seed number: %s\n", arg);
4d1275c2 3922 exit(EXIT_FAILURE);
c5e4a5a9
MR		 3923 }
3924 srand(seed);
3925}
3926
fc9c5412
JS		 3927static void handle_arg_gdb(const char *arg)
3928{
3929 gdbstub_port = atoi(arg);
3930}
3931
3932static void handle_arg_uname(const char *arg)
3933{
3934 qemu_uname_release = strdup(arg);
3935}
3936
3937static void handle_arg_cpu(const char *arg)
3938{
3939 cpu_model = strdup(arg);
c8057f95 3940 if (cpu_model == NULL || is_help_option(cpu_model)) {
fc9c5412 3941 /* XXX: implement xxx_cpu_list for targets that still miss it */
e916cbf8
PM		 3942#if defined(cpu_list)
3943 cpu_list(stdout, &fprintf);
fc9c5412 3944#endif
4d1275c2 3945 exit(EXIT_FAILURE);
fc9c5412
JS		 3946 }
3947}
3948
fc9c5412
JS		 3949static void handle_arg_guest_base(const char *arg)
3950{
3951 guest_base = strtol(arg, NULL, 0);
3952 have_guest_base = 1;
3953}
3954
3955static void handle_arg_reserved_va(const char *arg)
3956{
3957 char *p;
3958 int shift = 0;
3959 reserved_va = strtoul(arg, &p, 0);
3960 switch (*p) {
3961 case 'k':
3962 case 'K':
3963 shift = 10;
3964 break;
3965 case 'M':
3966 shift = 20;
3967 break;
3968 case 'G':
3969 shift = 30;
3970 break;
3971 }
3972 if (shift) {
3973 unsigned long unshifted = reserved_va;
3974 p++;
3975 reserved_va <<= shift;
3976 if (((reserved_va >> shift) != unshifted)
3977#if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3978 || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS))
3979#endif
3980 ) {
3981 fprintf(stderr, "Reserved virtual address too big\n");
4d1275c2 3982 exit(EXIT_FAILURE);
fc9c5412
JS		 3983 }
3984 }
3985 if (*p) {
3986 fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);
4d1275c2 3987 exit(EXIT_FAILURE);
fc9c5412
JS		 3988 }
3989}
fc9c5412
JS		 3990
3991static void handle_arg_singlestep(const char *arg)
3992{
3993 singlestep = 1;
3994}
3995
3996static void handle_arg_strace(const char *arg)
3997{
3998 do_strace = 1;
3999}
4000
4001static void handle_arg_version(const char *arg)
4002{
2e59915d 4003 printf("qemu-" TARGET_NAME " version " QEMU_VERSION QEMU_PKGVERSION
0781dd6e 4004 "\n" QEMU_COPYRIGHT "\n");
4d1275c2 4005 exit(EXIT_SUCCESS);
fc9c5412
JS		 4006}
4007
6533dd6e
LV		 4008static char *trace_file;
4009static void handle_arg_trace(const char *arg)
4010{
4011 g_free(trace_file);
4012 trace_file = trace_opt_parse(arg);
4013}
4014
fc9c5412
JS		 4015struct qemu_argument {
4016 const char *argv;
4017 const char *env;
4018 bool has_arg;
4019 void (*handle_opt)(const char *arg);
4020 const char *example;
4021 const char *help;
4022};
4023
42644cee 4024static const struct qemu_argument arg_table[] = {
fc9c5412
JS		 4025 {"h", "", false, handle_arg_help,
4026 "", "print this help"},
daaf8c8e
MI		 4027 {"help", "", false, handle_arg_help,
4028 "", ""},
fc9c5412
JS		 4029 {"g", "QEMU_GDB", true, handle_arg_gdb,
4030 "port", "wait gdb connection to 'port'"},
4031 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix,
4032 "path", "set the elf interpreter prefix to 'path'"},
4033 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size,
4034 "size", "set the stack size to 'size' bytes"},
4035 {"cpu", "QEMU_CPU", true, handle_arg_cpu,
c8057f95 4036 "model", "select CPU (-cpu help for list)"},
fc9c5412
JS		 4037 {"E", "QEMU_SET_ENV", true, handle_arg_set_env,
4038 "var=value", "sets targets environment variable (see below)"},
4039 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env,
4040 "var", "unsets targets environment variable (see below)"},
4041 {"0", "QEMU_ARGV0", true, handle_arg_argv0,
4042 "argv0", "forces target process argv[0] to be 'argv0'"},
4043 {"r", "QEMU_UNAME", true, handle_arg_uname,
4044 "uname", "set qemu uname release string to 'uname'"},
fc9c5412
JS		 4045 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base,
4046 "address", "set guest_base address to 'address'"},
4047 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va,
4048 "size", "reserve 'size' bytes for guest virtual address space"},
fc9c5412 4049 {"d", "QEMU_LOG", true, handle_arg_log,
989b697d
PM		 4050 "item[,...]", "enable logging of specified items "
4051 "(use '-d help' for a list of items)"},
50171d42 4052 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename,
989b697d 4053 "logfile", "write logs to 'logfile' (default stderr)"},
fc9c5412
JS		 4054 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize,
4055 "pagesize", "set the host page size to 'pagesize'"},
4056 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep,
4057 "", "run in singlestep mode"},
4058 {"strace", "QEMU_STRACE", false, handle_arg_strace,
4059 "", "log system calls"},
c5e4a5a9
MR		 4060 {"seed", "QEMU_RAND_SEED", true, handle_arg_randseed,
4061 "", "Seed for pseudo-random number generator"},
6533dd6e
LV		 4062 {"trace", "QEMU_TRACE", true, handle_arg_trace,
4063 "", "[[enable=]<pattern>][,events=<file>][,file=<file>]"},
fc9c5412 4064 {"version", "QEMU_VERSION", false, handle_arg_version,
1386d4c0 4065 "", "display version information and exit"},
fc9c5412
JS		 4066 {NULL, NULL, false, NULL, NULL, NULL}
4067};
4068
d03f9c32 4069static void usage(int exitcode)
fc9c5412 4070{
42644cee 4071 const struct qemu_argument *arginfo;
fc9c5412
JS		 4072 int maxarglen;
4073 int maxenvlen;
4074
2e59915d
PB		 4075 printf("usage: qemu-" TARGET_NAME " [options] program [arguments...]\n"
4076 "Linux CPU emulator (compiled for " TARGET_NAME " emulation)\n"
fc9c5412
JS		 4077 "\n"
4078 "Options and associated environment variables:\n"
4079 "\n");
4080
63ec54d7
PM		 4081 /* Calculate column widths. We must always have at least enough space
4082 * for the column header.
4083 */
4084 maxarglen = strlen("Argument");
4085 maxenvlen = strlen("Env-variable");
fc9c5412
JS		 4086
4087 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
63ec54d7
PM		 4088 int arglen = strlen(arginfo->argv);
4089 if (arginfo->has_arg) {
4090 arglen += strlen(arginfo->example) + 1;
4091 }
fc9c5412
JS		 4092 if (strlen(arginfo->env) > maxenvlen) {
4093 maxenvlen = strlen(arginfo->env);
4094 }
63ec54d7
PM		 4095 if (arglen > maxarglen) {
4096 maxarglen = arglen;
fc9c5412
JS		 4097 }
4098 }
4099
63ec54d7
PM		 4100 printf("%-*s %-*s Description\n", maxarglen+1, "Argument",
4101 maxenvlen, "Env-variable");
fc9c5412
JS		 4102
4103 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
4104 if (arginfo->has_arg) {
4105 printf("-%s %-*s %-*s %s\n", arginfo->argv,
63ec54d7
PM		 4106 (int)(maxarglen - strlen(arginfo->argv) - 1),
4107 arginfo->example, maxenvlen, arginfo->env, arginfo->help);
fc9c5412 4108 } else {
63ec54d7 4109 printf("-%-*s %-*s %s\n", maxarglen, arginfo->argv,
fc9c5412
JS		 4110 maxenvlen, arginfo->env,
4111 arginfo->help);
4112 }
4113 }
4114
4115 printf("\n"
4116 "Defaults:\n"
4117 "QEMU_LD_PREFIX = %s\n"
989b697d 4118 "QEMU_STACK_SIZE = %ld byte\n",
fc9c5412 4119 interp_prefix,
989b697d 4120 guest_stack_size);
fc9c5412
JS		 4121
4122 printf("\n"
4123 "You can use -E and -U options or the QEMU_SET_ENV and\n"
4124 "QEMU_UNSET_ENV environment variables to set and unset\n"
4125 "environment variables for the target process.\n"
4126 "It is possible to provide several variables by separating them\n"
4127 "by commas in getsubopt(3) style. Additionally it is possible to\n"
4128 "provide the -E and -U options multiple times.\n"
4129 "The following lines are equivalent:\n"
4130 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
4131 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
4132 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
4133 "Note that if you provide several changes to a single variable\n"
4134 "the last change will stay in effect.\n");
4135
d03f9c32 4136 exit(exitcode);
fc9c5412
JS		 4137}
4138
4139static int parse_args(int argc, char **argv)
4140{
4141 const char *r;
4142 int optind;
42644cee 4143 const struct qemu_argument *arginfo;
fc9c5412
JS		 4144
4145 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
4146 if (arginfo->env == NULL) {
4147 continue;
4148 }
4149
4150 r = getenv(arginfo->env);
4151 if (r != NULL) {
4152 arginfo->handle_opt(r);
4153 }
4154 }
4155
4156 optind = 1;
4157 for (;;) {
4158 if (optind >= argc) {
4159 break;
4160 }
4161 r = argv[optind];
4162 if (r[0] != '-') {
4163 break;
4164 }
4165 optind++;
4166 r++;
4167 if (!strcmp(r, "-")) {
4168 break;
4169 }
ba02577c
MI		 4170 /* Treat --foo the same as -foo. */
4171 if (r[0] == '-') {
4172 r++;
4173 }
fc9c5412
JS		 4174
4175 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
4176 if (!strcmp(r, arginfo->argv)) {
fc9c5412 4177 if (arginfo->has_arg) {
1386d4c0 4178 if (optind >= argc) {
138940bf
MI		 4179 (void) fprintf(stderr,
4180 "qemu: missing argument for option '%s'\n", r);
4d1275c2 4181 exit(EXIT_FAILURE);
1386d4c0
PM		 4182 }
4183 arginfo->handle_opt(argv[optind]);
fc9c5412 4184 optind++;
1386d4c0
PM		 4185 } else {
4186 arginfo->handle_opt(NULL);
fc9c5412 4187 }
fc9c5412
JS		 4188 break;
4189 }
4190 }
4191
4192 /* no option matched the current argv */
4193 if (arginfo->handle_opt == NULL) {
138940bf 4194 (void) fprintf(stderr, "qemu: unknown option '%s'\n", r);
4d1275c2 4195 exit(EXIT_FAILURE);
fc9c5412
JS		 4196 }
4197 }
4198
4199 if (optind >= argc) {
138940bf 4200 (void) fprintf(stderr, "qemu: no user program specified\n");
4d1275c2 4201 exit(EXIT_FAILURE);
fc9c5412
JS		 4202 }
4203
4204 filename = argv[optind];
4205 exec_path = argv[optind];
4206
4207 return optind;
4208}
4209
902b3d5c 4210int main(int argc, char **argv, char **envp)
31e31b8a 4211{
01ffc75b 4212 struct target_pt_regs regs1, *regs = &regs1;
31e31b8a 4213 struct image_info info1, *info = &info1;
edf8e2af 4214 struct linux_binprm bprm;
48e15fc2 4215 TaskState *ts;
9349b4f9 4216 CPUArchState *env;
db6b81d4 4217 CPUState *cpu;
586314f2 4218 int optind;
04a6dfeb 4219 char **target_environ, **wrk;
7d8cec95
AJ		 4220 char **target_argv;
4221 int target_argc;
7d8cec95 4222 int i;
fd4d81dd 4223 int ret;
03cfd8fa 4224 int execfd;
b12b6a18 4225
fe4db84d 4226 module_call_init(MODULE_INIT_TRACE);
267f685b 4227 qemu_init_cpu_list();
ce008c1f
AF		 4228 module_call_init(MODULE_INIT_QOM);
4229
04a6dfeb
AJ		 4230 if ((envlist = envlist_create()) == NULL) {
4231 (void) fprintf(stderr, "Unable to allocate envlist\n");
4d1275c2 4232 exit(EXIT_FAILURE);
04a6dfeb
AJ		 4233 }
4234
4235 /* add current environment into the list */
4236 for (wrk = environ; *wrk != NULL; wrk++) {
4237 (void) envlist_setenv(envlist, *wrk);
4238 }
4239
703e0e89
RH		 4240 /* Read the stack limit from the kernel. If it's "unlimited",
4241 then we can do little else besides use the default. */
4242 {
4243 struct rlimit lim;
4244 if (getrlimit(RLIMIT_STACK, &lim) == 0
81bbe906
TY		 4245 && lim.rlim_cur != RLIM_INFINITY
4246 && lim.rlim_cur == (target_long)lim.rlim_cur) {
703e0e89
RH		 4247 guest_stack_size = lim.rlim_cur;
4248 }
4249 }
4250
b1f9be31 4251 cpu_model = NULL;
b5ec5ce0 4252
c5e4a5a9
MR		 4253 srand(time(NULL));
4254
6533dd6e
LV		 4255 qemu_add_opts(&qemu_trace_opts);
4256
fc9c5412 4257 optind = parse_args(argc, argv);
586314f2 4258
6533dd6e
LV		 4259 if (!trace_init_backends()) {
4260 exit(1);
4261 }
4262 trace_init_file(trace_file);
4263
31e31b8a 4264 /* Zero out regs */
01ffc75b 4265 memset(regs, 0, sizeof(struct target_pt_regs));
31e31b8a
FB		 4266
4267 /* Zero out image_info */
4268 memset(info, 0, sizeof(struct image_info));
4269
edf8e2af
MW		 4270 memset(&bprm, 0, sizeof (bprm));
4271
74cd30b8
FB		 4272 /* Scan interp_prefix dir for replacement files. */
4273 init_paths(interp_prefix);
4274
4a24a758
PM		 4275 init_qemu_uname_release();
4276
46027c07 4277 if (cpu_model == NULL) {
aaed909a 4278#if defined(TARGET_I386)
46027c07
FB		 4279#ifdef TARGET_X86_64
4280 cpu_model = "qemu64";
4281#else
4282 cpu_model = "qemu32";
4283#endif
aaed909a 4284#elif defined(TARGET_ARM)
088ab16c 4285 cpu_model = "any";
d2fbca94
GX		 4286#elif defined(TARGET_UNICORE32)
4287 cpu_model = "any";
aaed909a
FB		 4288#elif defined(TARGET_M68K)
4289 cpu_model = "any";
4290#elif defined(TARGET_SPARC)
4291#ifdef TARGET_SPARC64
4292 cpu_model = "TI UltraSparc II";
4293#else
4294 cpu_model = "Fujitsu MB86904";
46027c07 4295#endif
aaed909a
FB		 4296#elif defined(TARGET_MIPS)
4297#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
74797f40 4298 cpu_model = "5KEf";
aaed909a
FB		 4299#else
4300 cpu_model = "24Kf";
4301#endif
d962783e
JL		 4302#elif defined TARGET_OPENRISC
4303 cpu_model = "or1200";
aaed909a 4304#elif defined(TARGET_PPC)
a74029f6 4305# ifdef TARGET_PPC64
de3f1b98 4306 cpu_model = "POWER8";
a74029f6 4307# else
aaed909a 4308 cpu_model = "750";
a74029f6 4309# endif
91c45a38
RH		 4310#elif defined TARGET_SH4
4311 cpu_model = TYPE_SH7785_CPU;
d8923bc7
DH		 4312#elif defined TARGET_S390X
4313 cpu_model = "qemu";
aaed909a
FB		 4314#else
4315 cpu_model = "any";
4316#endif
4317 }
d5ab9713 4318 tcg_exec_init(0);
83fb7adf
FB		 4319 /* NOTE: we need to init the CPU at this stage to get
4320 qemu_host_page_size */
2994fd96
EH		 4321 cpu = cpu_init(cpu_model);
4322 if (!cpu) {
aaed909a 4323 fprintf(stderr, "Unable to find CPU definition\n");
4d1275c2 4324 exit(EXIT_FAILURE);
aaed909a 4325 }
2994fd96 4326 env = cpu->env_ptr;
0ac46af3 4327 cpu_reset(cpu);
b55a37c9 4328
db6b81d4 4329 thread_cpu = cpu;
3b46e624 4330
b6741956
FB		 4331 if (getenv("QEMU_STRACE")) {
4332 do_strace = 1;
b92c47c1
TS		 4333 }
4334
c5e4a5a9
MR		 4335 if (getenv("QEMU_RAND_SEED")) {
4336 handle_arg_randseed(getenv("QEMU_RAND_SEED"));
4337 }
4338
04a6dfeb
AJ		 4339 target_environ = envlist_to_environ(envlist, NULL);
4340 envlist_free(envlist);
b12b6a18 4341
379f6698
PB		 4342 /*
4343 * Now that page sizes are configured in cpu_init() we can do
4344 * proper page alignment for guest_base.
4345 */
4346 guest_base = HOST_PAGE_ALIGN(guest_base);
68a1c816 4347
806d1021
MI		 4348 if (reserved_va || have_guest_base) {
4349 guest_base = init_guest_space(guest_base, reserved_va, 0,
4350 have_guest_base);
4351 if (guest_base == (unsigned long)-1) {
097b8cb8
PM		 4352 fprintf(stderr, "Unable to reserve 0x%lx bytes of virtual address "
4353 "space for use as guest address space (check your virtual "
4354 "memory ulimit setting or reserve less using -R option)\n",
4355 reserved_va);
4d1275c2 4356 exit(EXIT_FAILURE);
68a1c816 4357 }
97cc7560 4358
806d1021
MI		 4359 if (reserved_va) {
4360 mmap_next_start = reserved_va;
97cc7560
DDAG		 4361 }
4362 }
379f6698
PB		 4363
4364 /*
4365 * Read in mmap_min_addr kernel parameter. This value is used
4366 * When loading the ELF image to determine whether guest_base
14f24e14 4367 * is needed. It is also used in mmap_find_vma.
379f6698 4368 */
14f24e14 4369 {
379f6698
PB		 4370 FILE *fp;
4371
4372 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
4373 unsigned long tmp;
4374 if (fscanf(fp, "%lu", &tmp) == 1) {
4375 mmap_min_addr = tmp;
13829020 4376 qemu_log_mask(CPU_LOG_PAGE, "host mmap_min_addr=0x%lx\n", mmap_min_addr);
379f6698
PB		 4377 }
4378 fclose(fp);
4379 }
4380 }
379f6698 4381
7d8cec95
AJ		 4382 /*
4383 * Prepare copy of argv vector for target.
4384 */
4385 target_argc = argc - optind;
4386 target_argv = calloc(target_argc + 1, sizeof (char *));
4387 if (target_argv == NULL) {
4388 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
4d1275c2 4389 exit(EXIT_FAILURE);
7d8cec95
AJ		 4390 }
4391
4392 /*
4393 * If argv0 is specified (using '-0' switch) we replace
4394 * argv[0] pointer with the given one.
4395 */
4396 i = 0;
4397 if (argv0 != NULL) {
4398 target_argv[i++] = strdup(argv0);
4399 }
4400 for (; i < target_argc; i++) {
4401 target_argv[i] = strdup(argv[optind + i]);
4402 }
4403 target_argv[target_argc] = NULL;
4404
c78d65e8 4405 ts = g_new0(TaskState, 1);
edf8e2af
MW		 4406 init_task_state(ts);
4407 /* build Task State */
4408 ts->info = info;
4409 ts->bprm = &bprm;
0429a971 4410 cpu->opaque = ts;
edf8e2af
MW		 4411 task_settid(ts);
4412
0b959cf5
RH		 4413 execfd = qemu_getauxval(AT_EXECFD);
4414 if (execfd == 0) {
03cfd8fa 4415 execfd = open(filename, O_RDONLY);
0b959cf5
RH		 4416 if (execfd < 0) {
4417 printf("Error while loading %s: %s\n", filename, strerror(errno));
4d1275c2 4418 _exit(EXIT_FAILURE);
0b959cf5 4419 }
03cfd8fa
LV		 4420 }
4421
4422 ret = loader_exec(execfd, filename, target_argv, target_environ, regs,
fd4d81dd
AP		 4423 info, &bprm);
4424 if (ret != 0) {
885c1d10 4425 printf("Error while loading %s: %s\n", filename, strerror(-ret));
4d1275c2 4426 _exit(EXIT_FAILURE);
b12b6a18
TS		 4427 }
4428
4429 for (wrk = target_environ; *wrk; wrk++) {
4430 free(*wrk);
31e31b8a 4431 }
3b46e624 4432
b12b6a18
TS		 4433 free(target_environ);
4434
13829020 4435 if (qemu_loglevel_mask(CPU_LOG_PAGE)) {
379f6698 4436 qemu_log("guest_base 0x%lx\n", guest_base);
2e77eac6
BS		 4437 log_page_dump();
4438
4439 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
4440 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
7c4ee5bc
RH		 4441 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n", info->start_code);
4442 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n", info->start_data);
2e77eac6 4443 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
7c4ee5bc 4444 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n", info->start_stack);
2e77eac6
BS		 4445 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
4446 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
7c4ee5bc
RH		 4447 qemu_log("argv_start 0x" TARGET_ABI_FMT_lx "\n", info->arg_start);
4448 qemu_log("env_start 0x" TARGET_ABI_FMT_lx "\n",
4449 info->arg_end + (abi_ulong)sizeof(abi_ulong));
4450 qemu_log("auxv_start 0x" TARGET_ABI_FMT_lx "\n", info->saved_auxv);
2e77eac6 4451 }
31e31b8a 4452
53a5960a 4453 target_set_brk(info->brk);
31e31b8a 4454 syscall_init();
66fb9763 4455 signal_init();
31e31b8a 4456
9002ec79
RH		 4457 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
4458 generating the prologue until now so that the prologue can take
4459 the real value of GUEST_BASE into account. */
4460 tcg_prologue_init(&tcg_ctx);
9002ec79 4461
b346ff46 4462#if defined(TARGET_I386)
3802ce26 4463 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
b98dbc90 4464 env->hflags |= HF_PE_MASK | HF_CPL_MASK;
0514ef2f 4465 if (env->features[FEAT_1_EDX] & CPUID_SSE) {
1bde465e
FB		 4466 env->cr[4] |= CR4_OSFXSR_MASK;
4467 env->hflags |= HF_OSFXSR_MASK;
4468 }
d2fd1af7 4469#ifndef TARGET_ABI32
4dbc422b 4470 /* enable 64 bit mode if possible */
0514ef2f 4471 if (!(env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM)) {
4dbc422b 4472 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
4d1275c2 4473 exit(EXIT_FAILURE);
4dbc422b 4474 }
d2fd1af7 4475 env->cr[4] |= CR4_PAE_MASK;
4dbc422b 4476 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
d2fd1af7
FB		 4477 env->hflags |= HF_LMA_MASK;
4478#endif
1bde465e 4479
415e561f
FB		 4480 /* flags setup : we activate the IRQs by default as in user mode */
4481 env->eflags |= IF_MASK;
3b46e624 4482
6dbad63e 4483 /* linux register setup */
d2fd1af7 4484#ifndef TARGET_ABI32
84409ddb
JM		 4485 env->regs[R_EAX] = regs->rax;
4486 env->regs[R_EBX] = regs->rbx;
4487 env->regs[R_ECX] = regs->rcx;
4488 env->regs[R_EDX] = regs->rdx;
4489 env->regs[R_ESI] = regs->rsi;
4490 env->regs[R_EDI] = regs->rdi;
4491 env->regs[R_EBP] = regs->rbp;
4492 env->regs[R_ESP] = regs->rsp;
4493 env->eip = regs->rip;
4494#else
0ecfa993
FB		 4495 env->regs[R_EAX] = regs->eax;
4496 env->regs[R_EBX] = regs->ebx;
4497 env->regs[R_ECX] = regs->ecx;
4498 env->regs[R_EDX] = regs->edx;
4499 env->regs[R_ESI] = regs->esi;
4500 env->regs[R_EDI] = regs->edi;
4501 env->regs[R_EBP] = regs->ebp;
4502 env->regs[R_ESP] = regs->esp;
dab2ed99 4503 env->eip = regs->eip;
84409ddb 4504#endif
31e31b8a 4505
f4beb510 4506 /* linux interrupt setup */
e441570f
AZ		 4507#ifndef TARGET_ABI32
4508 env->idt.limit = 511;
4509#else
4510 env->idt.limit = 255;
4511#endif
4512 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
4513 PROT_READ|PROT_WRITE,
4514 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
4515 idt_table = g2h(env->idt.base);
f4beb510
FB		 4516 set_idt(0, 0);
4517 set_idt(1, 0);
4518 set_idt(2, 0);
4519 set_idt(3, 3);
4520 set_idt(4, 3);
ec95da6c 4521 set_idt(5, 0);
f4beb510
FB		 4522 set_idt(6, 0);
4523 set_idt(7, 0);
4524 set_idt(8, 0);
4525 set_idt(9, 0);
4526 set_idt(10, 0);
4527 set_idt(11, 0);
4528 set_idt(12, 0);
4529 set_idt(13, 0);
4530 set_idt(14, 0);
4531 set_idt(15, 0);
4532 set_idt(16, 0);
4533 set_idt(17, 0);
4534 set_idt(18, 0);
4535 set_idt(19, 0);
4536 set_idt(0x80, 3);
4537
6dbad63e 4538 /* linux segment setup */
8d18e893
FB		 4539 {
4540 uint64_t *gdt_table;
e441570f
AZ		 4541 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
4542 PROT_READ|PROT_WRITE,
4543 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
8d18e893 4544 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
e441570f 4545 gdt_table = g2h(env->gdt.base);
d2fd1af7 4546#ifdef TARGET_ABI32
8d18e893
FB		 4547 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
4548 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
4549 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
d2fd1af7
FB		 4550#else
4551 /* 64 bit code segment */
4552 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
4553 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
4554 DESC_L_MASK |
4555 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
4556#endif
8d18e893
FB		 4557 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
4558 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
4559 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
4560 }
6dbad63e 4561 cpu_x86_load_seg(env, R_CS, __USER_CS);
d2fd1af7
FB		 4562 cpu_x86_load_seg(env, R_SS, __USER_DS);
4563#ifdef TARGET_ABI32
6dbad63e
FB		 4564 cpu_x86_load_seg(env, R_DS, __USER_DS);
4565 cpu_x86_load_seg(env, R_ES, __USER_DS);
6dbad63e
FB		 4566 cpu_x86_load_seg(env, R_FS, __USER_DS);
4567 cpu_x86_load_seg(env, R_GS, __USER_DS);
d6eb40f6
TS		 4568 /* This hack makes Wine work... */
4569 env->segs[R_FS].selector = 0;
d2fd1af7
FB		 4570#else
4571 cpu_x86_load_seg(env, R_DS, 0);
4572 cpu_x86_load_seg(env, R_ES, 0);
4573 cpu_x86_load_seg(env, R_FS, 0);
4574 cpu_x86_load_seg(env, R_GS, 0);
4575#endif
99033cae
AG		 4576#elif defined(TARGET_AARCH64)
4577 {
4578 int i;
4579
4580 if (!(arm_feature(env, ARM_FEATURE_AARCH64))) {
4581 fprintf(stderr,
4582 "The selected ARM CPU does not support 64 bit mode\n");
4d1275c2 4583 exit(EXIT_FAILURE);
99033cae
AG		 4584 }
4585
4586 for (i = 0; i < 31; i++) {
4587 env->xregs[i] = regs->regs[i];
4588 }
4589 env->pc = regs->pc;
4590 env->xregs[31] = regs->sp;
4591 }
b346ff46
FB		 4592#elif defined(TARGET_ARM)
4593 {
4594 int i;
ae087923
PM		 4595 cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC,
4596 CPSRWriteByInstr);
b346ff46
FB		 4597 for(i = 0; i < 16; i++) {
4598 env->regs[i] = regs->uregs[i];
4599 }
f9fd40eb 4600#ifdef TARGET_WORDS_BIGENDIAN
d8fd2954
PB		 4601 /* Enable BE8. */
4602 if (EF_ARM_EABI_VERSION(info->elf_flags) >= EF_ARM_EABI_VER4
4603 && (info->elf_flags & EF_ARM_BE8)) {
9c5a7460
PC		 4604 env->uncached_cpsr |= CPSR_E;
4605 env->cp15.sctlr_el[1] |= SCTLR_E0E;
f9fd40eb
PB		 4606 } else {
4607 env->cp15.sctlr_el[1] |= SCTLR_B;
d8fd2954 4608 }
f9fd40eb 4609#endif
b346ff46 4610 }
d2fbca94
GX		 4611#elif defined(TARGET_UNICORE32)
4612 {
4613 int i;
4614 cpu_asr_write(env, regs->uregs[32], 0xffffffff);
4615 for (i = 0; i < 32; i++) {
4616 env->regs[i] = regs->uregs[i];
4617 }
4618 }
93ac68bc 4619#elif defined(TARGET_SPARC)
060366c5
FB		 4620 {
4621 int i;
4622 env->pc = regs->pc;
4623 env->npc = regs->npc;
4624 env->y = regs->y;
4625 for(i = 0; i < 8; i++)
4626 env->gregs[i] = regs->u_regs[i];
4627 for(i = 0; i < 8; i++)
4628 env->regwptr[i] = regs->u_regs[i + 8];
4629 }
67867308
FB		 4630#elif defined(TARGET_PPC)
4631 {
4632 int i;
3fc6c082 4633
0411a972 4634#if defined(TARGET_PPC64)
c8361129 4635 int flag = (env->insns_flags2 & PPC2_BOOKE206) ? MSR_CM : MSR_SF;
0411a972 4636#if defined(TARGET_ABI32)
c8361129 4637 env->msr &= ~((target_ulong)1 << flag);
e85e7c6e 4638#else
c8361129 4639 env->msr |= (target_ulong)1 << flag;
0411a972 4640#endif
84409ddb 4641#endif
67867308
FB		 4642 env->nip = regs->nip;
4643 for(i = 0; i < 32; i++) {
4644 env->gpr[i] = regs->gpr[i];
4645 }
4646 }
e6e5906b
PB		 4647#elif defined(TARGET_M68K)
4648 {
e6e5906b
PB		 4649 env->pc = regs->pc;
4650 env->dregs[0] = regs->d0;
4651 env->dregs[1] = regs->d1;
4652 env->dregs[2] = regs->d2;
4653 env->dregs[3] = regs->d3;
4654 env->dregs[4] = regs->d4;
4655 env->dregs[5] = regs->d5;
4656 env->dregs[6] = regs->d6;
4657 env->dregs[7] = regs->d7;
4658 env->aregs[0] = regs->a0;
4659 env->aregs[1] = regs->a1;
4660 env->aregs[2] = regs->a2;
4661 env->aregs[3] = regs->a3;
4662 env->aregs[4] = regs->a4;
4663 env->aregs[5] = regs->a5;
4664 env->aregs[6] = regs->a6;
4665 env->aregs[7] = regs->usp;
4666 env->sr = regs->sr;
4667 ts->sim_syscalls = 1;
4668 }
b779e29e
EI		 4669#elif defined(TARGET_MICROBLAZE)
4670 {
4671 env->regs[0] = regs->r0;
4672 env->regs[1] = regs->r1;
4673 env->regs[2] = regs->r2;
4674 env->regs[3] = regs->r3;
4675 env->regs[4] = regs->r4;
4676 env->regs[5] = regs->r5;
4677 env->regs[6] = regs->r6;
4678 env->regs[7] = regs->r7;
4679 env->regs[8] = regs->r8;
4680 env->regs[9] = regs->r9;
4681 env->regs[10] = regs->r10;
4682 env->regs[11] = regs->r11;
4683 env->regs[12] = regs->r12;
4684 env->regs[13] = regs->r13;
4685 env->regs[14] = regs->r14;
4686 env->regs[15] = regs->r15;
4687 env->regs[16] = regs->r16;
4688 env->regs[17] = regs->r17;
4689 env->regs[18] = regs->r18;
4690 env->regs[19] = regs->r19;
4691 env->regs[20] = regs->r20;
4692 env->regs[21] = regs->r21;
4693 env->regs[22] = regs->r22;
4694 env->regs[23] = regs->r23;
4695 env->regs[24] = regs->r24;
4696 env->regs[25] = regs->r25;
4697 env->regs[26] = regs->r26;
4698 env->regs[27] = regs->r27;
4699 env->regs[28] = regs->r28;
4700 env->regs[29] = regs->r29;
4701 env->regs[30] = regs->r30;
4702 env->regs[31] = regs->r31;
4703 env->sregs[SR_PC] = regs->pc;
4704 }
048f6b4d
FB		 4705#elif defined(TARGET_MIPS)
4706 {
4707 int i;
4708
4709 for(i = 0; i < 32; i++) {
b5dc7732 4710 env->active_tc.gpr[i] = regs->regs[i];
048f6b4d 4711 }
0fddbbf2
NF		 4712 env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1;
4713 if (regs->cp0_epc & 1) {
4714 env->hflags |= MIPS_HFLAG_M16;
4715 }
599bc5e8
AM		 4716 if (((info->elf_flags & EF_MIPS_NAN2008) != 0) !=
4717 ((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) != 0)) {
4718 if ((env->active_fpu.fcr31_rw_bitmask &
4719 (1 << FCR31_NAN2008)) == 0) {
4720 fprintf(stderr, "ELF binary's NaN mode not supported by CPU\n");
4721 exit(1);
4722 }
4723 if ((info->elf_flags & EF_MIPS_NAN2008) != 0) {
4724 env->active_fpu.fcr31 |= (1 << FCR31_NAN2008);
4725 } else {
4726 env->active_fpu.fcr31 &= ~(1 << FCR31_NAN2008);
4727 }
4728 restore_snan_bit_mode(env);
4729 }
048f6b4d 4730 }
a0a839b6
MV		 4731#elif defined(TARGET_NIOS2)
4732 {
4733 env->regs[0] = 0;
4734 env->regs[1] = regs->r1;
4735 env->regs[2] = regs->r2;
4736 env->regs[3] = regs->r3;
4737 env->regs[4] = regs->r4;
4738 env->regs[5] = regs->r5;
4739 env->regs[6] = regs->r6;
4740 env->regs[7] = regs->r7;
4741 env->regs[8] = regs->r8;
4742 env->regs[9] = regs->r9;
4743 env->regs[10] = regs->r10;
4744 env->regs[11] = regs->r11;
4745 env->regs[12] = regs->r12;
4746 env->regs[13] = regs->r13;
4747 env->regs[14] = regs->r14;
4748 env->regs[15] = regs->r15;
4749 /* TODO: unsigned long orig_r2; */
4750 env->regs[R_RA] = regs->ra;
4751 env->regs[R_FP] = regs->fp;
4752 env->regs[R_SP] = regs->sp;
4753 env->regs[R_GP] = regs->gp;
4754 env->regs[CR_ESTATUS] = regs->estatus;
4755 env->regs[R_EA] = regs->ea;
4756 /* TODO: unsigned long orig_r7; */
4757
4758 /* Emulate eret when starting thread. */
4759 env->regs[R_PC] = regs->ea;
4760 }
d962783e
JL		 4761#elif defined(TARGET_OPENRISC)
4762 {
4763 int i;
4764
4765 for (i = 0; i < 32; i++) {
4766 env->gpr[i] = regs->gpr[i];
4767 }
d962783e 4768 env->pc = regs->pc;
84775c43 4769 cpu_set_sr(env, regs->sr);
d962783e 4770 }
fdf9b3e8
FB		 4771#elif defined(TARGET_SH4)
4772 {
4773 int i;
4774
4775 for(i = 0; i < 16; i++) {
4776 env->gregs[i] = regs->regs[i];
4777 }
4778 env->pc = regs->pc;
4779 }
7a3148a9
JM		 4780#elif defined(TARGET_ALPHA)
4781 {
4782 int i;
4783
4784 for(i = 0; i < 28; i++) {
992f48a0 4785 env->ir[i] = ((abi_ulong *)regs)[i];
7a3148a9 4786 }
dad081ee 4787 env->ir[IR_SP] = regs->usp;
7a3148a9 4788 env->pc = regs->pc;
7a3148a9 4789 }
48733d19
TS		 4790#elif defined(TARGET_CRIS)
4791 {
4792 env->regs[0] = regs->r0;
4793 env->regs[1] = regs->r1;
4794 env->regs[2] = regs->r2;
4795 env->regs[3] = regs->r3;
4796 env->regs[4] = regs->r4;
4797 env->regs[5] = regs->r5;
4798 env->regs[6] = regs->r6;
4799 env->regs[7] = regs->r7;
4800 env->regs[8] = regs->r8;
4801 env->regs[9] = regs->r9;
4802 env->regs[10] = regs->r10;
4803 env->regs[11] = regs->r11;
4804 env->regs[12] = regs->r12;
4805 env->regs[13] = regs->r13;
4806 env->regs[14] = info->start_stack;
4807 env->regs[15] = regs->acr;
4808 env->pc = regs->erp;
4809 }
a4c075f1
UH		 4810#elif defined(TARGET_S390X)
4811 {
4812 int i;
4813 for (i = 0; i < 16; i++) {
4814 env->regs[i] = regs->gprs[i];
4815 }
4816 env->psw.mask = regs->psw.mask;
4817 env->psw.addr = regs->psw.addr;
4818 }
b16189b2
CG		 4819#elif defined(TARGET_TILEGX)
4820 {
4821 int i;
4822 for (i = 0; i < TILEGX_R_COUNT; i++) {
4823 env->regs[i] = regs->regs[i];
4824 }
4825 for (i = 0; i < TILEGX_SPR_COUNT; i++) {
4826 env->spregs[i] = 0;
4827 }
4828 env->pc = regs->pc;
4829 }
7c248bcd
RH		 4830#elif defined(TARGET_HPPA)
4831 {
4832 int i;
4833 for (i = 1; i < 32; i++) {
4834 env->gr[i] = regs->gr[i];
4835 }
4836 env->iaoq_f = regs->iaoq[0];
4837 env->iaoq_b = regs->iaoq[1];
4838 }
b346ff46
FB		 4839#else
4840#error unsupported target CPU
4841#endif
31e31b8a 4842
d2fbca94 4843#if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
a87295e8
PB		 4844 ts->stack_base = info->start_stack;
4845 ts->heap_base = info->brk;
4846 /* This will be filled in on the first SYS_HEAPINFO call. */
4847 ts->heap_limit = 0;
4848#endif
4849
74c33bed 4850 if (gdbstub_port) {
ff7a981a
PM		 4851 if (gdbserver_start(gdbstub_port) < 0) {
4852 fprintf(stderr, "qemu: could not open gdbserver on port %d\n",
4853 gdbstub_port);
4d1275c2 4854 exit(EXIT_FAILURE);
ff7a981a 4855 }
db6b81d4 4856 gdb_handlesig(cpu, 0);
1fddef4b 4857 }
1b6b029e
FB		 4858 cpu_loop(env);
4859 /* never exits */
31e31b8a
FB		 4860 return 0;
4861}
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