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Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20170201' into staging
[mirror_qemu.git] / linux-user / main.c
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31e31b8a 1/*
93ac68bc 2 * qemu user main
5fafdf24 3 *
68d0f70e 4 * Copyright (c) 2003-2008 Fabrice Bellard
31e31b8a
FB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
8167ee88 17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
31e31b8a 18 */
d39594e9 19#include "qemu/osdep.h"
67a1de0d 20#include "qemu-version.h"
edf8e2af 21#include <sys/syscall.h>
703e0e89 22#include <sys/resource.h>
31e31b8a 23
daa76aa4 24#include "qapi/error.h"
3ef693a0 25#include "qemu.h"
f348b6d1 26#include "qemu/path.h"
6533dd6e 27#include "qemu/config-file.h"
f348b6d1
VB		 28#include "qemu/cutils.h"
29#include "qemu/help_option.h"
2b41f10e 30#include "cpu.h"
63c91552 31#include "exec/exec-all.h"
9002ec79 32#include "tcg.h"
1de7afc9
PB		 33#include "qemu/timer.h"
34#include "qemu/envlist.h"
d8fd2954 35#include "elf.h"
508127e2 36#include "exec/log.h"
6533dd6e
LV		 37#include "trace/control.h"
38#include "glib-compat.h"
04a6dfeb 39
d088d664
AJ		 40char *exec_path;
41
1b530a6d 42int singlestep;
8cb76755
SW		 43static const char *filename;
44static const char *argv0;
45static int gdbstub_port;
46static envlist_t *envlist;
51fb256a 47static const char *cpu_model;
379f6698
PB		 48unsigned long mmap_min_addr;
49unsigned long guest_base;
50int have_guest_base;
120a9848
PB		 51
52#define EXCP_DUMP(env, fmt, ...) \
53do { \
54 CPUState *cs = ENV_GET_CPU(env); \
55 fprintf(stderr, fmt , ## __VA_ARGS__); \
56 cpu_dump_state(cs, stderr, fprintf, 0); \
57 if (qemu_log_separate()) { \
58 qemu_log(fmt, ## __VA_ARGS__); \
59 log_cpu_state(cs, 0); \
60 } \
61} while (0)
62
288e65b9
AG		 63#if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
64/*
65 * When running 32-on-64 we should make sure we can fit all of the possible
66 * guest address space into a contiguous chunk of virtual host memory.
67 *
68 * This way we will never overlap with our own libraries or binaries or stack
69 * or anything else that QEMU maps.
70 */
a0a839b6
MV		 71# if defined(TARGET_MIPS) || defined(TARGET_NIOS2)
72/*
73 * MIPS only supports 31 bits of virtual address space for user space.
74 * Nios2 also only supports 31 bits.
75 */
314992b1
AG		 76unsigned long reserved_va = 0x77000000;
77# else
288e65b9 78unsigned long reserved_va = 0xf7000000;
314992b1 79# endif
288e65b9 80#else
68a1c816 81unsigned long reserved_va;
379f6698 82#endif
1b530a6d 83
d03f9c32 84static void usage(int exitcode);
fc9c5412 85
7ee2822c 86static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
e586822a 87const char *qemu_uname_release;
586314f2 88
9de5e440
FB		 89/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
90 we allocate a bigger stack. Need a better solution, for example
91 by remapping the process stack directly at the right place */
703e0e89 92unsigned long guest_stack_size = 8 * 1024 * 1024UL;
31e31b8a
FB		 93
94void gemu_log(const char *fmt, ...)
95{
96 va_list ap;
97
98 va_start(ap, fmt);
99 vfprintf(stderr, fmt, ap);
100 va_end(ap);
101}
102
8fcd3692 103#if defined(TARGET_I386)
05390248 104int cpu_get_pic_interrupt(CPUX86State *env)
92ccca6a
FB		 105{
106 return -1;
107}
8fcd3692 108#endif
92ccca6a 109
d5975363
PB		 110/***********************************************************/
111/* Helper routines for implementing atomic operations. */
112
d5975363
PB		 113/* Make sure everything is in a consistent state for calling fork(). */
114void fork_start(void)
115{
267f685b 116 cpu_list_lock();
677ef623 117 qemu_mutex_lock(&tcg_ctx.tb_ctx.tb_lock);
d032d1b4 118 mmap_fork_start();
d5975363
PB		 119}
120
121void fork_end(int child)
122{
d032d1b4 123 mmap_fork_end(child);
d5975363 124 if (child) {
bdc44640 125 CPUState *cpu, *next_cpu;
d5975363
PB		 126 /* Child processes created by fork() only have a single thread.
127 Discard information about the parent threads. */
bdc44640
AF		 128 CPU_FOREACH_SAFE(cpu, next_cpu) {
129 if (cpu != thread_cpu) {
014628a7 130 QTAILQ_REMOVE(&cpus, cpu, node);
bdc44640
AF		 131 }
132 }
677ef623 133 qemu_mutex_init(&tcg_ctx.tb_ctx.tb_lock);
267f685b 134 qemu_init_cpu_list();
f7ec7f7b 135 gdbserver_fork(thread_cpu);
d5975363 136 } else {
677ef623 137 qemu_mutex_unlock(&tcg_ctx.tb_ctx.tb_lock);
267f685b 138 cpu_list_unlock();
d5975363 139 }
d5975363
PB		 140}
141
a541f297
FB		 142#ifdef TARGET_I386
143/***********************************************************/
144/* CPUX86 core interface */
145
28ab0e2e
FB		 146uint64_t cpu_get_tsc(CPUX86State *env)
147{
4a7428c5 148 return cpu_get_host_ticks();
28ab0e2e
FB		 149}
150
5fafdf24 151static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
f4beb510 152 int flags)
6dbad63e 153{
f4beb510 154 unsigned int e1, e2;
53a5960a 155 uint32_t *p;
6dbad63e
FB		 156 e1 = (addr << 16) | (limit & 0xffff);
157 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
f4beb510 158 e2 |= flags;
53a5960a 159 p = ptr;
d538e8f5 160 p[0] = tswap32(e1);
161 p[1] = tswap32(e2);
f4beb510
FB		 162}
163
e441570f 164static uint64_t *idt_table;
eb38c52c 165#ifdef TARGET_X86_64
d2fd1af7
FB		 166static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
167 uint64_t addr, unsigned int sel)
f4beb510 168{
4dbc422b 169 uint32_t *p, e1, e2;
f4beb510
FB		 170 e1 = (addr & 0xffff) | (sel << 16);
171 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
53a5960a 172 p = ptr;
4dbc422b
FB		 173 p[0] = tswap32(e1);
174 p[1] = tswap32(e2);
175 p[2] = tswap32(addr >> 32);
176 p[3] = 0;
6dbad63e 177}
d2fd1af7
FB		 178/* only dpl matters as we do only user space emulation */
179static void set_idt(int n, unsigned int dpl)
180{
181 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
182}
183#else
d2fd1af7
FB		 184static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
185 uint32_t addr, unsigned int sel)
186{
4dbc422b 187 uint32_t *p, e1, e2;
d2fd1af7
FB		 188 e1 = (addr & 0xffff) | (sel << 16);
189 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
190 p = ptr;
4dbc422b
FB		 191 p[0] = tswap32(e1);
192 p[1] = tswap32(e2);
d2fd1af7
FB		 193}
194
f4beb510
FB		 195/* only dpl matters as we do only user space emulation */
196static void set_idt(int n, unsigned int dpl)
197{
198 set_gate(idt_table + n, 0, dpl, 0, 0);
199}
d2fd1af7 200#endif
31e31b8a 201
89e957e7 202void cpu_loop(CPUX86State *env)
1b6b029e 203{
db6b81d4 204 CPUState *cs = CPU(x86_env_get_cpu(env));
bc8a22cc 205 int trapnr;
992f48a0 206 abi_ulong pc;
0284b03b 207 abi_ulong ret;
c227f099 208 target_siginfo_t info;
851e67a1 209
1b6b029e 210 for(;;) {
b040bc9c 211 cpu_exec_start(cs);
8642c1b8 212 trapnr = cpu_exec(cs);
b040bc9c 213 cpu_exec_end(cs);
d148d90e
SF		 214 process_queued_cpu_work(cs);
215
bc8a22cc 216 switch(trapnr) {
f4beb510 217 case 0x80:
d2fd1af7 218 /* linux syscall from int $0x80 */
0284b03b
TB		 219 ret = do_syscall(env,
220 env->regs[R_EAX],
221 env->regs[R_EBX],
222 env->regs[R_ECX],
223 env->regs[R_EDX],
224 env->regs[R_ESI],
225 env->regs[R_EDI],
226 env->regs[R_EBP],
227 0, 0);
228 if (ret == -TARGET_ERESTARTSYS) {
229 env->eip -= 2;
230 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
231 env->regs[R_EAX] = ret;
232 }
f4beb510 233 break;
d2fd1af7
FB		 234#ifndef TARGET_ABI32
235 case EXCP_SYSCALL:
5ba18547 236 /* linux syscall from syscall instruction */
0284b03b
TB		 237 ret = do_syscall(env,
238 env->regs[R_EAX],
239 env->regs[R_EDI],
240 env->regs[R_ESI],
241 env->regs[R_EDX],
242 env->regs[10],
243 env->regs[8],
244 env->regs[9],
245 0, 0);
246 if (ret == -TARGET_ERESTARTSYS) {
247 env->eip -= 2;
248 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
249 env->regs[R_EAX] = ret;
250 }
d2fd1af7
FB		 251 break;
252#endif
f4beb510
FB		 253 case EXCP0B_NOSEG:
254 case EXCP0C_STACK:
a86b3c64 255 info.si_signo = TARGET_SIGBUS;
f4beb510
FB		 256 info.si_errno = 0;
257 info.si_code = TARGET_SI_KERNEL;
258 info._sifields._sigfault._addr = 0;
9d2803f7 259 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
f4beb510 260 break;
1b6b029e 261 case EXCP0D_GPF:
d2fd1af7 262 /* XXX: potential problem if ABI32 */
84409ddb 263#ifndef TARGET_X86_64
851e67a1 264 if (env->eflags & VM_MASK) {
89e957e7 265 handle_vm86_fault(env);
84409ddb
JM		 266 } else
267#endif
268 {
a86b3c64 269 info.si_signo = TARGET_SIGSEGV;
f4beb510
FB		 270 info.si_errno = 0;
271 info.si_code = TARGET_SI_KERNEL;
272 info._sifields._sigfault._addr = 0;
9d2803f7 273 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1b6b029e
FB		 274 }
275 break;
b689bc57 276 case EXCP0E_PAGE:
a86b3c64 277 info.si_signo = TARGET_SIGSEGV;
b689bc57
FB		 278 info.si_errno = 0;
279 if (!(env->error_code & 1))
280 info.si_code = TARGET_SEGV_MAPERR;
281 else
282 info.si_code = TARGET_SEGV_ACCERR;
970a87a6 283 info._sifields._sigfault._addr = env->cr[2];
9d2803f7 284 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
b689bc57 285 break;
9de5e440 286 case EXCP00_DIVZ:
84409ddb 287#ifndef TARGET_X86_64
bc8a22cc 288 if (env->eflags & VM_MASK) {
447db213 289 handle_vm86_trap(env, trapnr);
84409ddb
JM		 290 } else
291#endif
292 {
bc8a22cc 293 /* division by zero */
a86b3c64 294 info.si_signo = TARGET_SIGFPE;
bc8a22cc
FB		 295 info.si_errno = 0;
296 info.si_code = TARGET_FPE_INTDIV;
297 info._sifields._sigfault._addr = env->eip;
9d2803f7 298 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
bc8a22cc 299 }
9de5e440 300 break;
01df040b 301 case EXCP01_DB:
447db213 302 case EXCP03_INT3:
84409ddb 303#ifndef TARGET_X86_64
447db213
FB		 304 if (env->eflags & VM_MASK) {
305 handle_vm86_trap(env, trapnr);
84409ddb
JM		 306 } else
307#endif
308 {
a86b3c64 309 info.si_signo = TARGET_SIGTRAP;
447db213 310 info.si_errno = 0;
01df040b 311 if (trapnr == EXCP01_DB) {
447db213
FB		 312 info.si_code = TARGET_TRAP_BRKPT;
313 info._sifields._sigfault._addr = env->eip;
314 } else {
315 info.si_code = TARGET_SI_KERNEL;
316 info._sifields._sigfault._addr = 0;
317 }
9d2803f7 318 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
447db213
FB		 319 }
320 break;
9de5e440
FB		 321 case EXCP04_INTO:
322 case EXCP05_BOUND:
84409ddb 323#ifndef TARGET_X86_64
bc8a22cc 324 if (env->eflags & VM_MASK) {
447db213 325 handle_vm86_trap(env, trapnr);
84409ddb
JM		 326 } else
327#endif
328 {
a86b3c64 329 info.si_signo = TARGET_SIGSEGV;
bc8a22cc 330 info.si_errno = 0;
b689bc57 331 info.si_code = TARGET_SI_KERNEL;
bc8a22cc 332 info._sifields._sigfault._addr = 0;
9d2803f7 333 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
bc8a22cc 334 }
9de5e440
FB		 335 break;
336 case EXCP06_ILLOP:
a86b3c64 337 info.si_signo = TARGET_SIGILL;
9de5e440
FB		 338 info.si_errno = 0;
339 info.si_code = TARGET_ILL_ILLOPN;
340 info._sifields._sigfault._addr = env->eip;
9d2803f7 341 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
9de5e440
FB		 342 break;
343 case EXCP_INTERRUPT:
344 /* just indicate that signals should be handled asap */
345 break;
1fddef4b
FB		 346 case EXCP_DEBUG:
347 {
348 int sig;
349
db6b81d4 350 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
1fddef4b
FB		 351 if (sig)
352 {
353 info.si_signo = sig;
354 info.si_errno = 0;
355 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 356 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1fddef4b
FB		 357 }
358 }
359 break;
fdbc2b57
RH		 360 case EXCP_ATOMIC:
361 cpu_exec_step_atomic(cs);
362 break;
1b6b029e 363 default:
970a87a6 364 pc = env->segs[R_CS].base + env->eip;
120a9848
PB		 365 EXCP_DUMP(env, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
366 (long)pc, trapnr);
1b6b029e
FB		 367 abort();
368 }
66fb9763 369 process_pending_signals(env);
1b6b029e
FB		 370 }
371}
b346ff46
FB		 372#endif
373
374#ifdef TARGET_ARM
375
49017bd8 376#define get_user_code_u32(x, gaddr, env) \
d8fd2954 377 ({ abi_long __r = get_user_u32((x), (gaddr)); \
f9fd40eb 378 if (!__r && bswap_code(arm_sctlr_b(env))) { \
d8fd2954
PB		 379 (x) = bswap32(x); \
380 } \
381 __r; \
382 })
383
49017bd8 384#define get_user_code_u16(x, gaddr, env) \
d8fd2954 385 ({ abi_long __r = get_user_u16((x), (gaddr)); \
f9fd40eb 386 if (!__r && bswap_code(arm_sctlr_b(env))) { \
d8fd2954
PB		 387 (x) = bswap16(x); \
388 } \
389 __r; \
390 })
391
c3ae85fc
PB		 392#define get_user_data_u32(x, gaddr, env) \
393 ({ abi_long __r = get_user_u32((x), (gaddr)); \
394 if (!__r && arm_cpu_bswap_data(env)) { \
395 (x) = bswap32(x); \
396 } \
397 __r; \
398 })
399
400#define get_user_data_u16(x, gaddr, env) \
401 ({ abi_long __r = get_user_u16((x), (gaddr)); \
402 if (!__r && arm_cpu_bswap_data(env)) { \
403 (x) = bswap16(x); \
404 } \
405 __r; \
406 })
407
408#define put_user_data_u32(x, gaddr, env) \
409 ({ typeof(x) __x = (x); \
410 if (arm_cpu_bswap_data(env)) { \
411 __x = bswap32(__x); \
412 } \
413 put_user_u32(__x, (gaddr)); \
414 })
415
416#define put_user_data_u16(x, gaddr, env) \
417 ({ typeof(x) __x = (x); \
418 if (arm_cpu_bswap_data(env)) { \
419 __x = bswap16(__x); \
420 } \
421 put_user_u16(__x, (gaddr)); \
422 })
423
1861c454
PM		 424#ifdef TARGET_ABI32
425/* Commpage handling -- there is no commpage for AArch64 */
426
97cc7560
DDAG		 427/*
428 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
429 * Input:
430 * r0 = pointer to oldval
431 * r1 = pointer to newval
432 * r2 = pointer to target value
433 *
434 * Output:
435 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
436 * C set if *ptr was changed, clear if no exchange happened
437 *
438 * Note segv's in kernel helpers are a bit tricky, we can set the
439 * data address sensibly but the PC address is just the entry point.
440 */
441static void arm_kernel_cmpxchg64_helper(CPUARMState *env)
442{
443 uint64_t oldval, newval, val;
444 uint32_t addr, cpsr;
445 target_siginfo_t info;
446
447 /* Based on the 32 bit code in do_kernel_trap */
448
449 /* XXX: This only works between threads, not between processes.
450 It's probably possible to implement this with native host
451 operations. However things like ldrex/strex are much harder so
452 there's not much point trying. */
453 start_exclusive();
454 cpsr = cpsr_read(env);
455 addr = env->regs[2];
456
457 if (get_user_u64(oldval, env->regs[0])) {
abf1172f 458 env->exception.vaddress = env->regs[0];
97cc7560
DDAG		 459 goto segv;
460 };
461
462 if (get_user_u64(newval, env->regs[1])) {
abf1172f 463 env->exception.vaddress = env->regs[1];
97cc7560
DDAG		 464 goto segv;
465 };
466
467 if (get_user_u64(val, addr)) {
abf1172f 468 env->exception.vaddress = addr;
97cc7560
DDAG		 469 goto segv;
470 }
471
472 if (val == oldval) {
473 val = newval;
474
475 if (put_user_u64(val, addr)) {
abf1172f 476 env->exception.vaddress = addr;
97cc7560
DDAG		 477 goto segv;
478 };
479
480 env->regs[0] = 0;
481 cpsr |= CPSR_C;
482 } else {
483 env->regs[0] = -1;
484 cpsr &= ~CPSR_C;
485 }
50866ba5 486 cpsr_write(env, cpsr, CPSR_C, CPSRWriteByInstr);
97cc7560
DDAG		 487 end_exclusive();
488 return;
489
490segv:
491 end_exclusive();
492 /* We get the PC of the entry address - which is as good as anything,
493 on a real kernel what you get depends on which mode it uses. */
a86b3c64 494 info.si_signo = TARGET_SIGSEGV;
97cc7560
DDAG		 495 info.si_errno = 0;
496 /* XXX: check env->error_code */
497 info.si_code = TARGET_SEGV_MAPERR;
abf1172f 498 info._sifields._sigfault._addr = env->exception.vaddress;
9d2803f7 499 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
97cc7560
DDAG		 500}
501
fbb4a2e3
PB		 502/* Handle a jump to the kernel code page. */
503static int
504do_kernel_trap(CPUARMState *env)
505{
506 uint32_t addr;
507 uint32_t cpsr;
508 uint32_t val;
509
510 switch (env->regs[15]) {
511 case 0xffff0fa0: /* __kernel_memory_barrier */
512 /* ??? No-op. Will need to do better for SMP. */
513 break;
514 case 0xffff0fc0: /* __kernel_cmpxchg */
d5975363
PB		 515 /* XXX: This only works between threads, not between processes.
516 It's probably possible to implement this with native host
517 operations. However things like ldrex/strex are much harder so
518 there's not much point trying. */
519 start_exclusive();
fbb4a2e3
PB		 520 cpsr = cpsr_read(env);
521 addr = env->regs[2];
522 /* FIXME: This should SEGV if the access fails. */
523 if (get_user_u32(val, addr))
524 val = ~env->regs[0];
525 if (val == env->regs[0]) {
526 val = env->regs[1];
527 /* FIXME: Check for segfaults. */
528 put_user_u32(val, addr);
529 env->regs[0] = 0;
530 cpsr |= CPSR_C;
531 } else {
532 env->regs[0] = -1;
533 cpsr &= ~CPSR_C;
534 }
50866ba5 535 cpsr_write(env, cpsr, CPSR_C, CPSRWriteByInstr);
d5975363 536 end_exclusive();
fbb4a2e3
PB		 537 break;
538 case 0xffff0fe0: /* __kernel_get_tls */
b8d43285 539 env->regs[0] = cpu_get_tls(env);
fbb4a2e3 540 break;
97cc7560
DDAG		 541 case 0xffff0f60: /* __kernel_cmpxchg64 */
542 arm_kernel_cmpxchg64_helper(env);
543 break;
544
fbb4a2e3
PB		 545 default:
546 return 1;
547 }
548 /* Jump back to the caller. */
549 addr = env->regs[14];
550 if (addr & 1) {
551 env->thumb = 1;
552 addr &= ~1;
553 }
554 env->regs[15] = addr;
555
556 return 0;
557}
558
b346ff46
FB		 559void cpu_loop(CPUARMState *env)
560{
0315c31c 561 CPUState *cs = CPU(arm_env_get_cpu(env));
b346ff46
FB		 562 int trapnr;
563 unsigned int n, insn;
c227f099 564 target_siginfo_t info;
b5ff1b31 565 uint32_t addr;
f0267ef7 566 abi_ulong ret;
3b46e624 567
b346ff46 568 for(;;) {
0315c31c 569 cpu_exec_start(cs);
8642c1b8 570 trapnr = cpu_exec(cs);
0315c31c 571 cpu_exec_end(cs);
d148d90e
SF		 572 process_queued_cpu_work(cs);
573
b346ff46
FB		 574 switch(trapnr) {
575 case EXCP_UDEF:
7517748e 576 case EXCP_NOCP:
c6981055 577 {
0429a971 578 TaskState *ts = cs->opaque;
c6981055 579 uint32_t opcode;
6d9a42be 580 int rc;
c6981055
FB		 581
582 /* we handle the FPU emulation here, as Linux */
583 /* we get the opcode */
2f619698 584 /* FIXME - what to do if get_user() fails? */
49017bd8 585 get_user_code_u32(opcode, env->regs[15], env);
3b46e624 586
6d9a42be
AJ		 587 rc = EmulateAll(opcode, &ts->fpa, env);
588 if (rc == 0) { /* illegal instruction */
a86b3c64 589 info.si_signo = TARGET_SIGILL;
c6981055
FB		 590 info.si_errno = 0;
591 info.si_code = TARGET_ILL_ILLOPN;
592 info._sifields._sigfault._addr = env->regs[15];
9d2803f7 593 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
6d9a42be
AJ		 594 } else if (rc < 0) { /* FP exception */
595 int arm_fpe=0;
596
597 /* translate softfloat flags to FPSR flags */
598 if (-rc & float_flag_invalid)
599 arm_fpe |= BIT_IOC;
600 if (-rc & float_flag_divbyzero)
601 arm_fpe |= BIT_DZC;
602 if (-rc & float_flag_overflow)
603 arm_fpe |= BIT_OFC;
604 if (-rc & float_flag_underflow)
605 arm_fpe |= BIT_UFC;
606 if (-rc & float_flag_inexact)
607 arm_fpe |= BIT_IXC;
608
609 FPSR fpsr = ts->fpa.fpsr;
610 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
611
612 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
a86b3c64 613 info.si_signo = TARGET_SIGFPE;
6d9a42be
AJ		 614 info.si_errno = 0;
615
616 /* ordered by priority, least first */
617 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
618 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
619 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
620 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
621 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
622
623 info._sifields._sigfault._addr = env->regs[15];
9d2803f7 624 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
6d9a42be
AJ		 625 } else {
626 env->regs[15] += 4;
627 }
628
629 /* accumulate unenabled exceptions */
630 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
631 fpsr |= BIT_IXC;
632 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
633 fpsr |= BIT_UFC;
634 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
635 fpsr |= BIT_OFC;
636 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
637 fpsr |= BIT_DZC;
638 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
639 fpsr |= BIT_IOC;
640 ts->fpa.fpsr=fpsr;
641 } else { /* everything OK */
c6981055
FB		 642 /* increment PC */
643 env->regs[15] += 4;
644 }
645 }
b346ff46
FB		 646 break;
647 case EXCP_SWI:
06c949e6 648 case EXCP_BKPT:
b346ff46 649 {
ce4defa0 650 env->eabi = 1;
b346ff46 651 /* system call */
06c949e6
PB		 652 if (trapnr == EXCP_BKPT) {
653 if (env->thumb) {
2f619698 654 /* FIXME - what to do if get_user() fails? */
49017bd8 655 get_user_code_u16(insn, env->regs[15], env);
06c949e6
PB		 656 n = insn & 0xff;
657 env->regs[15] += 2;
658 } else {
2f619698 659 /* FIXME - what to do if get_user() fails? */
49017bd8 660 get_user_code_u32(insn, env->regs[15], env);
06c949e6
PB		 661 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
662 env->regs[15] += 4;
663 }
192c7bd9 664 } else {
06c949e6 665 if (env->thumb) {
2f619698 666 /* FIXME - what to do if get_user() fails? */
49017bd8 667 get_user_code_u16(insn, env->regs[15] - 2, env);
06c949e6
PB		 668 n = insn & 0xff;
669 } else {
2f619698 670 /* FIXME - what to do if get_user() fails? */
49017bd8 671 get_user_code_u32(insn, env->regs[15] - 4, env);
06c949e6
PB		 672 n = insn & 0xffffff;
673 }
192c7bd9
FB		 674 }
675
6f1f31c0 676 if (n == ARM_NR_cacheflush) {
dcfd14b3 677 /* nop */
a4f81979
FB		 678 } else if (n == ARM_NR_semihosting
679 || n == ARM_NR_thumb_semihosting) {
680 env->regs[0] = do_arm_semihosting (env);
3a1363ac 681 } else if (n == 0 || n >= ARM_SYSCALL_BASE || env->thumb) {
b346ff46 682 /* linux syscall */
ce4defa0 683 if (env->thumb || n == 0) {
192c7bd9
FB		 684 n = env->regs[7];
685 } else {
686 n -= ARM_SYSCALL_BASE;
ce4defa0 687 env->eabi = 0;
192c7bd9 688 }
fbb4a2e3
PB		 689 if ( n > ARM_NR_BASE) {
690 switch (n) {
691 case ARM_NR_cacheflush:
dcfd14b3 692 /* nop */
fbb4a2e3
PB		 693 break;
694 case ARM_NR_set_tls:
695 cpu_set_tls(env, env->regs[0]);
696 env->regs[0] = 0;
697 break;
d5355087
HL		 698 case ARM_NR_breakpoint:
699 env->regs[15] -= env->thumb ? 2 : 4;
700 goto excp_debug;
fbb4a2e3
PB		 701 default:
702 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
703 n);
704 env->regs[0] = -TARGET_ENOSYS;
705 break;
706 }
707 } else {
f0267ef7
TB		 708 ret = do_syscall(env,
709 n,
710 env->regs[0],
711 env->regs[1],
712 env->regs[2],
713 env->regs[3],
714 env->regs[4],
715 env->regs[5],
716 0, 0);
717 if (ret == -TARGET_ERESTARTSYS) {
718 env->regs[15] -= env->thumb ? 2 : 4;
719 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
720 env->regs[0] = ret;
721 }
fbb4a2e3 722 }
b346ff46
FB		 723 } else {
724 goto error;
725 }
726 }
727 break;
19a6e31c
PM		 728 case EXCP_SEMIHOST:
729 env->regs[0] = do_arm_semihosting(env);
730 break;
43fff238
FB		 731 case EXCP_INTERRUPT:
732 /* just indicate that signals should be handled asap */
733 break;
68016c62
FB		 734 case EXCP_PREFETCH_ABORT:
735 case EXCP_DATA_ABORT:
abf1172f 736 addr = env->exception.vaddress;
68016c62 737 {
a86b3c64 738 info.si_signo = TARGET_SIGSEGV;
68016c62
FB		 739 info.si_errno = 0;
740 /* XXX: check env->error_code */
741 info.si_code = TARGET_SEGV_MAPERR;
b5ff1b31 742 info._sifields._sigfault._addr = addr;
9d2803f7 743 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
68016c62
FB		 744 }
745 break;
1fddef4b 746 case EXCP_DEBUG:
d5355087 747 excp_debug:
1fddef4b
FB		 748 {
749 int sig;
750
db6b81d4 751 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
1fddef4b
FB		 752 if (sig)
753 {
754 info.si_signo = sig;
755 info.si_errno = 0;
756 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 757 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1fddef4b
FB		 758 }
759 }
760 break;
fbb4a2e3
PB		 761 case EXCP_KERNEL_TRAP:
762 if (do_kernel_trap(env))
763 goto error;
764 break;
f911e0a3
PM		 765 case EXCP_YIELD:
766 /* nothing to do here for user-mode, just resume guest code */
767 break;
fdbc2b57
RH		 768 case EXCP_ATOMIC:
769 cpu_exec_step_atomic(cs);
770 break;
b346ff46
FB		 771 default:
772 error:
120a9848 773 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
b346ff46
FB		 774 abort();
775 }
776 process_pending_signals(env);
777 }
778}
779
1861c454
PM		 780#else
781
782/* AArch64 main loop */
783void cpu_loop(CPUARMState *env)
784{
785 CPUState *cs = CPU(arm_env_get_cpu(env));
786 int trapnr, sig;
f0267ef7 787 abi_long ret;
1861c454 788 target_siginfo_t info;
1861c454
PM		 789
790 for (;;) {
791 cpu_exec_start(cs);
8642c1b8 792 trapnr = cpu_exec(cs);
1861c454 793 cpu_exec_end(cs);
d148d90e 794 process_queued_cpu_work(cs);
1861c454
PM		 795
796 switch (trapnr) {
797 case EXCP_SWI:
f0267ef7
TB		 798 ret = do_syscall(env,
799 env->xregs[8],
800 env->xregs[0],
801 env->xregs[1],
802 env->xregs[2],
803 env->xregs[3],
804 env->xregs[4],
805 env->xregs[5],
806 0, 0);
807 if (ret == -TARGET_ERESTARTSYS) {
808 env->pc -= 4;
809 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
810 env->xregs[0] = ret;
811 }
1861c454
PM		 812 break;
813 case EXCP_INTERRUPT:
814 /* just indicate that signals should be handled asap */
815 break;
816 case EXCP_UDEF:
a86b3c64 817 info.si_signo = TARGET_SIGILL;
1861c454
PM		 818 info.si_errno = 0;
819 info.si_code = TARGET_ILL_ILLOPN;
820 info._sifields._sigfault._addr = env->pc;
9d2803f7 821 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1861c454
PM		 822 break;
823 case EXCP_PREFETCH_ABORT:
1861c454 824 case EXCP_DATA_ABORT:
a86b3c64 825 info.si_signo = TARGET_SIGSEGV;
1861c454
PM		 826 info.si_errno = 0;
827 /* XXX: check env->error_code */
828 info.si_code = TARGET_SEGV_MAPERR;
686581ad 829 info._sifields._sigfault._addr = env->exception.vaddress;
9d2803f7 830 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1861c454
PM		 831 break;
832 case EXCP_DEBUG:
833 case EXCP_BKPT:
834 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
835 if (sig) {
836 info.si_signo = sig;
837 info.si_errno = 0;
838 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 839 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1861c454
PM		 840 }
841 break;
8012c84f
PM		 842 case EXCP_SEMIHOST:
843 env->xregs[0] = do_arm_semihosting(env);
844 break;
f911e0a3
PM		 845 case EXCP_YIELD:
846 /* nothing to do here for user-mode, just resume guest code */
847 break;
fdbc2b57
RH		 848 case EXCP_ATOMIC:
849 cpu_exec_step_atomic(cs);
850 break;
1861c454 851 default:
120a9848 852 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
1861c454
PM		 853 abort();
854 }
855 process_pending_signals(env);
fa2ef212
MM		 856 /* Exception return on AArch64 always clears the exclusive monitor,
857 * so any return to running guest code implies this.
fa2ef212
MM		 858 */
859 env->exclusive_addr = -1;
1861c454
PM		 860 }
861}
862#endif /* ndef TARGET_ABI32 */
863
b346ff46 864#endif
1b6b029e 865
d2fbca94
GX		 866#ifdef TARGET_UNICORE32
867
05390248 868void cpu_loop(CPUUniCore32State *env)
d2fbca94 869{
0315c31c 870 CPUState *cs = CPU(uc32_env_get_cpu(env));
d2fbca94
GX		 871 int trapnr;
872 unsigned int n, insn;
873 target_siginfo_t info;
874
875 for (;;) {
0315c31c 876 cpu_exec_start(cs);
8642c1b8 877 trapnr = cpu_exec(cs);
0315c31c 878 cpu_exec_end(cs);
d148d90e
SF		 879 process_queued_cpu_work(cs);
880
d2fbca94
GX		 881 switch (trapnr) {
882 case UC32_EXCP_PRIV:
883 {
884 /* system call */
885 get_user_u32(insn, env->regs[31] - 4);
886 n = insn & 0xffffff;
887
888 if (n >= UC32_SYSCALL_BASE) {
889 /* linux syscall */
890 n -= UC32_SYSCALL_BASE;
891 if (n == UC32_SYSCALL_NR_set_tls) {
892 cpu_set_tls(env, env->regs[0]);
893 env->regs[0] = 0;
894 } else {
256cb6af 895 abi_long ret = do_syscall(env,
d2fbca94
GX		 896 n,
897 env->regs[0],
898 env->regs[1],
899 env->regs[2],
900 env->regs[3],
901 env->regs[4],
5945cfcb
PM		 902 env->regs[5],
903 0, 0);
256cb6af
TB		 904 if (ret == -TARGET_ERESTARTSYS) {
905 env->regs[31] -= 4;
906 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
907 env->regs[0] = ret;
908 }
d2fbca94
GX		 909 }
910 } else {
911 goto error;
912 }
913 }
914 break;
d48813dd
GX		 915 case UC32_EXCP_DTRAP:
916 case UC32_EXCP_ITRAP:
a86b3c64 917 info.si_signo = TARGET_SIGSEGV;
d2fbca94
GX		 918 info.si_errno = 0;
919 /* XXX: check env->error_code */
920 info.si_code = TARGET_SEGV_MAPERR;
921 info._sifields._sigfault._addr = env->cp0.c4_faultaddr;
9d2803f7 922 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
d2fbca94
GX		 923 break;
924 case EXCP_INTERRUPT:
925 /* just indicate that signals should be handled asap */
926 break;
927 case EXCP_DEBUG:
928 {
929 int sig;
930
db6b81d4 931 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
d2fbca94
GX		 932 if (sig) {
933 info.si_signo = sig;
934 info.si_errno = 0;
935 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 936 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
d2fbca94
GX		 937 }
938 }
939 break;
fdbc2b57
RH		 940 case EXCP_ATOMIC:
941 cpu_exec_step_atomic(cs);
942 break;
d2fbca94
GX		 943 default:
944 goto error;
945 }
946 process_pending_signals(env);
947 }
948
949error:
120a9848 950 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
d2fbca94
GX		 951 abort();
952}
953#endif
954
93ac68bc 955#ifdef TARGET_SPARC
ed23fbd9 956#define SPARC64_STACK_BIAS 2047
93ac68bc 957
060366c5
FB		 958//#define DEBUG_WIN
959
2623cbaf
FB		 960/* WARNING: dealing with register windows _is_ complicated. More info
961 can be found at http://www.sics.se/~psm/sparcstack.html */
060366c5
FB		 962static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
963{
1a14026e 964 index = (index + cwp * 16) % (16 * env->nwindows);
060366c5
FB		 965 /* wrap handling : if cwp is on the last window, then we use the
966 registers 'after' the end */
1a14026e
BS		 967 if (index < 8 && env->cwp == env->nwindows - 1)
968 index += 16 * env->nwindows;
060366c5
FB		 969 return index;
970}
971
2623cbaf
FB		 972/* save the register window 'cwp1' */
973static inline void save_window_offset(CPUSPARCState *env, int cwp1)
060366c5 974{
2623cbaf 975 unsigned int i;
992f48a0 976 abi_ulong sp_ptr;
3b46e624 977
53a5960a 978 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 979#ifdef TARGET_SPARC64
980 if (sp_ptr & 3)
981 sp_ptr += SPARC64_STACK_BIAS;
982#endif
060366c5 983#if defined(DEBUG_WIN)
2daf0284
BS		 984 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
985 sp_ptr, cwp1);
060366c5 986#endif
2623cbaf 987 for(i = 0; i < 16; i++) {
2f619698
FB		 988 /* FIXME - what to do if put_user() fails? */
989 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 990 sp_ptr += sizeof(abi_ulong);
2623cbaf 991 }
060366c5
FB		 992}
993
994static void save_window(CPUSPARCState *env)
995{
5ef54116 996#ifndef TARGET_SPARC64
2623cbaf 997 unsigned int new_wim;
1a14026e
BS		 998 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
999 ((1LL << env->nwindows) - 1);
1000 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
2623cbaf 1001 env->wim = new_wim;
5ef54116 1002#else
1a14026e 1003 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
5ef54116
FB		 1004 env->cansave++;
1005 env->canrestore--;
1006#endif
060366c5
FB		 1007}
1008
1009static void restore_window(CPUSPARCState *env)
1010{
eda52953
BS		 1011#ifndef TARGET_SPARC64
1012 unsigned int new_wim;
1013#endif
1014 unsigned int i, cwp1;
992f48a0 1015 abi_ulong sp_ptr;
3b46e624 1016
eda52953 1017#ifndef TARGET_SPARC64
1a14026e
BS		 1018 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
1019 ((1LL << env->nwindows) - 1);
eda52953 1020#endif
3b46e624 1021
060366c5 1022 /* restore the invalid window */
1a14026e 1023 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
53a5960a 1024 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 1025#ifdef TARGET_SPARC64
1026 if (sp_ptr & 3)
1027 sp_ptr += SPARC64_STACK_BIAS;
1028#endif
060366c5 1029#if defined(DEBUG_WIN)
2daf0284
BS		 1030 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
1031 sp_ptr, cwp1);
060366c5 1032#endif
2623cbaf 1033 for(i = 0; i < 16; i++) {
2f619698
FB		 1034 /* FIXME - what to do if get_user() fails? */
1035 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 1036 sp_ptr += sizeof(abi_ulong);
2623cbaf 1037 }
5ef54116
FB		 1038#ifdef TARGET_SPARC64
1039 env->canrestore++;
1a14026e
BS		 1040 if (env->cleanwin < env->nwindows - 1)
1041 env->cleanwin++;
5ef54116 1042 env->cansave--;
eda52953
BS		 1043#else
1044 env->wim = new_wim;
5ef54116 1045#endif
060366c5
FB		 1046}
1047
1048static void flush_windows(CPUSPARCState *env)
1049{
1050 int offset, cwp1;
2623cbaf
FB		 1051
1052 offset = 1;
060366c5
FB		 1053 for(;;) {
1054 /* if restore would invoke restore_window(), then we can stop */
1a14026e 1055 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
eda52953 1056#ifndef TARGET_SPARC64
060366c5
FB		 1057 if (env->wim & (1 << cwp1))
1058 break;
eda52953
BS		 1059#else
1060 if (env->canrestore == 0)
1061 break;
1062 env->cansave++;
1063 env->canrestore--;
1064#endif
2623cbaf 1065 save_window_offset(env, cwp1);
060366c5
FB		 1066 offset++;
1067 }
1a14026e 1068 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
eda52953
BS		 1069#ifndef TARGET_SPARC64
1070 /* set wim so that restore will reload the registers */
2623cbaf 1071 env->wim = 1 << cwp1;
eda52953 1072#endif
2623cbaf
FB		 1073#if defined(DEBUG_WIN)
1074 printf("flush_windows: nb=%d\n", offset - 1);
80a9d035 1075#endif
2623cbaf 1076}
060366c5 1077
93ac68bc
FB		 1078void cpu_loop (CPUSPARCState *env)
1079{
878096ee 1080 CPUState *cs = CPU(sparc_env_get_cpu(env));
2cc20260
RH		 1081 int trapnr;
1082 abi_long ret;
c227f099 1083 target_siginfo_t info;
3b46e624 1084
060366c5 1085 while (1) {
b040bc9c 1086 cpu_exec_start(cs);
8642c1b8 1087 trapnr = cpu_exec(cs);
b040bc9c 1088 cpu_exec_end(cs);
d148d90e 1089 process_queued_cpu_work(cs);
3b46e624 1090
20132b96
RH		 1091 /* Compute PSR before exposing state. */
1092 if (env->cc_op != CC_OP_FLAGS) {
1093 cpu_get_psr(env);
1094 }
1095
060366c5 1096 switch (trapnr) {
5ef54116 1097#ifndef TARGET_SPARC64
5fafdf24 1098 case 0x88:
060366c5 1099 case 0x90:
5ef54116 1100#else
cb33da57 1101 case 0x110:
5ef54116
FB		 1102 case 0x16d:
1103#endif
060366c5 1104 ret = do_syscall (env, env->gregs[1],
5fafdf24
TS		 1105 env->regwptr[0], env->regwptr[1],
1106 env->regwptr[2], env->regwptr[3],
5945cfcb
PM		 1107 env->regwptr[4], env->regwptr[5],
1108 0, 0);
c0bea68f
TB		 1109 if (ret == -TARGET_ERESTARTSYS || ret == -TARGET_QEMU_ESIGRETURN) {
1110 break;
1111 }
2cc20260 1112 if ((abi_ulong)ret >= (abi_ulong)(-515)) {
992f48a0 1113#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 1114 env->xcc |= PSR_CARRY;
1115#else
060366c5 1116 env->psr |= PSR_CARRY;
27908725 1117#endif
060366c5
FB		 1118 ret = -ret;
1119 } else {
992f48a0 1120#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 1121 env->xcc &= ~PSR_CARRY;
1122#else
060366c5 1123 env->psr &= ~PSR_CARRY;
27908725 1124#endif
060366c5
FB		 1125 }
1126 env->regwptr[0] = ret;
1127 /* next instruction */
1128 env->pc = env->npc;
1129 env->npc = env->npc + 4;
1130 break;
1131 case 0x83: /* flush windows */
992f48a0
BS		 1132#ifdef TARGET_ABI32
1133 case 0x103:
1134#endif
2623cbaf 1135 flush_windows(env);
060366c5
FB		 1136 /* next instruction */
1137 env->pc = env->npc;
1138 env->npc = env->npc + 4;
1139 break;
3475187d 1140#ifndef TARGET_SPARC64
060366c5
FB		 1141 case TT_WIN_OVF: /* window overflow */
1142 save_window(env);
1143 break;
1144 case TT_WIN_UNF: /* window underflow */
1145 restore_window(env);
1146 break;
61ff6f58
FB		 1147 case TT_TFAULT:
1148 case TT_DFAULT:
1149 {
59f7182f 1150 info.si_signo = TARGET_SIGSEGV;
61ff6f58
FB		 1151 info.si_errno = 0;
1152 /* XXX: check env->error_code */
1153 info.si_code = TARGET_SEGV_MAPERR;
1154 info._sifields._sigfault._addr = env->mmuregs[4];
9d2803f7 1155 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
61ff6f58
FB		 1156 }
1157 break;
3475187d 1158#else
5ef54116
FB		 1159 case TT_SPILL: /* window overflow */
1160 save_window(env);
1161 break;
1162 case TT_FILL: /* window underflow */
1163 restore_window(env);
1164 break;
7f84a729
BS		 1165 case TT_TFAULT:
1166 case TT_DFAULT:
1167 {
59f7182f 1168 info.si_signo = TARGET_SIGSEGV;
7f84a729
BS		 1169 info.si_errno = 0;
1170 /* XXX: check env->error_code */
1171 info.si_code = TARGET_SEGV_MAPERR;
1172 if (trapnr == TT_DFAULT)
96df2bc9 1173 info._sifields._sigfault._addr = env->dmmu.mmuregs[4];
7f84a729 1174 else
8194f35a 1175 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
9d2803f7 1176 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
7f84a729
BS		 1177 }
1178 break;
27524dc3 1179#ifndef TARGET_ABI32
5bfb56b2
BS		 1180 case 0x16e:
1181 flush_windows(env);
1182 sparc64_get_context(env);
1183 break;
1184 case 0x16f:
1185 flush_windows(env);
1186 sparc64_set_context(env);
1187 break;
27524dc3 1188#endif
3475187d 1189#endif
48dc41eb
FB		 1190 case EXCP_INTERRUPT:
1191 /* just indicate that signals should be handled asap */
1192 break;
75f22e4e
RH		 1193 case TT_ILL_INSN:
1194 {
1195 info.si_signo = TARGET_SIGILL;
1196 info.si_errno = 0;
1197 info.si_code = TARGET_ILL_ILLOPC;
1198 info._sifields._sigfault._addr = env->pc;
9d2803f7 1199 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
75f22e4e
RH		 1200 }
1201 break;
1fddef4b
FB		 1202 case EXCP_DEBUG:
1203 {
1204 int sig;
1205
db6b81d4 1206 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
1fddef4b
FB		 1207 if (sig)
1208 {
1209 info.si_signo = sig;
1210 info.si_errno = 0;
1211 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 1212 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1fddef4b
FB		 1213 }
1214 }
1215 break;
fdbc2b57
RH		 1216 case EXCP_ATOMIC:
1217 cpu_exec_step_atomic(cs);
1218 break;
060366c5
FB		 1219 default:
1220 printf ("Unhandled trap: 0x%x\n", trapnr);
878096ee 1221 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 1222 exit(EXIT_FAILURE);
060366c5
FB		 1223 }
1224 process_pending_signals (env);
1225 }
93ac68bc
FB		 1226}
1227
1228#endif
1229
67867308 1230#ifdef TARGET_PPC
05390248 1231static inline uint64_t cpu_ppc_get_tb(CPUPPCState *env)
9fddaa0c 1232{
4a7428c5 1233 return cpu_get_host_ticks();
9fddaa0c 1234}
3b46e624 1235
05390248 1236uint64_t cpu_ppc_load_tbl(CPUPPCState *env)
9fddaa0c 1237{
e3ea6529 1238 return cpu_ppc_get_tb(env);
9fddaa0c 1239}
3b46e624 1240
05390248 1241uint32_t cpu_ppc_load_tbu(CPUPPCState *env)
9fddaa0c
FB		 1242{
1243 return cpu_ppc_get_tb(env) >> 32;
1244}
3b46e624 1245
05390248 1246uint64_t cpu_ppc_load_atbl(CPUPPCState *env)
9fddaa0c 1247{
b711de95 1248 return cpu_ppc_get_tb(env);
9fddaa0c 1249}
5fafdf24 1250
05390248 1251uint32_t cpu_ppc_load_atbu(CPUPPCState *env)
9fddaa0c 1252{
a062e36c 1253 return cpu_ppc_get_tb(env) >> 32;
9fddaa0c 1254}
76a66253 1255
05390248 1256uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env)
76a66253
JM		 1257__attribute__ (( alias ("cpu_ppc_load_tbu") ));
1258
05390248 1259uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env)
9fddaa0c 1260{
76a66253 1261 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
9fddaa0c 1262}
76a66253 1263
a750fc0b 1264/* XXX: to be fixed */
73b01960 1265int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp)
a750fc0b
JM		 1266{
1267 return -1;
1268}
1269
73b01960 1270int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val)
a750fc0b
JM		 1271{
1272 return -1;
1273}
1274
56f066bb
NF		 1275static int do_store_exclusive(CPUPPCState *env)
1276{
1277 target_ulong addr;
1278 target_ulong page_addr;
e22c357b 1279 target_ulong val, val2 __attribute__((unused)) = 0;
56f066bb
NF		 1280 int flags;
1281 int segv = 0;
1282
1283 addr = env->reserve_ea;
1284 page_addr = addr & TARGET_PAGE_MASK;
1285 start_exclusive();
1286 mmap_lock();
1287 flags = page_get_flags(page_addr);
1288 if ((flags & PAGE_READ) == 0) {
1289 segv = 1;
1290 } else {
1291 int reg = env->reserve_info & 0x1f;
4b1daa72 1292 int size = env->reserve_info >> 5;
56f066bb
NF		 1293 int stored = 0;
1294
1295 if (addr == env->reserve_addr) {
1296 switch (size) {
1297 case 1: segv = get_user_u8(val, addr); break;
1298 case 2: segv = get_user_u16(val, addr); break;
1299 case 4: segv = get_user_u32(val, addr); break;
1300#if defined(TARGET_PPC64)
1301 case 8: segv = get_user_u64(val, addr); break;
27b95bfe
TM		 1302 case 16: {
1303 segv = get_user_u64(val, addr);
1304 if (!segv) {
1305 segv = get_user_u64(val2, addr + 8);
1306 }
1307 break;
1308 }
56f066bb
NF		 1309#endif
1310 default: abort();
1311 }
1312 if (!segv && val == env->reserve_val) {
1313 val = env->gpr[reg];
1314 switch (size) {
1315 case 1: segv = put_user_u8(val, addr); break;
1316 case 2: segv = put_user_u16(val, addr); break;
1317 case 4: segv = put_user_u32(val, addr); break;
1318#if defined(TARGET_PPC64)
1319 case 8: segv = put_user_u64(val, addr); break;
27b95bfe
TM		 1320 case 16: {
1321 if (val2 == env->reserve_val2) {
e22c357b
DK		 1322 if (msr_le) {
1323 val2 = val;
1324 val = env->gpr[reg+1];
1325 } else {
1326 val2 = env->gpr[reg+1];
1327 }
27b95bfe
TM		 1328 segv = put_user_u64(val, addr);
1329 if (!segv) {
1330 segv = put_user_u64(val2, addr + 8);
1331 }
1332 }
1333 break;
1334 }
56f066bb
NF		 1335#endif
1336 default: abort();
1337 }
1338 if (!segv) {
1339 stored = 1;
1340 }
1341 }
1342 }
1343 env->crf[0] = (stored << 1) | xer_so;
1344 env->reserve_addr = (target_ulong)-1;
1345 }
1346 if (!segv) {
1347 env->nip += 4;
1348 }
1349 mmap_unlock();
1350 end_exclusive();
1351 return segv;
1352}
1353
67867308
FB		 1354void cpu_loop(CPUPPCState *env)
1355{
0315c31c 1356 CPUState *cs = CPU(ppc_env_get_cpu(env));
c227f099 1357 target_siginfo_t info;
61190b14 1358 int trapnr;
9e0e2f96 1359 target_ulong ret;
3b46e624 1360
67867308 1361 for(;;) {
0315c31c 1362 cpu_exec_start(cs);
8642c1b8 1363 trapnr = cpu_exec(cs);
0315c31c 1364 cpu_exec_end(cs);
d148d90e
SF		 1365 process_queued_cpu_work(cs);
1366
67867308 1367 switch(trapnr) {
e1833e1f
JM		 1368 case POWERPC_EXCP_NONE:
1369 /* Just go on */
67867308 1370 break;
e1833e1f 1371 case POWERPC_EXCP_CRITICAL: /* Critical input */
a47dddd7 1372 cpu_abort(cs, "Critical interrupt while in user mode. "
e1833e1f 1373 "Aborting\n");
61190b14 1374 break;
e1833e1f 1375 case POWERPC_EXCP_MCHECK: /* Machine check exception */
a47dddd7 1376 cpu_abort(cs, "Machine check exception while in user mode. "
e1833e1f
JM		 1377 "Aborting\n");
1378 break;
1379 case POWERPC_EXCP_DSI: /* Data storage exception */
e1833e1f 1380 /* XXX: check this. Seems bugged */
2be0071f
FB		 1381 switch (env->error_code & 0xFF000000) {
1382 case 0x40000000:
ba4a8df8 1383 case 0x42000000:
61190b14
FB		 1384 info.si_signo = TARGET_SIGSEGV;
1385 info.si_errno = 0;
1386 info.si_code = TARGET_SEGV_MAPERR;
1387 break;
2be0071f 1388 case 0x04000000:
61190b14
FB		 1389 info.si_signo = TARGET_SIGILL;
1390 info.si_errno = 0;
1391 info.si_code = TARGET_ILL_ILLADR;
1392 break;
2be0071f 1393 case 0x08000000:
61190b14
FB		 1394 info.si_signo = TARGET_SIGSEGV;
1395 info.si_errno = 0;
1396 info.si_code = TARGET_SEGV_ACCERR;
1397 break;
61190b14
FB		 1398 default:
1399 /* Let's send a regular segfault... */
e1833e1f
JM		 1400 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1401 env->error_code);
61190b14
FB		 1402 info.si_signo = TARGET_SIGSEGV;
1403 info.si_errno = 0;
1404 info.si_code = TARGET_SEGV_MAPERR;
1405 break;
1406 }
67867308 1407 info._sifields._sigfault._addr = env->nip;
9d2803f7 1408 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
67867308 1409 break;
e1833e1f 1410 case POWERPC_EXCP_ISI: /* Instruction storage exception */
e1833e1f 1411 /* XXX: check this */
2be0071f
FB		 1412 switch (env->error_code & 0xFF000000) {
1413 case 0x40000000:
61190b14 1414 info.si_signo = TARGET_SIGSEGV;
67867308 1415 info.si_errno = 0;
61190b14
FB		 1416 info.si_code = TARGET_SEGV_MAPERR;
1417 break;
2be0071f
FB		 1418 case 0x10000000:
1419 case 0x08000000:
61190b14
FB		 1420 info.si_signo = TARGET_SIGSEGV;
1421 info.si_errno = 0;
1422 info.si_code = TARGET_SEGV_ACCERR;
1423 break;
1424 default:
1425 /* Let's send a regular segfault... */
e1833e1f
JM		 1426 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1427 env->error_code);
61190b14
FB		 1428 info.si_signo = TARGET_SIGSEGV;
1429 info.si_errno = 0;
1430 info.si_code = TARGET_SEGV_MAPERR;
1431 break;
1432 }
1433 info._sifields._sigfault._addr = env->nip - 4;
9d2803f7 1434 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
67867308 1435 break;
e1833e1f 1436 case POWERPC_EXCP_EXTERNAL: /* External input */
a47dddd7 1437 cpu_abort(cs, "External interrupt while in user mode. "
e1833e1f
JM		 1438 "Aborting\n");
1439 break;
1440 case POWERPC_EXCP_ALIGN: /* Alignment exception */
e1833e1f 1441 /* XXX: check this */
61190b14 1442 info.si_signo = TARGET_SIGBUS;
67867308 1443 info.si_errno = 0;
61190b14 1444 info.si_code = TARGET_BUS_ADRALN;
6bb9a0a9 1445 info._sifields._sigfault._addr = env->nip;
9d2803f7 1446 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
67867308 1447 break;
e1833e1f 1448 case POWERPC_EXCP_PROGRAM: /* Program exception */
9b2fadda 1449 case POWERPC_EXCP_HV_EMU: /* HV emulation */
e1833e1f 1450 /* XXX: check this */
61190b14 1451 switch (env->error_code & ~0xF) {
e1833e1f 1452 case POWERPC_EXCP_FP:
61190b14
FB		 1453 info.si_signo = TARGET_SIGFPE;
1454 info.si_errno = 0;
1455 switch (env->error_code & 0xF) {
e1833e1f 1456 case POWERPC_EXCP_FP_OX:
61190b14
FB		 1457 info.si_code = TARGET_FPE_FLTOVF;
1458 break;
e1833e1f 1459 case POWERPC_EXCP_FP_UX:
61190b14
FB		 1460 info.si_code = TARGET_FPE_FLTUND;
1461 break;
e1833e1f
JM		 1462 case POWERPC_EXCP_FP_ZX:
1463 case POWERPC_EXCP_FP_VXZDZ:
61190b14
FB		 1464 info.si_code = TARGET_FPE_FLTDIV;
1465 break;
e1833e1f 1466 case POWERPC_EXCP_FP_XX:
61190b14
FB		 1467 info.si_code = TARGET_FPE_FLTRES;
1468 break;
e1833e1f 1469 case POWERPC_EXCP_FP_VXSOFT:
61190b14
FB		 1470 info.si_code = TARGET_FPE_FLTINV;
1471 break;
7c58044c 1472 case POWERPC_EXCP_FP_VXSNAN:
e1833e1f
JM		 1473 case POWERPC_EXCP_FP_VXISI:
1474 case POWERPC_EXCP_FP_VXIDI:
1475 case POWERPC_EXCP_FP_VXIMZ:
1476 case POWERPC_EXCP_FP_VXVC:
1477 case POWERPC_EXCP_FP_VXSQRT:
1478 case POWERPC_EXCP_FP_VXCVI:
61190b14
FB		 1479 info.si_code = TARGET_FPE_FLTSUB;
1480 break;
1481 default:
e1833e1f
JM		 1482 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1483 env->error_code);
1484 break;
61190b14 1485 }
e1833e1f
JM		 1486 break;
1487 case POWERPC_EXCP_INVAL:
61190b14
FB		 1488 info.si_signo = TARGET_SIGILL;
1489 info.si_errno = 0;
1490 switch (env->error_code & 0xF) {
e1833e1f 1491 case POWERPC_EXCP_INVAL_INVAL:
61190b14
FB		 1492 info.si_code = TARGET_ILL_ILLOPC;
1493 break;
e1833e1f 1494 case POWERPC_EXCP_INVAL_LSWX:
a750fc0b 1495 info.si_code = TARGET_ILL_ILLOPN;
61190b14 1496 break;
e1833e1f 1497 case POWERPC_EXCP_INVAL_SPR:
61190b14
FB		 1498 info.si_code = TARGET_ILL_PRVREG;
1499 break;
e1833e1f 1500 case POWERPC_EXCP_INVAL_FP:
61190b14
FB		 1501 info.si_code = TARGET_ILL_COPROC;
1502 break;
1503 default:
e1833e1f
JM		 1504 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1505 env->error_code & 0xF);
61190b14
FB		 1506 info.si_code = TARGET_ILL_ILLADR;
1507 break;
1508 }
1509 break;
e1833e1f 1510 case POWERPC_EXCP_PRIV:
61190b14
FB		 1511 info.si_signo = TARGET_SIGILL;
1512 info.si_errno = 0;
1513 switch (env->error_code & 0xF) {
e1833e1f 1514 case POWERPC_EXCP_PRIV_OPC:
61190b14
FB		 1515 info.si_code = TARGET_ILL_PRVOPC;
1516 break;
e1833e1f 1517 case POWERPC_EXCP_PRIV_REG:
61190b14 1518 info.si_code = TARGET_ILL_PRVREG;
e1833e1f 1519 break;
61190b14 1520 default:
e1833e1f
JM		 1521 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1522 env->error_code & 0xF);
61190b14
FB		 1523 info.si_code = TARGET_ILL_PRVOPC;
1524 break;
1525 }
1526 break;
e1833e1f 1527 case POWERPC_EXCP_TRAP:
a47dddd7 1528 cpu_abort(cs, "Tried to call a TRAP\n");
e1833e1f 1529 break;
61190b14
FB		 1530 default:
1531 /* Should not happen ! */
a47dddd7 1532 cpu_abort(cs, "Unknown program exception (%02x)\n",
e1833e1f
JM		 1533 env->error_code);
1534 break;
61190b14 1535 }
bd6fefe7 1536 info._sifields._sigfault._addr = env->nip;
9d2803f7 1537 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
67867308 1538 break;
e1833e1f 1539 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
61190b14 1540 info.si_signo = TARGET_SIGILL;
67867308 1541 info.si_errno = 0;
61190b14 1542 info.si_code = TARGET_ILL_COPROC;
bd6fefe7 1543 info._sifields._sigfault._addr = env->nip;
9d2803f7 1544 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
67867308 1545 break;
e1833e1f 1546 case POWERPC_EXCP_SYSCALL: /* System call exception */
a47dddd7 1547 cpu_abort(cs, "Syscall exception while in user mode. "
e1833e1f 1548 "Aborting\n");
61190b14 1549 break;
e1833e1f 1550 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
e1833e1f
JM		 1551 info.si_signo = TARGET_SIGILL;
1552 info.si_errno = 0;
1553 info.si_code = TARGET_ILL_COPROC;
bd6fefe7 1554 info._sifields._sigfault._addr = env->nip;
9d2803f7 1555 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
61190b14 1556 break;
e1833e1f 1557 case POWERPC_EXCP_DECR: /* Decrementer exception */
a47dddd7 1558 cpu_abort(cs, "Decrementer interrupt while in user mode. "
e1833e1f 1559 "Aborting\n");
61190b14 1560 break;
e1833e1f 1561 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
a47dddd7 1562 cpu_abort(cs, "Fix interval timer interrupt while in user mode. "
e1833e1f
JM		 1563 "Aborting\n");
1564 break;
1565 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
a47dddd7 1566 cpu_abort(cs, "Watchdog timer interrupt while in user mode. "
e1833e1f
JM		 1567 "Aborting\n");
1568 break;
1569 case POWERPC_EXCP_DTLB: /* Data TLB error */
a47dddd7 1570 cpu_abort(cs, "Data TLB exception while in user mode. "
e1833e1f
JM		 1571 "Aborting\n");
1572 break;
1573 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
a47dddd7 1574 cpu_abort(cs, "Instruction TLB exception while in user mode. "
e1833e1f
JM		 1575 "Aborting\n");
1576 break;
e1833e1f 1577 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
e1833e1f
JM		 1578 info.si_signo = TARGET_SIGILL;
1579 info.si_errno = 0;
1580 info.si_code = TARGET_ILL_COPROC;
bd6fefe7 1581 info._sifields._sigfault._addr = env->nip;
9d2803f7 1582 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
e1833e1f
JM		 1583 break;
1584 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
a47dddd7 1585 cpu_abort(cs, "Embedded floating-point data IRQ not handled\n");
e1833e1f
JM		 1586 break;
1587 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
a47dddd7 1588 cpu_abort(cs, "Embedded floating-point round IRQ not handled\n");
e1833e1f
JM		 1589 break;
1590 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
a47dddd7 1591 cpu_abort(cs, "Performance monitor exception not handled\n");
e1833e1f
JM		 1592 break;
1593 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
a47dddd7 1594 cpu_abort(cs, "Doorbell interrupt while in user mode. "
e1833e1f
JM		 1595 "Aborting\n");
1596 break;
1597 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
a47dddd7 1598 cpu_abort(cs, "Doorbell critical interrupt while in user mode. "
e1833e1f
JM		 1599 "Aborting\n");
1600 break;
1601 case POWERPC_EXCP_RESET: /* System reset exception */
a47dddd7 1602 cpu_abort(cs, "Reset interrupt while in user mode. "
e1833e1f
JM		 1603 "Aborting\n");
1604 break;
e1833e1f 1605 case POWERPC_EXCP_DSEG: /* Data segment exception */
a47dddd7 1606 cpu_abort(cs, "Data segment exception while in user mode. "
e1833e1f
JM		 1607 "Aborting\n");
1608 break;
1609 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
a47dddd7 1610 cpu_abort(cs, "Instruction segment exception "
e1833e1f
JM		 1611 "while in user mode. Aborting\n");
1612 break;
e85e7c6e 1613 /* PowerPC 64 with hypervisor mode support */
e1833e1f 1614 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
a47dddd7 1615 cpu_abort(cs, "Hypervisor decrementer interrupt "
e1833e1f
JM		 1616 "while in user mode. Aborting\n");
1617 break;
e1833e1f
JM		 1618 case POWERPC_EXCP_TRACE: /* Trace exception */
1619 /* Nothing to do:
1620 * we use this exception to emulate step-by-step execution mode.
1621 */
1622 break;
e85e7c6e 1623 /* PowerPC 64 with hypervisor mode support */
e1833e1f 1624 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
a47dddd7 1625 cpu_abort(cs, "Hypervisor data storage exception "
e1833e1f
JM		 1626 "while in user mode. Aborting\n");
1627 break;
1628 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
a47dddd7 1629 cpu_abort(cs, "Hypervisor instruction storage exception "
e1833e1f
JM		 1630 "while in user mode. Aborting\n");
1631 break;
1632 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
a47dddd7 1633 cpu_abort(cs, "Hypervisor data segment exception "
e1833e1f
JM		 1634 "while in user mode. Aborting\n");
1635 break;
1636 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
a47dddd7 1637 cpu_abort(cs, "Hypervisor instruction segment exception "
e1833e1f
JM		 1638 "while in user mode. Aborting\n");
1639 break;
e1833e1f 1640 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
e1833e1f
JM		 1641 info.si_signo = TARGET_SIGILL;
1642 info.si_errno = 0;
1643 info.si_code = TARGET_ILL_COPROC;
bd6fefe7 1644 info._sifields._sigfault._addr = env->nip;
9d2803f7 1645 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
e1833e1f
JM		 1646 break;
1647 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
a47dddd7 1648 cpu_abort(cs, "Programmable interval timer interrupt "
e1833e1f
JM		 1649 "while in user mode. Aborting\n");
1650 break;
1651 case POWERPC_EXCP_IO: /* IO error exception */
a47dddd7 1652 cpu_abort(cs, "IO error exception while in user mode. "
e1833e1f
JM		 1653 "Aborting\n");
1654 break;
1655 case POWERPC_EXCP_RUNM: /* Run mode exception */
a47dddd7 1656 cpu_abort(cs, "Run mode exception while in user mode. "
e1833e1f
JM		 1657 "Aborting\n");
1658 break;
1659 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
a47dddd7 1660 cpu_abort(cs, "Emulation trap exception not handled\n");
e1833e1f
JM		 1661 break;
1662 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
a47dddd7 1663 cpu_abort(cs, "Instruction fetch TLB exception "
e1833e1f
JM		 1664 "while in user-mode. Aborting");
1665 break;
1666 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
a47dddd7 1667 cpu_abort(cs, "Data load TLB exception while in user-mode. "
e1833e1f
JM		 1668 "Aborting");
1669 break;
1670 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
a47dddd7 1671 cpu_abort(cs, "Data store TLB exception while in user-mode. "
e1833e1f
JM		 1672 "Aborting");
1673 break;
1674 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
a47dddd7 1675 cpu_abort(cs, "Floating-point assist exception not handled\n");
e1833e1f
JM		 1676 break;
1677 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
a47dddd7 1678 cpu_abort(cs, "Instruction address breakpoint exception "
e1833e1f
JM		 1679 "not handled\n");
1680 break;
1681 case POWERPC_EXCP_SMI: /* System management interrupt */
a47dddd7 1682 cpu_abort(cs, "System management interrupt while in user mode. "
e1833e1f
JM		 1683 "Aborting\n");
1684 break;
1685 case POWERPC_EXCP_THERM: /* Thermal interrupt */
a47dddd7 1686 cpu_abort(cs, "Thermal interrupt interrupt while in user mode. "
e1833e1f
JM		 1687 "Aborting\n");
1688 break;
1689 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
a47dddd7 1690 cpu_abort(cs, "Performance monitor exception not handled\n");
e1833e1f
JM		 1691 break;
1692 case POWERPC_EXCP_VPUA: /* Vector assist exception */
a47dddd7 1693 cpu_abort(cs, "Vector assist exception not handled\n");
e1833e1f
JM		 1694 break;
1695 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
a47dddd7 1696 cpu_abort(cs, "Soft patch exception not handled\n");
e1833e1f
JM		 1697 break;
1698 case POWERPC_EXCP_MAINT: /* Maintenance exception */
a47dddd7 1699 cpu_abort(cs, "Maintenance exception while in user mode. "
e1833e1f
JM		 1700 "Aborting\n");
1701 break;
1702 case POWERPC_EXCP_STOP: /* stop translation */
1703 /* We did invalidate the instruction cache. Go on */
1704 break;
1705 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1706 /* We just stopped because of a branch. Go on */
1707 break;
1708 case POWERPC_EXCP_SYSCALL_USER:
1709 /* system call in user-mode emulation */
1710 /* WARNING:
1711 * PPC ABI uses overflow flag in cr0 to signal an error
1712 * in syscalls.
1713 */
e1833e1f
JM		 1714 env->crf[0] &= ~0x1;
1715 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1716 env->gpr[5], env->gpr[6], env->gpr[7],
5945cfcb 1717 env->gpr[8], 0, 0);
6db9d00e 1718 if (ret == -TARGET_ERESTARTSYS) {
6db9d00e
TB		 1719 break;
1720 }
9e0e2f96 1721 if (ret == (target_ulong)(-TARGET_QEMU_ESIGRETURN)) {
bcd4933a
NF		 1722 /* Returning from a successful sigreturn syscall.
1723 Avoid corrupting register state. */
1724 break;
1725 }
95cda4c4 1726 env->nip += 4;
9e0e2f96 1727 if (ret > (target_ulong)(-515)) {
e1833e1f
JM		 1728 env->crf[0] |= 0x1;
1729 ret = -ret;
61190b14 1730 }
e1833e1f 1731 env->gpr[3] = ret;
e1833e1f 1732 break;
56f066bb
NF		 1733 case POWERPC_EXCP_STCX:
1734 if (do_store_exclusive(env)) {
1735 info.si_signo = TARGET_SIGSEGV;
1736 info.si_errno = 0;
1737 info.si_code = TARGET_SEGV_MAPERR;
1738 info._sifields._sigfault._addr = env->nip;
9d2803f7 1739 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
56f066bb
NF		 1740 }
1741 break;
71f75756
AJ		 1742 case EXCP_DEBUG:
1743 {
1744 int sig;
1745
db6b81d4 1746 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
71f75756
AJ		 1747 if (sig) {
1748 info.si_signo = sig;
1749 info.si_errno = 0;
1750 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 1751 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
71f75756
AJ		 1752 }
1753 }
1754 break;
56ba31ff
JM		 1755 case EXCP_INTERRUPT:
1756 /* just indicate that signals should be handled asap */
1757 break;
fdbc2b57
RH		 1758 case EXCP_ATOMIC:
1759 cpu_exec_step_atomic(cs);
1760 break;
e1833e1f 1761 default:
8223f345 1762 cpu_abort(cs, "Unknown exception 0x%x. Aborting\n", trapnr);
e1833e1f 1763 break;
67867308
FB		 1764 }
1765 process_pending_signals(env);
1766 }
1767}
1768#endif
1769
048f6b4d
FB		 1770#ifdef TARGET_MIPS
1771
ff4f7382
RH		 1772# ifdef TARGET_ABI_MIPSO32
1773# define MIPS_SYS(name, args) args,
048f6b4d 1774static const uint8_t mips_syscall_args[] = {
29fb0f25 1775 MIPS_SYS(sys_syscall , 8) /* 4000 */
048f6b4d
FB		 1776 MIPS_SYS(sys_exit , 1)
1777 MIPS_SYS(sys_fork , 0)
1778 MIPS_SYS(sys_read , 3)
1779 MIPS_SYS(sys_write , 3)
1780 MIPS_SYS(sys_open , 3) /* 4005 */
1781 MIPS_SYS(sys_close , 1)
1782 MIPS_SYS(sys_waitpid , 3)
1783 MIPS_SYS(sys_creat , 2)
1784 MIPS_SYS(sys_link , 2)
1785 MIPS_SYS(sys_unlink , 1) /* 4010 */
1786 MIPS_SYS(sys_execve , 0)
1787 MIPS_SYS(sys_chdir , 1)
1788 MIPS_SYS(sys_time , 1)
1789 MIPS_SYS(sys_mknod , 3)
1790 MIPS_SYS(sys_chmod , 2) /* 4015 */
1791 MIPS_SYS(sys_lchown , 3)
1792 MIPS_SYS(sys_ni_syscall , 0)
1793 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1794 MIPS_SYS(sys_lseek , 3)
1795 MIPS_SYS(sys_getpid , 0) /* 4020 */
1796 MIPS_SYS(sys_mount , 5)
868e34d7 1797 MIPS_SYS(sys_umount , 1)
048f6b4d
FB		 1798 MIPS_SYS(sys_setuid , 1)
1799 MIPS_SYS(sys_getuid , 0)
1800 MIPS_SYS(sys_stime , 1) /* 4025 */
1801 MIPS_SYS(sys_ptrace , 4)
1802 MIPS_SYS(sys_alarm , 1)
1803 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1804 MIPS_SYS(sys_pause , 0)
1805 MIPS_SYS(sys_utime , 2) /* 4030 */
1806 MIPS_SYS(sys_ni_syscall , 0)
1807 MIPS_SYS(sys_ni_syscall , 0)
1808 MIPS_SYS(sys_access , 2)
1809 MIPS_SYS(sys_nice , 1)
1810 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1811 MIPS_SYS(sys_sync , 0)
1812 MIPS_SYS(sys_kill , 2)
1813 MIPS_SYS(sys_rename , 2)
1814 MIPS_SYS(sys_mkdir , 2)
1815 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1816 MIPS_SYS(sys_dup , 1)
1817 MIPS_SYS(sys_pipe , 0)
1818 MIPS_SYS(sys_times , 1)
1819 MIPS_SYS(sys_ni_syscall , 0)
1820 MIPS_SYS(sys_brk , 1) /* 4045 */
1821 MIPS_SYS(sys_setgid , 1)
1822 MIPS_SYS(sys_getgid , 0)
1823 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1824 MIPS_SYS(sys_geteuid , 0)
1825 MIPS_SYS(sys_getegid , 0) /* 4050 */
1826 MIPS_SYS(sys_acct , 0)
868e34d7 1827 MIPS_SYS(sys_umount2 , 2)
048f6b4d
FB		 1828 MIPS_SYS(sys_ni_syscall , 0)
1829 MIPS_SYS(sys_ioctl , 3)
1830 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1831 MIPS_SYS(sys_ni_syscall , 2)
1832 MIPS_SYS(sys_setpgid , 2)
1833 MIPS_SYS(sys_ni_syscall , 0)
1834 MIPS_SYS(sys_olduname , 1)
1835 MIPS_SYS(sys_umask , 1) /* 4060 */
1836 MIPS_SYS(sys_chroot , 1)
1837 MIPS_SYS(sys_ustat , 2)
1838 MIPS_SYS(sys_dup2 , 2)
1839 MIPS_SYS(sys_getppid , 0)
1840 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1841 MIPS_SYS(sys_setsid , 0)
1842 MIPS_SYS(sys_sigaction , 3)
1843 MIPS_SYS(sys_sgetmask , 0)
1844 MIPS_SYS(sys_ssetmask , 1)
1845 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1846 MIPS_SYS(sys_setregid , 2)
1847 MIPS_SYS(sys_sigsuspend , 0)
1848 MIPS_SYS(sys_sigpending , 1)
1849 MIPS_SYS(sys_sethostname , 2)
1850 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1851 MIPS_SYS(sys_getrlimit , 2)
1852 MIPS_SYS(sys_getrusage , 2)
1853 MIPS_SYS(sys_gettimeofday, 2)
1854 MIPS_SYS(sys_settimeofday, 2)
1855 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1856 MIPS_SYS(sys_setgroups , 2)
1857 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1858 MIPS_SYS(sys_symlink , 2)
1859 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1860 MIPS_SYS(sys_readlink , 3) /* 4085 */
1861 MIPS_SYS(sys_uselib , 1)
1862 MIPS_SYS(sys_swapon , 2)
1863 MIPS_SYS(sys_reboot , 3)
1864 MIPS_SYS(old_readdir , 3)
1865 MIPS_SYS(old_mmap , 6) /* 4090 */
1866 MIPS_SYS(sys_munmap , 2)
1867 MIPS_SYS(sys_truncate , 2)
1868 MIPS_SYS(sys_ftruncate , 2)
1869 MIPS_SYS(sys_fchmod , 2)
1870 MIPS_SYS(sys_fchown , 3) /* 4095 */
1871 MIPS_SYS(sys_getpriority , 2)
1872 MIPS_SYS(sys_setpriority , 3)
1873 MIPS_SYS(sys_ni_syscall , 0)
1874 MIPS_SYS(sys_statfs , 2)
1875 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1876 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1877 MIPS_SYS(sys_socketcall , 2)
1878 MIPS_SYS(sys_syslog , 3)
1879 MIPS_SYS(sys_setitimer , 3)
1880 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1881 MIPS_SYS(sys_newstat , 2)
1882 MIPS_SYS(sys_newlstat , 2)
1883 MIPS_SYS(sys_newfstat , 2)
1884 MIPS_SYS(sys_uname , 1)
1885 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1886 MIPS_SYS(sys_vhangup , 0)
1887 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1888 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1889 MIPS_SYS(sys_wait4 , 4)
1890 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1891 MIPS_SYS(sys_sysinfo , 1)
1892 MIPS_SYS(sys_ipc , 6)
1893 MIPS_SYS(sys_fsync , 1)
1894 MIPS_SYS(sys_sigreturn , 0)
18113962 1895 MIPS_SYS(sys_clone , 6) /* 4120 */
048f6b4d
FB		 1896 MIPS_SYS(sys_setdomainname, 2)
1897 MIPS_SYS(sys_newuname , 1)
1898 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1899 MIPS_SYS(sys_adjtimex , 1)
1900 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1901 MIPS_SYS(sys_sigprocmask , 3)
1902 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1903 MIPS_SYS(sys_init_module , 5)
1904 MIPS_SYS(sys_delete_module, 1)
1905 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1906 MIPS_SYS(sys_quotactl , 0)
1907 MIPS_SYS(sys_getpgid , 1)
1908 MIPS_SYS(sys_fchdir , 1)
1909 MIPS_SYS(sys_bdflush , 2)
1910 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1911 MIPS_SYS(sys_personality , 1)
1912 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1913 MIPS_SYS(sys_setfsuid , 1)
1914 MIPS_SYS(sys_setfsgid , 1)
1915 MIPS_SYS(sys_llseek , 5) /* 4140 */
1916 MIPS_SYS(sys_getdents , 3)
1917 MIPS_SYS(sys_select , 5)
1918 MIPS_SYS(sys_flock , 2)
1919 MIPS_SYS(sys_msync , 3)
1920 MIPS_SYS(sys_readv , 3) /* 4145 */
1921 MIPS_SYS(sys_writev , 3)
1922 MIPS_SYS(sys_cacheflush , 3)
1923 MIPS_SYS(sys_cachectl , 3)
1924 MIPS_SYS(sys_sysmips , 4)
1925 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1926 MIPS_SYS(sys_getsid , 1)
1927 MIPS_SYS(sys_fdatasync , 0)
1928 MIPS_SYS(sys_sysctl , 1)
1929 MIPS_SYS(sys_mlock , 2)
1930 MIPS_SYS(sys_munlock , 2) /* 4155 */
1931 MIPS_SYS(sys_mlockall , 1)
1932 MIPS_SYS(sys_munlockall , 0)
1933 MIPS_SYS(sys_sched_setparam, 2)
1934 MIPS_SYS(sys_sched_getparam, 2)
1935 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1936 MIPS_SYS(sys_sched_getscheduler, 1)
1937 MIPS_SYS(sys_sched_yield , 0)
1938 MIPS_SYS(sys_sched_get_priority_max, 1)
1939 MIPS_SYS(sys_sched_get_priority_min, 1)
1940 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1941 MIPS_SYS(sys_nanosleep, 2)
b0932e06 1942 MIPS_SYS(sys_mremap , 5)
048f6b4d
FB		 1943 MIPS_SYS(sys_accept , 3)
1944 MIPS_SYS(sys_bind , 3)
1945 MIPS_SYS(sys_connect , 3) /* 4170 */
1946 MIPS_SYS(sys_getpeername , 3)
1947 MIPS_SYS(sys_getsockname , 3)
1948 MIPS_SYS(sys_getsockopt , 5)
1949 MIPS_SYS(sys_listen , 2)
1950 MIPS_SYS(sys_recv , 4) /* 4175 */
1951 MIPS_SYS(sys_recvfrom , 6)
1952 MIPS_SYS(sys_recvmsg , 3)
1953 MIPS_SYS(sys_send , 4)
1954 MIPS_SYS(sys_sendmsg , 3)
1955 MIPS_SYS(sys_sendto , 6) /* 4180 */
1956 MIPS_SYS(sys_setsockopt , 5)
1957 MIPS_SYS(sys_shutdown , 2)
1958 MIPS_SYS(sys_socket , 3)
1959 MIPS_SYS(sys_socketpair , 4)
1960 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1961 MIPS_SYS(sys_getresuid , 3)
1962 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1963 MIPS_SYS(sys_poll , 3)
1964 MIPS_SYS(sys_nfsservctl , 3)
1965 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1966 MIPS_SYS(sys_getresgid , 3)
1967 MIPS_SYS(sys_prctl , 5)
1968 MIPS_SYS(sys_rt_sigreturn, 0)
1969 MIPS_SYS(sys_rt_sigaction, 4)
1970 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1971 MIPS_SYS(sys_rt_sigpending, 2)
1972 MIPS_SYS(sys_rt_sigtimedwait, 4)
1973 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1974 MIPS_SYS(sys_rt_sigsuspend, 0)
1975 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1976 MIPS_SYS(sys_pwrite64 , 6)
1977 MIPS_SYS(sys_chown , 3)
1978 MIPS_SYS(sys_getcwd , 2)
1979 MIPS_SYS(sys_capget , 2)
1980 MIPS_SYS(sys_capset , 2) /* 4205 */
053ebb27 1981 MIPS_SYS(sys_sigaltstack , 2)
048f6b4d
FB		 1982 MIPS_SYS(sys_sendfile , 4)
1983 MIPS_SYS(sys_ni_syscall , 0)
1984 MIPS_SYS(sys_ni_syscall , 0)
1985 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1986 MIPS_SYS(sys_truncate64 , 4)
1987 MIPS_SYS(sys_ftruncate64 , 4)
1988 MIPS_SYS(sys_stat64 , 2)
1989 MIPS_SYS(sys_lstat64 , 2)
1990 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1991 MIPS_SYS(sys_pivot_root , 2)
1992 MIPS_SYS(sys_mincore , 3)
1993 MIPS_SYS(sys_madvise , 3)
1994 MIPS_SYS(sys_getdents64 , 3)
1995 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1996 MIPS_SYS(sys_ni_syscall , 0)
1997 MIPS_SYS(sys_gettid , 0)
1998 MIPS_SYS(sys_readahead , 5)
1999 MIPS_SYS(sys_setxattr , 5)
2000 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
2001 MIPS_SYS(sys_fsetxattr , 5)
2002 MIPS_SYS(sys_getxattr , 4)
2003 MIPS_SYS(sys_lgetxattr , 4)
2004 MIPS_SYS(sys_fgetxattr , 4)
2005 MIPS_SYS(sys_listxattr , 3) /* 4230 */
2006 MIPS_SYS(sys_llistxattr , 3)
2007 MIPS_SYS(sys_flistxattr , 3)
2008 MIPS_SYS(sys_removexattr , 2)
2009 MIPS_SYS(sys_lremovexattr, 2)
2010 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
2011 MIPS_SYS(sys_tkill , 2)
2012 MIPS_SYS(sys_sendfile64 , 5)
43be1343 2013 MIPS_SYS(sys_futex , 6)
048f6b4d
FB		 2014 MIPS_SYS(sys_sched_setaffinity, 3)
2015 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
2016 MIPS_SYS(sys_io_setup , 2)
2017 MIPS_SYS(sys_io_destroy , 1)
2018 MIPS_SYS(sys_io_getevents, 5)
2019 MIPS_SYS(sys_io_submit , 3)
2020 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
2021 MIPS_SYS(sys_exit_group , 1)
2022 MIPS_SYS(sys_lookup_dcookie, 3)
2023 MIPS_SYS(sys_epoll_create, 1)
2024 MIPS_SYS(sys_epoll_ctl , 4)
2025 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
2026 MIPS_SYS(sys_remap_file_pages, 5)
2027 MIPS_SYS(sys_set_tid_address, 1)
2028 MIPS_SYS(sys_restart_syscall, 0)
2029 MIPS_SYS(sys_fadvise64_64, 7)
2030 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
2031 MIPS_SYS(sys_fstatfs64 , 2)
2032 MIPS_SYS(sys_timer_create, 3)
2033 MIPS_SYS(sys_timer_settime, 4)
2034 MIPS_SYS(sys_timer_gettime, 2)
2035 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
2036 MIPS_SYS(sys_timer_delete, 1)
2037 MIPS_SYS(sys_clock_settime, 2)
2038 MIPS_SYS(sys_clock_gettime, 2)
2039 MIPS_SYS(sys_clock_getres, 2)
2040 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
2041 MIPS_SYS(sys_tgkill , 3)
2042 MIPS_SYS(sys_utimes , 2)
2043 MIPS_SYS(sys_mbind , 4)
2044 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
2045 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
2046 MIPS_SYS(sys_mq_open , 4)
2047 MIPS_SYS(sys_mq_unlink , 1)
2048 MIPS_SYS(sys_mq_timedsend, 5)
2049 MIPS_SYS(sys_mq_timedreceive, 5)
2050 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
2051 MIPS_SYS(sys_mq_getsetattr, 3)
2052 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
2053 MIPS_SYS(sys_waitid , 4)
2054 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
2055 MIPS_SYS(sys_add_key , 5)
388bb21a 2056 MIPS_SYS(sys_request_key, 4)
048f6b4d 2057 MIPS_SYS(sys_keyctl , 5)
6f5b89a0 2058 MIPS_SYS(sys_set_thread_area, 1)
388bb21a
TS		 2059 MIPS_SYS(sys_inotify_init, 0)
2060 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
2061 MIPS_SYS(sys_inotify_rm_watch, 2)
2062 MIPS_SYS(sys_migrate_pages, 4)
2063 MIPS_SYS(sys_openat, 4)
2064 MIPS_SYS(sys_mkdirat, 3)
2065 MIPS_SYS(sys_mknodat, 4) /* 4290 */
2066 MIPS_SYS(sys_fchownat, 5)
2067 MIPS_SYS(sys_futimesat, 3)
2068 MIPS_SYS(sys_fstatat64, 4)
2069 MIPS_SYS(sys_unlinkat, 3)
2070 MIPS_SYS(sys_renameat, 4) /* 4295 */
2071 MIPS_SYS(sys_linkat, 5)
2072 MIPS_SYS(sys_symlinkat, 3)
2073 MIPS_SYS(sys_readlinkat, 4)
2074 MIPS_SYS(sys_fchmodat, 3)
2075 MIPS_SYS(sys_faccessat, 3) /* 4300 */
2076 MIPS_SYS(sys_pselect6, 6)
2077 MIPS_SYS(sys_ppoll, 5)
2078 MIPS_SYS(sys_unshare, 1)
b0932e06 2079 MIPS_SYS(sys_splice, 6)
388bb21a
TS		 2080 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
2081 MIPS_SYS(sys_tee, 4)
2082 MIPS_SYS(sys_vmsplice, 4)
2083 MIPS_SYS(sys_move_pages, 6)
2084 MIPS_SYS(sys_set_robust_list, 2)
2085 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
2086 MIPS_SYS(sys_kexec_load, 4)
2087 MIPS_SYS(sys_getcpu, 3)
2088 MIPS_SYS(sys_epoll_pwait, 6)
2089 MIPS_SYS(sys_ioprio_set, 3)
2090 MIPS_SYS(sys_ioprio_get, 2)
d979e8eb
PM		 2091 MIPS_SYS(sys_utimensat, 4)
2092 MIPS_SYS(sys_signalfd, 3)
2093 MIPS_SYS(sys_ni_syscall, 0) /* was timerfd */
2094 MIPS_SYS(sys_eventfd, 1)
2095 MIPS_SYS(sys_fallocate, 6) /* 4320 */
2096 MIPS_SYS(sys_timerfd_create, 2)
2097 MIPS_SYS(sys_timerfd_gettime, 2)
2098 MIPS_SYS(sys_timerfd_settime, 4)
2099 MIPS_SYS(sys_signalfd4, 4)
2100 MIPS_SYS(sys_eventfd2, 2) /* 4325 */
2101 MIPS_SYS(sys_epoll_create1, 1)
2102 MIPS_SYS(sys_dup3, 3)
2103 MIPS_SYS(sys_pipe2, 2)
2104 MIPS_SYS(sys_inotify_init1, 1)
2e6eeb67
AM		 2105 MIPS_SYS(sys_preadv, 5) /* 4330 */
2106 MIPS_SYS(sys_pwritev, 5)
d979e8eb
PM		 2107 MIPS_SYS(sys_rt_tgsigqueueinfo, 4)
2108 MIPS_SYS(sys_perf_event_open, 5)
2109 MIPS_SYS(sys_accept4, 4)
2110 MIPS_SYS(sys_recvmmsg, 5) /* 4335 */
2111 MIPS_SYS(sys_fanotify_init, 2)
2112 MIPS_SYS(sys_fanotify_mark, 6)
2113 MIPS_SYS(sys_prlimit64, 4)
2114 MIPS_SYS(sys_name_to_handle_at, 5)
2115 MIPS_SYS(sys_open_by_handle_at, 3) /* 4340 */
2116 MIPS_SYS(sys_clock_adjtime, 2)
2117 MIPS_SYS(sys_syncfs, 1)
2e6eeb67
AM		 2118 MIPS_SYS(sys_sendmmsg, 4)
2119 MIPS_SYS(sys_setns, 2)
2120 MIPS_SYS(sys_process_vm_readv, 6) /* 345 */
2121 MIPS_SYS(sys_process_vm_writev, 6)
2122 MIPS_SYS(sys_kcmp, 5)
2123 MIPS_SYS(sys_finit_module, 3)
2124 MIPS_SYS(sys_sched_setattr, 2)
2125 MIPS_SYS(sys_sched_getattr, 3) /* 350 */
2126 MIPS_SYS(sys_renameat2, 5)
2127 MIPS_SYS(sys_seccomp, 3)
2128 MIPS_SYS(sys_getrandom, 3)
2129 MIPS_SYS(sys_memfd_create, 2)
2130 MIPS_SYS(sys_bpf, 3) /* 355 */
2131 MIPS_SYS(sys_execveat, 5)
2132 MIPS_SYS(sys_userfaultfd, 1)
2133 MIPS_SYS(sys_membarrier, 2)
2134 MIPS_SYS(sys_mlock2, 3)
2135 MIPS_SYS(sys_copy_file_range, 6) /* 360 */
2136 MIPS_SYS(sys_preadv2, 6)
2137 MIPS_SYS(sys_pwritev2, 6)
048f6b4d 2138};
ff4f7382
RH		 2139# undef MIPS_SYS
2140# endif /* O32 */
048f6b4d 2141
590bc601
PB		 2142static int do_store_exclusive(CPUMIPSState *env)
2143{
2144 target_ulong addr;
2145 target_ulong page_addr;
2146 target_ulong val;
2147 int flags;
2148 int segv = 0;
2149 int reg;
2150 int d;
2151
5499b6ff 2152 addr = env->lladdr;
590bc601
PB		 2153 page_addr = addr & TARGET_PAGE_MASK;
2154 start_exclusive();
2155 mmap_lock();
2156 flags = page_get_flags(page_addr);
2157 if ((flags & PAGE_READ) == 0) {
2158 segv = 1;
2159 } else {
2160 reg = env->llreg & 0x1f;
2161 d = (env->llreg & 0x20) != 0;
2162 if (d) {
2163 segv = get_user_s64(val, addr);
2164 } else {
2165 segv = get_user_s32(val, addr);
2166 }
2167 if (!segv) {
2168 if (val != env->llval) {
2169 env->active_tc.gpr[reg] = 0;
2170 } else {
2171 if (d) {
2172 segv = put_user_u64(env->llnewval, addr);
2173 } else {
2174 segv = put_user_u32(env->llnewval, addr);
2175 }
2176 if (!segv) {
2177 env->active_tc.gpr[reg] = 1;
2178 }
2179 }
2180 }
2181 }
5499b6ff 2182 env->lladdr = -1;
590bc601
PB		 2183 if (!segv) {
2184 env->active_tc.PC += 4;
2185 }
2186 mmap_unlock();
2187 end_exclusive();
2188 return segv;
2189}
2190
54b2f42c
MI		 2191/* Break codes */
2192enum {
2193 BRK_OVERFLOW = 6,
2194 BRK_DIVZERO = 7
2195};
2196
2197static int do_break(CPUMIPSState *env, target_siginfo_t *info,
2198 unsigned int code)
2199{
2200 int ret = -1;
2201
2202 switch (code) {
2203 case BRK_OVERFLOW:
2204 case BRK_DIVZERO:
2205 info->si_signo = TARGET_SIGFPE;
2206 info->si_errno = 0;
2207 info->si_code = (code == BRK_OVERFLOW) ? FPE_INTOVF : FPE_INTDIV;
9d2803f7 2208 queue_signal(env, info->si_signo, QEMU_SI_FAULT, &*info);
54b2f42c
MI		 2209 ret = 0;
2210 break;
2211 default:
b51910ba
PJ		 2212 info->si_signo = TARGET_SIGTRAP;
2213 info->si_errno = 0;
9d2803f7 2214 queue_signal(env, info->si_signo, QEMU_SI_FAULT, &*info);
b51910ba 2215 ret = 0;
54b2f42c
MI		 2216 break;
2217 }
2218
2219 return ret;
2220}
2221
048f6b4d
FB		 2222void cpu_loop(CPUMIPSState *env)
2223{
0315c31c 2224 CPUState *cs = CPU(mips_env_get_cpu(env));
c227f099 2225 target_siginfo_t info;
ff4f7382
RH		 2226 int trapnr;
2227 abi_long ret;
2228# ifdef TARGET_ABI_MIPSO32
048f6b4d 2229 unsigned int syscall_num;
ff4f7382 2230# endif
048f6b4d
FB		 2231
2232 for(;;) {
0315c31c 2233 cpu_exec_start(cs);
8642c1b8 2234 trapnr = cpu_exec(cs);
0315c31c 2235 cpu_exec_end(cs);
d148d90e
SF		 2236 process_queued_cpu_work(cs);
2237
048f6b4d
FB		 2238 switch(trapnr) {
2239 case EXCP_SYSCALL:
b5dc7732 2240 env->active_tc.PC += 4;
ff4f7382
RH		 2241# ifdef TARGET_ABI_MIPSO32
2242 syscall_num = env->active_tc.gpr[2] - 4000;
388bb21a 2243 if (syscall_num >= sizeof(mips_syscall_args)) {
7c2f6157 2244 ret = -TARGET_ENOSYS;
388bb21a
TS		 2245 } else {
2246 int nb_args;
992f48a0
BS		 2247 abi_ulong sp_reg;
2248 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
388bb21a
TS		 2249
2250 nb_args = mips_syscall_args[syscall_num];
b5dc7732 2251 sp_reg = env->active_tc.gpr[29];
388bb21a
TS		 2252 switch (nb_args) {
2253 /* these arguments are taken from the stack */
94c19610
ACH		 2254 case 8:
2255 if ((ret = get_user_ual(arg8, sp_reg + 28)) != 0) {
2256 goto done_syscall;
2257 }
2258 case 7:
2259 if ((ret = get_user_ual(arg7, sp_reg + 24)) != 0) {
2260 goto done_syscall;
2261 }
2262 case 6:
2263 if ((ret = get_user_ual(arg6, sp_reg + 20)) != 0) {
2264 goto done_syscall;
2265 }
2266 case 5:
2267 if ((ret = get_user_ual(arg5, sp_reg + 16)) != 0) {
2268 goto done_syscall;
2269 }
388bb21a
TS		 2270 default:
2271 break;
048f6b4d 2272 }
b5dc7732
TS		 2273 ret = do_syscall(env, env->active_tc.gpr[2],
2274 env->active_tc.gpr[4],
2275 env->active_tc.gpr[5],
2276 env->active_tc.gpr[6],
2277 env->active_tc.gpr[7],
5945cfcb 2278 arg5, arg6, arg7, arg8);
388bb21a 2279 }
94c19610 2280done_syscall:
ff4f7382
RH		 2281# else
2282 ret = do_syscall(env, env->active_tc.gpr[2],
2283 env->active_tc.gpr[4], env->active_tc.gpr[5],
2284 env->active_tc.gpr[6], env->active_tc.gpr[7],
2285 env->active_tc.gpr[8], env->active_tc.gpr[9],
2286 env->active_tc.gpr[10], env->active_tc.gpr[11]);
2287# endif /* O32 */
2eb3ae27
TB		 2288 if (ret == -TARGET_ERESTARTSYS) {
2289 env->active_tc.PC -= 4;
2290 break;
2291 }
0b1bcb00
PB		 2292 if (ret == -TARGET_QEMU_ESIGRETURN) {
2293 /* Returning from a successful sigreturn syscall.
2294 Avoid clobbering register state. */
2295 break;
2296 }
ff4f7382 2297 if ((abi_ulong)ret >= (abi_ulong)-1133) {
b5dc7732 2298 env->active_tc.gpr[7] = 1; /* error flag */
388bb21a
TS		 2299 ret = -ret;
2300 } else {
b5dc7732 2301 env->active_tc.gpr[7] = 0; /* error flag */
048f6b4d 2302 }
b5dc7732 2303 env->active_tc.gpr[2] = ret;
048f6b4d 2304 break;
ca7c2b1b
TS		 2305 case EXCP_TLBL:
2306 case EXCP_TLBS:
e6e5bd2d
WT		 2307 case EXCP_AdEL:
2308 case EXCP_AdES:
e4474235
PB		 2309 info.si_signo = TARGET_SIGSEGV;
2310 info.si_errno = 0;
2311 /* XXX: check env->error_code */
2312 info.si_code = TARGET_SEGV_MAPERR;
2313 info._sifields._sigfault._addr = env->CP0_BadVAddr;
9d2803f7 2314 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
e4474235 2315 break;
6900e84b 2316 case EXCP_CpU:
048f6b4d 2317 case EXCP_RI:
bc1ad2de
FB		 2318 info.si_signo = TARGET_SIGILL;
2319 info.si_errno = 0;
2320 info.si_code = 0;
9d2803f7 2321 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
048f6b4d 2322 break;
106ec879
FB		 2323 case EXCP_INTERRUPT:
2324 /* just indicate that signals should be handled asap */
2325 break;
d08b2a28
PB		 2326 case EXCP_DEBUG:
2327 {
2328 int sig;
2329
db6b81d4 2330 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
d08b2a28
PB		 2331 if (sig)
2332 {
2333 info.si_signo = sig;
2334 info.si_errno = 0;
2335 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 2336 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
d08b2a28
PB		 2337 }
2338 }
2339 break;
590bc601
PB		 2340 case EXCP_SC:
2341 if (do_store_exclusive(env)) {
2342 info.si_signo = TARGET_SIGSEGV;
2343 info.si_errno = 0;
2344 info.si_code = TARGET_SEGV_MAPERR;
2345 info._sifields._sigfault._addr = env->active_tc.PC;
9d2803f7 2346 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
590bc601
PB		 2347 }
2348 break;
853c3240
JL		 2349 case EXCP_DSPDIS:
2350 info.si_signo = TARGET_SIGILL;
2351 info.si_errno = 0;
2352 info.si_code = TARGET_ILL_ILLOPC;
9d2803f7 2353 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
853c3240 2354 break;
54b2f42c
MI		 2355 /* The code below was inspired by the MIPS Linux kernel trap
2356 * handling code in arch/mips/kernel/traps.c.
2357 */
2358 case EXCP_BREAK:
2359 {
2360 abi_ulong trap_instr;
2361 unsigned int code;
2362
a0333817
KCY		 2363 if (env->hflags & MIPS_HFLAG_M16) {
2364 if (env->insn_flags & ASE_MICROMIPS) {
2365 /* microMIPS mode */
1308c464
KCY		 2366 ret = get_user_u16(trap_instr, env->active_tc.PC);
2367 if (ret != 0) {
2368 goto error;
2369 }
a0333817 2370
1308c464
KCY		 2371 if ((trap_instr >> 10) == 0x11) {
2372 /* 16-bit instruction */
2373 code = trap_instr & 0xf;
2374 } else {
2375 /* 32-bit instruction */
2376 abi_ulong instr_lo;
2377
2378 ret = get_user_u16(instr_lo,
2379 env->active_tc.PC + 2);
2380 if (ret != 0) {
2381 goto error;
2382 }
2383 trap_instr = (trap_instr << 16) | instr_lo;
2384 code = ((trap_instr >> 6) & ((1 << 20) - 1));
2385 /* Unfortunately, microMIPS also suffers from
2386 the old assembler bug... */
2387 if (code >= (1 << 10)) {
2388 code >>= 10;
2389 }
2390 }
a0333817
KCY		 2391 } else {
2392 /* MIPS16e mode */
2393 ret = get_user_u16(trap_instr, env->active_tc.PC);
2394 if (ret != 0) {
2395 goto error;
2396 }
2397 code = (trap_instr >> 6) & 0x3f;
a0333817
KCY		 2398 }
2399 } else {
f01a361b 2400 ret = get_user_u32(trap_instr, env->active_tc.PC);
1308c464
KCY		 2401 if (ret != 0) {
2402 goto error;
2403 }
54b2f42c 2404
1308c464
KCY		 2405 /* As described in the original Linux kernel code, the
2406 * below checks on 'code' are to work around an old
2407 * assembly bug.
2408 */
2409 code = ((trap_instr >> 6) & ((1 << 20) - 1));
2410 if (code >= (1 << 10)) {
2411 code >>= 10;
2412 }
54b2f42c
MI		 2413 }
2414
2415 if (do_break(env, &info, code) != 0) {
2416 goto error;
2417 }
2418 }
2419 break;
2420 case EXCP_TRAP:
2421 {
2422 abi_ulong trap_instr;
2423 unsigned int code = 0;
2424
a0333817
KCY		 2425 if (env->hflags & MIPS_HFLAG_M16) {
2426 /* microMIPS mode */
2427 abi_ulong instr[2];
2428
2429 ret = get_user_u16(instr[0], env->active_tc.PC) ||
2430 get_user_u16(instr[1], env->active_tc.PC + 2);
2431
2432 trap_instr = (instr[0] << 16) | instr[1];
2433 } else {
f01a361b 2434 ret = get_user_u32(trap_instr, env->active_tc.PC);
a0333817
KCY		 2435 }
2436
54b2f42c
MI		 2437 if (ret != 0) {
2438 goto error;
2439 }
2440
2441 /* The immediate versions don't provide a code. */
2442 if (!(trap_instr & 0xFC000000)) {
a0333817
KCY		 2443 if (env->hflags & MIPS_HFLAG_M16) {
2444 /* microMIPS mode */
2445 code = ((trap_instr >> 12) & ((1 << 4) - 1));
2446 } else {
2447 code = ((trap_instr >> 6) & ((1 << 10) - 1));
2448 }
54b2f42c
MI		 2449 }
2450
2451 if (do_break(env, &info, code) != 0) {
2452 goto error;
2453 }
2454 }
2455 break;
fdbc2b57
RH		 2456 case EXCP_ATOMIC:
2457 cpu_exec_step_atomic(cs);
2458 break;
048f6b4d 2459 default:
54b2f42c 2460error:
120a9848 2461 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
048f6b4d
FB		 2462 abort();
2463 }
2464 process_pending_signals(env);
2465 }
2466}
2467#endif
2468
a0a839b6
MV		 2469#ifdef TARGET_NIOS2
2470
2471void cpu_loop(CPUNios2State *env)
2472{
2473 CPUState *cs = ENV_GET_CPU(env);
2474 Nios2CPU *cpu = NIOS2_CPU(cs);
2475 target_siginfo_t info;
2476 int trapnr, gdbsig, ret;
2477
2478 for (;;) {
2479 cpu_exec_start(cs);
2480 trapnr = cpu_exec(cs);
2481 cpu_exec_end(cs);
2482 gdbsig = 0;
2483
2484 switch (trapnr) {
2485 case EXCP_INTERRUPT:
2486 /* just indicate that signals should be handled asap */
2487 break;
2488 case EXCP_TRAP:
2489 if (env->regs[R_AT] == 0) {
2490 abi_long ret;
2491 qemu_log_mask(CPU_LOG_INT, "\nSyscall\n");
2492
2493 ret = do_syscall(env, env->regs[2],
2494 env->regs[4], env->regs[5], env->regs[6],
2495 env->regs[7], env->regs[8], env->regs[9],
2496 0, 0);
2497
2498 if (env->regs[2] == 0) { /* FIXME: syscall 0 workaround */
2499 ret = 0;
2500 }
2501
2502 env->regs[2] = abs(ret);
2503 /* Return value is 0..4096 */
2504 env->regs[7] = (ret > 0xfffffffffffff000ULL);
2505 env->regs[CR_ESTATUS] = env->regs[CR_STATUS];
2506 env->regs[CR_STATUS] &= ~0x3;
2507 env->regs[R_EA] = env->regs[R_PC] + 4;
2508 env->regs[R_PC] += 4;
2509 break;
2510 } else {
2511 qemu_log_mask(CPU_LOG_INT, "\nTrap\n");
2512
2513 env->regs[CR_ESTATUS] = env->regs[CR_STATUS];
2514 env->regs[CR_STATUS] &= ~0x3;
2515 env->regs[R_EA] = env->regs[R_PC] + 4;
2516 env->regs[R_PC] = cpu->exception_addr;
2517
2518 gdbsig = TARGET_SIGTRAP;
2519 break;
2520 }
2521 case 0xaa:
2522 switch (env->regs[R_PC]) {
2523 /*case 0x1000:*/ /* TODO:__kuser_helper_version */
2524 case 0x1004: /* __kuser_cmpxchg */
2525 start_exclusive();
2526 if (env->regs[4] & 0x3) {
2527 goto kuser_fail;
2528 }
2529 ret = get_user_u32(env->regs[2], env->regs[4]);
2530 if (ret) {
2531 end_exclusive();
2532 goto kuser_fail;
2533 }
2534 env->regs[2] -= env->regs[5];
2535 if (env->regs[2] == 0) {
2536 put_user_u32(env->regs[6], env->regs[4]);
2537 }
2538 end_exclusive();
2539 env->regs[R_PC] = env->regs[R_RA];
2540 break;
2541 /*case 0x1040:*/ /* TODO:__kuser_sigtramp */
2542 default:
2543 ;
2544kuser_fail:
2545 info.si_signo = TARGET_SIGSEGV;
2546 info.si_errno = 0;
2547 /* TODO: check env->error_code */
2548 info.si_code = TARGET_SEGV_MAPERR;
2549 info._sifields._sigfault._addr = env->regs[R_PC];
2550 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2551 }
2552 break;
2553 default:
2554 EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n",
2555 trapnr);
2556 gdbsig = TARGET_SIGILL;
2557 break;
2558 }
2559 if (gdbsig) {
2560 gdb_handlesig(cs, gdbsig);
2561 if (gdbsig != TARGET_SIGTRAP) {
2562 exit(EXIT_FAILURE);
2563 }
2564 }
2565
2566 process_pending_signals(env);
2567 }
2568}
2569
2570#endif /* TARGET_NIOS2 */
2571
d962783e
JL		 2572#ifdef TARGET_OPENRISC
2573
2574void cpu_loop(CPUOpenRISCState *env)
2575{
878096ee 2576 CPUState *cs = CPU(openrisc_env_get_cpu(env));
d962783e 2577 int trapnr, gdbsig;
7fe7231a 2578 abi_long ret;
d962783e
JL		 2579
2580 for (;;) {
b040bc9c 2581 cpu_exec_start(cs);
8642c1b8 2582 trapnr = cpu_exec(cs);
b040bc9c 2583 cpu_exec_end(cs);
d148d90e 2584 process_queued_cpu_work(cs);
d962783e
JL		 2585 gdbsig = 0;
2586
2587 switch (trapnr) {
2588 case EXCP_RESET:
120a9848 2589 qemu_log_mask(CPU_LOG_INT, "\nReset request, exit, pc is %#x\n", env->pc);
4d1275c2 2590 exit(EXIT_FAILURE);
d962783e
JL		 2591 break;
2592 case EXCP_BUSERR:
120a9848 2593 qemu_log_mask(CPU_LOG_INT, "\nBus error, exit, pc is %#x\n", env->pc);
a86b3c64 2594 gdbsig = TARGET_SIGBUS;
d962783e
JL		 2595 break;
2596 case EXCP_DPF:
2597 case EXCP_IPF:
878096ee 2598 cpu_dump_state(cs, stderr, fprintf, 0);
d962783e
JL		 2599 gdbsig = TARGET_SIGSEGV;
2600 break;
2601 case EXCP_TICK:
120a9848 2602 qemu_log_mask(CPU_LOG_INT, "\nTick time interrupt pc is %#x\n", env->pc);
d962783e
JL		 2603 break;
2604 case EXCP_ALIGN:
120a9848 2605 qemu_log_mask(CPU_LOG_INT, "\nAlignment pc is %#x\n", env->pc);
a86b3c64 2606 gdbsig = TARGET_SIGBUS;
d962783e
JL		 2607 break;
2608 case EXCP_ILLEGAL:
120a9848 2609 qemu_log_mask(CPU_LOG_INT, "\nIllegal instructionpc is %#x\n", env->pc);
a86b3c64 2610 gdbsig = TARGET_SIGILL;
d962783e
JL		 2611 break;
2612 case EXCP_INT:
120a9848 2613 qemu_log_mask(CPU_LOG_INT, "\nExternal interruptpc is %#x\n", env->pc);
d962783e
JL		 2614 break;
2615 case EXCP_DTLBMISS:
2616 case EXCP_ITLBMISS:
120a9848 2617 qemu_log_mask(CPU_LOG_INT, "\nTLB miss\n");
d962783e
JL		 2618 break;
2619 case EXCP_RANGE:
120a9848 2620 qemu_log_mask(CPU_LOG_INT, "\nRange\n");
a86b3c64 2621 gdbsig = TARGET_SIGSEGV;
d962783e
JL		 2622 break;
2623 case EXCP_SYSCALL:
2624 env->pc += 4; /* 0xc00; */
7fe7231a
TB		 2625 ret = do_syscall(env,
2626 env->gpr[11], /* return value */
2627 env->gpr[3], /* r3 - r7 are params */
2628 env->gpr[4],
2629 env->gpr[5],
2630 env->gpr[6],
2631 env->gpr[7],
2632 env->gpr[8], 0, 0);
2633 if (ret == -TARGET_ERESTARTSYS) {
2634 env->pc -= 4;
2635 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2636 env->gpr[11] = ret;
2637 }
d962783e
JL		 2638 break;
2639 case EXCP_FPE:
120a9848 2640 qemu_log_mask(CPU_LOG_INT, "\nFloating point error\n");
d962783e
JL		 2641 break;
2642 case EXCP_TRAP:
120a9848 2643 qemu_log_mask(CPU_LOG_INT, "\nTrap\n");
a86b3c64 2644 gdbsig = TARGET_SIGTRAP;
d962783e
JL		 2645 break;
2646 case EXCP_NR:
120a9848 2647 qemu_log_mask(CPU_LOG_INT, "\nNR\n");
d962783e 2648 break;
fdbc2b57
RH		 2649 case EXCP_ATOMIC:
2650 cpu_exec_step_atomic(cs);
2651 break;
d962783e 2652 default:
120a9848 2653 EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n",
d962783e 2654 trapnr);
d962783e
JL		 2655 gdbsig = TARGET_SIGILL;
2656 break;
2657 }
2658 if (gdbsig) {
db6b81d4 2659 gdb_handlesig(cs, gdbsig);
d962783e 2660 if (gdbsig != TARGET_SIGTRAP) {
4d1275c2 2661 exit(EXIT_FAILURE);
d962783e
JL		 2662 }
2663 }
2664
2665 process_pending_signals(env);
2666 }
2667}
2668
2669#endif /* TARGET_OPENRISC */
2670
fdf9b3e8 2671#ifdef TARGET_SH4
05390248 2672void cpu_loop(CPUSH4State *env)
fdf9b3e8 2673{
878096ee 2674 CPUState *cs = CPU(sh_env_get_cpu(env));
fdf9b3e8 2675 int trapnr, ret;
c227f099 2676 target_siginfo_t info;
3b46e624 2677
fdf9b3e8 2678 while (1) {
b040bc9c 2679 cpu_exec_start(cs);
8642c1b8 2680 trapnr = cpu_exec(cs);
b040bc9c 2681 cpu_exec_end(cs);
d148d90e 2682 process_queued_cpu_work(cs);
3b46e624 2683
fdf9b3e8
FB		 2684 switch (trapnr) {
2685 case 0x160:
0b6d3ae0 2686 env->pc += 2;
5fafdf24
TS		 2687 ret = do_syscall(env,
2688 env->gregs[3],
2689 env->gregs[4],
2690 env->gregs[5],
2691 env->gregs[6],
2692 env->gregs[7],
2693 env->gregs[0],
5945cfcb
PM		 2694 env->gregs[1],
2695 0, 0);
ba412496
TB		 2696 if (ret == -TARGET_ERESTARTSYS) {
2697 env->pc -= 2;
2698 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2699 env->gregs[0] = ret;
2700 }
fdf9b3e8 2701 break;
c3b5bc8a
TS		 2702 case EXCP_INTERRUPT:
2703 /* just indicate that signals should be handled asap */
2704 break;
355fb23d
PB		 2705 case EXCP_DEBUG:
2706 {
2707 int sig;
2708
db6b81d4 2709 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
355fb23d
PB		 2710 if (sig)
2711 {
2712 info.si_signo = sig;
2713 info.si_errno = 0;
2714 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 2715 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
355fb23d
PB		 2716 }
2717 }
2718 break;
c3b5bc8a
TS		 2719 case 0xa0:
2720 case 0xc0:
a86b3c64 2721 info.si_signo = TARGET_SIGSEGV;
c3b5bc8a
TS		 2722 info.si_errno = 0;
2723 info.si_code = TARGET_SEGV_MAPERR;
2724 info._sifields._sigfault._addr = env->tea;
9d2803f7 2725 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
c3b5bc8a
TS		 2726 break;
2727
fdbc2b57
RH		 2728 case EXCP_ATOMIC:
2729 cpu_exec_step_atomic(cs);
2730 break;
fdf9b3e8
FB		 2731 default:
2732 printf ("Unhandled trap: 0x%x\n", trapnr);
878096ee 2733 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 2734 exit(EXIT_FAILURE);
fdf9b3e8
FB		 2735 }
2736 process_pending_signals (env);
2737 }
2738}
2739#endif
2740
48733d19 2741#ifdef TARGET_CRIS
05390248 2742void cpu_loop(CPUCRISState *env)
48733d19 2743{
878096ee 2744 CPUState *cs = CPU(cris_env_get_cpu(env));
48733d19 2745 int trapnr, ret;
c227f099 2746 target_siginfo_t info;
48733d19
TS		 2747
2748 while (1) {
b040bc9c 2749 cpu_exec_start(cs);
8642c1b8 2750 trapnr = cpu_exec(cs);
b040bc9c 2751 cpu_exec_end(cs);
d148d90e
SF		 2752 process_queued_cpu_work(cs);
2753
48733d19
TS		 2754 switch (trapnr) {
2755 case 0xaa:
2756 {
a86b3c64 2757 info.si_signo = TARGET_SIGSEGV;
48733d19
TS		 2758 info.si_errno = 0;
2759 /* XXX: check env->error_code */
2760 info.si_code = TARGET_SEGV_MAPERR;
e00c1e71 2761 info._sifields._sigfault._addr = env->pregs[PR_EDA];
9d2803f7 2762 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
48733d19
TS		 2763 }
2764 break;
b6d3abda
EI		 2765 case EXCP_INTERRUPT:
2766 /* just indicate that signals should be handled asap */
2767 break;
48733d19
TS		 2768 case EXCP_BREAK:
2769 ret = do_syscall(env,
2770 env->regs[9],
2771 env->regs[10],
2772 env->regs[11],
2773 env->regs[12],
2774 env->regs[13],
2775 env->pregs[7],
5945cfcb
PM		 2776 env->pregs[11],
2777 0, 0);
62050865
TB		 2778 if (ret == -TARGET_ERESTARTSYS) {
2779 env->pc -= 2;
2780 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2781 env->regs[10] = ret;
2782 }
48733d19
TS		 2783 break;
2784 case EXCP_DEBUG:
2785 {
2786 int sig;
2787
db6b81d4 2788 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
48733d19
TS		 2789 if (sig)
2790 {
2791 info.si_signo = sig;
2792 info.si_errno = 0;
2793 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 2794 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
48733d19
TS		 2795 }
2796 }
2797 break;
fdbc2b57
RH		 2798 case EXCP_ATOMIC:
2799 cpu_exec_step_atomic(cs);
2800 break;
48733d19
TS		 2801 default:
2802 printf ("Unhandled trap: 0x%x\n", trapnr);
878096ee 2803 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 2804 exit(EXIT_FAILURE);
48733d19
TS		 2805 }
2806 process_pending_signals (env);
2807 }
2808}
2809#endif
2810
b779e29e 2811#ifdef TARGET_MICROBLAZE
05390248 2812void cpu_loop(CPUMBState *env)
b779e29e 2813{
878096ee 2814 CPUState *cs = CPU(mb_env_get_cpu(env));
b779e29e 2815 int trapnr, ret;
c227f099 2816 target_siginfo_t info;
b779e29e
EI		 2817
2818 while (1) {
b040bc9c 2819 cpu_exec_start(cs);
8642c1b8 2820 trapnr = cpu_exec(cs);
b040bc9c 2821 cpu_exec_end(cs);
d148d90e
SF		 2822 process_queued_cpu_work(cs);
2823
b779e29e
EI		 2824 switch (trapnr) {
2825 case 0xaa:
2826 {
a86b3c64 2827 info.si_signo = TARGET_SIGSEGV;
b779e29e
EI		 2828 info.si_errno = 0;
2829 /* XXX: check env->error_code */
2830 info.si_code = TARGET_SEGV_MAPERR;
2831 info._sifields._sigfault._addr = 0;
9d2803f7 2832 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
b779e29e
EI		 2833 }
2834 break;
2835 case EXCP_INTERRUPT:
2836 /* just indicate that signals should be handled asap */
2837 break;
2838 case EXCP_BREAK:
2839 /* Return address is 4 bytes after the call. */
2840 env->regs[14] += 4;
d7dce494 2841 env->sregs[SR_PC] = env->regs[14];
b779e29e
EI		 2842 ret = do_syscall(env,
2843 env->regs[12],
2844 env->regs[5],
2845 env->regs[6],
2846 env->regs[7],
2847 env->regs[8],
2848 env->regs[9],
5945cfcb
PM		 2849 env->regs[10],
2850 0, 0);
4134ecfe
TB		 2851 if (ret == -TARGET_ERESTARTSYS) {
2852 /* Wind back to before the syscall. */
2853 env->sregs[SR_PC] -= 4;
2854 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2855 env->regs[3] = ret;
2856 }
d7749ab7
PM		 2857 /* All syscall exits result in guest r14 being equal to the
2858 * PC we return to, because the kernel syscall exit "rtbd" does
2859 * this. (This is true even for sigreturn(); note that r14 is
2860 * not a userspace-usable register, as the kernel may clobber it
2861 * at any point.)
2862 */
2863 env->regs[14] = env->sregs[SR_PC];
b779e29e 2864 break;
b76da7e3
EI		 2865 case EXCP_HW_EXCP:
2866 env->regs[17] = env->sregs[SR_PC] + 4;
2867 if (env->iflags & D_FLAG) {
2868 env->sregs[SR_ESR] |= 1 << 12;
2869 env->sregs[SR_PC] -= 4;
b4916d7b 2870 /* FIXME: if branch was immed, replay the imm as well. */
b76da7e3
EI		 2871 }
2872
2873 env->iflags &= ~(IMM_FLAG | D_FLAG);
2874
2875 switch (env->sregs[SR_ESR] & 31) {
22a78d64 2876 case ESR_EC_DIVZERO:
a86b3c64 2877 info.si_signo = TARGET_SIGFPE;
22a78d64
EI		 2878 info.si_errno = 0;
2879 info.si_code = TARGET_FPE_FLTDIV;
2880 info._sifields._sigfault._addr = 0;
9d2803f7 2881 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
22a78d64 2882 break;
b76da7e3 2883 case ESR_EC_FPU:
a86b3c64 2884 info.si_signo = TARGET_SIGFPE;
b76da7e3
EI		 2885 info.si_errno = 0;
2886 if (env->sregs[SR_FSR] & FSR_IO) {
2887 info.si_code = TARGET_FPE_FLTINV;
2888 }
2889 if (env->sregs[SR_FSR] & FSR_DZ) {
2890 info.si_code = TARGET_FPE_FLTDIV;
2891 }
2892 info._sifields._sigfault._addr = 0;
9d2803f7 2893 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
b76da7e3
EI		 2894 break;
2895 default:
2896 printf ("Unhandled hw-exception: 0x%x\n",
2e42d52d 2897 env->sregs[SR_ESR] & ESR_EC_MASK);
878096ee 2898 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 2899 exit(EXIT_FAILURE);
b76da7e3
EI		 2900 break;
2901 }
2902 break;
b779e29e
EI		 2903 case EXCP_DEBUG:
2904 {
2905 int sig;
2906
db6b81d4 2907 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
b779e29e
EI		 2908 if (sig)
2909 {
2910 info.si_signo = sig;
2911 info.si_errno = 0;
2912 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 2913 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
b779e29e
EI		 2914 }
2915 }
2916 break;
fdbc2b57
RH		 2917 case EXCP_ATOMIC:
2918 cpu_exec_step_atomic(cs);
2919 break;
b779e29e
EI		 2920 default:
2921 printf ("Unhandled trap: 0x%x\n", trapnr);
878096ee 2922 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 2923 exit(EXIT_FAILURE);
b779e29e
EI		 2924 }
2925 process_pending_signals (env);
2926 }
2927}
2928#endif
2929
e6e5906b
PB		 2930#ifdef TARGET_M68K
2931
2932void cpu_loop(CPUM68KState *env)
2933{
878096ee 2934 CPUState *cs = CPU(m68k_env_get_cpu(env));
e6e5906b
PB		 2935 int trapnr;
2936 unsigned int n;
c227f099 2937 target_siginfo_t info;
0429a971 2938 TaskState *ts = cs->opaque;
3b46e624 2939
e6e5906b 2940 for(;;) {
b040bc9c 2941 cpu_exec_start(cs);
8642c1b8 2942 trapnr = cpu_exec(cs);
b040bc9c 2943 cpu_exec_end(cs);
d148d90e
SF		 2944 process_queued_cpu_work(cs);
2945
e6e5906b
PB		 2946 switch(trapnr) {
2947 case EXCP_ILLEGAL:
2948 {
2949 if (ts->sim_syscalls) {
2950 uint16_t nr;
d8d5119c 2951 get_user_u16(nr, env->pc + 2);
e6e5906b
PB		 2952 env->pc += 4;
2953 do_m68k_simcall(env, nr);
2954 } else {
2955 goto do_sigill;
2956 }
2957 }
2958 break;
a87295e8 2959 case EXCP_HALT_INSN:
e6e5906b 2960 /* Semihosing syscall. */
a87295e8 2961 env->pc += 4;
e6e5906b
PB		 2962 do_m68k_semihosting(env, env->dregs[0]);
2963 break;
2964 case EXCP_LINEA:
2965 case EXCP_LINEF:
2966 case EXCP_UNSUPPORTED:
2967 do_sigill:
a86b3c64 2968 info.si_signo = TARGET_SIGILL;
e6e5906b
PB		 2969 info.si_errno = 0;
2970 info.si_code = TARGET_ILL_ILLOPN;
2971 info._sifields._sigfault._addr = env->pc;
0ccb9c1d
LV		 2972 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2973 break;
2974 case EXCP_DIV0:
2975 info.si_signo = TARGET_SIGFPE;
2976 info.si_errno = 0;
2977 info.si_code = TARGET_FPE_INTDIV;
2978 info._sifields._sigfault._addr = env->pc;
9d2803f7 2979 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
e6e5906b
PB		 2980 break;
2981 case EXCP_TRAP0:
2982 {
7ccb84a9 2983 abi_long ret;
e6e5906b
PB		 2984 ts->sim_syscalls = 0;
2985 n = env->dregs[0];
2986 env->pc += 2;
7ccb84a9
TB		 2987 ret = do_syscall(env,
2988 n,
2989 env->dregs[1],
2990 env->dregs[2],
2991 env->dregs[3],
2992 env->dregs[4],
2993 env->dregs[5],
2994 env->aregs[0],
2995 0, 0);
2996 if (ret == -TARGET_ERESTARTSYS) {
2997 env->pc -= 2;
2998 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2999 env->dregs[0] = ret;
3000 }
e6e5906b
PB		 3001 }
3002 break;
3003 case EXCP_INTERRUPT:
3004 /* just indicate that signals should be handled asap */
3005 break;
3006 case EXCP_ACCESS:
3007 {
a86b3c64 3008 info.si_signo = TARGET_SIGSEGV;
e6e5906b
PB		 3009 info.si_errno = 0;
3010 /* XXX: check env->error_code */
3011 info.si_code = TARGET_SEGV_MAPERR;
3012 info._sifields._sigfault._addr = env->mmu.ar;
9d2803f7 3013 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
e6e5906b
PB		 3014 }
3015 break;
3016 case EXCP_DEBUG:
3017 {
3018 int sig;
3019
db6b81d4 3020 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
e6e5906b
PB		 3021 if (sig)
3022 {
3023 info.si_signo = sig;
3024 info.si_errno = 0;
3025 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 3026 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
e6e5906b
PB		 3027 }
3028 }
3029 break;
fdbc2b57
RH		 3030 case EXCP_ATOMIC:
3031 cpu_exec_step_atomic(cs);
3032 break;
e6e5906b 3033 default:
120a9848 3034 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
e6e5906b
PB		 3035 abort();
3036 }
3037 process_pending_signals(env);
3038 }
3039}
3040#endif /* TARGET_M68K */
3041
7a3148a9 3042#ifdef TARGET_ALPHA
05390248 3043void cpu_loop(CPUAlphaState *env)
7a3148a9 3044{
878096ee 3045 CPUState *cs = CPU(alpha_env_get_cpu(env));
e96efcfc 3046 int trapnr;
c227f099 3047 target_siginfo_t info;
6049f4f8 3048 abi_long sysret;
3b46e624 3049
7a3148a9 3050 while (1) {
b040bc9c 3051 cpu_exec_start(cs);
8642c1b8 3052 trapnr = cpu_exec(cs);
b040bc9c 3053 cpu_exec_end(cs);
d148d90e 3054 process_queued_cpu_work(cs);
3b46e624 3055
ac316ca4
RH		 3056 /* All of the traps imply a transition through PALcode, which
3057 implies an REI instruction has been executed. Which means
3058 that the intr_flag should be cleared. */
3059 env->intr_flag = 0;
3060
7a3148a9
JM		 3061 switch (trapnr) {
3062 case EXCP_RESET:
3063 fprintf(stderr, "Reset requested. Exit\n");
4d1275c2 3064 exit(EXIT_FAILURE);
7a3148a9
JM		 3065 break;
3066 case EXCP_MCHK:
3067 fprintf(stderr, "Machine check exception. Exit\n");
4d1275c2 3068 exit(EXIT_FAILURE);
7a3148a9 3069 break;
07b6c13b
RH		 3070 case EXCP_SMP_INTERRUPT:
3071 case EXCP_CLK_INTERRUPT:
3072 case EXCP_DEV_INTERRUPT:
5fafdf24 3073 fprintf(stderr, "External interrupt. Exit\n");
4d1275c2 3074 exit(EXIT_FAILURE);
7a3148a9 3075 break;
07b6c13b 3076 case EXCP_MMFAULT:
6910b8f6 3077 env->lock_addr = -1;
6049f4f8
RH		 3078 info.si_signo = TARGET_SIGSEGV;
3079 info.si_errno = 0;
129d8aa5 3080 info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID
0be1d07c 3081 ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);
129d8aa5 3082 info._sifields._sigfault._addr = env->trap_arg0;
9d2803f7 3083 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
7a3148a9 3084 break;
7a3148a9 3085 case EXCP_UNALIGN:
6910b8f6 3086 env->lock_addr = -1;
6049f4f8
RH		 3087 info.si_signo = TARGET_SIGBUS;
3088 info.si_errno = 0;
3089 info.si_code = TARGET_BUS_ADRALN;
129d8aa5 3090 info._sifields._sigfault._addr = env->trap_arg0;
9d2803f7 3091 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
7a3148a9
JM		 3092 break;
3093 case EXCP_OPCDEC:
6049f4f8 3094 do_sigill:
6910b8f6 3095 env->lock_addr = -1;
6049f4f8
RH		 3096 info.si_signo = TARGET_SIGILL;
3097 info.si_errno = 0;
3098 info.si_code = TARGET_ILL_ILLOPC;
3099 info._sifields._sigfault._addr = env->pc;
9d2803f7 3100 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
7a3148a9 3101 break;
07b6c13b
RH		 3102 case EXCP_ARITH:
3103 env->lock_addr = -1;
3104 info.si_signo = TARGET_SIGFPE;
3105 info.si_errno = 0;
3106 info.si_code = TARGET_FPE_FLTINV;
3107 info._sifields._sigfault._addr = env->pc;
9d2803f7 3108 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
07b6c13b 3109 break;
7a3148a9 3110 case EXCP_FEN:
6049f4f8 3111 /* No-op. Linux simply re-enables the FPU. */
7a3148a9 3112 break;
07b6c13b 3113 case EXCP_CALL_PAL:
6910b8f6 3114 env->lock_addr = -1;
07b6c13b 3115 switch (env->error_code) {
6049f4f8
RH		 3116 case 0x80:
3117 /* BPT */
3118 info.si_signo = TARGET_SIGTRAP;
3119 info.si_errno = 0;
3120 info.si_code = TARGET_TRAP_BRKPT;
3121 info._sifields._sigfault._addr = env->pc;
9d2803f7 3122 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
6049f4f8
RH		 3123 break;
3124 case 0x81:
3125 /* BUGCHK */
3126 info.si_signo = TARGET_SIGTRAP;
3127 info.si_errno = 0;
3128 info.si_code = 0;
3129 info._sifields._sigfault._addr = env->pc;
9d2803f7 3130 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
6049f4f8
RH		 3131 break;
3132 case 0x83:
3133 /* CALLSYS */
3134 trapnr = env->ir[IR_V0];
3135 sysret = do_syscall(env, trapnr,
3136 env->ir[IR_A0], env->ir[IR_A1],
3137 env->ir[IR_A2], env->ir[IR_A3],
5945cfcb
PM		 3138 env->ir[IR_A4], env->ir[IR_A5],
3139 0, 0);
338c858c
TB		 3140 if (sysret == -TARGET_ERESTARTSYS) {
3141 env->pc -= 4;
3142 break;
3143 }
3144 if (sysret == -TARGET_QEMU_ESIGRETURN) {
a5b3b13b
RH		 3145 break;
3146 }
3147 /* Syscall writes 0 to V0 to bypass error check, similar
0e141977
RH		 3148 to how this is handled internal to Linux kernel.
3149 (Ab)use trapnr temporarily as boolean indicating error. */
3150 trapnr = (env->ir[IR_V0] != 0 && sysret < 0);
3151 env->ir[IR_V0] = (trapnr ? -sysret : sysret);
3152 env->ir[IR_A3] = trapnr;
6049f4f8
RH		 3153 break;
3154 case 0x86:
3155 /* IMB */
3156 /* ??? We can probably elide the code using page_unprotect
3157 that is checking for self-modifying code. Instead we
3158 could simply call tb_flush here. Until we work out the
3159 changes required to turn off the extra write protection,
3160 this can be a no-op. */
3161 break;
3162 case 0x9E:
3163 /* RDUNIQUE */
3164 /* Handled in the translator for usermode. */
3165 abort();
3166 case 0x9F:
3167 /* WRUNIQUE */
3168 /* Handled in the translator for usermode. */
3169 abort();
3170 case 0xAA:
3171 /* GENTRAP */
3172 info.si_signo = TARGET_SIGFPE;
3173 switch (env->ir[IR_A0]) {
3174 case TARGET_GEN_INTOVF:
3175 info.si_code = TARGET_FPE_INTOVF;
3176 break;
3177 case TARGET_GEN_INTDIV:
3178 info.si_code = TARGET_FPE_INTDIV;
3179 break;
3180 case TARGET_GEN_FLTOVF:
3181 info.si_code = TARGET_FPE_FLTOVF;
3182 break;
3183 case TARGET_GEN_FLTUND:
3184 info.si_code = TARGET_FPE_FLTUND;
3185 break;
3186 case TARGET_GEN_FLTINV:
3187 info.si_code = TARGET_FPE_FLTINV;
3188 break;
3189 case TARGET_GEN_FLTINE:
3190 info.si_code = TARGET_FPE_FLTRES;
3191 break;
3192 case TARGET_GEN_ROPRAND:
3193 info.si_code = 0;
3194 break;
3195 default:
3196 info.si_signo = TARGET_SIGTRAP;
3197 info.si_code = 0;
3198 break;
3199 }
3200 info.si_errno = 0;
3201 info._sifields._sigfault._addr = env->pc;
9d2803f7 3202 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
6049f4f8
RH		 3203 break;
3204 default:
3205 goto do_sigill;
3206 }
7a3148a9 3207 break;
7a3148a9 3208 case EXCP_DEBUG:
db6b81d4 3209 info.si_signo = gdb_handlesig(cs, TARGET_SIGTRAP);
6049f4f8 3210 if (info.si_signo) {
6910b8f6 3211 env->lock_addr = -1;
6049f4f8
RH		 3212 info.si_errno = 0;
3213 info.si_code = TARGET_TRAP_BRKPT;
9d2803f7 3214 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
7a3148a9
JM		 3215 }
3216 break;
d0f20495
RH		 3217 case EXCP_INTERRUPT:
3218 /* Just indicate that signals should be handled asap. */
3219 break;
fdbc2b57
RH		 3220 case EXCP_ATOMIC:
3221 cpu_exec_step_atomic(cs);
3222 break;
7a3148a9
JM		 3223 default:
3224 printf ("Unhandled trap: 0x%x\n", trapnr);
878096ee 3225 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 3226 exit(EXIT_FAILURE);
7a3148a9
JM		 3227 }
3228 process_pending_signals (env);
3229 }
3230}
3231#endif /* TARGET_ALPHA */
3232
a4c075f1
UH		 3233#ifdef TARGET_S390X
3234void cpu_loop(CPUS390XState *env)
3235{
878096ee 3236 CPUState *cs = CPU(s390_env_get_cpu(env));
d5a103cd 3237 int trapnr, n, sig;
a4c075f1 3238 target_siginfo_t info;
d5a103cd 3239 target_ulong addr;
47405ab6 3240 abi_long ret;
a4c075f1
UH		 3241
3242 while (1) {
b040bc9c 3243 cpu_exec_start(cs);
8642c1b8 3244 trapnr = cpu_exec(cs);
b040bc9c 3245 cpu_exec_end(cs);
d148d90e
SF		 3246 process_queued_cpu_work(cs);
3247
a4c075f1
UH		 3248 switch (trapnr) {
3249 case EXCP_INTERRUPT:
d5a103cd 3250 /* Just indicate that signals should be handled asap. */
a4c075f1 3251 break;
a4c075f1 3252
d5a103cd
RH		 3253 case EXCP_SVC:
3254 n = env->int_svc_code;
3255 if (!n) {
3256 /* syscalls > 255 */
3257 n = env->regs[1];
a4c075f1 3258 }
d5a103cd 3259 env->psw.addr += env->int_svc_ilen;
47405ab6
TB		 3260 ret = do_syscall(env, n, env->regs[2], env->regs[3],
3261 env->regs[4], env->regs[5],
3262 env->regs[6], env->regs[7], 0, 0);
3263 if (ret == -TARGET_ERESTARTSYS) {
3264 env->psw.addr -= env->int_svc_ilen;
3265 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
3266 env->regs[2] = ret;
3267 }
a4c075f1 3268 break;
d5a103cd
RH		 3269
3270 case EXCP_DEBUG:
db6b81d4 3271 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
d5a103cd
RH		 3272 if (sig) {
3273 n = TARGET_TRAP_BRKPT;
3274 goto do_signal_pc;
a4c075f1
UH		 3275 }
3276 break;
d5a103cd
RH		 3277 case EXCP_PGM:
3278 n = env->int_pgm_code;
3279 switch (n) {
3280 case PGM_OPERATION:
3281 case PGM_PRIVILEGED:
a86b3c64 3282 sig = TARGET_SIGILL;
d5a103cd
RH		 3283 n = TARGET_ILL_ILLOPC;
3284 goto do_signal_pc;
3285 case PGM_PROTECTION:
3286 case PGM_ADDRESSING:
a86b3c64 3287 sig = TARGET_SIGSEGV;
a4c075f1 3288 /* XXX: check env->error_code */
d5a103cd
RH		 3289 n = TARGET_SEGV_MAPERR;
3290 addr = env->__excp_addr;
3291 goto do_signal;
3292 case PGM_EXECUTE:
3293 case PGM_SPECIFICATION:
3294 case PGM_SPECIAL_OP:
3295 case PGM_OPERAND:
3296 do_sigill_opn:
a86b3c64 3297 sig = TARGET_SIGILL;
d5a103cd
RH		 3298 n = TARGET_ILL_ILLOPN;
3299 goto do_signal_pc;
3300
3301 case PGM_FIXPT_OVERFLOW:
a86b3c64 3302 sig = TARGET_SIGFPE;
d5a103cd
RH		 3303 n = TARGET_FPE_INTOVF;
3304 goto do_signal_pc;
3305 case PGM_FIXPT_DIVIDE:
a86b3c64 3306 sig = TARGET_SIGFPE;
d5a103cd
RH		 3307 n = TARGET_FPE_INTDIV;
3308 goto do_signal_pc;
3309
3310 case PGM_DATA:
3311 n = (env->fpc >> 8) & 0xff;
3312 if (n == 0xff) {
3313 /* compare-and-trap */
3314 goto do_sigill_opn;
3315 } else {
3316 /* An IEEE exception, simulated or otherwise. */
3317 if (n & 0x80) {
3318 n = TARGET_FPE_FLTINV;
3319 } else if (n & 0x40) {
3320 n = TARGET_FPE_FLTDIV;
3321 } else if (n & 0x20) {
3322 n = TARGET_FPE_FLTOVF;
3323 } else if (n & 0x10) {
3324 n = TARGET_FPE_FLTUND;
3325 } else if (n & 0x08) {
3326 n = TARGET_FPE_FLTRES;
3327 } else {
3328 /* ??? Quantum exception; BFP, DFP error. */
3329 goto do_sigill_opn;
3330 }
a86b3c64 3331 sig = TARGET_SIGFPE;
d5a103cd
RH		 3332 goto do_signal_pc;
3333 }
3334
3335 default:
3336 fprintf(stderr, "Unhandled program exception: %#x\n", n);
878096ee 3337 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 3338 exit(EXIT_FAILURE);
a4c075f1
UH		 3339 }
3340 break;
d5a103cd
RH		 3341
3342 do_signal_pc:
3343 addr = env->psw.addr;
3344 do_signal:
3345 info.si_signo = sig;
3346 info.si_errno = 0;
3347 info.si_code = n;
3348 info._sifields._sigfault._addr = addr;
9d2803f7 3349 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
a4c075f1 3350 break;
d5a103cd 3351
fdbc2b57
RH		 3352 case EXCP_ATOMIC:
3353 cpu_exec_step_atomic(cs);
3354 break;
a4c075f1 3355 default:
d5a103cd 3356 fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr);
878096ee 3357 cpu_dump_state(cs, stderr, fprintf, 0);
4d1275c2 3358 exit(EXIT_FAILURE);
a4c075f1
UH		 3359 }
3360 process_pending_signals (env);
3361 }
3362}
3363
3364#endif /* TARGET_S390X */
3365
b16189b2
CG		 3366#ifdef TARGET_TILEGX
3367
b16189b2
CG		 3368static void gen_sigill_reg(CPUTLGState *env)
3369{
3370 target_siginfo_t info;
3371
3372 info.si_signo = TARGET_SIGILL;
3373 info.si_errno = 0;
3374 info.si_code = TARGET_ILL_PRVREG;
3375 info._sifields._sigfault._addr = env->pc;
9d2803f7 3376 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
b16189b2
CG		 3377}
3378
a0577d2a 3379static void do_signal(CPUTLGState *env, int signo, int sigcode)
dd8070d8
CG		 3380{
3381 target_siginfo_t info;
3382
a0577d2a 3383 info.si_signo = signo;
dd8070d8 3384 info.si_errno = 0;
dd8070d8 3385 info._sifields._sigfault._addr = env->pc;
a0577d2a
RH		 3386
3387 if (signo == TARGET_SIGSEGV) {
3388 /* The passed in sigcode is a dummy; check for a page mapping
3389 and pass either MAPERR or ACCERR. */
3390 target_ulong addr = env->excaddr;
3391 info._sifields._sigfault._addr = addr;
3392 if (page_check_range(addr, 1, PAGE_VALID) < 0) {
3393 sigcode = TARGET_SEGV_MAPERR;
3394 } else {
3395 sigcode = TARGET_SEGV_ACCERR;
3396 }
3397 }
3398 info.si_code = sigcode;
3399
9d2803f7 3400 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
dd8070d8
CG		 3401}
3402
a0577d2a
RH		 3403static void gen_sigsegv_maperr(CPUTLGState *env, target_ulong addr)
3404{
3405 env->excaddr = addr;
3406 do_signal(env, TARGET_SIGSEGV, 0);
3407}
3408
0583b233
RH		 3409static void set_regval(CPUTLGState *env, uint8_t reg, uint64_t val)
3410{
3411 if (unlikely(reg >= TILEGX_R_COUNT)) {
3412 switch (reg) {
3413 case TILEGX_R_SN:
3414 case TILEGX_R_ZERO:
3415 return;
3416 case TILEGX_R_IDN0:
3417 case TILEGX_R_IDN1:
3418 case TILEGX_R_UDN0:
3419 case TILEGX_R_UDN1:
3420 case TILEGX_R_UDN2:
3421 case TILEGX_R_UDN3:
3422 gen_sigill_reg(env);
3423 return;
3424 default:
3425 g_assert_not_reached();
3426 }
3427 }
3428 env->regs[reg] = val;
3429}
3430
3431/*
3432 * Compare the 8-byte contents of the CmpValue SPR with the 8-byte value in
3433 * memory at the address held in the first source register. If the values are
3434 * not equal, then no memory operation is performed. If the values are equal,
3435 * the 8-byte quantity from the second source register is written into memory
3436 * at the address held in the first source register. In either case, the result
3437 * of the instruction is the value read from memory. The compare and write to
3438 * memory are atomic and thus can be used for synchronization purposes. This
3439 * instruction only operates for addresses aligned to a 8-byte boundary.
3440 * Unaligned memory access causes an Unaligned Data Reference interrupt.
3441 *
3442 * Functional Description (64-bit)
3443 * uint64_t memVal = memoryReadDoubleWord (rf[SrcA]);
3444 * rf[Dest] = memVal;
3445 * if (memVal == SPR[CmpValueSPR])
3446 * memoryWriteDoubleWord (rf[SrcA], rf[SrcB]);
3447 *
3448 * Functional Description (32-bit)
3449 * uint64_t memVal = signExtend32 (memoryReadWord (rf[SrcA]));
3450 * rf[Dest] = memVal;
3451 * if (memVal == signExtend32 (SPR[CmpValueSPR]))
3452 * memoryWriteWord (rf[SrcA], rf[SrcB]);
3453 *
3454 *
3455 * This function also processes exch and exch4 which need not process SPR.
3456 */
3457static void do_exch(CPUTLGState *env, bool quad, bool cmp)
3458{
3459 target_ulong addr;
3460 target_long val, sprval;
3461
3462 start_exclusive();
3463
3464 addr = env->atomic_srca;
3465 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
3466 goto sigsegv_maperr;
3467 }
3468
3469 if (cmp) {
3470 if (quad) {
3471 sprval = env->spregs[TILEGX_SPR_CMPEXCH];
3472 } else {
3473 sprval = sextract64(env->spregs[TILEGX_SPR_CMPEXCH], 0, 32);
3474 }
3475 }
3476
3477 if (!cmp || val == sprval) {
3478 target_long valb = env->atomic_srcb;
3479 if (quad ? put_user_u64(valb, addr) : put_user_u32(valb, addr)) {
3480 goto sigsegv_maperr;
3481 }
3482 }
3483
3484 set_regval(env, env->atomic_dstr, val);
3485 end_exclusive();
3486 return;
3487
3488 sigsegv_maperr:
3489 end_exclusive();
3490 gen_sigsegv_maperr(env, addr);
3491}
3492
3493static void do_fetch(CPUTLGState *env, int trapnr, bool quad)
3494{
3495 int8_t write = 1;
3496 target_ulong addr;
3497 target_long val, valb;
3498
3499 start_exclusive();
3500
3501 addr = env->atomic_srca;
3502 valb = env->atomic_srcb;
3503 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
3504 goto sigsegv_maperr;
3505 }
3506
3507 switch (trapnr) {
3508 case TILEGX_EXCP_OPCODE_FETCHADD:
3509 case TILEGX_EXCP_OPCODE_FETCHADD4:
3510 valb += val;
3511 break;
3512 case TILEGX_EXCP_OPCODE_FETCHADDGEZ:
3513 valb += val;
3514 if (valb < 0) {
3515 write = 0;
3516 }
3517 break;
3518 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4:
3519 valb += val;
3520 if ((int32_t)valb < 0) {
3521 write = 0;
3522 }
3523 break;
3524 case TILEGX_EXCP_OPCODE_FETCHAND:
3525 case TILEGX_EXCP_OPCODE_FETCHAND4:
3526 valb &= val;
3527 break;
3528 case TILEGX_EXCP_OPCODE_FETCHOR:
3529 case TILEGX_EXCP_OPCODE_FETCHOR4:
3530 valb |= val;
3531 break;
3532 default:
3533 g_assert_not_reached();
3534 }
3535
3536 if (write) {
3537 if (quad ? put_user_u64(valb, addr) : put_user_u32(valb, addr)) {
3538 goto sigsegv_maperr;
3539 }
3540 }
3541
3542 set_regval(env, env->atomic_dstr, val);
3543 end_exclusive();
3544 return;
3545
3546 sigsegv_maperr:
3547 end_exclusive();
3548 gen_sigsegv_maperr(env, addr);
3549}
3550
b16189b2
CG		 3551void cpu_loop(CPUTLGState *env)
3552{
3553 CPUState *cs = CPU(tilegx_env_get_cpu(env));
3554 int trapnr;
3555
3556 while (1) {
3557 cpu_exec_start(cs);
8642c1b8 3558 trapnr = cpu_exec(cs);
b16189b2 3559 cpu_exec_end(cs);
d148d90e
SF		 3560 process_queued_cpu_work(cs);
3561
b16189b2
CG		 3562 switch (trapnr) {
3563 case TILEGX_EXCP_SYSCALL:
a9175169
PM		 3564 {
3565 abi_ulong ret = do_syscall(env, env->regs[TILEGX_R_NR],
3566 env->regs[0], env->regs[1],
3567 env->regs[2], env->regs[3],
3568 env->regs[4], env->regs[5],
3569 env->regs[6], env->regs[7]);
3570 if (ret == -TARGET_ERESTARTSYS) {
3571 env->pc -= 8;
3572 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
3573 env->regs[TILEGX_R_RE] = ret;
3574 env->regs[TILEGX_R_ERR] = TILEGX_IS_ERRNO(ret) ? -ret : 0;
3575 }
b16189b2 3576 break;
a9175169 3577 }
0583b233
RH		 3578 case TILEGX_EXCP_OPCODE_EXCH:
3579 do_exch(env, true, false);
3580 break;
3581 case TILEGX_EXCP_OPCODE_EXCH4:
3582 do_exch(env, false, false);
3583 break;
3584 case TILEGX_EXCP_OPCODE_CMPEXCH:
3585 do_exch(env, true, true);
3586 break;
3587 case TILEGX_EXCP_OPCODE_CMPEXCH4:
3588 do_exch(env, false, true);
3589 break;
3590 case TILEGX_EXCP_OPCODE_FETCHADD:
3591 case TILEGX_EXCP_OPCODE_FETCHADDGEZ:
3592 case TILEGX_EXCP_OPCODE_FETCHAND:
3593 case TILEGX_EXCP_OPCODE_FETCHOR:
3594 do_fetch(env, trapnr, true);
3595 break;
3596 case TILEGX_EXCP_OPCODE_FETCHADD4:
3597 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4:
3598 case TILEGX_EXCP_OPCODE_FETCHAND4:
3599 case TILEGX_EXCP_OPCODE_FETCHOR4:
3600 do_fetch(env, trapnr, false);
3601 break;
dd8070d8 3602 case TILEGX_EXCP_SIGNAL:
a0577d2a 3603 do_signal(env, env->signo, env->sigcode);
dd8070d8 3604 break;
b16189b2
CG		 3605 case TILEGX_EXCP_REG_IDN_ACCESS:
3606 case TILEGX_EXCP_REG_UDN_ACCESS:
3607 gen_sigill_reg(env);
3608 break;
fdbc2b57
RH		 3609 case EXCP_ATOMIC:
3610 cpu_exec_step_atomic(cs);
3611 break;
b16189b2
CG		 3612 default:
3613 fprintf(stderr, "trapnr is %d[0x%x].\n", trapnr, trapnr);
3614 g_assert_not_reached();
3615 }
3616 process_pending_signals(env);
3617 }
3618}
3619
3620#endif
3621
7c248bcd
RH		 3622#ifdef TARGET_HPPA
3623
3624static abi_ulong hppa_lws(CPUHPPAState *env)
3625{
3626 uint32_t which = env->gr[20];
3627 abi_ulong addr = env->gr[26];
3628 abi_ulong old = env->gr[25];
3629 abi_ulong new = env->gr[24];
3630 abi_ulong size, ret;
3631
3632 switch (which) {
3633 default:
3634 return -TARGET_ENOSYS;
3635
3636 case 0: /* elf32 atomic 32bit cmpxchg */
3637 if ((addr & 3) || !access_ok(VERIFY_WRITE, addr, 4)) {
3638 return -TARGET_EFAULT;
3639 }
3640 old = tswap32(old);
3641 new = tswap32(new);
3642 ret = atomic_cmpxchg((uint32_t *)g2h(addr), old, new);
3643 ret = tswap32(ret);
3644 break;
3645
3646 case 2: /* elf32 atomic "new" cmpxchg */
3647 size = env->gr[23];
3648 if (size >= 4) {
3649 return -TARGET_ENOSYS;
3650 }
3651 if (((addr | old | new) & ((1 << size) - 1))
3652 || !access_ok(VERIFY_WRITE, addr, 1 << size)
3653 || !access_ok(VERIFY_READ, old, 1 << size)
3654 || !access_ok(VERIFY_READ, new, 1 << size)) {
3655 return -TARGET_EFAULT;
3656 }
3657 /* Note that below we use host-endian loads so that the cmpxchg
3658 can be host-endian as well. */
3659 switch (size) {
3660 case 0:
3661 old = *(uint8_t *)g2h(old);
3662 new = *(uint8_t *)g2h(new);
3663 ret = atomic_cmpxchg((uint8_t *)g2h(addr), old, new);
3664 ret = ret != old;
3665 break;
3666 case 1:
3667 old = *(uint16_t *)g2h(old);
3668 new = *(uint16_t *)g2h(new);
3669 ret = atomic_cmpxchg((uint16_t *)g2h(addr), old, new);
3670 ret = ret != old;
3671 break;
3672 case 2:
3673 old = *(uint32_t *)g2h(old);
3674 new = *(uint32_t *)g2h(new);
3675 ret = atomic_cmpxchg((uint32_t *)g2h(addr), old, new);
3676 ret = ret != old;
3677 break;
3678 case 3:
3679 {
3680 uint64_t o64, n64, r64;
3681 o64 = *(uint64_t *)g2h(old);
3682 n64 = *(uint64_t *)g2h(new);
3683#ifdef CONFIG_ATOMIC64
3684 r64 = atomic_cmpxchg__nocheck((uint64_t *)g2h(addr), o64, n64);
3685 ret = r64 != o64;
3686#else
3687 start_exclusive();
3688 r64 = *(uint64_t *)g2h(addr);
3689 ret = 1;
3690 if (r64 == o64) {
3691 *(uint64_t *)g2h(addr) = n64;
3692 ret = 0;
3693 }
3694 end_exclusive();
3695#endif
3696 }
3697 break;
3698 }
3699 break;
3700 }
3701
3702 env->gr[28] = ret;
3703 return 0;
3704}
3705
3706void cpu_loop(CPUHPPAState *env)
3707{
3708 CPUState *cs = CPU(hppa_env_get_cpu(env));
3709 target_siginfo_t info;
3710 abi_ulong ret;
3711 int trapnr;
3712
3713 while (1) {
3714 cpu_exec_start(cs);
3715 trapnr = cpu_exec(cs);
3716 cpu_exec_end(cs);
3717 process_queued_cpu_work(cs);
3718
3719 switch (trapnr) {
3720 case EXCP_SYSCALL:
3721 ret = do_syscall(env, env->gr[20],
3722 env->gr[26], env->gr[25],
3723 env->gr[24], env->gr[23],
3724 env->gr[22], env->gr[21], 0, 0);
3725 switch (ret) {
3726 default:
3727 env->gr[28] = ret;
3728 /* We arrived here by faking the gateway page. Return. */
3729 env->iaoq_f = env->gr[31];
3730 env->iaoq_b = env->gr[31] + 4;
3731 break;
3732 case -TARGET_ERESTARTSYS:
3733 case -TARGET_QEMU_ESIGRETURN:
3734 break;
3735 }
3736 break;
3737 case EXCP_SYSCALL_LWS:
3738 env->gr[21] = hppa_lws(env);
3739 /* We arrived here by faking the gateway page. Return. */
3740 env->iaoq_f = env->gr[31];
3741 env->iaoq_b = env->gr[31] + 4;
3742 break;
3743 case EXCP_SIGSEGV:
3744 info.si_signo = TARGET_SIGSEGV;
3745 info.si_errno = 0;
3746 info.si_code = TARGET_SEGV_ACCERR;
3747 info._sifields._sigfault._addr = env->ior;
3748 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3749 break;
3750 case EXCP_SIGILL:
3751 info.si_signo = TARGET_SIGILL;
3752 info.si_errno = 0;
3753 info.si_code = TARGET_ILL_ILLOPN;
3754 info._sifields._sigfault._addr = env->iaoq_f;
3755 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3756 break;
3757 case EXCP_SIGFPE:
3758 info.si_signo = TARGET_SIGFPE;
3759 info.si_errno = 0;
3760 info.si_code = 0;
3761 info._sifields._sigfault._addr = env->iaoq_f;
3762 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3763 break;
3764 case EXCP_DEBUG:
3765 trapnr = gdb_handlesig(cs, TARGET_SIGTRAP);
3766 if (trapnr) {
3767 info.si_signo = trapnr;
3768 info.si_errno = 0;
3769 info.si_code = TARGET_TRAP_BRKPT;
3770 queue_signal(env, trapnr, QEMU_SI_FAULT, &info);
3771 }
3772 break;
3773 case EXCP_INTERRUPT:
3774 /* just indicate that signals should be handled asap */
3775 break;
3776 default:
3777 g_assert_not_reached();
3778 }
3779 process_pending_signals(env);
3780 }
3781}
3782
3783#endif /* TARGET_HPPA */
3784
a2247f8e 3785THREAD CPUState *thread_cpu;
59faf6d6 3786
178f9429
SF		 3787bool qemu_cpu_is_self(CPUState *cpu)
3788{
3789 return thread_cpu == cpu;
3790}
3791
3792void qemu_cpu_kick(CPUState *cpu)
3793{
3794 cpu_exit(cpu);
3795}
3796
edf8e2af
MW		 3797void task_settid(TaskState *ts)
3798{
3799 if (ts->ts_tid == 0) {
edf8e2af 3800 ts->ts_tid = (pid_t)syscall(SYS_gettid);
edf8e2af
MW		 3801 }
3802}
3803
3804void stop_all_tasks(void)
3805{
3806 /*
3807 * We trust that when using NPTL, start_exclusive()
3808 * handles thread stopping correctly.
3809 */
3810 start_exclusive();
3811}
3812
c3a92833 3813/* Assumes contents are already zeroed. */
624f7979
PB		 3814void init_task_state(TaskState *ts)
3815{
624f7979 3816 ts->used = 1;
624f7979 3817}
fc9c5412 3818
30ba0ee5
AF		 3819CPUArchState *cpu_copy(CPUArchState *env)
3820{
ff4700b0 3821 CPUState *cpu = ENV_GET_CPU(env);
2994fd96 3822 CPUState *new_cpu = cpu_init(cpu_model);
61c7480f 3823 CPUArchState *new_env = new_cpu->env_ptr;
30ba0ee5
AF		 3824 CPUBreakpoint *bp;
3825 CPUWatchpoint *wp;
30ba0ee5
AF		 3826
3827 /* Reset non arch specific state */
75a34036 3828 cpu_reset(new_cpu);
30ba0ee5
AF		 3829
3830 memcpy(new_env, env, sizeof(CPUArchState));
3831
3832 /* Clone all break/watchpoints.
3833 Note: Once we support ptrace with hw-debug register access, make sure
3834 BP_CPU break/watchpoints are handled correctly on clone. */
1d085f6c
TB		 3835 QTAILQ_INIT(&new_cpu->breakpoints);
3836 QTAILQ_INIT(&new_cpu->watchpoints);
f0c3c505 3837 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
b3310ab3 3838 cpu_breakpoint_insert(new_cpu, bp->pc, bp->flags, NULL);
30ba0ee5 3839 }
ff4700b0 3840 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
05068c0d 3841 cpu_watchpoint_insert(new_cpu, wp->vaddr, wp->len, wp->flags, NULL);
30ba0ee5 3842 }
30ba0ee5
AF		 3843
3844 return new_env;
3845}
3846
fc9c5412
JS		 3847static void handle_arg_help(const char *arg)
3848{
4d1275c2 3849 usage(EXIT_SUCCESS);
fc9c5412
JS		 3850}
3851
3852static void handle_arg_log(const char *arg)
3853{
3854 int mask;
fc9c5412 3855
4fde1eba 3856 mask = qemu_str_to_log_mask(arg);
fc9c5412 3857 if (!mask) {
59a6fa6e 3858 qemu_print_log_usage(stdout);
4d1275c2 3859 exit(EXIT_FAILURE);
fc9c5412 3860 }
f2937a33 3861 qemu_log_needs_buffers();
24537a01 3862 qemu_set_log(mask);
fc9c5412
JS		 3863}
3864
50171d42
CWR		 3865static void handle_arg_log_filename(const char *arg)
3866{
daa76aa4 3867 qemu_set_log_filename(arg, &error_fatal);
50171d42
CWR		 3868}
3869
fc9c5412
JS		 3870static void handle_arg_set_env(const char *arg)
3871{
3872 char *r, *p, *token;
3873 r = p = strdup(arg);
3874 while ((token = strsep(&p, ",")) != NULL) {
3875 if (envlist_setenv(envlist, token) != 0) {
4d1275c2 3876 usage(EXIT_FAILURE);
fc9c5412
JS		 3877 }
3878 }
3879 free(r);
3880}
3881
3882static void handle_arg_unset_env(const char *arg)
3883{
3884 char *r, *p, *token;
3885 r = p = strdup(arg);
3886 while ((token = strsep(&p, ",")) != NULL) {
3887 if (envlist_unsetenv(envlist, token) != 0) {
4d1275c2 3888 usage(EXIT_FAILURE);
fc9c5412
JS		 3889 }
3890 }
3891 free(r);
3892}
3893
3894static void handle_arg_argv0(const char *arg)
3895{
3896 argv0 = strdup(arg);
3897}
3898
3899static void handle_arg_stack_size(const char *arg)
3900{
3901 char *p;
3902 guest_stack_size = strtoul(arg, &p, 0);
3903 if (guest_stack_size == 0) {
4d1275c2 3904 usage(EXIT_FAILURE);
fc9c5412
JS		 3905 }
3906
3907 if (*p == 'M') {
3908 guest_stack_size *= 1024 * 1024;
3909 } else if (*p == 'k' || *p == 'K') {
3910 guest_stack_size *= 1024;
3911 }
3912}
3913
3914static void handle_arg_ld_prefix(const char *arg)
3915{
3916 interp_prefix = strdup(arg);
3917}
3918
3919static void handle_arg_pagesize(const char *arg)
3920{
3921 qemu_host_page_size = atoi(arg);
3922 if (qemu_host_page_size == 0 ||
3923 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
3924 fprintf(stderr, "page size must be a power of two\n");
4d1275c2 3925 exit(EXIT_FAILURE);
fc9c5412
JS		 3926 }
3927}
3928
c5e4a5a9
MR		 3929static void handle_arg_randseed(const char *arg)
3930{
3931 unsigned long long seed;
3932
3933 if (parse_uint_full(arg, &seed, 0) != 0 || seed > UINT_MAX) {
3934 fprintf(stderr, "Invalid seed number: %s\n", arg);
4d1275c2 3935 exit(EXIT_FAILURE);
c5e4a5a9
MR		 3936 }
3937 srand(seed);
3938}
3939
fc9c5412
JS		 3940static void handle_arg_gdb(const char *arg)
3941{
3942 gdbstub_port = atoi(arg);
3943}
3944
3945static void handle_arg_uname(const char *arg)
3946{
3947 qemu_uname_release = strdup(arg);
3948}
3949
3950static void handle_arg_cpu(const char *arg)
3951{
3952 cpu_model = strdup(arg);
c8057f95 3953 if (cpu_model == NULL || is_help_option(cpu_model)) {
fc9c5412 3954 /* XXX: implement xxx_cpu_list for targets that still miss it */
e916cbf8
PM		 3955#if defined(cpu_list)
3956 cpu_list(stdout, &fprintf);
fc9c5412 3957#endif
4d1275c2 3958 exit(EXIT_FAILURE);
fc9c5412
JS		 3959 }
3960}
3961
fc9c5412
JS		 3962static void handle_arg_guest_base(const char *arg)
3963{
3964 guest_base = strtol(arg, NULL, 0);
3965 have_guest_base = 1;
3966}
3967
3968static void handle_arg_reserved_va(const char *arg)
3969{
3970 char *p;
3971 int shift = 0;
3972 reserved_va = strtoul(arg, &p, 0);
3973 switch (*p) {
3974 case 'k':
3975 case 'K':
3976 shift = 10;
3977 break;
3978 case 'M':
3979 shift = 20;
3980 break;
3981 case 'G':
3982 shift = 30;
3983 break;
3984 }
3985 if (shift) {
3986 unsigned long unshifted = reserved_va;
3987 p++;
3988 reserved_va <<= shift;
3989 if (((reserved_va >> shift) != unshifted)
3990#if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3991 || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS))
3992#endif
3993 ) {
3994 fprintf(stderr, "Reserved virtual address too big\n");
4d1275c2 3995 exit(EXIT_FAILURE);
fc9c5412
JS		 3996 }
3997 }
3998 if (*p) {
3999 fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);
4d1275c2 4000 exit(EXIT_FAILURE);
fc9c5412
JS		 4001 }
4002}
fc9c5412
JS		 4003
4004static void handle_arg_singlestep(const char *arg)
4005{
4006 singlestep = 1;
4007}
4008
4009static void handle_arg_strace(const char *arg)
4010{
4011 do_strace = 1;
4012}
4013
4014static void handle_arg_version(const char *arg)
4015{
2e59915d 4016 printf("qemu-" TARGET_NAME " version " QEMU_VERSION QEMU_PKGVERSION
0781dd6e 4017 "\n" QEMU_COPYRIGHT "\n");
4d1275c2 4018 exit(EXIT_SUCCESS);
fc9c5412
JS		 4019}
4020
6533dd6e
LV		 4021static char *trace_file;
4022static void handle_arg_trace(const char *arg)
4023{
4024 g_free(trace_file);
4025 trace_file = trace_opt_parse(arg);
4026}
4027
fc9c5412
JS		 4028struct qemu_argument {
4029 const char *argv;
4030 const char *env;
4031 bool has_arg;
4032 void (*handle_opt)(const char *arg);
4033 const char *example;
4034 const char *help;
4035};
4036
42644cee 4037static const struct qemu_argument arg_table[] = {
fc9c5412
JS		 4038 {"h", "", false, handle_arg_help,
4039 "", "print this help"},
daaf8c8e
MI		 4040 {"help", "", false, handle_arg_help,
4041 "", ""},
fc9c5412
JS		 4042 {"g", "QEMU_GDB", true, handle_arg_gdb,
4043 "port", "wait gdb connection to 'port'"},
4044 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix,
4045 "path", "set the elf interpreter prefix to 'path'"},
4046 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size,
4047 "size", "set the stack size to 'size' bytes"},
4048 {"cpu", "QEMU_CPU", true, handle_arg_cpu,
c8057f95 4049 "model", "select CPU (-cpu help for list)"},
fc9c5412
JS		 4050 {"E", "QEMU_SET_ENV", true, handle_arg_set_env,
4051 "var=value", "sets targets environment variable (see below)"},
4052 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env,
4053 "var", "unsets targets environment variable (see below)"},
4054 {"0", "QEMU_ARGV0", true, handle_arg_argv0,
4055 "argv0", "forces target process argv[0] to be 'argv0'"},
4056 {"r", "QEMU_UNAME", true, handle_arg_uname,
4057 "uname", "set qemu uname release string to 'uname'"},
fc9c5412
JS		 4058 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base,
4059 "address", "set guest_base address to 'address'"},
4060 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va,
4061 "size", "reserve 'size' bytes for guest virtual address space"},
fc9c5412 4062 {"d", "QEMU_LOG", true, handle_arg_log,
989b697d
PM		 4063 "item[,...]", "enable logging of specified items "
4064 "(use '-d help' for a list of items)"},
50171d42 4065 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename,
989b697d 4066 "logfile", "write logs to 'logfile' (default stderr)"},
fc9c5412
JS		 4067 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize,
4068 "pagesize", "set the host page size to 'pagesize'"},
4069 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep,
4070 "", "run in singlestep mode"},
4071 {"strace", "QEMU_STRACE", false, handle_arg_strace,
4072 "", "log system calls"},
c5e4a5a9
MR		 4073 {"seed", "QEMU_RAND_SEED", true, handle_arg_randseed,
4074 "", "Seed for pseudo-random number generator"},
6533dd6e
LV		 4075 {"trace", "QEMU_TRACE", true, handle_arg_trace,
4076 "", "[[enable=]<pattern>][,events=<file>][,file=<file>]"},
fc9c5412 4077 {"version", "QEMU_VERSION", false, handle_arg_version,
1386d4c0 4078 "", "display version information and exit"},
fc9c5412
JS		 4079 {NULL, NULL, false, NULL, NULL, NULL}
4080};
4081
d03f9c32 4082static void usage(int exitcode)
fc9c5412 4083{
42644cee 4084 const struct qemu_argument *arginfo;
fc9c5412
JS		 4085 int maxarglen;
4086 int maxenvlen;
4087
2e59915d
PB		 4088 printf("usage: qemu-" TARGET_NAME " [options] program [arguments...]\n"
4089 "Linux CPU emulator (compiled for " TARGET_NAME " emulation)\n"
fc9c5412
JS		 4090 "\n"
4091 "Options and associated environment variables:\n"
4092 "\n");
4093
63ec54d7
PM		 4094 /* Calculate column widths. We must always have at least enough space
4095 * for the column header.
4096 */
4097 maxarglen = strlen("Argument");
4098 maxenvlen = strlen("Env-variable");
fc9c5412
JS		 4099
4100 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
63ec54d7
PM		 4101 int arglen = strlen(arginfo->argv);
4102 if (arginfo->has_arg) {
4103 arglen += strlen(arginfo->example) + 1;
4104 }
fc9c5412
JS		 4105 if (strlen(arginfo->env) > maxenvlen) {
4106 maxenvlen = strlen(arginfo->env);
4107 }
63ec54d7
PM		 4108 if (arglen > maxarglen) {
4109 maxarglen = arglen;
fc9c5412
JS		 4110 }
4111 }
4112
63ec54d7
PM		 4113 printf("%-*s %-*s Description\n", maxarglen+1, "Argument",
4114 maxenvlen, "Env-variable");
fc9c5412
JS		 4115
4116 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
4117 if (arginfo->has_arg) {
4118 printf("-%s %-*s %-*s %s\n", arginfo->argv,
63ec54d7
PM		 4119 (int)(maxarglen - strlen(arginfo->argv) - 1),
4120 arginfo->example, maxenvlen, arginfo->env, arginfo->help);
fc9c5412 4121 } else {
63ec54d7 4122 printf("-%-*s %-*s %s\n", maxarglen, arginfo->argv,
fc9c5412
JS		 4123 maxenvlen, arginfo->env,
4124 arginfo->help);
4125 }
4126 }
4127
4128 printf("\n"
4129 "Defaults:\n"
4130 "QEMU_LD_PREFIX = %s\n"
989b697d 4131 "QEMU_STACK_SIZE = %ld byte\n",
fc9c5412 4132 interp_prefix,
989b697d 4133 guest_stack_size);
fc9c5412
JS		 4134
4135 printf("\n"
4136 "You can use -E and -U options or the QEMU_SET_ENV and\n"
4137 "QEMU_UNSET_ENV environment variables to set and unset\n"
4138 "environment variables for the target process.\n"
4139 "It is possible to provide several variables by separating them\n"
4140 "by commas in getsubopt(3) style. Additionally it is possible to\n"
4141 "provide the -E and -U options multiple times.\n"
4142 "The following lines are equivalent:\n"
4143 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
4144 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
4145 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
4146 "Note that if you provide several changes to a single variable\n"
4147 "the last change will stay in effect.\n");
4148
d03f9c32 4149 exit(exitcode);
fc9c5412
JS		 4150}
4151
4152static int parse_args(int argc, char **argv)
4153{
4154 const char *r;
4155 int optind;
42644cee 4156 const struct qemu_argument *arginfo;
fc9c5412
JS		 4157
4158 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
4159 if (arginfo->env == NULL) {
4160 continue;
4161 }
4162
4163 r = getenv(arginfo->env);
4164 if (r != NULL) {
4165 arginfo->handle_opt(r);
4166 }
4167 }
4168
4169 optind = 1;
4170 for (;;) {
4171 if (optind >= argc) {
4172 break;
4173 }
4174 r = argv[optind];
4175 if (r[0] != '-') {
4176 break;
4177 }
4178 optind++;
4179 r++;
4180 if (!strcmp(r, "-")) {
4181 break;
4182 }
ba02577c
MI		 4183 /* Treat --foo the same as -foo. */
4184 if (r[0] == '-') {
4185 r++;
4186 }
fc9c5412
JS		 4187
4188 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
4189 if (!strcmp(r, arginfo->argv)) {
fc9c5412 4190 if (arginfo->has_arg) {
1386d4c0 4191 if (optind >= argc) {
138940bf
MI		 4192 (void) fprintf(stderr,
4193 "qemu: missing argument for option '%s'\n", r);
4d1275c2 4194 exit(EXIT_FAILURE);
1386d4c0
PM		 4195 }
4196 arginfo->handle_opt(argv[optind]);
fc9c5412 4197 optind++;
1386d4c0
PM		 4198 } else {
4199 arginfo->handle_opt(NULL);
fc9c5412 4200 }
fc9c5412
JS		 4201 break;
4202 }
4203 }
4204
4205 /* no option matched the current argv */
4206 if (arginfo->handle_opt == NULL) {
138940bf 4207 (void) fprintf(stderr, "qemu: unknown option '%s'\n", r);
4d1275c2 4208 exit(EXIT_FAILURE);
fc9c5412
JS		 4209 }
4210 }
4211
4212 if (optind >= argc) {
138940bf 4213 (void) fprintf(stderr, "qemu: no user program specified\n");
4d1275c2 4214 exit(EXIT_FAILURE);
fc9c5412
JS		 4215 }
4216
4217 filename = argv[optind];
4218 exec_path = argv[optind];
4219
4220 return optind;
4221}
4222
902b3d5c 4223int main(int argc, char **argv, char **envp)
31e31b8a 4224{
01ffc75b 4225 struct target_pt_regs regs1, *regs = &regs1;
31e31b8a 4226 struct image_info info1, *info = &info1;
edf8e2af 4227 struct linux_binprm bprm;
48e15fc2 4228 TaskState *ts;
9349b4f9 4229 CPUArchState *env;
db6b81d4 4230 CPUState *cpu;
586314f2 4231 int optind;
04a6dfeb 4232 char **target_environ, **wrk;
7d8cec95
AJ		 4233 char **target_argv;
4234 int target_argc;
7d8cec95 4235 int i;
fd4d81dd 4236 int ret;
03cfd8fa 4237 int execfd;
b12b6a18 4238
fe4db84d 4239 module_call_init(MODULE_INIT_TRACE);
267f685b 4240 qemu_init_cpu_list();
ce008c1f
AF		 4241 module_call_init(MODULE_INIT_QOM);
4242
04a6dfeb
AJ		 4243 if ((envlist = envlist_create()) == NULL) {
4244 (void) fprintf(stderr, "Unable to allocate envlist\n");
4d1275c2 4245 exit(EXIT_FAILURE);
04a6dfeb
AJ		 4246 }
4247
4248 /* add current environment into the list */
4249 for (wrk = environ; *wrk != NULL; wrk++) {
4250 (void) envlist_setenv(envlist, *wrk);
4251 }
4252
703e0e89
RH		 4253 /* Read the stack limit from the kernel. If it's "unlimited",
4254 then we can do little else besides use the default. */
4255 {
4256 struct rlimit lim;
4257 if (getrlimit(RLIMIT_STACK, &lim) == 0
81bbe906
TY		 4258 && lim.rlim_cur != RLIM_INFINITY
4259 && lim.rlim_cur == (target_long)lim.rlim_cur) {
703e0e89
RH		 4260 guest_stack_size = lim.rlim_cur;
4261 }
4262 }
4263
b1f9be31 4264 cpu_model = NULL;
b5ec5ce0 4265
c5e4a5a9
MR		 4266 srand(time(NULL));
4267
6533dd6e
LV		 4268 qemu_add_opts(&qemu_trace_opts);
4269
fc9c5412 4270 optind = parse_args(argc, argv);
586314f2 4271
6533dd6e
LV		 4272 if (!trace_init_backends()) {
4273 exit(1);
4274 }
4275 trace_init_file(trace_file);
4276
31e31b8a 4277 /* Zero out regs */
01ffc75b 4278 memset(regs, 0, sizeof(struct target_pt_regs));
31e31b8a
FB		 4279
4280 /* Zero out image_info */
4281 memset(info, 0, sizeof(struct image_info));
4282
edf8e2af
MW		 4283 memset(&bprm, 0, sizeof (bprm));
4284
74cd30b8
FB		 4285 /* Scan interp_prefix dir for replacement files. */
4286 init_paths(interp_prefix);
4287
4a24a758
PM		 4288 init_qemu_uname_release();
4289
46027c07 4290 if (cpu_model == NULL) {
aaed909a 4291#if defined(TARGET_I386)
46027c07
FB		 4292#ifdef TARGET_X86_64
4293 cpu_model = "qemu64";
4294#else
4295 cpu_model = "qemu32";
4296#endif
aaed909a 4297#elif defined(TARGET_ARM)
088ab16c 4298 cpu_model = "any";
d2fbca94
GX		 4299#elif defined(TARGET_UNICORE32)
4300 cpu_model = "any";
aaed909a
FB		 4301#elif defined(TARGET_M68K)
4302 cpu_model = "any";
4303#elif defined(TARGET_SPARC)
4304#ifdef TARGET_SPARC64
4305 cpu_model = "TI UltraSparc II";
4306#else
4307 cpu_model = "Fujitsu MB86904";
46027c07 4308#endif
aaed909a
FB		 4309#elif defined(TARGET_MIPS)
4310#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
74797f40 4311 cpu_model = "5KEf";
aaed909a
FB		 4312#else
4313 cpu_model = "24Kf";
4314#endif
d962783e
JL		 4315#elif defined TARGET_OPENRISC
4316 cpu_model = "or1200";
aaed909a 4317#elif defined(TARGET_PPC)
a74029f6 4318# ifdef TARGET_PPC64
de3f1b98 4319 cpu_model = "POWER8";
a74029f6 4320# else
aaed909a 4321 cpu_model = "750";
a74029f6 4322# endif
91c45a38
RH		 4323#elif defined TARGET_SH4
4324 cpu_model = TYPE_SH7785_CPU;
d8923bc7
DH		 4325#elif defined TARGET_S390X
4326 cpu_model = "qemu";
aaed909a
FB		 4327#else
4328 cpu_model = "any";
4329#endif
4330 }
d5ab9713 4331 tcg_exec_init(0);
83fb7adf
FB		 4332 /* NOTE: we need to init the CPU at this stage to get
4333 qemu_host_page_size */
2994fd96
EH		 4334 cpu = cpu_init(cpu_model);
4335 if (!cpu) {
aaed909a 4336 fprintf(stderr, "Unable to find CPU definition\n");
4d1275c2 4337 exit(EXIT_FAILURE);
aaed909a 4338 }
2994fd96 4339 env = cpu->env_ptr;
0ac46af3 4340 cpu_reset(cpu);
b55a37c9 4341
db6b81d4 4342 thread_cpu = cpu;
3b46e624 4343
b6741956
FB		 4344 if (getenv("QEMU_STRACE")) {
4345 do_strace = 1;
b92c47c1
TS		 4346 }
4347
c5e4a5a9
MR		 4348 if (getenv("QEMU_RAND_SEED")) {
4349 handle_arg_randseed(getenv("QEMU_RAND_SEED"));
4350 }
4351
04a6dfeb
AJ		 4352 target_environ = envlist_to_environ(envlist, NULL);
4353 envlist_free(envlist);
b12b6a18 4354
379f6698
PB		 4355 /*
4356 * Now that page sizes are configured in cpu_init() we can do
4357 * proper page alignment for guest_base.
4358 */
4359 guest_base = HOST_PAGE_ALIGN(guest_base);
68a1c816 4360
806d1021
MI		 4361 if (reserved_va || have_guest_base) {
4362 guest_base = init_guest_space(guest_base, reserved_va, 0,
4363 have_guest_base);
4364 if (guest_base == (unsigned long)-1) {
097b8cb8
PM		 4365 fprintf(stderr, "Unable to reserve 0x%lx bytes of virtual address "
4366 "space for use as guest address space (check your virtual "
4367 "memory ulimit setting or reserve less using -R option)\n",
4368 reserved_va);
4d1275c2 4369 exit(EXIT_FAILURE);
68a1c816 4370 }
97cc7560 4371
806d1021
MI		 4372 if (reserved_va) {
4373 mmap_next_start = reserved_va;
97cc7560
DDAG		 4374 }
4375 }
379f6698
PB		 4376
4377 /*
4378 * Read in mmap_min_addr kernel parameter. This value is used
4379 * When loading the ELF image to determine whether guest_base
14f24e14 4380 * is needed. It is also used in mmap_find_vma.
379f6698 4381 */
14f24e14 4382 {
379f6698
PB		 4383 FILE *fp;
4384
4385 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
4386 unsigned long tmp;
4387 if (fscanf(fp, "%lu", &tmp) == 1) {
4388 mmap_min_addr = tmp;
13829020 4389 qemu_log_mask(CPU_LOG_PAGE, "host mmap_min_addr=0x%lx\n", mmap_min_addr);
379f6698
PB		 4390 }
4391 fclose(fp);
4392 }
4393 }
379f6698 4394
7d8cec95
AJ		 4395 /*
4396 * Prepare copy of argv vector for target.
4397 */
4398 target_argc = argc - optind;
4399 target_argv = calloc(target_argc + 1, sizeof (char *));
4400 if (target_argv == NULL) {
4401 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
4d1275c2 4402 exit(EXIT_FAILURE);
7d8cec95
AJ		 4403 }
4404
4405 /*
4406 * If argv0 is specified (using '-0' switch) we replace
4407 * argv[0] pointer with the given one.
4408 */
4409 i = 0;
4410 if (argv0 != NULL) {
4411 target_argv[i++] = strdup(argv0);
4412 }
4413 for (; i < target_argc; i++) {
4414 target_argv[i] = strdup(argv[optind + i]);
4415 }
4416 target_argv[target_argc] = NULL;
4417
c78d65e8 4418 ts = g_new0(TaskState, 1);
edf8e2af
MW		 4419 init_task_state(ts);
4420 /* build Task State */
4421 ts->info = info;
4422 ts->bprm = &bprm;
0429a971 4423 cpu->opaque = ts;
edf8e2af
MW		 4424 task_settid(ts);
4425
0b959cf5
RH		 4426 execfd = qemu_getauxval(AT_EXECFD);
4427 if (execfd == 0) {
03cfd8fa 4428 execfd = open(filename, O_RDONLY);
0b959cf5
RH		 4429 if (execfd < 0) {
4430 printf("Error while loading %s: %s\n", filename, strerror(errno));
4d1275c2 4431 _exit(EXIT_FAILURE);
0b959cf5 4432 }
03cfd8fa
LV		 4433 }
4434
4435 ret = loader_exec(execfd, filename, target_argv, target_environ, regs,
fd4d81dd
AP		 4436 info, &bprm);
4437 if (ret != 0) {
885c1d10 4438 printf("Error while loading %s: %s\n", filename, strerror(-ret));
4d1275c2 4439 _exit(EXIT_FAILURE);
b12b6a18
TS		 4440 }
4441
4442 for (wrk = target_environ; *wrk; wrk++) {
4443 free(*wrk);
31e31b8a 4444 }
3b46e624 4445
b12b6a18
TS		 4446 free(target_environ);
4447
13829020 4448 if (qemu_loglevel_mask(CPU_LOG_PAGE)) {
379f6698 4449 qemu_log("guest_base 0x%lx\n", guest_base);
2e77eac6
BS		 4450 log_page_dump();
4451
4452 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
4453 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
7c4ee5bc
RH		 4454 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n", info->start_code);
4455 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n", info->start_data);
2e77eac6 4456 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
7c4ee5bc 4457 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n", info->start_stack);
2e77eac6
BS		 4458 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
4459 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
7c4ee5bc
RH		 4460 qemu_log("argv_start 0x" TARGET_ABI_FMT_lx "\n", info->arg_start);
4461 qemu_log("env_start 0x" TARGET_ABI_FMT_lx "\n",
4462 info->arg_end + (abi_ulong)sizeof(abi_ulong));
4463 qemu_log("auxv_start 0x" TARGET_ABI_FMT_lx "\n", info->saved_auxv);
2e77eac6 4464 }
31e31b8a 4465
53a5960a 4466 target_set_brk(info->brk);
31e31b8a 4467 syscall_init();
66fb9763 4468 signal_init();
31e31b8a 4469
9002ec79
RH		 4470 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
4471 generating the prologue until now so that the prologue can take
4472 the real value of GUEST_BASE into account. */
4473 tcg_prologue_init(&tcg_ctx);
9002ec79 4474
b346ff46 4475#if defined(TARGET_I386)
3802ce26 4476 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
b98dbc90 4477 env->hflags |= HF_PE_MASK | HF_CPL_MASK;
0514ef2f 4478 if (env->features[FEAT_1_EDX] & CPUID_SSE) {
1bde465e
FB		 4479 env->cr[4] |= CR4_OSFXSR_MASK;
4480 env->hflags |= HF_OSFXSR_MASK;
4481 }
d2fd1af7 4482#ifndef TARGET_ABI32
4dbc422b 4483 /* enable 64 bit mode if possible */
0514ef2f 4484 if (!(env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM)) {
4dbc422b 4485 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
4d1275c2 4486 exit(EXIT_FAILURE);
4dbc422b 4487 }
d2fd1af7 4488 env->cr[4] |= CR4_PAE_MASK;
4dbc422b 4489 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
d2fd1af7
FB		 4490 env->hflags |= HF_LMA_MASK;
4491#endif
1bde465e 4492
415e561f
FB		 4493 /* flags setup : we activate the IRQs by default as in user mode */
4494 env->eflags |= IF_MASK;
3b46e624 4495
6dbad63e 4496 /* linux register setup */
d2fd1af7 4497#ifndef TARGET_ABI32
84409ddb
JM		 4498 env->regs[R_EAX] = regs->rax;
4499 env->regs[R_EBX] = regs->rbx;
4500 env->regs[R_ECX] = regs->rcx;
4501 env->regs[R_EDX] = regs->rdx;
4502 env->regs[R_ESI] = regs->rsi;
4503 env->regs[R_EDI] = regs->rdi;
4504 env->regs[R_EBP] = regs->rbp;
4505 env->regs[R_ESP] = regs->rsp;
4506 env->eip = regs->rip;
4507#else
0ecfa993
FB		 4508 env->regs[R_EAX] = regs->eax;
4509 env->regs[R_EBX] = regs->ebx;
4510 env->regs[R_ECX] = regs->ecx;
4511 env->regs[R_EDX] = regs->edx;
4512 env->regs[R_ESI] = regs->esi;
4513 env->regs[R_EDI] = regs->edi;
4514 env->regs[R_EBP] = regs->ebp;
4515 env->regs[R_ESP] = regs->esp;
dab2ed99 4516 env->eip = regs->eip;
84409ddb 4517#endif
31e31b8a 4518
f4beb510 4519 /* linux interrupt setup */
e441570f
AZ		 4520#ifndef TARGET_ABI32
4521 env->idt.limit = 511;
4522#else
4523 env->idt.limit = 255;
4524#endif
4525 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
4526 PROT_READ|PROT_WRITE,
4527 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
4528 idt_table = g2h(env->idt.base);
f4beb510
FB		 4529 set_idt(0, 0);
4530 set_idt(1, 0);
4531 set_idt(2, 0);
4532 set_idt(3, 3);
4533 set_idt(4, 3);
ec95da6c 4534 set_idt(5, 0);
f4beb510
FB		 4535 set_idt(6, 0);
4536 set_idt(7, 0);
4537 set_idt(8, 0);
4538 set_idt(9, 0);
4539 set_idt(10, 0);
4540 set_idt(11, 0);
4541 set_idt(12, 0);
4542 set_idt(13, 0);
4543 set_idt(14, 0);
4544 set_idt(15, 0);
4545 set_idt(16, 0);
4546 set_idt(17, 0);
4547 set_idt(18, 0);
4548 set_idt(19, 0);
4549 set_idt(0x80, 3);
4550
6dbad63e 4551 /* linux segment setup */
8d18e893
FB		 4552 {
4553 uint64_t *gdt_table;
e441570f
AZ		 4554 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
4555 PROT_READ|PROT_WRITE,
4556 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
8d18e893 4557 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
e441570f 4558 gdt_table = g2h(env->gdt.base);
d2fd1af7 4559#ifdef TARGET_ABI32
8d18e893
FB		 4560 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
4561 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
4562 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
d2fd1af7
FB		 4563#else
4564 /* 64 bit code segment */
4565 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
4566 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
4567 DESC_L_MASK |
4568 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
4569#endif
8d18e893
FB		 4570 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
4571 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
4572 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
4573 }
6dbad63e 4574 cpu_x86_load_seg(env, R_CS, __USER_CS);
d2fd1af7
FB		 4575 cpu_x86_load_seg(env, R_SS, __USER_DS);
4576#ifdef TARGET_ABI32
6dbad63e
FB		 4577 cpu_x86_load_seg(env, R_DS, __USER_DS);
4578 cpu_x86_load_seg(env, R_ES, __USER_DS);
6dbad63e
FB		 4579 cpu_x86_load_seg(env, R_FS, __USER_DS);
4580 cpu_x86_load_seg(env, R_GS, __USER_DS);
d6eb40f6
TS		 4581 /* This hack makes Wine work... */
4582 env->segs[R_FS].selector = 0;
d2fd1af7
FB		 4583#else
4584 cpu_x86_load_seg(env, R_DS, 0);
4585 cpu_x86_load_seg(env, R_ES, 0);
4586 cpu_x86_load_seg(env, R_FS, 0);
4587 cpu_x86_load_seg(env, R_GS, 0);
4588#endif
99033cae
AG		 4589#elif defined(TARGET_AARCH64)
4590 {
4591 int i;
4592
4593 if (!(arm_feature(env, ARM_FEATURE_AARCH64))) {
4594 fprintf(stderr,
4595 "The selected ARM CPU does not support 64 bit mode\n");
4d1275c2 4596 exit(EXIT_FAILURE);
99033cae
AG		 4597 }
4598
4599 for (i = 0; i < 31; i++) {
4600 env->xregs[i] = regs->regs[i];
4601 }
4602 env->pc = regs->pc;
4603 env->xregs[31] = regs->sp;
4604 }
b346ff46
FB		 4605#elif defined(TARGET_ARM)
4606 {
4607 int i;
ae087923
PM		 4608 cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC,
4609 CPSRWriteByInstr);
b346ff46
FB		 4610 for(i = 0; i < 16; i++) {
4611 env->regs[i] = regs->uregs[i];
4612 }
f9fd40eb 4613#ifdef TARGET_WORDS_BIGENDIAN
d8fd2954
PB		 4614 /* Enable BE8. */
4615 if (EF_ARM_EABI_VERSION(info->elf_flags) >= EF_ARM_EABI_VER4
4616 && (info->elf_flags & EF_ARM_BE8)) {
9c5a7460
PC		 4617 env->uncached_cpsr |= CPSR_E;
4618 env->cp15.sctlr_el[1] |= SCTLR_E0E;
f9fd40eb
PB		 4619 } else {
4620 env->cp15.sctlr_el[1] |= SCTLR_B;
d8fd2954 4621 }
f9fd40eb 4622#endif
b346ff46 4623 }
d2fbca94
GX		 4624#elif defined(TARGET_UNICORE32)
4625 {
4626 int i;
4627 cpu_asr_write(env, regs->uregs[32], 0xffffffff);
4628 for (i = 0; i < 32; i++) {
4629 env->regs[i] = regs->uregs[i];
4630 }
4631 }
93ac68bc 4632#elif defined(TARGET_SPARC)
060366c5
FB		 4633 {
4634 int i;
4635 env->pc = regs->pc;
4636 env->npc = regs->npc;
4637 env->y = regs->y;
4638 for(i = 0; i < 8; i++)
4639 env->gregs[i] = regs->u_regs[i];
4640 for(i = 0; i < 8; i++)
4641 env->regwptr[i] = regs->u_regs[i + 8];
4642 }
67867308
FB		 4643#elif defined(TARGET_PPC)
4644 {
4645 int i;
3fc6c082 4646
0411a972 4647#if defined(TARGET_PPC64)
c8361129 4648 int flag = (env->insns_flags2 & PPC2_BOOKE206) ? MSR_CM : MSR_SF;
0411a972 4649#if defined(TARGET_ABI32)
c8361129 4650 env->msr &= ~((target_ulong)1 << flag);
e85e7c6e 4651#else
c8361129 4652 env->msr |= (target_ulong)1 << flag;
0411a972 4653#endif
84409ddb 4654#endif
67867308
FB		 4655 env->nip = regs->nip;
4656 for(i = 0; i < 32; i++) {
4657 env->gpr[i] = regs->gpr[i];
4658 }
4659 }
e6e5906b
PB		 4660#elif defined(TARGET_M68K)
4661 {
e6e5906b
PB		 4662 env->pc = regs->pc;
4663 env->dregs[0] = regs->d0;
4664 env->dregs[1] = regs->d1;
4665 env->dregs[2] = regs->d2;
4666 env->dregs[3] = regs->d3;
4667 env->dregs[4] = regs->d4;
4668 env->dregs[5] = regs->d5;
4669 env->dregs[6] = regs->d6;
4670 env->dregs[7] = regs->d7;
4671 env->aregs[0] = regs->a0;
4672 env->aregs[1] = regs->a1;
4673 env->aregs[2] = regs->a2;
4674 env->aregs[3] = regs->a3;
4675 env->aregs[4] = regs->a4;
4676 env->aregs[5] = regs->a5;
4677 env->aregs[6] = regs->a6;
4678 env->aregs[7] = regs->usp;
4679 env->sr = regs->sr;
4680 ts->sim_syscalls = 1;
4681 }
b779e29e
EI		 4682#elif defined(TARGET_MICROBLAZE)
4683 {
4684 env->regs[0] = regs->r0;
4685 env->regs[1] = regs->r1;
4686 env->regs[2] = regs->r2;
4687 env->regs[3] = regs->r3;
4688 env->regs[4] = regs->r4;
4689 env->regs[5] = regs->r5;
4690 env->regs[6] = regs->r6;
4691 env->regs[7] = regs->r7;
4692 env->regs[8] = regs->r8;
4693 env->regs[9] = regs->r9;
4694 env->regs[10] = regs->r10;
4695 env->regs[11] = regs->r11;
4696 env->regs[12] = regs->r12;
4697 env->regs[13] = regs->r13;
4698 env->regs[14] = regs->r14;
4699 env->regs[15] = regs->r15;
4700 env->regs[16] = regs->r16;
4701 env->regs[17] = regs->r17;
4702 env->regs[18] = regs->r18;
4703 env->regs[19] = regs->r19;
4704 env->regs[20] = regs->r20;
4705 env->regs[21] = regs->r21;
4706 env->regs[22] = regs->r22;
4707 env->regs[23] = regs->r23;
4708 env->regs[24] = regs->r24;
4709 env->regs[25] = regs->r25;
4710 env->regs[26] = regs->r26;
4711 env->regs[27] = regs->r27;
4712 env->regs[28] = regs->r28;
4713 env->regs[29] = regs->r29;
4714 env->regs[30] = regs->r30;
4715 env->regs[31] = regs->r31;
4716 env->sregs[SR_PC] = regs->pc;
4717 }
048f6b4d
FB		 4718#elif defined(TARGET_MIPS)
4719 {
4720 int i;
4721
4722 for(i = 0; i < 32; i++) {
b5dc7732 4723 env->active_tc.gpr[i] = regs->regs[i];
048f6b4d 4724 }
0fddbbf2
NF		 4725 env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1;
4726 if (regs->cp0_epc & 1) {
4727 env->hflags |= MIPS_HFLAG_M16;
4728 }
599bc5e8
AM		 4729 if (((info->elf_flags & EF_MIPS_NAN2008) != 0) !=
4730 ((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) != 0)) {
4731 if ((env->active_fpu.fcr31_rw_bitmask &
4732 (1 << FCR31_NAN2008)) == 0) {
4733 fprintf(stderr, "ELF binary's NaN mode not supported by CPU\n");
4734 exit(1);
4735 }
4736 if ((info->elf_flags & EF_MIPS_NAN2008) != 0) {
4737 env->active_fpu.fcr31 |= (1 << FCR31_NAN2008);
4738 } else {
4739 env->active_fpu.fcr31 &= ~(1 << FCR31_NAN2008);
4740 }
4741 restore_snan_bit_mode(env);
4742 }
048f6b4d 4743 }
a0a839b6
MV		 4744#elif defined(TARGET_NIOS2)
4745 {
4746 env->regs[0] = 0;
4747 env->regs[1] = regs->r1;
4748 env->regs[2] = regs->r2;
4749 env->regs[3] = regs->r3;
4750 env->regs[4] = regs->r4;
4751 env->regs[5] = regs->r5;
4752 env->regs[6] = regs->r6;
4753 env->regs[7] = regs->r7;
4754 env->regs[8] = regs->r8;
4755 env->regs[9] = regs->r9;
4756 env->regs[10] = regs->r10;
4757 env->regs[11] = regs->r11;
4758 env->regs[12] = regs->r12;
4759 env->regs[13] = regs->r13;
4760 env->regs[14] = regs->r14;
4761 env->regs[15] = regs->r15;
4762 /* TODO: unsigned long orig_r2; */
4763 env->regs[R_RA] = regs->ra;
4764 env->regs[R_FP] = regs->fp;
4765 env->regs[R_SP] = regs->sp;
4766 env->regs[R_GP] = regs->gp;
4767 env->regs[CR_ESTATUS] = regs->estatus;
4768 env->regs[R_EA] = regs->ea;
4769 /* TODO: unsigned long orig_r7; */
4770
4771 /* Emulate eret when starting thread. */
4772 env->regs[R_PC] = regs->ea;
4773 }
d962783e
JL		 4774#elif defined(TARGET_OPENRISC)
4775 {
4776 int i;
4777
4778 for (i = 0; i < 32; i++) {
4779 env->gpr[i] = regs->gpr[i];
4780 }
4781
4782 env->sr = regs->sr;
4783 env->pc = regs->pc;
4784 }
fdf9b3e8
FB		 4785#elif defined(TARGET_SH4)
4786 {
4787 int i;
4788
4789 for(i = 0; i < 16; i++) {
4790 env->gregs[i] = regs->regs[i];
4791 }
4792 env->pc = regs->pc;
4793 }
7a3148a9
JM		 4794#elif defined(TARGET_ALPHA)
4795 {
4796 int i;
4797
4798 for(i = 0; i < 28; i++) {
992f48a0 4799 env->ir[i] = ((abi_ulong *)regs)[i];
7a3148a9 4800 }
dad081ee 4801 env->ir[IR_SP] = regs->usp;
7a3148a9 4802 env->pc = regs->pc;
7a3148a9 4803 }
48733d19
TS		 4804#elif defined(TARGET_CRIS)
4805 {
4806 env->regs[0] = regs->r0;
4807 env->regs[1] = regs->r1;
4808 env->regs[2] = regs->r2;
4809 env->regs[3] = regs->r3;
4810 env->regs[4] = regs->r4;
4811 env->regs[5] = regs->r5;
4812 env->regs[6] = regs->r6;
4813 env->regs[7] = regs->r7;
4814 env->regs[8] = regs->r8;
4815 env->regs[9] = regs->r9;
4816 env->regs[10] = regs->r10;
4817 env->regs[11] = regs->r11;
4818 env->regs[12] = regs->r12;
4819 env->regs[13] = regs->r13;
4820 env->regs[14] = info->start_stack;
4821 env->regs[15] = regs->acr;
4822 env->pc = regs->erp;
4823 }
a4c075f1
UH		 4824#elif defined(TARGET_S390X)
4825 {
4826 int i;
4827 for (i = 0; i < 16; i++) {
4828 env->regs[i] = regs->gprs[i];
4829 }
4830 env->psw.mask = regs->psw.mask;
4831 env->psw.addr = regs->psw.addr;
4832 }
b16189b2
CG		 4833#elif defined(TARGET_TILEGX)
4834 {
4835 int i;
4836 for (i = 0; i < TILEGX_R_COUNT; i++) {
4837 env->regs[i] = regs->regs[i];
4838 }
4839 for (i = 0; i < TILEGX_SPR_COUNT; i++) {
4840 env->spregs[i] = 0;
4841 }
4842 env->pc = regs->pc;
4843 }
7c248bcd
RH		 4844#elif defined(TARGET_HPPA)
4845 {
4846 int i;
4847 for (i = 1; i < 32; i++) {
4848 env->gr[i] = regs->gr[i];
4849 }
4850 env->iaoq_f = regs->iaoq[0];
4851 env->iaoq_b = regs->iaoq[1];
4852 }
b346ff46
FB		 4853#else
4854#error unsupported target CPU
4855#endif
31e31b8a 4856
d2fbca94 4857#if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
a87295e8
PB		 4858 ts->stack_base = info->start_stack;
4859 ts->heap_base = info->brk;
4860 /* This will be filled in on the first SYS_HEAPINFO call. */
4861 ts->heap_limit = 0;
4862#endif
4863
74c33bed 4864 if (gdbstub_port) {
ff7a981a
PM		 4865 if (gdbserver_start(gdbstub_port) < 0) {
4866 fprintf(stderr, "qemu: could not open gdbserver on port %d\n",
4867 gdbstub_port);
4d1275c2 4868 exit(EXIT_FAILURE);
ff7a981a 4869 }
db6b81d4 4870 gdb_handlesig(cpu, 0);
1fddef4b 4871 }
1b6b029e
FB		 4872 cpu_loop(env);
4873 /* never exits */
31e31b8a
FB		 4874 return 0;
4875}
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