]> git.proxmox.com Git - mirror_qemu.git/blame - linux-user/main.c
projects / mirror_qemu.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Update to a hopefully more future proof FSF address
[mirror_qemu.git] / linux-user / main.c
CommitLineData
31e31b8a 1/*
93ac68bc 2 * qemu user main
5fafdf24 3 *
68d0f70e 4 * Copyright (c) 2003-2008 Fabrice Bellard
31e31b8a
FB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
8167ee88 17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
31e31b8a
FB		 18 */
19#include <stdlib.h>
20#include <stdio.h>
21#include <stdarg.h>
04369ff2 22#include <string.h>
31e31b8a 23#include <errno.h>
0ecfa993 24#include <unistd.h>
e441570f 25#include <sys/mman.h>
edf8e2af 26#include <sys/syscall.h>
31e31b8a 27
3ef693a0 28#include "qemu.h"
ca10f867 29#include "qemu-common.h"
902b3d5c 30#include "cache-utils.h"
d5975363
PB		 31/* For tb_lock */
32#include "exec-all.h"
31e31b8a 33
04a6dfeb
AJ		 34
35#include "envlist.h"
36
3ef693a0 37#define DEBUG_LOGFILE "/tmp/qemu.log"
586314f2 38
d088d664
AJ		 39char *exec_path;
40
1b530a6d
AJ		 41int singlestep;
42
74cd30b8 43static const char *interp_prefix = CONFIG_QEMU_PREFIX;
c5937220 44const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
586314f2 45
3a4739d6 46#if defined(__i386__) && !defined(CONFIG_STATIC)
f801f97e
FB		 47/* Force usage of an ELF interpreter even if it is an ELF shared
48 object ! */
49const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
4304763b 50#endif
74cd30b8 51
93ac68bc 52/* for recent libc, we add these dummy symbols which are not declared
74cd30b8 53 when generating a linked object (bug in ld ?) */
fbf59244 54#if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
46027c07
FB		 55asm(".globl __preinit_array_start\n"
56 ".globl __preinit_array_end\n"
57 ".globl __init_array_start\n"
58 ".globl __init_array_end\n"
59 ".globl __fini_array_start\n"
60 ".globl __fini_array_end\n"
61 ".section \".rodata\"\n"
62 "__preinit_array_start:\n"
63 "__preinit_array_end:\n"
64 "__init_array_start:\n"
65 "__init_array_end:\n"
66 "__fini_array_start:\n"
67 "__fini_array_end:\n"
7bba1ee8
TS		 68 ".long 0\n"
69 ".previous\n");
74cd30b8
FB		 70#endif
71
9de5e440
FB		 72/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
73 we allocate a bigger stack. Need a better solution, for example
74 by remapping the process stack directly at the right place */
75unsigned long x86_stack_size = 512 * 1024;
31e31b8a
FB		 76
77void gemu_log(const char *fmt, ...)
78{
79 va_list ap;
80
81 va_start(ap, fmt);
82 vfprintf(stderr, fmt, ap);
83 va_end(ap);
84}
85
8fcd3692 86#if defined(TARGET_I386)
a541f297 87int cpu_get_pic_interrupt(CPUState *env)
92ccca6a
FB		 88{
89 return -1;
90}
8fcd3692 91#endif
92ccca6a 92
28ab0e2e
FB		 93/* timers for rdtsc */
94
1dce7c3c 95#if 0
28ab0e2e
FB		 96
97static uint64_t emu_time;
98
99int64_t cpu_get_real_ticks(void)
100{
101 return emu_time++;
102}
103
104#endif
105
d5975363
PB		 106#if defined(USE_NPTL)
107/***********************************************************/
108/* Helper routines for implementing atomic operations. */
109
110/* To implement exclusive operations we force all cpus to syncronise.
111 We don't require a full sync, only that no cpus are executing guest code.
112 The alternative is to map target atomic ops onto host equivalents,
113 which requires quite a lot of per host/target work. */
c2764719 114static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
d5975363
PB		 115static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
116static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
117static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
118static int pending_cpus;
119
120/* Make sure everything is in a consistent state for calling fork(). */
121void fork_start(void)
122{
123 mmap_fork_start();
124 pthread_mutex_lock(&tb_lock);
125 pthread_mutex_lock(&exclusive_lock);
126}
127
128void fork_end(int child)
129{
130 if (child) {
131 /* Child processes created by fork() only have a single thread.
132 Discard information about the parent threads. */
133 first_cpu = thread_env;
134 thread_env->next_cpu = NULL;
135 pending_cpus = 0;
136 pthread_mutex_init(&exclusive_lock, NULL);
c2764719 137 pthread_mutex_init(&cpu_list_mutex, NULL);
d5975363
PB		 138 pthread_cond_init(&exclusive_cond, NULL);
139 pthread_cond_init(&exclusive_resume, NULL);
140 pthread_mutex_init(&tb_lock, NULL);
2b1319c8 141 gdbserver_fork(thread_env);
d5975363
PB		 142 } else {
143 pthread_mutex_unlock(&exclusive_lock);
144 pthread_mutex_unlock(&tb_lock);
145 }
146 mmap_fork_end(child);
147}
148
149/* Wait for pending exclusive operations to complete. The exclusive lock
150 must be held. */
151static inline void exclusive_idle(void)
152{
153 while (pending_cpus) {
154 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
155 }
156}
157
158/* Start an exclusive operation.
159 Must only be called from outside cpu_arm_exec. */
160static inline void start_exclusive(void)
161{
162 CPUState *other;
163 pthread_mutex_lock(&exclusive_lock);
164 exclusive_idle();
165
166 pending_cpus = 1;
167 /* Make all other cpus stop executing. */
168 for (other = first_cpu; other; other = other->next_cpu) {
169 if (other->running) {
170 pending_cpus++;
3098dba0 171 cpu_exit(other);
d5975363
PB		 172 }
173 }
174 if (pending_cpus > 1) {
175 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
176 }
177}
178
179/* Finish an exclusive operation. */
180static inline void end_exclusive(void)
181{
182 pending_cpus = 0;
183 pthread_cond_broadcast(&exclusive_resume);
184 pthread_mutex_unlock(&exclusive_lock);
185}
186
187/* Wait for exclusive ops to finish, and begin cpu execution. */
188static inline void cpu_exec_start(CPUState *env)
189{
190 pthread_mutex_lock(&exclusive_lock);
191 exclusive_idle();
192 env->running = 1;
193 pthread_mutex_unlock(&exclusive_lock);
194}
195
196/* Mark cpu as not executing, and release pending exclusive ops. */
197static inline void cpu_exec_end(CPUState *env)
198{
199 pthread_mutex_lock(&exclusive_lock);
200 env->running = 0;
201 if (pending_cpus > 1) {
202 pending_cpus--;
203 if (pending_cpus == 1) {
204 pthread_cond_signal(&exclusive_cond);
205 }
206 }
207 exclusive_idle();
208 pthread_mutex_unlock(&exclusive_lock);
209}
c2764719
PB		 210
211void cpu_list_lock(void)
212{
213 pthread_mutex_lock(&cpu_list_mutex);
214}
215
216void cpu_list_unlock(void)
217{
218 pthread_mutex_unlock(&cpu_list_mutex);
219}
d5975363
PB		 220#else /* if !USE_NPTL */
221/* These are no-ops because we are not threadsafe. */
222static inline void cpu_exec_start(CPUState *env)
223{
224}
225
226static inline void cpu_exec_end(CPUState *env)
227{
228}
229
230static inline void start_exclusive(void)
231{
232}
233
234static inline void end_exclusive(void)
235{
236}
237
238void fork_start(void)
239{
240}
241
242void fork_end(int child)
243{
2b1319c8
AJ		 244 if (child) {
245 gdbserver_fork(thread_env);
246 }
d5975363 247}
c2764719
PB		 248
249void cpu_list_lock(void)
250{
251}
252
253void cpu_list_unlock(void)
254{
255}
d5975363
PB		 256#endif
257
258
a541f297
FB		 259#ifdef TARGET_I386
260/***********************************************************/
261/* CPUX86 core interface */
262
02a1602e
FB		 263void cpu_smm_update(CPUState *env)
264{
265}
266
28ab0e2e
FB		 267uint64_t cpu_get_tsc(CPUX86State *env)
268{
269 return cpu_get_real_ticks();
270}
271
5fafdf24 272static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
f4beb510 273 int flags)
6dbad63e 274{
f4beb510 275 unsigned int e1, e2;
53a5960a 276 uint32_t *p;
6dbad63e
FB		 277 e1 = (addr << 16) | (limit & 0xffff);
278 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
f4beb510 279 e2 |= flags;
53a5960a 280 p = ptr;
d538e8f5 281 p[0] = tswap32(e1);
282 p[1] = tswap32(e2);
f4beb510
FB		 283}
284
e441570f 285static uint64_t *idt_table;
eb38c52c 286#ifdef TARGET_X86_64
d2fd1af7
FB		 287static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
288 uint64_t addr, unsigned int sel)
f4beb510 289{
4dbc422b 290 uint32_t *p, e1, e2;
f4beb510
FB		 291 e1 = (addr & 0xffff) | (sel << 16);
292 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
53a5960a 293 p = ptr;
4dbc422b
FB		 294 p[0] = tswap32(e1);
295 p[1] = tswap32(e2);
296 p[2] = tswap32(addr >> 32);
297 p[3] = 0;
6dbad63e 298}
d2fd1af7
FB		 299/* only dpl matters as we do only user space emulation */
300static void set_idt(int n, unsigned int dpl)
301{
302 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
303}
304#else
d2fd1af7
FB		 305static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
306 uint32_t addr, unsigned int sel)
307{
4dbc422b 308 uint32_t *p, e1, e2;
d2fd1af7
FB		 309 e1 = (addr & 0xffff) | (sel << 16);
310 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
311 p = ptr;
4dbc422b
FB		 312 p[0] = tswap32(e1);
313 p[1] = tswap32(e2);
d2fd1af7
FB		 314}
315
f4beb510
FB		 316/* only dpl matters as we do only user space emulation */
317static void set_idt(int n, unsigned int dpl)
318{
319 set_gate(idt_table + n, 0, dpl, 0, 0);
320}
d2fd1af7 321#endif
31e31b8a 322
89e957e7 323void cpu_loop(CPUX86State *env)
1b6b029e 324{
bc8a22cc 325 int trapnr;
992f48a0 326 abi_ulong pc;
9de5e440 327 target_siginfo_t info;
851e67a1 328
1b6b029e 329 for(;;) {
bc8a22cc 330 trapnr = cpu_x86_exec(env);
bc8a22cc 331 switch(trapnr) {
f4beb510 332 case 0x80:
d2fd1af7 333 /* linux syscall from int $0x80 */
5fafdf24
TS		 334 env->regs[R_EAX] = do_syscall(env,
335 env->regs[R_EAX],
f4beb510
FB		 336 env->regs[R_EBX],
337 env->regs[R_ECX],
338 env->regs[R_EDX],
339 env->regs[R_ESI],
340 env->regs[R_EDI],
341 env->regs[R_EBP]);
342 break;
d2fd1af7
FB		 343#ifndef TARGET_ABI32
344 case EXCP_SYSCALL:
345 /* linux syscall from syscall intruction */
346 env->regs[R_EAX] = do_syscall(env,
347 env->regs[R_EAX],
348 env->regs[R_EDI],
349 env->regs[R_ESI],
350 env->regs[R_EDX],
351 env->regs[10],
352 env->regs[8],
353 env->regs[9]);
354 env->eip = env->exception_next_eip;
355 break;
356#endif
f4beb510
FB		 357 case EXCP0B_NOSEG:
358 case EXCP0C_STACK:
359 info.si_signo = SIGBUS;
360 info.si_errno = 0;
361 info.si_code = TARGET_SI_KERNEL;
362 info._sifields._sigfault._addr = 0;
624f7979 363 queue_signal(env, info.si_signo, &info);
f4beb510 364 break;
1b6b029e 365 case EXCP0D_GPF:
d2fd1af7 366 /* XXX: potential problem if ABI32 */
84409ddb 367#ifndef TARGET_X86_64
851e67a1 368 if (env->eflags & VM_MASK) {
89e957e7 369 handle_vm86_fault(env);
84409ddb
JM		 370 } else
371#endif
372 {
f4beb510
FB		 373 info.si_signo = SIGSEGV;
374 info.si_errno = 0;
375 info.si_code = TARGET_SI_KERNEL;
376 info._sifields._sigfault._addr = 0;
624f7979 377 queue_signal(env, info.si_signo, &info);
1b6b029e
FB		 378 }
379 break;
b689bc57
FB		 380 case EXCP0E_PAGE:
381 info.si_signo = SIGSEGV;
382 info.si_errno = 0;
383 if (!(env->error_code & 1))
384 info.si_code = TARGET_SEGV_MAPERR;
385 else
386 info.si_code = TARGET_SEGV_ACCERR;
970a87a6 387 info._sifields._sigfault._addr = env->cr[2];
624f7979 388 queue_signal(env, info.si_signo, &info);
b689bc57 389 break;
9de5e440 390 case EXCP00_DIVZ:
84409ddb 391#ifndef TARGET_X86_64
bc8a22cc 392 if (env->eflags & VM_MASK) {
447db213 393 handle_vm86_trap(env, trapnr);
84409ddb
JM		 394 } else
395#endif
396 {
bc8a22cc
FB		 397 /* division by zero */
398 info.si_signo = SIGFPE;
399 info.si_errno = 0;
400 info.si_code = TARGET_FPE_INTDIV;
401 info._sifields._sigfault._addr = env->eip;
624f7979 402 queue_signal(env, info.si_signo, &info);
bc8a22cc 403 }
9de5e440 404 break;
01df040b 405 case EXCP01_DB:
447db213 406 case EXCP03_INT3:
84409ddb 407#ifndef TARGET_X86_64
447db213
FB		 408 if (env->eflags & VM_MASK) {
409 handle_vm86_trap(env, trapnr);
84409ddb
JM		 410 } else
411#endif
412 {
447db213
FB		 413 info.si_signo = SIGTRAP;
414 info.si_errno = 0;
01df040b 415 if (trapnr == EXCP01_DB) {
447db213
FB		 416 info.si_code = TARGET_TRAP_BRKPT;
417 info._sifields._sigfault._addr = env->eip;
418 } else {
419 info.si_code = TARGET_SI_KERNEL;
420 info._sifields._sigfault._addr = 0;
421 }
624f7979 422 queue_signal(env, info.si_signo, &info);
447db213
FB		 423 }
424 break;
9de5e440
FB		 425 case EXCP04_INTO:
426 case EXCP05_BOUND:
84409ddb 427#ifndef TARGET_X86_64
bc8a22cc 428 if (env->eflags & VM_MASK) {
447db213 429 handle_vm86_trap(env, trapnr);
84409ddb
JM		 430 } else
431#endif
432 {
bc8a22cc
FB		 433 info.si_signo = SIGSEGV;
434 info.si_errno = 0;
b689bc57 435 info.si_code = TARGET_SI_KERNEL;
bc8a22cc 436 info._sifields._sigfault._addr = 0;
624f7979 437 queue_signal(env, info.si_signo, &info);
bc8a22cc 438 }
9de5e440
FB		 439 break;
440 case EXCP06_ILLOP:
441 info.si_signo = SIGILL;
442 info.si_errno = 0;
443 info.si_code = TARGET_ILL_ILLOPN;
444 info._sifields._sigfault._addr = env->eip;
624f7979 445 queue_signal(env, info.si_signo, &info);
9de5e440
FB		 446 break;
447 case EXCP_INTERRUPT:
448 /* just indicate that signals should be handled asap */
449 break;
1fddef4b
FB		 450 case EXCP_DEBUG:
451 {
452 int sig;
453
454 sig = gdb_handlesig (env, TARGET_SIGTRAP);
455 if (sig)
456 {
457 info.si_signo = sig;
458 info.si_errno = 0;
459 info.si_code = TARGET_TRAP_BRKPT;
624f7979 460 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 461 }
462 }
463 break;
1b6b029e 464 default:
970a87a6 465 pc = env->segs[R_CS].base + env->eip;
5fafdf24 466 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
bc8a22cc 467 (long)pc, trapnr);
1b6b029e
FB		 468 abort();
469 }
66fb9763 470 process_pending_signals(env);
1b6b029e
FB		 471 }
472}
b346ff46
FB		 473#endif
474
475#ifdef TARGET_ARM
476
992f48a0 477static void arm_cache_flush(abi_ulong start, abi_ulong last)
6f1f31c0 478{
992f48a0 479 abi_ulong addr, last1;
6f1f31c0
FB		 480
481 if (last < start)
482 return;
483 addr = start;
484 for(;;) {
485 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
486 if (last1 > last)
487 last1 = last;
488 tb_invalidate_page_range(addr, last1 + 1);
489 if (last1 == last)
490 break;
491 addr = last1 + 1;
492 }
493}
494
fbb4a2e3
PB		 495/* Handle a jump to the kernel code page. */
496static int
497do_kernel_trap(CPUARMState *env)
498{
499 uint32_t addr;
500 uint32_t cpsr;
501 uint32_t val;
502
503 switch (env->regs[15]) {
504 case 0xffff0fa0: /* __kernel_memory_barrier */
505 /* ??? No-op. Will need to do better for SMP. */
506 break;
507 case 0xffff0fc0: /* __kernel_cmpxchg */
d5975363
PB		 508 /* XXX: This only works between threads, not between processes.
509 It's probably possible to implement this with native host
510 operations. However things like ldrex/strex are much harder so
511 there's not much point trying. */
512 start_exclusive();
fbb4a2e3
PB		 513 cpsr = cpsr_read(env);
514 addr = env->regs[2];
515 /* FIXME: This should SEGV if the access fails. */
516 if (get_user_u32(val, addr))
517 val = ~env->regs[0];
518 if (val == env->regs[0]) {
519 val = env->regs[1];
520 /* FIXME: Check for segfaults. */
521 put_user_u32(val, addr);
522 env->regs[0] = 0;
523 cpsr |= CPSR_C;
524 } else {
525 env->regs[0] = -1;
526 cpsr &= ~CPSR_C;
527 }
528 cpsr_write(env, cpsr, CPSR_C);
d5975363 529 end_exclusive();
fbb4a2e3
PB		 530 break;
531 case 0xffff0fe0: /* __kernel_get_tls */
532 env->regs[0] = env->cp15.c13_tls2;
533 break;
534 default:
535 return 1;
536 }
537 /* Jump back to the caller. */
538 addr = env->regs[14];
539 if (addr & 1) {
540 env->thumb = 1;
541 addr &= ~1;
542 }
543 env->regs[15] = addr;
544
545 return 0;
546}
547
b346ff46
FB		 548void cpu_loop(CPUARMState *env)
549{
550 int trapnr;
551 unsigned int n, insn;
552 target_siginfo_t info;
b5ff1b31 553 uint32_t addr;
3b46e624 554
b346ff46 555 for(;;) {
d5975363 556 cpu_exec_start(env);
b346ff46 557 trapnr = cpu_arm_exec(env);
d5975363 558 cpu_exec_end(env);
b346ff46
FB		 559 switch(trapnr) {
560 case EXCP_UDEF:
c6981055
FB		 561 {
562 TaskState *ts = env->opaque;
563 uint32_t opcode;
6d9a42be 564 int rc;
c6981055
FB		 565
566 /* we handle the FPU emulation here, as Linux */
567 /* we get the opcode */
2f619698
FB		 568 /* FIXME - what to do if get_user() fails? */
569 get_user_u32(opcode, env->regs[15]);
3b46e624 570
6d9a42be
AJ		 571 rc = EmulateAll(opcode, &ts->fpa, env);
572 if (rc == 0) { /* illegal instruction */
c6981055
FB		 573 info.si_signo = SIGILL;
574 info.si_errno = 0;
575 info.si_code = TARGET_ILL_ILLOPN;
576 info._sifields._sigfault._addr = env->regs[15];
624f7979 577 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 578 } else if (rc < 0) { /* FP exception */
579 int arm_fpe=0;
580
581 /* translate softfloat flags to FPSR flags */
582 if (-rc & float_flag_invalid)
583 arm_fpe |= BIT_IOC;
584 if (-rc & float_flag_divbyzero)
585 arm_fpe |= BIT_DZC;
586 if (-rc & float_flag_overflow)
587 arm_fpe |= BIT_OFC;
588 if (-rc & float_flag_underflow)
589 arm_fpe |= BIT_UFC;
590 if (-rc & float_flag_inexact)
591 arm_fpe |= BIT_IXC;
592
593 FPSR fpsr = ts->fpa.fpsr;
594 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
595
596 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
597 info.si_signo = SIGFPE;
598 info.si_errno = 0;
599
600 /* ordered by priority, least first */
601 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
602 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
603 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
604 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
605 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
606
607 info._sifields._sigfault._addr = env->regs[15];
624f7979 608 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 609 } else {
610 env->regs[15] += 4;
611 }
612
613 /* accumulate unenabled exceptions */
614 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
615 fpsr |= BIT_IXC;
616 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
617 fpsr |= BIT_UFC;
618 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
619 fpsr |= BIT_OFC;
620 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
621 fpsr |= BIT_DZC;
622 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
623 fpsr |= BIT_IOC;
624 ts->fpa.fpsr=fpsr;
625 } else { /* everything OK */
c6981055
FB		 626 /* increment PC */
627 env->regs[15] += 4;
628 }
629 }
b346ff46
FB		 630 break;
631 case EXCP_SWI:
06c949e6 632 case EXCP_BKPT:
b346ff46 633 {
ce4defa0 634 env->eabi = 1;
b346ff46 635 /* system call */
06c949e6
PB		 636 if (trapnr == EXCP_BKPT) {
637 if (env->thumb) {
2f619698
FB		 638 /* FIXME - what to do if get_user() fails? */
639 get_user_u16(insn, env->regs[15]);
06c949e6
PB		 640 n = insn & 0xff;
641 env->regs[15] += 2;
642 } else {
2f619698
FB		 643 /* FIXME - what to do if get_user() fails? */
644 get_user_u32(insn, env->regs[15]);
06c949e6
PB		 645 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
646 env->regs[15] += 4;
647 }
192c7bd9 648 } else {
06c949e6 649 if (env->thumb) {
2f619698
FB		 650 /* FIXME - what to do if get_user() fails? */
651 get_user_u16(insn, env->regs[15] - 2);
06c949e6
PB		 652 n = insn & 0xff;
653 } else {
2f619698
FB		 654 /* FIXME - what to do if get_user() fails? */
655 get_user_u32(insn, env->regs[15] - 4);
06c949e6
PB		 656 n = insn & 0xffffff;
657 }
192c7bd9
FB		 658 }
659
6f1f31c0
FB		 660 if (n == ARM_NR_cacheflush) {
661 arm_cache_flush(env->regs[0], env->regs[1]);
a4f81979
FB		 662 } else if (n == ARM_NR_semihosting
663 || n == ARM_NR_thumb_semihosting) {
664 env->regs[0] = do_arm_semihosting (env);
ce4defa0 665 } else if (n == 0 || n >= ARM_SYSCALL_BASE
192c7bd9 666 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
b346ff46 667 /* linux syscall */
ce4defa0 668 if (env->thumb || n == 0) {
192c7bd9
FB		 669 n = env->regs[7];
670 } else {
671 n -= ARM_SYSCALL_BASE;
ce4defa0 672 env->eabi = 0;
192c7bd9 673 }
fbb4a2e3
PB		 674 if ( n > ARM_NR_BASE) {
675 switch (n) {
676 case ARM_NR_cacheflush:
677 arm_cache_flush(env->regs[0], env->regs[1]);
678 break;
679 case ARM_NR_set_tls:
680 cpu_set_tls(env, env->regs[0]);
681 env->regs[0] = 0;
682 break;
683 default:
684 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
685 n);
686 env->regs[0] = -TARGET_ENOSYS;
687 break;
688 }
689 } else {
690 env->regs[0] = do_syscall(env,
691 n,
692 env->regs[0],
693 env->regs[1],
694 env->regs[2],
695 env->regs[3],
696 env->regs[4],
697 env->regs[5]);
698 }
b346ff46
FB		 699 } else {
700 goto error;
701 }
702 }
703 break;
43fff238
FB		 704 case EXCP_INTERRUPT:
705 /* just indicate that signals should be handled asap */
706 break;
68016c62 707 case EXCP_PREFETCH_ABORT:
eae473c1 708 addr = env->cp15.c6_insn;
b5ff1b31 709 goto do_segv;
68016c62 710 case EXCP_DATA_ABORT:
eae473c1 711 addr = env->cp15.c6_data;
b5ff1b31
FB		 712 goto do_segv;
713 do_segv:
68016c62
FB		 714 {
715 info.si_signo = SIGSEGV;
716 info.si_errno = 0;
717 /* XXX: check env->error_code */
718 info.si_code = TARGET_SEGV_MAPERR;
b5ff1b31 719 info._sifields._sigfault._addr = addr;
624f7979 720 queue_signal(env, info.si_signo, &info);
68016c62
FB		 721 }
722 break;
1fddef4b
FB		 723 case EXCP_DEBUG:
724 {
725 int sig;
726
727 sig = gdb_handlesig (env, TARGET_SIGTRAP);
728 if (sig)
729 {
730 info.si_signo = sig;
731 info.si_errno = 0;
732 info.si_code = TARGET_TRAP_BRKPT;
624f7979 733 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 734 }
735 }
736 break;
fbb4a2e3
PB		 737 case EXCP_KERNEL_TRAP:
738 if (do_kernel_trap(env))
739 goto error;
740 break;
b346ff46
FB		 741 default:
742 error:
5fafdf24 743 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
b346ff46 744 trapnr);
7fe48483 745 cpu_dump_state(env, stderr, fprintf, 0);
b346ff46
FB		 746 abort();
747 }
748 process_pending_signals(env);
749 }
750}
751
752#endif
1b6b029e 753
93ac68bc 754#ifdef TARGET_SPARC
ed23fbd9 755#define SPARC64_STACK_BIAS 2047
93ac68bc 756
060366c5
FB		 757//#define DEBUG_WIN
758
2623cbaf
FB		 759/* WARNING: dealing with register windows _is_ complicated. More info
760 can be found at http://www.sics.se/~psm/sparcstack.html */
060366c5
FB		 761static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
762{
1a14026e 763 index = (index + cwp * 16) % (16 * env->nwindows);
060366c5
FB		 764 /* wrap handling : if cwp is on the last window, then we use the
765 registers 'after' the end */
1a14026e
BS		 766 if (index < 8 && env->cwp == env->nwindows - 1)
767 index += 16 * env->nwindows;
060366c5
FB		 768 return index;
769}
770
2623cbaf
FB		 771/* save the register window 'cwp1' */
772static inline void save_window_offset(CPUSPARCState *env, int cwp1)
060366c5 773{
2623cbaf 774 unsigned int i;
992f48a0 775 abi_ulong sp_ptr;
3b46e624 776
53a5960a 777 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 778#ifdef TARGET_SPARC64
779 if (sp_ptr & 3)
780 sp_ptr += SPARC64_STACK_BIAS;
781#endif
060366c5 782#if defined(DEBUG_WIN)
2daf0284
BS		 783 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
784 sp_ptr, cwp1);
060366c5 785#endif
2623cbaf 786 for(i = 0; i < 16; i++) {
2f619698
FB		 787 /* FIXME - what to do if put_user() fails? */
788 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 789 sp_ptr += sizeof(abi_ulong);
2623cbaf 790 }
060366c5
FB		 791}
792
793static void save_window(CPUSPARCState *env)
794{
5ef54116 795#ifndef TARGET_SPARC64
2623cbaf 796 unsigned int new_wim;
1a14026e
BS		 797 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
798 ((1LL << env->nwindows) - 1);
799 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
2623cbaf 800 env->wim = new_wim;
5ef54116 801#else
1a14026e 802 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
5ef54116
FB		 803 env->cansave++;
804 env->canrestore--;
805#endif
060366c5
FB		 806}
807
808static void restore_window(CPUSPARCState *env)
809{
eda52953
BS		 810#ifndef TARGET_SPARC64
811 unsigned int new_wim;
812#endif
813 unsigned int i, cwp1;
992f48a0 814 abi_ulong sp_ptr;
3b46e624 815
eda52953 816#ifndef TARGET_SPARC64
1a14026e
BS		 817 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
818 ((1LL << env->nwindows) - 1);
eda52953 819#endif
3b46e624 820
060366c5 821 /* restore the invalid window */
1a14026e 822 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
53a5960a 823 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 824#ifdef TARGET_SPARC64
825 if (sp_ptr & 3)
826 sp_ptr += SPARC64_STACK_BIAS;
827#endif
060366c5 828#if defined(DEBUG_WIN)
2daf0284
BS		 829 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
830 sp_ptr, cwp1);
060366c5 831#endif
2623cbaf 832 for(i = 0; i < 16; i++) {
2f619698
FB		 833 /* FIXME - what to do if get_user() fails? */
834 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 835 sp_ptr += sizeof(abi_ulong);
2623cbaf 836 }
5ef54116
FB		 837#ifdef TARGET_SPARC64
838 env->canrestore++;
1a14026e
BS		 839 if (env->cleanwin < env->nwindows - 1)
840 env->cleanwin++;
5ef54116 841 env->cansave--;
eda52953
BS		 842#else
843 env->wim = new_wim;
5ef54116 844#endif
060366c5
FB		 845}
846
847static void flush_windows(CPUSPARCState *env)
848{
849 int offset, cwp1;
2623cbaf
FB		 850
851 offset = 1;
060366c5
FB		 852 for(;;) {
853 /* if restore would invoke restore_window(), then we can stop */
1a14026e 854 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
eda52953 855#ifndef TARGET_SPARC64
060366c5
FB		 856 if (env->wim & (1 << cwp1))
857 break;
eda52953
BS		 858#else
859 if (env->canrestore == 0)
860 break;
861 env->cansave++;
862 env->canrestore--;
863#endif
2623cbaf 864 save_window_offset(env, cwp1);
060366c5
FB		 865 offset++;
866 }
1a14026e 867 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
eda52953
BS		 868#ifndef TARGET_SPARC64
869 /* set wim so that restore will reload the registers */
2623cbaf 870 env->wim = 1 << cwp1;
eda52953 871#endif
2623cbaf
FB		 872#if defined(DEBUG_WIN)
873 printf("flush_windows: nb=%d\n", offset - 1);
80a9d035 874#endif
2623cbaf 875}
060366c5 876
93ac68bc
FB		 877void cpu_loop (CPUSPARCState *env)
878{
060366c5 879 int trapnr, ret;
61ff6f58 880 target_siginfo_t info;
3b46e624 881
060366c5
FB		 882 while (1) {
883 trapnr = cpu_sparc_exec (env);
3b46e624 884
060366c5 885 switch (trapnr) {
5ef54116 886#ifndef TARGET_SPARC64
5fafdf24 887 case 0x88:
060366c5 888 case 0x90:
5ef54116 889#else
cb33da57 890 case 0x110:
5ef54116
FB		 891 case 0x16d:
892#endif
060366c5 893 ret = do_syscall (env, env->gregs[1],
5fafdf24
TS		 894 env->regwptr[0], env->regwptr[1],
895 env->regwptr[2], env->regwptr[3],
060366c5
FB		 896 env->regwptr[4], env->regwptr[5]);
897 if ((unsigned int)ret >= (unsigned int)(-515)) {
992f48a0 898#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 899 env->xcc |= PSR_CARRY;
900#else
060366c5 901 env->psr |= PSR_CARRY;
27908725 902#endif
060366c5
FB		 903 ret = -ret;
904 } else {
992f48a0 905#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 906 env->xcc &= ~PSR_CARRY;
907#else
060366c5 908 env->psr &= ~PSR_CARRY;
27908725 909#endif
060366c5
FB		 910 }
911 env->regwptr[0] = ret;
912 /* next instruction */
913 env->pc = env->npc;
914 env->npc = env->npc + 4;
915 break;
916 case 0x83: /* flush windows */
992f48a0
BS		 917#ifdef TARGET_ABI32
918 case 0x103:
919#endif
2623cbaf 920 flush_windows(env);
060366c5
FB		 921 /* next instruction */
922 env->pc = env->npc;
923 env->npc = env->npc + 4;
924 break;
3475187d 925#ifndef TARGET_SPARC64
060366c5
FB		 926 case TT_WIN_OVF: /* window overflow */
927 save_window(env);
928 break;
929 case TT_WIN_UNF: /* window underflow */
930 restore_window(env);
931 break;
61ff6f58
FB		 932 case TT_TFAULT:
933 case TT_DFAULT:
934 {
935 info.si_signo = SIGSEGV;
936 info.si_errno = 0;
937 /* XXX: check env->error_code */
938 info.si_code = TARGET_SEGV_MAPERR;
939 info._sifields._sigfault._addr = env->mmuregs[4];
624f7979 940 queue_signal(env, info.si_signo, &info);
61ff6f58
FB		 941 }
942 break;
3475187d 943#else
5ef54116
FB		 944 case TT_SPILL: /* window overflow */
945 save_window(env);
946 break;
947 case TT_FILL: /* window underflow */
948 restore_window(env);
949 break;
7f84a729
BS		 950 case TT_TFAULT:
951 case TT_DFAULT:
952 {
953 info.si_signo = SIGSEGV;
954 info.si_errno = 0;
955 /* XXX: check env->error_code */
956 info.si_code = TARGET_SEGV_MAPERR;
957 if (trapnr == TT_DFAULT)
958 info._sifields._sigfault._addr = env->dmmuregs[4];
959 else
375ee38b 960 info._sifields._sigfault._addr = env->tsptr->tpc;
624f7979 961 queue_signal(env, info.si_signo, &info);
7f84a729
BS		 962 }
963 break;
27524dc3 964#ifndef TARGET_ABI32
5bfb56b2
BS		 965 case 0x16e:
966 flush_windows(env);
967 sparc64_get_context(env);
968 break;
969 case 0x16f:
970 flush_windows(env);
971 sparc64_set_context(env);
972 break;
27524dc3 973#endif
3475187d 974#endif
48dc41eb
FB		 975 case EXCP_INTERRUPT:
976 /* just indicate that signals should be handled asap */
977 break;
1fddef4b
FB		 978 case EXCP_DEBUG:
979 {
980 int sig;
981
982 sig = gdb_handlesig (env, TARGET_SIGTRAP);
983 if (sig)
984 {
985 info.si_signo = sig;
986 info.si_errno = 0;
987 info.si_code = TARGET_TRAP_BRKPT;
624f7979 988 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 989 }
990 }
991 break;
060366c5
FB		 992 default:
993 printf ("Unhandled trap: 0x%x\n", trapnr);
7fe48483 994 cpu_dump_state(env, stderr, fprintf, 0);
060366c5
FB		 995 exit (1);
996 }
997 process_pending_signals (env);
998 }
93ac68bc
FB		 999}
1000
1001#endif
1002
67867308 1003#ifdef TARGET_PPC
9fddaa0c
FB		 1004static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1005{
1006 /* TO FIX */
1007 return 0;
1008}
3b46e624 1009
9fddaa0c
FB		 1010uint32_t cpu_ppc_load_tbl (CPUState *env)
1011{
1012 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1013}
3b46e624 1014
9fddaa0c
FB		 1015uint32_t cpu_ppc_load_tbu (CPUState *env)
1016{
1017 return cpu_ppc_get_tb(env) >> 32;
1018}
3b46e624 1019
a062e36c 1020uint32_t cpu_ppc_load_atbl (CPUState *env)
9fddaa0c 1021{
a062e36c 1022 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
9fddaa0c 1023}
5fafdf24 1024
a062e36c 1025uint32_t cpu_ppc_load_atbu (CPUState *env)
9fddaa0c 1026{
a062e36c 1027 return cpu_ppc_get_tb(env) >> 32;
9fddaa0c 1028}
76a66253 1029
76a66253
JM		 1030uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1031__attribute__ (( alias ("cpu_ppc_load_tbu") ));
1032
76a66253 1033uint32_t cpu_ppc601_load_rtcl (CPUState *env)
9fddaa0c 1034{
76a66253 1035 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
9fddaa0c 1036}
76a66253 1037
a750fc0b
JM		 1038/* XXX: to be fixed */
1039int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1040{
1041 return -1;
1042}
1043
1044int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1045{
1046 return -1;
1047}
1048
001faf32
BS		 1049#define EXCP_DUMP(env, fmt, ...) \
1050do { \
1051 fprintf(stderr, fmt , ## __VA_ARGS__); \
1052 cpu_dump_state(env, stderr, fprintf, 0); \
1053 qemu_log(fmt, ## __VA_ARGS__); \
430c7ec7 1054 if (logfile) \
1055 log_cpu_state(env, 0); \
e1833e1f
JM		 1056} while (0)
1057
67867308
FB		 1058void cpu_loop(CPUPPCState *env)
1059{
67867308 1060 target_siginfo_t info;
61190b14
FB		 1061 int trapnr;
1062 uint32_t ret;
3b46e624 1063
67867308
FB		 1064 for(;;) {
1065 trapnr = cpu_ppc_exec(env);
1066 switch(trapnr) {
e1833e1f
JM		 1067 case POWERPC_EXCP_NONE:
1068 /* Just go on */
67867308 1069 break;
e1833e1f
JM		 1070 case POWERPC_EXCP_CRITICAL: /* Critical input */
1071 cpu_abort(env, "Critical interrupt while in user mode. "
1072 "Aborting\n");
61190b14 1073 break;
e1833e1f
JM		 1074 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1075 cpu_abort(env, "Machine check exception while in user mode. "
1076 "Aborting\n");
1077 break;
1078 case POWERPC_EXCP_DSI: /* Data storage exception */
1079 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1080 env->spr[SPR_DAR]);
1081 /* XXX: check this. Seems bugged */
2be0071f
FB		 1082 switch (env->error_code & 0xFF000000) {
1083 case 0x40000000:
61190b14
FB		 1084 info.si_signo = TARGET_SIGSEGV;
1085 info.si_errno = 0;
1086 info.si_code = TARGET_SEGV_MAPERR;
1087 break;
2be0071f 1088 case 0x04000000:
61190b14
FB		 1089 info.si_signo = TARGET_SIGILL;
1090 info.si_errno = 0;
1091 info.si_code = TARGET_ILL_ILLADR;
1092 break;
2be0071f 1093 case 0x08000000:
61190b14
FB		 1094 info.si_signo = TARGET_SIGSEGV;
1095 info.si_errno = 0;
1096 info.si_code = TARGET_SEGV_ACCERR;
1097 break;
61190b14
FB		 1098 default:
1099 /* Let's send a regular segfault... */
e1833e1f
JM		 1100 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1101 env->error_code);
61190b14
FB		 1102 info.si_signo = TARGET_SIGSEGV;
1103 info.si_errno = 0;
1104 info.si_code = TARGET_SEGV_MAPERR;
1105 break;
1106 }
67867308 1107 info._sifields._sigfault._addr = env->nip;
624f7979 1108 queue_signal(env, info.si_signo, &info);
67867308 1109 break;
e1833e1f
JM		 1110 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1111 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
f10c315f 1112 env->spr[SPR_SRR0]);
e1833e1f 1113 /* XXX: check this */
2be0071f
FB		 1114 switch (env->error_code & 0xFF000000) {
1115 case 0x40000000:
61190b14 1116 info.si_signo = TARGET_SIGSEGV;
67867308 1117 info.si_errno = 0;
61190b14
FB		 1118 info.si_code = TARGET_SEGV_MAPERR;
1119 break;
2be0071f
FB		 1120 case 0x10000000:
1121 case 0x08000000:
61190b14
FB		 1122 info.si_signo = TARGET_SIGSEGV;
1123 info.si_errno = 0;
1124 info.si_code = TARGET_SEGV_ACCERR;
1125 break;
1126 default:
1127 /* Let's send a regular segfault... */
e1833e1f
JM		 1128 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1129 env->error_code);
61190b14
FB		 1130 info.si_signo = TARGET_SIGSEGV;
1131 info.si_errno = 0;
1132 info.si_code = TARGET_SEGV_MAPERR;
1133 break;
1134 }
1135 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1136 queue_signal(env, info.si_signo, &info);
67867308 1137 break;
e1833e1f
JM		 1138 case POWERPC_EXCP_EXTERNAL: /* External input */
1139 cpu_abort(env, "External interrupt while in user mode. "
1140 "Aborting\n");
1141 break;
1142 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1143 EXCP_DUMP(env, "Unaligned memory access\n");
1144 /* XXX: check this */
61190b14 1145 info.si_signo = TARGET_SIGBUS;
67867308 1146 info.si_errno = 0;
61190b14
FB		 1147 info.si_code = TARGET_BUS_ADRALN;
1148 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1149 queue_signal(env, info.si_signo, &info);
67867308 1150 break;
e1833e1f
JM		 1151 case POWERPC_EXCP_PROGRAM: /* Program exception */
1152 /* XXX: check this */
61190b14 1153 switch (env->error_code & ~0xF) {
e1833e1f
JM		 1154 case POWERPC_EXCP_FP:
1155 EXCP_DUMP(env, "Floating point program exception\n");
61190b14
FB		 1156 info.si_signo = TARGET_SIGFPE;
1157 info.si_errno = 0;
1158 switch (env->error_code & 0xF) {
e1833e1f 1159 case POWERPC_EXCP_FP_OX:
61190b14
FB		 1160 info.si_code = TARGET_FPE_FLTOVF;
1161 break;
e1833e1f 1162 case POWERPC_EXCP_FP_UX:
61190b14
FB		 1163 info.si_code = TARGET_FPE_FLTUND;
1164 break;
e1833e1f
JM		 1165 case POWERPC_EXCP_FP_ZX:
1166 case POWERPC_EXCP_FP_VXZDZ:
61190b14
FB		 1167 info.si_code = TARGET_FPE_FLTDIV;
1168 break;
e1833e1f 1169 case POWERPC_EXCP_FP_XX:
61190b14
FB		 1170 info.si_code = TARGET_FPE_FLTRES;
1171 break;
e1833e1f 1172 case POWERPC_EXCP_FP_VXSOFT:
61190b14
FB		 1173 info.si_code = TARGET_FPE_FLTINV;
1174 break;
7c58044c 1175 case POWERPC_EXCP_FP_VXSNAN:
e1833e1f
JM		 1176 case POWERPC_EXCP_FP_VXISI:
1177 case POWERPC_EXCP_FP_VXIDI:
1178 case POWERPC_EXCP_FP_VXIMZ:
1179 case POWERPC_EXCP_FP_VXVC:
1180 case POWERPC_EXCP_FP_VXSQRT:
1181 case POWERPC_EXCP_FP_VXCVI:
61190b14
FB		 1182 info.si_code = TARGET_FPE_FLTSUB;
1183 break;
1184 default:
e1833e1f
JM		 1185 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1186 env->error_code);
1187 break;
61190b14 1188 }
e1833e1f
JM		 1189 break;
1190 case POWERPC_EXCP_INVAL:
1191 EXCP_DUMP(env, "Invalid instruction\n");
61190b14
FB		 1192 info.si_signo = TARGET_SIGILL;
1193 info.si_errno = 0;
1194 switch (env->error_code & 0xF) {
e1833e1f 1195 case POWERPC_EXCP_INVAL_INVAL:
61190b14
FB		 1196 info.si_code = TARGET_ILL_ILLOPC;
1197 break;
e1833e1f 1198 case POWERPC_EXCP_INVAL_LSWX:
a750fc0b 1199 info.si_code = TARGET_ILL_ILLOPN;
61190b14 1200 break;
e1833e1f 1201 case POWERPC_EXCP_INVAL_SPR:
61190b14
FB		 1202 info.si_code = TARGET_ILL_PRVREG;
1203 break;
e1833e1f 1204 case POWERPC_EXCP_INVAL_FP:
61190b14
FB		 1205 info.si_code = TARGET_ILL_COPROC;
1206 break;
1207 default:
e1833e1f
JM		 1208 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1209 env->error_code & 0xF);
61190b14
FB		 1210 info.si_code = TARGET_ILL_ILLADR;
1211 break;
1212 }
1213 break;
e1833e1f
JM		 1214 case POWERPC_EXCP_PRIV:
1215 EXCP_DUMP(env, "Privilege violation\n");
61190b14
FB		 1216 info.si_signo = TARGET_SIGILL;
1217 info.si_errno = 0;
1218 switch (env->error_code & 0xF) {
e1833e1f 1219 case POWERPC_EXCP_PRIV_OPC:
61190b14
FB		 1220 info.si_code = TARGET_ILL_PRVOPC;
1221 break;
e1833e1f 1222 case POWERPC_EXCP_PRIV_REG:
61190b14 1223 info.si_code = TARGET_ILL_PRVREG;
e1833e1f 1224 break;
61190b14 1225 default:
e1833e1f
JM		 1226 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1227 env->error_code & 0xF);
61190b14
FB		 1228 info.si_code = TARGET_ILL_PRVOPC;
1229 break;
1230 }
1231 break;
e1833e1f
JM		 1232 case POWERPC_EXCP_TRAP:
1233 cpu_abort(env, "Tried to call a TRAP\n");
1234 break;
61190b14
FB		 1235 default:
1236 /* Should not happen ! */
e1833e1f
JM		 1237 cpu_abort(env, "Unknown program exception (%02x)\n",
1238 env->error_code);
1239 break;
61190b14
FB		 1240 }
1241 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1242 queue_signal(env, info.si_signo, &info);
67867308 1243 break;
e1833e1f
JM		 1244 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1245 EXCP_DUMP(env, "No floating point allowed\n");
61190b14 1246 info.si_signo = TARGET_SIGILL;
67867308 1247 info.si_errno = 0;
61190b14
FB		 1248 info.si_code = TARGET_ILL_COPROC;
1249 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1250 queue_signal(env, info.si_signo, &info);
67867308 1251 break;
e1833e1f
JM		 1252 case POWERPC_EXCP_SYSCALL: /* System call exception */
1253 cpu_abort(env, "Syscall exception while in user mode. "
1254 "Aborting\n");
61190b14 1255 break;
e1833e1f
JM		 1256 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1257 EXCP_DUMP(env, "No APU instruction allowed\n");
1258 info.si_signo = TARGET_SIGILL;
1259 info.si_errno = 0;
1260 info.si_code = TARGET_ILL_COPROC;
1261 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1262 queue_signal(env, info.si_signo, &info);
61190b14 1263 break;
e1833e1f
JM		 1264 case POWERPC_EXCP_DECR: /* Decrementer exception */
1265 cpu_abort(env, "Decrementer interrupt while in user mode. "
1266 "Aborting\n");
61190b14 1267 break;
e1833e1f
JM		 1268 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1269 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1270 "Aborting\n");
1271 break;
1272 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1273 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1274 "Aborting\n");
1275 break;
1276 case POWERPC_EXCP_DTLB: /* Data TLB error */
1277 cpu_abort(env, "Data TLB exception while in user mode. "
1278 "Aborting\n");
1279 break;
1280 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1281 cpu_abort(env, "Instruction TLB exception while in user mode. "
1282 "Aborting\n");
1283 break;
e1833e1f
JM		 1284 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1285 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1286 info.si_signo = TARGET_SIGILL;
1287 info.si_errno = 0;
1288 info.si_code = TARGET_ILL_COPROC;
1289 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1290 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1291 break;
1292 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1293 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1294 break;
1295 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1296 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1297 break;
1298 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1299 cpu_abort(env, "Performance monitor exception not handled\n");
1300 break;
1301 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1302 cpu_abort(env, "Doorbell interrupt while in user mode. "
1303 "Aborting\n");
1304 break;
1305 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1306 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1307 "Aborting\n");
1308 break;
1309 case POWERPC_EXCP_RESET: /* System reset exception */
1310 cpu_abort(env, "Reset interrupt while in user mode. "
1311 "Aborting\n");
1312 break;
e1833e1f
JM		 1313 case POWERPC_EXCP_DSEG: /* Data segment exception */
1314 cpu_abort(env, "Data segment exception while in user mode. "
1315 "Aborting\n");
1316 break;
1317 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1318 cpu_abort(env, "Instruction segment exception "
1319 "while in user mode. Aborting\n");
1320 break;
e85e7c6e 1321 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1322 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1323 cpu_abort(env, "Hypervisor decrementer interrupt "
1324 "while in user mode. Aborting\n");
1325 break;
e1833e1f
JM		 1326 case POWERPC_EXCP_TRACE: /* Trace exception */
1327 /* Nothing to do:
1328 * we use this exception to emulate step-by-step execution mode.
1329 */
1330 break;
e85e7c6e 1331 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1332 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1333 cpu_abort(env, "Hypervisor data storage exception "
1334 "while in user mode. Aborting\n");
1335 break;
1336 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1337 cpu_abort(env, "Hypervisor instruction storage exception "
1338 "while in user mode. Aborting\n");
1339 break;
1340 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1341 cpu_abort(env, "Hypervisor data segment exception "
1342 "while in user mode. Aborting\n");
1343 break;
1344 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1345 cpu_abort(env, "Hypervisor instruction segment exception "
1346 "while in user mode. Aborting\n");
1347 break;
e1833e1f
JM		 1348 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1349 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1350 info.si_signo = TARGET_SIGILL;
1351 info.si_errno = 0;
1352 info.si_code = TARGET_ILL_COPROC;
1353 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1354 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1355 break;
1356 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1357 cpu_abort(env, "Programable interval timer interrupt "
1358 "while in user mode. Aborting\n");
1359 break;
1360 case POWERPC_EXCP_IO: /* IO error exception */
1361 cpu_abort(env, "IO error exception while in user mode. "
1362 "Aborting\n");
1363 break;
1364 case POWERPC_EXCP_RUNM: /* Run mode exception */
1365 cpu_abort(env, "Run mode exception while in user mode. "
1366 "Aborting\n");
1367 break;
1368 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1369 cpu_abort(env, "Emulation trap exception not handled\n");
1370 break;
1371 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1372 cpu_abort(env, "Instruction fetch TLB exception "
1373 "while in user-mode. Aborting");
1374 break;
1375 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1376 cpu_abort(env, "Data load TLB exception while in user-mode. "
1377 "Aborting");
1378 break;
1379 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1380 cpu_abort(env, "Data store TLB exception while in user-mode. "
1381 "Aborting");
1382 break;
1383 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1384 cpu_abort(env, "Floating-point assist exception not handled\n");
1385 break;
1386 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1387 cpu_abort(env, "Instruction address breakpoint exception "
1388 "not handled\n");
1389 break;
1390 case POWERPC_EXCP_SMI: /* System management interrupt */
1391 cpu_abort(env, "System management interrupt while in user mode. "
1392 "Aborting\n");
1393 break;
1394 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1395 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1396 "Aborting\n");
1397 break;
1398 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1399 cpu_abort(env, "Performance monitor exception not handled\n");
1400 break;
1401 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1402 cpu_abort(env, "Vector assist exception not handled\n");
1403 break;
1404 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1405 cpu_abort(env, "Soft patch exception not handled\n");
1406 break;
1407 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1408 cpu_abort(env, "Maintenance exception while in user mode. "
1409 "Aborting\n");
1410 break;
1411 case POWERPC_EXCP_STOP: /* stop translation */
1412 /* We did invalidate the instruction cache. Go on */
1413 break;
1414 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1415 /* We just stopped because of a branch. Go on */
1416 break;
1417 case POWERPC_EXCP_SYSCALL_USER:
1418 /* system call in user-mode emulation */
1419 /* WARNING:
1420 * PPC ABI uses overflow flag in cr0 to signal an error
1421 * in syscalls.
1422 */
1423#if 0
1424 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1425 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1426#endif
1427 env->crf[0] &= ~0x1;
1428 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1429 env->gpr[5], env->gpr[6], env->gpr[7],
1430 env->gpr[8]);
bcd4933a
NF		 1431 if (ret == (uint32_t)(-TARGET_QEMU_ESIGRETURN)) {
1432 /* Returning from a successful sigreturn syscall.
1433 Avoid corrupting register state. */
1434 break;
1435 }
e1833e1f
JM		 1436 if (ret > (uint32_t)(-515)) {
1437 env->crf[0] |= 0x1;
1438 ret = -ret;
61190b14 1439 }
e1833e1f
JM		 1440 env->gpr[3] = ret;
1441#if 0
1442 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1443#endif
1444 break;
71f75756
AJ		 1445 case EXCP_DEBUG:
1446 {
1447 int sig;
1448
1449 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1450 if (sig) {
1451 info.si_signo = sig;
1452 info.si_errno = 0;
1453 info.si_code = TARGET_TRAP_BRKPT;
1454 queue_signal(env, info.si_signo, &info);
1455 }
1456 }
1457 break;
56ba31ff
JM		 1458 case EXCP_INTERRUPT:
1459 /* just indicate that signals should be handled asap */
1460 break;
e1833e1f
JM		 1461 default:
1462 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1463 break;
67867308
FB		 1464 }
1465 process_pending_signals(env);
1466 }
1467}
1468#endif
1469
048f6b4d
FB		 1470#ifdef TARGET_MIPS
1471
1472#define MIPS_SYS(name, args) args,
1473
1474static const uint8_t mips_syscall_args[] = {
1475 MIPS_SYS(sys_syscall , 0) /* 4000 */
1476 MIPS_SYS(sys_exit , 1)
1477 MIPS_SYS(sys_fork , 0)
1478 MIPS_SYS(sys_read , 3)
1479 MIPS_SYS(sys_write , 3)
1480 MIPS_SYS(sys_open , 3) /* 4005 */
1481 MIPS_SYS(sys_close , 1)
1482 MIPS_SYS(sys_waitpid , 3)
1483 MIPS_SYS(sys_creat , 2)
1484 MIPS_SYS(sys_link , 2)
1485 MIPS_SYS(sys_unlink , 1) /* 4010 */
1486 MIPS_SYS(sys_execve , 0)
1487 MIPS_SYS(sys_chdir , 1)
1488 MIPS_SYS(sys_time , 1)
1489 MIPS_SYS(sys_mknod , 3)
1490 MIPS_SYS(sys_chmod , 2) /* 4015 */
1491 MIPS_SYS(sys_lchown , 3)
1492 MIPS_SYS(sys_ni_syscall , 0)
1493 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1494 MIPS_SYS(sys_lseek , 3)
1495 MIPS_SYS(sys_getpid , 0) /* 4020 */
1496 MIPS_SYS(sys_mount , 5)
1497 MIPS_SYS(sys_oldumount , 1)
1498 MIPS_SYS(sys_setuid , 1)
1499 MIPS_SYS(sys_getuid , 0)
1500 MIPS_SYS(sys_stime , 1) /* 4025 */
1501 MIPS_SYS(sys_ptrace , 4)
1502 MIPS_SYS(sys_alarm , 1)
1503 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1504 MIPS_SYS(sys_pause , 0)
1505 MIPS_SYS(sys_utime , 2) /* 4030 */
1506 MIPS_SYS(sys_ni_syscall , 0)
1507 MIPS_SYS(sys_ni_syscall , 0)
1508 MIPS_SYS(sys_access , 2)
1509 MIPS_SYS(sys_nice , 1)
1510 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1511 MIPS_SYS(sys_sync , 0)
1512 MIPS_SYS(sys_kill , 2)
1513 MIPS_SYS(sys_rename , 2)
1514 MIPS_SYS(sys_mkdir , 2)
1515 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1516 MIPS_SYS(sys_dup , 1)
1517 MIPS_SYS(sys_pipe , 0)
1518 MIPS_SYS(sys_times , 1)
1519 MIPS_SYS(sys_ni_syscall , 0)
1520 MIPS_SYS(sys_brk , 1) /* 4045 */
1521 MIPS_SYS(sys_setgid , 1)
1522 MIPS_SYS(sys_getgid , 0)
1523 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1524 MIPS_SYS(sys_geteuid , 0)
1525 MIPS_SYS(sys_getegid , 0) /* 4050 */
1526 MIPS_SYS(sys_acct , 0)
1527 MIPS_SYS(sys_umount , 2)
1528 MIPS_SYS(sys_ni_syscall , 0)
1529 MIPS_SYS(sys_ioctl , 3)
1530 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1531 MIPS_SYS(sys_ni_syscall , 2)
1532 MIPS_SYS(sys_setpgid , 2)
1533 MIPS_SYS(sys_ni_syscall , 0)
1534 MIPS_SYS(sys_olduname , 1)
1535 MIPS_SYS(sys_umask , 1) /* 4060 */
1536 MIPS_SYS(sys_chroot , 1)
1537 MIPS_SYS(sys_ustat , 2)
1538 MIPS_SYS(sys_dup2 , 2)
1539 MIPS_SYS(sys_getppid , 0)
1540 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1541 MIPS_SYS(sys_setsid , 0)
1542 MIPS_SYS(sys_sigaction , 3)
1543 MIPS_SYS(sys_sgetmask , 0)
1544 MIPS_SYS(sys_ssetmask , 1)
1545 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1546 MIPS_SYS(sys_setregid , 2)
1547 MIPS_SYS(sys_sigsuspend , 0)
1548 MIPS_SYS(sys_sigpending , 1)
1549 MIPS_SYS(sys_sethostname , 2)
1550 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1551 MIPS_SYS(sys_getrlimit , 2)
1552 MIPS_SYS(sys_getrusage , 2)
1553 MIPS_SYS(sys_gettimeofday, 2)
1554 MIPS_SYS(sys_settimeofday, 2)
1555 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1556 MIPS_SYS(sys_setgroups , 2)
1557 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1558 MIPS_SYS(sys_symlink , 2)
1559 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1560 MIPS_SYS(sys_readlink , 3) /* 4085 */
1561 MIPS_SYS(sys_uselib , 1)
1562 MIPS_SYS(sys_swapon , 2)
1563 MIPS_SYS(sys_reboot , 3)
1564 MIPS_SYS(old_readdir , 3)
1565 MIPS_SYS(old_mmap , 6) /* 4090 */
1566 MIPS_SYS(sys_munmap , 2)
1567 MIPS_SYS(sys_truncate , 2)
1568 MIPS_SYS(sys_ftruncate , 2)
1569 MIPS_SYS(sys_fchmod , 2)
1570 MIPS_SYS(sys_fchown , 3) /* 4095 */
1571 MIPS_SYS(sys_getpriority , 2)
1572 MIPS_SYS(sys_setpriority , 3)
1573 MIPS_SYS(sys_ni_syscall , 0)
1574 MIPS_SYS(sys_statfs , 2)
1575 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1576 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1577 MIPS_SYS(sys_socketcall , 2)
1578 MIPS_SYS(sys_syslog , 3)
1579 MIPS_SYS(sys_setitimer , 3)
1580 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1581 MIPS_SYS(sys_newstat , 2)
1582 MIPS_SYS(sys_newlstat , 2)
1583 MIPS_SYS(sys_newfstat , 2)
1584 MIPS_SYS(sys_uname , 1)
1585 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1586 MIPS_SYS(sys_vhangup , 0)
1587 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1588 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1589 MIPS_SYS(sys_wait4 , 4)
1590 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1591 MIPS_SYS(sys_sysinfo , 1)
1592 MIPS_SYS(sys_ipc , 6)
1593 MIPS_SYS(sys_fsync , 1)
1594 MIPS_SYS(sys_sigreturn , 0)
18113962 1595 MIPS_SYS(sys_clone , 6) /* 4120 */
048f6b4d
FB		 1596 MIPS_SYS(sys_setdomainname, 2)
1597 MIPS_SYS(sys_newuname , 1)
1598 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1599 MIPS_SYS(sys_adjtimex , 1)
1600 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1601 MIPS_SYS(sys_sigprocmask , 3)
1602 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1603 MIPS_SYS(sys_init_module , 5)
1604 MIPS_SYS(sys_delete_module, 1)
1605 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1606 MIPS_SYS(sys_quotactl , 0)
1607 MIPS_SYS(sys_getpgid , 1)
1608 MIPS_SYS(sys_fchdir , 1)
1609 MIPS_SYS(sys_bdflush , 2)
1610 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1611 MIPS_SYS(sys_personality , 1)
1612 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1613 MIPS_SYS(sys_setfsuid , 1)
1614 MIPS_SYS(sys_setfsgid , 1)
1615 MIPS_SYS(sys_llseek , 5) /* 4140 */
1616 MIPS_SYS(sys_getdents , 3)
1617 MIPS_SYS(sys_select , 5)
1618 MIPS_SYS(sys_flock , 2)
1619 MIPS_SYS(sys_msync , 3)
1620 MIPS_SYS(sys_readv , 3) /* 4145 */
1621 MIPS_SYS(sys_writev , 3)
1622 MIPS_SYS(sys_cacheflush , 3)
1623 MIPS_SYS(sys_cachectl , 3)
1624 MIPS_SYS(sys_sysmips , 4)
1625 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1626 MIPS_SYS(sys_getsid , 1)
1627 MIPS_SYS(sys_fdatasync , 0)
1628 MIPS_SYS(sys_sysctl , 1)
1629 MIPS_SYS(sys_mlock , 2)
1630 MIPS_SYS(sys_munlock , 2) /* 4155 */
1631 MIPS_SYS(sys_mlockall , 1)
1632 MIPS_SYS(sys_munlockall , 0)
1633 MIPS_SYS(sys_sched_setparam, 2)
1634 MIPS_SYS(sys_sched_getparam, 2)
1635 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1636 MIPS_SYS(sys_sched_getscheduler, 1)
1637 MIPS_SYS(sys_sched_yield , 0)
1638 MIPS_SYS(sys_sched_get_priority_max, 1)
1639 MIPS_SYS(sys_sched_get_priority_min, 1)
1640 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1641 MIPS_SYS(sys_nanosleep, 2)
1642 MIPS_SYS(sys_mremap , 4)
1643 MIPS_SYS(sys_accept , 3)
1644 MIPS_SYS(sys_bind , 3)
1645 MIPS_SYS(sys_connect , 3) /* 4170 */
1646 MIPS_SYS(sys_getpeername , 3)
1647 MIPS_SYS(sys_getsockname , 3)
1648 MIPS_SYS(sys_getsockopt , 5)
1649 MIPS_SYS(sys_listen , 2)
1650 MIPS_SYS(sys_recv , 4) /* 4175 */
1651 MIPS_SYS(sys_recvfrom , 6)
1652 MIPS_SYS(sys_recvmsg , 3)
1653 MIPS_SYS(sys_send , 4)
1654 MIPS_SYS(sys_sendmsg , 3)
1655 MIPS_SYS(sys_sendto , 6) /* 4180 */
1656 MIPS_SYS(sys_setsockopt , 5)
1657 MIPS_SYS(sys_shutdown , 2)
1658 MIPS_SYS(sys_socket , 3)
1659 MIPS_SYS(sys_socketpair , 4)
1660 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1661 MIPS_SYS(sys_getresuid , 3)
1662 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1663 MIPS_SYS(sys_poll , 3)
1664 MIPS_SYS(sys_nfsservctl , 3)
1665 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1666 MIPS_SYS(sys_getresgid , 3)
1667 MIPS_SYS(sys_prctl , 5)
1668 MIPS_SYS(sys_rt_sigreturn, 0)
1669 MIPS_SYS(sys_rt_sigaction, 4)
1670 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1671 MIPS_SYS(sys_rt_sigpending, 2)
1672 MIPS_SYS(sys_rt_sigtimedwait, 4)
1673 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1674 MIPS_SYS(sys_rt_sigsuspend, 0)
1675 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1676 MIPS_SYS(sys_pwrite64 , 6)
1677 MIPS_SYS(sys_chown , 3)
1678 MIPS_SYS(sys_getcwd , 2)
1679 MIPS_SYS(sys_capget , 2)
1680 MIPS_SYS(sys_capset , 2) /* 4205 */
1681 MIPS_SYS(sys_sigaltstack , 0)
1682 MIPS_SYS(sys_sendfile , 4)
1683 MIPS_SYS(sys_ni_syscall , 0)
1684 MIPS_SYS(sys_ni_syscall , 0)
1685 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1686 MIPS_SYS(sys_truncate64 , 4)
1687 MIPS_SYS(sys_ftruncate64 , 4)
1688 MIPS_SYS(sys_stat64 , 2)
1689 MIPS_SYS(sys_lstat64 , 2)
1690 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1691 MIPS_SYS(sys_pivot_root , 2)
1692 MIPS_SYS(sys_mincore , 3)
1693 MIPS_SYS(sys_madvise , 3)
1694 MIPS_SYS(sys_getdents64 , 3)
1695 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1696 MIPS_SYS(sys_ni_syscall , 0)
1697 MIPS_SYS(sys_gettid , 0)
1698 MIPS_SYS(sys_readahead , 5)
1699 MIPS_SYS(sys_setxattr , 5)
1700 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1701 MIPS_SYS(sys_fsetxattr , 5)
1702 MIPS_SYS(sys_getxattr , 4)
1703 MIPS_SYS(sys_lgetxattr , 4)
1704 MIPS_SYS(sys_fgetxattr , 4)
1705 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1706 MIPS_SYS(sys_llistxattr , 3)
1707 MIPS_SYS(sys_flistxattr , 3)
1708 MIPS_SYS(sys_removexattr , 2)
1709 MIPS_SYS(sys_lremovexattr, 2)
1710 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1711 MIPS_SYS(sys_tkill , 2)
1712 MIPS_SYS(sys_sendfile64 , 5)
1713 MIPS_SYS(sys_futex , 2)
1714 MIPS_SYS(sys_sched_setaffinity, 3)
1715 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1716 MIPS_SYS(sys_io_setup , 2)
1717 MIPS_SYS(sys_io_destroy , 1)
1718 MIPS_SYS(sys_io_getevents, 5)
1719 MIPS_SYS(sys_io_submit , 3)
1720 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1721 MIPS_SYS(sys_exit_group , 1)
1722 MIPS_SYS(sys_lookup_dcookie, 3)
1723 MIPS_SYS(sys_epoll_create, 1)
1724 MIPS_SYS(sys_epoll_ctl , 4)
1725 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1726 MIPS_SYS(sys_remap_file_pages, 5)
1727 MIPS_SYS(sys_set_tid_address, 1)
1728 MIPS_SYS(sys_restart_syscall, 0)
1729 MIPS_SYS(sys_fadvise64_64, 7)
1730 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1731 MIPS_SYS(sys_fstatfs64 , 2)
1732 MIPS_SYS(sys_timer_create, 3)
1733 MIPS_SYS(sys_timer_settime, 4)
1734 MIPS_SYS(sys_timer_gettime, 2)
1735 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1736 MIPS_SYS(sys_timer_delete, 1)
1737 MIPS_SYS(sys_clock_settime, 2)
1738 MIPS_SYS(sys_clock_gettime, 2)
1739 MIPS_SYS(sys_clock_getres, 2)
1740 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1741 MIPS_SYS(sys_tgkill , 3)
1742 MIPS_SYS(sys_utimes , 2)
1743 MIPS_SYS(sys_mbind , 4)
1744 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1745 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1746 MIPS_SYS(sys_mq_open , 4)
1747 MIPS_SYS(sys_mq_unlink , 1)
1748 MIPS_SYS(sys_mq_timedsend, 5)
1749 MIPS_SYS(sys_mq_timedreceive, 5)
1750 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1751 MIPS_SYS(sys_mq_getsetattr, 3)
1752 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1753 MIPS_SYS(sys_waitid , 4)
1754 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1755 MIPS_SYS(sys_add_key , 5)
388bb21a 1756 MIPS_SYS(sys_request_key, 4)
048f6b4d 1757 MIPS_SYS(sys_keyctl , 5)
6f5b89a0 1758 MIPS_SYS(sys_set_thread_area, 1)
388bb21a
TS		 1759 MIPS_SYS(sys_inotify_init, 0)
1760 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1761 MIPS_SYS(sys_inotify_rm_watch, 2)
1762 MIPS_SYS(sys_migrate_pages, 4)
1763 MIPS_SYS(sys_openat, 4)
1764 MIPS_SYS(sys_mkdirat, 3)
1765 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1766 MIPS_SYS(sys_fchownat, 5)
1767 MIPS_SYS(sys_futimesat, 3)
1768 MIPS_SYS(sys_fstatat64, 4)
1769 MIPS_SYS(sys_unlinkat, 3)
1770 MIPS_SYS(sys_renameat, 4) /* 4295 */
1771 MIPS_SYS(sys_linkat, 5)
1772 MIPS_SYS(sys_symlinkat, 3)
1773 MIPS_SYS(sys_readlinkat, 4)
1774 MIPS_SYS(sys_fchmodat, 3)
1775 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1776 MIPS_SYS(sys_pselect6, 6)
1777 MIPS_SYS(sys_ppoll, 5)
1778 MIPS_SYS(sys_unshare, 1)
1779 MIPS_SYS(sys_splice, 4)
1780 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1781 MIPS_SYS(sys_tee, 4)
1782 MIPS_SYS(sys_vmsplice, 4)
1783 MIPS_SYS(sys_move_pages, 6)
1784 MIPS_SYS(sys_set_robust_list, 2)
1785 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1786 MIPS_SYS(sys_kexec_load, 4)
1787 MIPS_SYS(sys_getcpu, 3)
1788 MIPS_SYS(sys_epoll_pwait, 6)
1789 MIPS_SYS(sys_ioprio_set, 3)
1790 MIPS_SYS(sys_ioprio_get, 2)
048f6b4d
FB		 1791};
1792
1793#undef MIPS_SYS
1794
590bc601
PB		 1795static int do_store_exclusive(CPUMIPSState *env)
1796{
1797 target_ulong addr;
1798 target_ulong page_addr;
1799 target_ulong val;
1800 int flags;
1801 int segv = 0;
1802 int reg;
1803 int d;
1804
1805 addr = env->CP0_LLAddr;
1806 page_addr = addr & TARGET_PAGE_MASK;
1807 start_exclusive();
1808 mmap_lock();
1809 flags = page_get_flags(page_addr);
1810 if ((flags & PAGE_READ) == 0) {
1811 segv = 1;
1812 } else {
1813 reg = env->llreg & 0x1f;
1814 d = (env->llreg & 0x20) != 0;
1815 if (d) {
1816 segv = get_user_s64(val, addr);
1817 } else {
1818 segv = get_user_s32(val, addr);
1819 }
1820 if (!segv) {
1821 if (val != env->llval) {
1822 env->active_tc.gpr[reg] = 0;
1823 } else {
1824 if (d) {
1825 segv = put_user_u64(env->llnewval, addr);
1826 } else {
1827 segv = put_user_u32(env->llnewval, addr);
1828 }
1829 if (!segv) {
1830 env->active_tc.gpr[reg] = 1;
1831 }
1832 }
1833 }
1834 }
1835 env->CP0_LLAddr = -1;
1836 if (!segv) {
1837 env->active_tc.PC += 4;
1838 }
1839 mmap_unlock();
1840 end_exclusive();
1841 return segv;
1842}
1843
048f6b4d
FB		 1844void cpu_loop(CPUMIPSState *env)
1845{
1846 target_siginfo_t info;
388bb21a 1847 int trapnr, ret;
048f6b4d 1848 unsigned int syscall_num;
048f6b4d
FB		 1849
1850 for(;;) {
590bc601 1851 cpu_exec_start(env);
048f6b4d 1852 trapnr = cpu_mips_exec(env);
590bc601 1853 cpu_exec_end(env);
048f6b4d
FB		 1854 switch(trapnr) {
1855 case EXCP_SYSCALL:
b5dc7732
TS		 1856 syscall_num = env->active_tc.gpr[2] - 4000;
1857 env->active_tc.PC += 4;
388bb21a
TS		 1858 if (syscall_num >= sizeof(mips_syscall_args)) {
1859 ret = -ENOSYS;
1860 } else {
1861 int nb_args;
992f48a0
BS		 1862 abi_ulong sp_reg;
1863 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
388bb21a
TS		 1864
1865 nb_args = mips_syscall_args[syscall_num];
b5dc7732 1866 sp_reg = env->active_tc.gpr[29];
388bb21a
TS		 1867 switch (nb_args) {
1868 /* these arguments are taken from the stack */
2f619698
FB		 1869 /* FIXME - what to do if get_user() fails? */
1870 case 8: get_user_ual(arg8, sp_reg + 28);
1871 case 7: get_user_ual(arg7, sp_reg + 24);
1872 case 6: get_user_ual(arg6, sp_reg + 20);
1873 case 5: get_user_ual(arg5, sp_reg + 16);
388bb21a
TS		 1874 default:
1875 break;
048f6b4d 1876 }
b5dc7732
TS		 1877 ret = do_syscall(env, env->active_tc.gpr[2],
1878 env->active_tc.gpr[4],
1879 env->active_tc.gpr[5],
1880 env->active_tc.gpr[6],
1881 env->active_tc.gpr[7],
388bb21a
TS		 1882 arg5, arg6/*, arg7, arg8*/);
1883 }
0b1bcb00
PB		 1884 if (ret == -TARGET_QEMU_ESIGRETURN) {
1885 /* Returning from a successful sigreturn syscall.
1886 Avoid clobbering register state. */
1887 break;
1888 }
388bb21a 1889 if ((unsigned int)ret >= (unsigned int)(-1133)) {
b5dc7732 1890 env->active_tc.gpr[7] = 1; /* error flag */
388bb21a
TS		 1891 ret = -ret;
1892 } else {
b5dc7732 1893 env->active_tc.gpr[7] = 0; /* error flag */
048f6b4d 1894 }
b5dc7732 1895 env->active_tc.gpr[2] = ret;
048f6b4d 1896 break;
ca7c2b1b
TS		 1897 case EXCP_TLBL:
1898 case EXCP_TLBS:
e4474235
PB		 1899 info.si_signo = TARGET_SIGSEGV;
1900 info.si_errno = 0;
1901 /* XXX: check env->error_code */
1902 info.si_code = TARGET_SEGV_MAPERR;
1903 info._sifields._sigfault._addr = env->CP0_BadVAddr;
1904 queue_signal(env, info.si_signo, &info);
1905 break;
6900e84b 1906 case EXCP_CpU:
048f6b4d 1907 case EXCP_RI:
bc1ad2de
FB		 1908 info.si_signo = TARGET_SIGILL;
1909 info.si_errno = 0;
1910 info.si_code = 0;
624f7979 1911 queue_signal(env, info.si_signo, &info);
048f6b4d 1912 break;
106ec879
FB		 1913 case EXCP_INTERRUPT:
1914 /* just indicate that signals should be handled asap */
1915 break;
d08b2a28
PB		 1916 case EXCP_DEBUG:
1917 {
1918 int sig;
1919
1920 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1921 if (sig)
1922 {
1923 info.si_signo = sig;
1924 info.si_errno = 0;
1925 info.si_code = TARGET_TRAP_BRKPT;
624f7979 1926 queue_signal(env, info.si_signo, &info);
d08b2a28
PB		 1927 }
1928 }
1929 break;
590bc601
PB		 1930 case EXCP_SC:
1931 if (do_store_exclusive(env)) {
1932 info.si_signo = TARGET_SIGSEGV;
1933 info.si_errno = 0;
1934 info.si_code = TARGET_SEGV_MAPERR;
1935 info._sifields._sigfault._addr = env->active_tc.PC;
1936 queue_signal(env, info.si_signo, &info);
1937 }
1938 break;
048f6b4d
FB		 1939 default:
1940 // error:
5fafdf24 1941 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
048f6b4d
FB		 1942 trapnr);
1943 cpu_dump_state(env, stderr, fprintf, 0);
1944 abort();
1945 }
1946 process_pending_signals(env);
1947 }
1948}
1949#endif
1950
fdf9b3e8
FB		 1951#ifdef TARGET_SH4
1952void cpu_loop (CPUState *env)
1953{
1954 int trapnr, ret;
355fb23d 1955 target_siginfo_t info;
3b46e624 1956
fdf9b3e8
FB		 1957 while (1) {
1958 trapnr = cpu_sh4_exec (env);
3b46e624 1959
fdf9b3e8
FB		 1960 switch (trapnr) {
1961 case 0x160:
0b6d3ae0 1962 env->pc += 2;
5fafdf24
TS		 1963 ret = do_syscall(env,
1964 env->gregs[3],
1965 env->gregs[4],
1966 env->gregs[5],
1967 env->gregs[6],
1968 env->gregs[7],
1969 env->gregs[0],
fca743f3 1970 env->gregs[1]);
9c2a9ea1 1971 env->gregs[0] = ret;
fdf9b3e8 1972 break;
c3b5bc8a
TS		 1973 case EXCP_INTERRUPT:
1974 /* just indicate that signals should be handled asap */
1975 break;
355fb23d
PB		 1976 case EXCP_DEBUG:
1977 {
1978 int sig;
1979
1980 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1981 if (sig)
1982 {
1983 info.si_signo = sig;
1984 info.si_errno = 0;
1985 info.si_code = TARGET_TRAP_BRKPT;
624f7979 1986 queue_signal(env, info.si_signo, &info);
355fb23d
PB		 1987 }
1988 }
1989 break;
c3b5bc8a
TS		 1990 case 0xa0:
1991 case 0xc0:
1992 info.si_signo = SIGSEGV;
1993 info.si_errno = 0;
1994 info.si_code = TARGET_SEGV_MAPERR;
1995 info._sifields._sigfault._addr = env->tea;
624f7979 1996 queue_signal(env, info.si_signo, &info);
c3b5bc8a
TS		 1997 break;
1998
fdf9b3e8
FB		 1999 default:
2000 printf ("Unhandled trap: 0x%x\n", trapnr);
2001 cpu_dump_state(env, stderr, fprintf, 0);
2002 exit (1);
2003 }
2004 process_pending_signals (env);
2005 }
2006}
2007#endif
2008
48733d19
TS		 2009#ifdef TARGET_CRIS
2010void cpu_loop (CPUState *env)
2011{
2012 int trapnr, ret;
2013 target_siginfo_t info;
2014
2015 while (1) {
2016 trapnr = cpu_cris_exec (env);
2017 switch (trapnr) {
2018 case 0xaa:
2019 {
2020 info.si_signo = SIGSEGV;
2021 info.si_errno = 0;
2022 /* XXX: check env->error_code */
2023 info.si_code = TARGET_SEGV_MAPERR;
e00c1e71 2024 info._sifields._sigfault._addr = env->pregs[PR_EDA];
624f7979 2025 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2026 }
2027 break;
b6d3abda
EI		 2028 case EXCP_INTERRUPT:
2029 /* just indicate that signals should be handled asap */
2030 break;
48733d19
TS		 2031 case EXCP_BREAK:
2032 ret = do_syscall(env,
2033 env->regs[9],
2034 env->regs[10],
2035 env->regs[11],
2036 env->regs[12],
2037 env->regs[13],
2038 env->pregs[7],
2039 env->pregs[11]);
2040 env->regs[10] = ret;
48733d19
TS		 2041 break;
2042 case EXCP_DEBUG:
2043 {
2044 int sig;
2045
2046 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2047 if (sig)
2048 {
2049 info.si_signo = sig;
2050 info.si_errno = 0;
2051 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2052 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2053 }
2054 }
2055 break;
2056 default:
2057 printf ("Unhandled trap: 0x%x\n", trapnr);
2058 cpu_dump_state(env, stderr, fprintf, 0);
2059 exit (1);
2060 }
2061 process_pending_signals (env);
2062 }
2063}
2064#endif
2065
b779e29e
EI		 2066#ifdef TARGET_MICROBLAZE
2067void cpu_loop (CPUState *env)
2068{
2069 int trapnr, ret;
2070 target_siginfo_t info;
2071
2072 while (1) {
2073 trapnr = cpu_mb_exec (env);
2074 switch (trapnr) {
2075 case 0xaa:
2076 {
2077 info.si_signo = SIGSEGV;
2078 info.si_errno = 0;
2079 /* XXX: check env->error_code */
2080 info.si_code = TARGET_SEGV_MAPERR;
2081 info._sifields._sigfault._addr = 0;
2082 queue_signal(env, info.si_signo, &info);
2083 }
2084 break;
2085 case EXCP_INTERRUPT:
2086 /* just indicate that signals should be handled asap */
2087 break;
2088 case EXCP_BREAK:
2089 /* Return address is 4 bytes after the call. */
2090 env->regs[14] += 4;
2091 ret = do_syscall(env,
2092 env->regs[12],
2093 env->regs[5],
2094 env->regs[6],
2095 env->regs[7],
2096 env->regs[8],
2097 env->regs[9],
2098 env->regs[10]);
2099 env->regs[3] = ret;
2100 env->sregs[SR_PC] = env->regs[14];
2101 break;
2102 case EXCP_DEBUG:
2103 {
2104 int sig;
2105
2106 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2107 if (sig)
2108 {
2109 info.si_signo = sig;
2110 info.si_errno = 0;
2111 info.si_code = TARGET_TRAP_BRKPT;
2112 queue_signal(env, info.si_signo, &info);
2113 }
2114 }
2115 break;
2116 default:
2117 printf ("Unhandled trap: 0x%x\n", trapnr);
2118 cpu_dump_state(env, stderr, fprintf, 0);
2119 exit (1);
2120 }
2121 process_pending_signals (env);
2122 }
2123}
2124#endif
2125
e6e5906b
PB		 2126#ifdef TARGET_M68K
2127
2128void cpu_loop(CPUM68KState *env)
2129{
2130 int trapnr;
2131 unsigned int n;
2132 target_siginfo_t info;
2133 TaskState *ts = env->opaque;
3b46e624 2134
e6e5906b
PB		 2135 for(;;) {
2136 trapnr = cpu_m68k_exec(env);
2137 switch(trapnr) {
2138 case EXCP_ILLEGAL:
2139 {
2140 if (ts->sim_syscalls) {
2141 uint16_t nr;
2142 nr = lduw(env->pc + 2);
2143 env->pc += 4;
2144 do_m68k_simcall(env, nr);
2145 } else {
2146 goto do_sigill;
2147 }
2148 }
2149 break;
a87295e8 2150 case EXCP_HALT_INSN:
e6e5906b 2151 /* Semihosing syscall. */
a87295e8 2152 env->pc += 4;
e6e5906b
PB		 2153 do_m68k_semihosting(env, env->dregs[0]);
2154 break;
2155 case EXCP_LINEA:
2156 case EXCP_LINEF:
2157 case EXCP_UNSUPPORTED:
2158 do_sigill:
2159 info.si_signo = SIGILL;
2160 info.si_errno = 0;
2161 info.si_code = TARGET_ILL_ILLOPN;
2162 info._sifields._sigfault._addr = env->pc;
624f7979 2163 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2164 break;
2165 case EXCP_TRAP0:
2166 {
2167 ts->sim_syscalls = 0;
2168 n = env->dregs[0];
2169 env->pc += 2;
5fafdf24
TS		 2170 env->dregs[0] = do_syscall(env,
2171 n,
e6e5906b
PB		 2172 env->dregs[1],
2173 env->dregs[2],
2174 env->dregs[3],
2175 env->dregs[4],
2176 env->dregs[5],
bb7ec043 2177 env->aregs[0]);
e6e5906b
PB		 2178 }
2179 break;
2180 case EXCP_INTERRUPT:
2181 /* just indicate that signals should be handled asap */
2182 break;
2183 case EXCP_ACCESS:
2184 {
2185 info.si_signo = SIGSEGV;
2186 info.si_errno = 0;
2187 /* XXX: check env->error_code */
2188 info.si_code = TARGET_SEGV_MAPERR;
2189 info._sifields._sigfault._addr = env->mmu.ar;
624f7979 2190 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2191 }
2192 break;
2193 case EXCP_DEBUG:
2194 {
2195 int sig;
2196
2197 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2198 if (sig)
2199 {
2200 info.si_signo = sig;
2201 info.si_errno = 0;
2202 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2203 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2204 }
2205 }
2206 break;
2207 default:
5fafdf24 2208 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
e6e5906b
PB		 2209 trapnr);
2210 cpu_dump_state(env, stderr, fprintf, 0);
2211 abort();
2212 }
2213 process_pending_signals(env);
2214 }
2215}
2216#endif /* TARGET_M68K */
2217
7a3148a9
JM		 2218#ifdef TARGET_ALPHA
2219void cpu_loop (CPUState *env)
2220{
e96efcfc 2221 int trapnr;
7a3148a9 2222 target_siginfo_t info;
3b46e624 2223
7a3148a9
JM		 2224 while (1) {
2225 trapnr = cpu_alpha_exec (env);
3b46e624 2226
7a3148a9
JM		 2227 switch (trapnr) {
2228 case EXCP_RESET:
2229 fprintf(stderr, "Reset requested. Exit\n");
2230 exit(1);
2231 break;
2232 case EXCP_MCHK:
2233 fprintf(stderr, "Machine check exception. Exit\n");
2234 exit(1);
2235 break;
2236 case EXCP_ARITH:
2237 fprintf(stderr, "Arithmetic trap.\n");
2238 exit(1);
2239 break;
2240 case EXCP_HW_INTERRUPT:
5fafdf24 2241 fprintf(stderr, "External interrupt. Exit\n");
7a3148a9
JM		 2242 exit(1);
2243 break;
2244 case EXCP_DFAULT:
2245 fprintf(stderr, "MMU data fault\n");
2246 exit(1);
2247 break;
2248 case EXCP_DTB_MISS_PAL:
2249 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2250 exit(1);
2251 break;
2252 case EXCP_ITB_MISS:
2253 fprintf(stderr, "MMU instruction TLB miss\n");
2254 exit(1);
2255 break;
2256 case EXCP_ITB_ACV:
2257 fprintf(stderr, "MMU instruction access violation\n");
2258 exit(1);
2259 break;
2260 case EXCP_DTB_MISS_NATIVE:
2261 fprintf(stderr, "MMU data TLB miss\n");
2262 exit(1);
2263 break;
2264 case EXCP_UNALIGN:
2265 fprintf(stderr, "Unaligned access\n");
2266 exit(1);
2267 break;
2268 case EXCP_OPCDEC:
2269 fprintf(stderr, "Invalid instruction\n");
2270 exit(1);
2271 break;
2272 case EXCP_FEN:
2273 fprintf(stderr, "Floating-point not allowed\n");
2274 exit(1);
2275 break;
2276 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
7a3148a9
JM		 2277 call_pal(env, (trapnr >> 6) | 0x80);
2278 break;
2279 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
7f75ffd3 2280 fprintf(stderr, "Privileged call to PALcode\n");
7a3148a9
JM		 2281 exit(1);
2282 break;
2283 case EXCP_DEBUG:
2284 {
2285 int sig;
2286
2287 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2288 if (sig)
2289 {
2290 info.si_signo = sig;
2291 info.si_errno = 0;
2292 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2293 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2294 }
2295 }
2296 break;
2297 default:
2298 printf ("Unhandled trap: 0x%x\n", trapnr);
2299 cpu_dump_state(env, stderr, fprintf, 0);
2300 exit (1);
2301 }
2302 process_pending_signals (env);
2303 }
2304}
2305#endif /* TARGET_ALPHA */
2306
8fcd3692 2307static void usage(void)
31e31b8a 2308{
4a19f1ec 2309 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
68d0f70e 2310 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
b346ff46 2311 "Linux CPU emulator (compiled for %s emulation)\n"
d691f669 2312 "\n"
68d0f70e 2313 "Standard options:\n"
b12b6a18
TS		 2314 "-h print this help\n"
2315 "-g port wait gdb connection to port\n"
2316 "-L path set the elf interpreter prefix (default=%s)\n"
2317 "-s size set the stack size in bytes (default=%ld)\n"
2318 "-cpu model select CPU (-cpu ? for list)\n"
2319 "-drop-ld-preload drop LD_PRELOAD for target process\n"
04a6dfeb
AJ		 2320 "-E var=value sets/modifies targets environment variable(s)\n"
2321 "-U var unsets targets environment variable(s)\n"
7d8cec95 2322 "-0 argv0 forces target process argv[0] to be argv0\n"
54936004 2323 "\n"
68d0f70e 2324 "Debug options:\n"
6f1f31c0 2325 "-d options activate log (logfile=%s)\n"
b6741956 2326 "-p pagesize set the host page size to 'pagesize'\n"
1b530a6d 2327 "-singlestep always run in singlestep mode\n"
b01bcae6
AZ		 2328 "-strace log system calls\n"
2329 "\n"
68d0f70e 2330 "Environment variables:\n"
b01bcae6
AZ		 2331 "QEMU_STRACE Print system calls and arguments similar to the\n"
2332 " 'strace' program. Enable by setting to any value.\n"
04a6dfeb
AJ		 2333 "You can use -E and -U options to set/unset environment variables\n"
2334 "for target process. It is possible to provide several variables\n"
2335 "by repeating the option. For example:\n"
2336 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2337 "Note that if you provide several changes to single variable\n"
2338 "last change will stay in effect.\n"
b01bcae6 2339 ,
b346ff46 2340 TARGET_ARCH,
5fafdf24 2341 interp_prefix,
54936004
FB		 2342 x86_stack_size,
2343 DEBUG_LOGFILE);
2d18e637 2344 exit(1);
31e31b8a
FB		 2345}
2346
d5975363 2347THREAD CPUState *thread_env;
59faf6d6 2348
edf8e2af
MW		 2349void task_settid(TaskState *ts)
2350{
2351 if (ts->ts_tid == 0) {
2352#ifdef USE_NPTL
2353 ts->ts_tid = (pid_t)syscall(SYS_gettid);
2354#else
2355 /* when no threads are used, tid becomes pid */
2356 ts->ts_tid = getpid();
2357#endif
2358 }
2359}
2360
2361void stop_all_tasks(void)
2362{
2363 /*
2364 * We trust that when using NPTL, start_exclusive()
2365 * handles thread stopping correctly.
2366 */
2367 start_exclusive();
2368}
2369
c3a92833 2370/* Assumes contents are already zeroed. */
624f7979
PB		 2371void init_task_state(TaskState *ts)
2372{
2373 int i;
2374
624f7979
PB		 2375 ts->used = 1;
2376 ts->first_free = ts->sigqueue_table;
2377 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2378 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2379 }
2380 ts->sigqueue_table[i].next = NULL;
2381}
2382
902b3d5c 2383int main(int argc, char **argv, char **envp)
31e31b8a
FB		 2384{
2385 const char *filename;
b1f9be31 2386 const char *cpu_model;
01ffc75b 2387 struct target_pt_regs regs1, *regs = &regs1;
31e31b8a 2388 struct image_info info1, *info = &info1;
edf8e2af 2389 struct linux_binprm bprm;
851e67a1 2390 TaskState ts1, *ts = &ts1;
b346ff46 2391 CPUState *env;
586314f2 2392 int optind;
d691f669 2393 const char *r;
74c33bed 2394 int gdbstub_port = 0;
04a6dfeb 2395 char **target_environ, **wrk;
7d8cec95
AJ		 2396 char **target_argv;
2397 int target_argc;
04a6dfeb 2398 envlist_t *envlist = NULL;
7d8cec95
AJ		 2399 const char *argv0 = NULL;
2400 int i;
fd4d81dd 2401 int ret;
b12b6a18 2402
31e31b8a 2403 if (argc <= 1)
44de1b33 2404 usage();
f801f97e 2405
902b3d5c 2406 qemu_cache_utils_init(envp);
2407
cc38b844
FB		 2408 /* init debug */
2409 cpu_set_log_filename(DEBUG_LOGFILE);
2410
04a6dfeb
AJ		 2411 if ((envlist = envlist_create()) == NULL) {
2412 (void) fprintf(stderr, "Unable to allocate envlist\n");
2413 exit(1);
2414 }
2415
2416 /* add current environment into the list */
2417 for (wrk = environ; *wrk != NULL; wrk++) {
2418 (void) envlist_setenv(envlist, *wrk);
2419 }
2420
b1f9be31 2421 cpu_model = NULL;
586314f2 2422 optind = 1;
d691f669
FB		 2423 for(;;) {
2424 if (optind >= argc)
2425 break;
2426 r = argv[optind];
2427 if (r[0] != '-')
2428 break;
586314f2 2429 optind++;
d691f669
FB		 2430 r++;
2431 if (!strcmp(r, "-")) {
2432 break;
2433 } else if (!strcmp(r, "d")) {
e19e89a5 2434 int mask;
c7cd6a37 2435 const CPULogItem *item;
6f1f31c0
FB		 2436
2437 if (optind >= argc)
2438 break;
3b46e624 2439
6f1f31c0
FB		 2440 r = argv[optind++];
2441 mask = cpu_str_to_log_mask(r);
e19e89a5
FB		 2442 if (!mask) {
2443 printf("Log items (comma separated):\n");
2444 for(item = cpu_log_items; item->mask != 0; item++) {
2445 printf("%-10s %s\n", item->name, item->help);
2446 }
2447 exit(1);
2448 }
2449 cpu_set_log(mask);
04a6dfeb
AJ		 2450 } else if (!strcmp(r, "E")) {
2451 r = argv[optind++];
2452 if (envlist_setenv(envlist, r) != 0)
2453 usage();
2454 } else if (!strcmp(r, "U")) {
2455 r = argv[optind++];
2456 if (envlist_unsetenv(envlist, r) != 0)
2457 usage();
7d8cec95
AJ		 2458 } else if (!strcmp(r, "0")) {
2459 r = argv[optind++];
2460 argv0 = r;
d691f669 2461 } else if (!strcmp(r, "s")) {
491150db
AJ		 2462 if (optind >= argc)
2463 break;
d691f669
FB		 2464 r = argv[optind++];
2465 x86_stack_size = strtol(r, (char **)&r, 0);
2466 if (x86_stack_size <= 0)
44de1b33 2467 usage();
d691f669
FB		 2468 if (*r == 'M')
2469 x86_stack_size *= 1024 * 1024;
2470 else if (*r == 'k' || *r == 'K')
2471 x86_stack_size *= 1024;
2472 } else if (!strcmp(r, "L")) {
2473 interp_prefix = argv[optind++];
54936004 2474 } else if (!strcmp(r, "p")) {
491150db
AJ		 2475 if (optind >= argc)
2476 break;
83fb7adf
FB		 2477 qemu_host_page_size = atoi(argv[optind++]);
2478 if (qemu_host_page_size == 0 ||
2479 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
54936004
FB		 2480 fprintf(stderr, "page size must be a power of two\n");
2481 exit(1);
2482 }
1fddef4b 2483 } else if (!strcmp(r, "g")) {
491150db
AJ		 2484 if (optind >= argc)
2485 break;
74c33bed 2486 gdbstub_port = atoi(argv[optind++]);
c5937220
PB		 2487 } else if (!strcmp(r, "r")) {
2488 qemu_uname_release = argv[optind++];
b1f9be31
JM		 2489 } else if (!strcmp(r, "cpu")) {
2490 cpu_model = argv[optind++];
491150db 2491 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
c732abe2
JM		 2492/* XXX: implement xxx_cpu_list for targets that still miss it */
2493#if defined(cpu_list)
2494 cpu_list(stdout, &fprintf);
b1f9be31 2495#endif
2d18e637 2496 exit(1);
b1f9be31 2497 }
b12b6a18 2498 } else if (!strcmp(r, "drop-ld-preload")) {
04a6dfeb 2499 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
1b530a6d
AJ		 2500 } else if (!strcmp(r, "singlestep")) {
2501 singlestep = 1;
b6741956
FB		 2502 } else if (!strcmp(r, "strace")) {
2503 do_strace = 1;
5fafdf24 2504 } else
c6981055 2505 {
d691f669
FB		 2506 usage();
2507 }
586314f2 2508 }
d691f669
FB		 2509 if (optind >= argc)
2510 usage();
586314f2 2511 filename = argv[optind];
d088d664 2512 exec_path = argv[optind];
586314f2 2513
31e31b8a 2514 /* Zero out regs */
01ffc75b 2515 memset(regs, 0, sizeof(struct target_pt_regs));
31e31b8a
FB		 2516
2517 /* Zero out image_info */
2518 memset(info, 0, sizeof(struct image_info));
2519
edf8e2af
MW		 2520 memset(&bprm, 0, sizeof (bprm));
2521
74cd30b8
FB		 2522 /* Scan interp_prefix dir for replacement files. */
2523 init_paths(interp_prefix);
2524
46027c07 2525 if (cpu_model == NULL) {
aaed909a 2526#if defined(TARGET_I386)
46027c07
FB		 2527#ifdef TARGET_X86_64
2528 cpu_model = "qemu64";
2529#else
2530 cpu_model = "qemu32";
2531#endif
aaed909a 2532#elif defined(TARGET_ARM)
088ab16c 2533 cpu_model = "any";
aaed909a
FB		 2534#elif defined(TARGET_M68K)
2535 cpu_model = "any";
2536#elif defined(TARGET_SPARC)
2537#ifdef TARGET_SPARC64
2538 cpu_model = "TI UltraSparc II";
2539#else
2540 cpu_model = "Fujitsu MB86904";
46027c07 2541#endif
aaed909a
FB		 2542#elif defined(TARGET_MIPS)
2543#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2544 cpu_model = "20Kc";
2545#else
2546 cpu_model = "24Kf";
2547#endif
2548#elif defined(TARGET_PPC)
7ded4f52
FB		 2549#ifdef TARGET_PPC64
2550 cpu_model = "970";
2551#else
aaed909a 2552 cpu_model = "750";
7ded4f52 2553#endif
aaed909a
FB		 2554#else
2555 cpu_model = "any";
2556#endif
2557 }
26a5f13b 2558 cpu_exec_init_all(0);
83fb7adf
FB		 2559 /* NOTE: we need to init the CPU at this stage to get
2560 qemu_host_page_size */
aaed909a
FB		 2561 env = cpu_init(cpu_model);
2562 if (!env) {
2563 fprintf(stderr, "Unable to find CPU definition\n");
2564 exit(1);
2565 }
d5975363 2566 thread_env = env;
3b46e624 2567
b6741956
FB		 2568 if (getenv("QEMU_STRACE")) {
2569 do_strace = 1;
b92c47c1
TS		 2570 }
2571
04a6dfeb
AJ		 2572 target_environ = envlist_to_environ(envlist, NULL);
2573 envlist_free(envlist);
b12b6a18 2574
7d8cec95
AJ		 2575 /*
2576 * Prepare copy of argv vector for target.
2577 */
2578 target_argc = argc - optind;
2579 target_argv = calloc(target_argc + 1, sizeof (char *));
2580 if (target_argv == NULL) {
2581 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
2582 exit(1);
2583 }
2584
2585 /*
2586 * If argv0 is specified (using '-0' switch) we replace
2587 * argv[0] pointer with the given one.
2588 */
2589 i = 0;
2590 if (argv0 != NULL) {
2591 target_argv[i++] = strdup(argv0);
2592 }
2593 for (; i < target_argc; i++) {
2594 target_argv[i] = strdup(argv[optind + i]);
2595 }
2596 target_argv[target_argc] = NULL;
2597
edf8e2af
MW		 2598 memset(ts, 0, sizeof(TaskState));
2599 init_task_state(ts);
2600 /* build Task State */
2601 ts->info = info;
2602 ts->bprm = &bprm;
2603 env->opaque = ts;
2604 task_settid(ts);
2605
fd4d81dd
AP		 2606 ret = loader_exec(filename, target_argv, target_environ, regs,
2607 info, &bprm);
2608 if (ret != 0) {
2609 printf("Error %d while loading %s\n", ret, filename);
b12b6a18
TS		 2610 _exit(1);
2611 }
2612
7d8cec95
AJ		 2613 for (i = 0; i < target_argc; i++) {
2614 free(target_argv[i]);
2615 }
2616 free(target_argv);
2617
b12b6a18
TS		 2618 for (wrk = target_environ; *wrk; wrk++) {
2619 free(*wrk);
31e31b8a 2620 }
3b46e624 2621
b12b6a18
TS		 2622 free(target_environ);
2623
2e77eac6
BS		 2624 if (qemu_log_enabled()) {
2625 log_page_dump();
2626
2627 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2628 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2629 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
2630 info->start_code);
2631 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
2632 info->start_data);
2633 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2634 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
2635 info->start_stack);
2636 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2637 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2638 }
31e31b8a 2639
53a5960a 2640 target_set_brk(info->brk);
31e31b8a 2641 syscall_init();
66fb9763 2642 signal_init();
31e31b8a 2643
b346ff46 2644#if defined(TARGET_I386)
2e255c6b
FB		 2645 cpu_x86_set_cpl(env, 3);
2646
3802ce26 2647 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
1bde465e
FB		 2648 env->hflags |= HF_PE_MASK;
2649 if (env->cpuid_features & CPUID_SSE) {
2650 env->cr[4] |= CR4_OSFXSR_MASK;
2651 env->hflags |= HF_OSFXSR_MASK;
2652 }
d2fd1af7 2653#ifndef TARGET_ABI32
4dbc422b
FB		 2654 /* enable 64 bit mode if possible */
2655 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2656 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2657 exit(1);
2658 }
d2fd1af7 2659 env->cr[4] |= CR4_PAE_MASK;
4dbc422b 2660 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
d2fd1af7
FB		 2661 env->hflags |= HF_LMA_MASK;
2662#endif
1bde465e 2663
415e561f
FB		 2664 /* flags setup : we activate the IRQs by default as in user mode */
2665 env->eflags |= IF_MASK;
3b46e624 2666
6dbad63e 2667 /* linux register setup */
d2fd1af7 2668#ifndef TARGET_ABI32
84409ddb
JM		 2669 env->regs[R_EAX] = regs->rax;
2670 env->regs[R_EBX] = regs->rbx;
2671 env->regs[R_ECX] = regs->rcx;
2672 env->regs[R_EDX] = regs->rdx;
2673 env->regs[R_ESI] = regs->rsi;
2674 env->regs[R_EDI] = regs->rdi;
2675 env->regs[R_EBP] = regs->rbp;
2676 env->regs[R_ESP] = regs->rsp;
2677 env->eip = regs->rip;
2678#else
0ecfa993
FB		 2679 env->regs[R_EAX] = regs->eax;
2680 env->regs[R_EBX] = regs->ebx;
2681 env->regs[R_ECX] = regs->ecx;
2682 env->regs[R_EDX] = regs->edx;
2683 env->regs[R_ESI] = regs->esi;
2684 env->regs[R_EDI] = regs->edi;
2685 env->regs[R_EBP] = regs->ebp;
2686 env->regs[R_ESP] = regs->esp;
dab2ed99 2687 env->eip = regs->eip;
84409ddb 2688#endif
31e31b8a 2689
f4beb510 2690 /* linux interrupt setup */
e441570f
AZ		 2691#ifndef TARGET_ABI32
2692 env->idt.limit = 511;
2693#else
2694 env->idt.limit = 255;
2695#endif
2696 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
2697 PROT_READ|PROT_WRITE,
2698 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2699 idt_table = g2h(env->idt.base);
f4beb510
FB		 2700 set_idt(0, 0);
2701 set_idt(1, 0);
2702 set_idt(2, 0);
2703 set_idt(3, 3);
2704 set_idt(4, 3);
ec95da6c 2705 set_idt(5, 0);
f4beb510
FB		 2706 set_idt(6, 0);
2707 set_idt(7, 0);
2708 set_idt(8, 0);
2709 set_idt(9, 0);
2710 set_idt(10, 0);
2711 set_idt(11, 0);
2712 set_idt(12, 0);
2713 set_idt(13, 0);
2714 set_idt(14, 0);
2715 set_idt(15, 0);
2716 set_idt(16, 0);
2717 set_idt(17, 0);
2718 set_idt(18, 0);
2719 set_idt(19, 0);
2720 set_idt(0x80, 3);
2721
6dbad63e 2722 /* linux segment setup */
8d18e893
FB		 2723 {
2724 uint64_t *gdt_table;
e441570f
AZ		 2725 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
2726 PROT_READ|PROT_WRITE,
2727 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
8d18e893 2728 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
e441570f 2729 gdt_table = g2h(env->gdt.base);
d2fd1af7 2730#ifdef TARGET_ABI32
8d18e893
FB		 2731 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2732 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2733 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
d2fd1af7
FB		 2734#else
2735 /* 64 bit code segment */
2736 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2737 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2738 DESC_L_MASK |
2739 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2740#endif
8d18e893
FB		 2741 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2742 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2743 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2744 }
6dbad63e 2745 cpu_x86_load_seg(env, R_CS, __USER_CS);
d2fd1af7
FB		 2746 cpu_x86_load_seg(env, R_SS, __USER_DS);
2747#ifdef TARGET_ABI32
6dbad63e
FB		 2748 cpu_x86_load_seg(env, R_DS, __USER_DS);
2749 cpu_x86_load_seg(env, R_ES, __USER_DS);
6dbad63e
FB		 2750 cpu_x86_load_seg(env, R_FS, __USER_DS);
2751 cpu_x86_load_seg(env, R_GS, __USER_DS);
d6eb40f6
TS		 2752 /* This hack makes Wine work... */
2753 env->segs[R_FS].selector = 0;
d2fd1af7
FB		 2754#else
2755 cpu_x86_load_seg(env, R_DS, 0);
2756 cpu_x86_load_seg(env, R_ES, 0);
2757 cpu_x86_load_seg(env, R_FS, 0);
2758 cpu_x86_load_seg(env, R_GS, 0);
2759#endif
b346ff46
FB		 2760#elif defined(TARGET_ARM)
2761 {
2762 int i;
b5ff1b31 2763 cpsr_write(env, regs->uregs[16], 0xffffffff);
b346ff46
FB		 2764 for(i = 0; i < 16; i++) {
2765 env->regs[i] = regs->uregs[i];
2766 }
b346ff46 2767 }
93ac68bc 2768#elif defined(TARGET_SPARC)
060366c5
FB		 2769 {
2770 int i;
2771 env->pc = regs->pc;
2772 env->npc = regs->npc;
2773 env->y = regs->y;
2774 for(i = 0; i < 8; i++)
2775 env->gregs[i] = regs->u_regs[i];
2776 for(i = 0; i < 8; i++)
2777 env->regwptr[i] = regs->u_regs[i + 8];
2778 }
67867308
FB		 2779#elif defined(TARGET_PPC)
2780 {
2781 int i;
3fc6c082 2782
0411a972
JM		 2783#if defined(TARGET_PPC64)
2784#if defined(TARGET_ABI32)
2785 env->msr &= ~((target_ulong)1 << MSR_SF);
e85e7c6e 2786#else
0411a972
JM		 2787 env->msr |= (target_ulong)1 << MSR_SF;
2788#endif
84409ddb 2789#endif
67867308
FB		 2790 env->nip = regs->nip;
2791 for(i = 0; i < 32; i++) {
2792 env->gpr[i] = regs->gpr[i];
2793 }
2794 }
e6e5906b
PB		 2795#elif defined(TARGET_M68K)
2796 {
e6e5906b
PB		 2797 env->pc = regs->pc;
2798 env->dregs[0] = regs->d0;
2799 env->dregs[1] = regs->d1;
2800 env->dregs[2] = regs->d2;
2801 env->dregs[3] = regs->d3;
2802 env->dregs[4] = regs->d4;
2803 env->dregs[5] = regs->d5;
2804 env->dregs[6] = regs->d6;
2805 env->dregs[7] = regs->d7;
2806 env->aregs[0] = regs->a0;
2807 env->aregs[1] = regs->a1;
2808 env->aregs[2] = regs->a2;
2809 env->aregs[3] = regs->a3;
2810 env->aregs[4] = regs->a4;
2811 env->aregs[5] = regs->a5;
2812 env->aregs[6] = regs->a6;
2813 env->aregs[7] = regs->usp;
2814 env->sr = regs->sr;
2815 ts->sim_syscalls = 1;
2816 }
b779e29e
EI		 2817#elif defined(TARGET_MICROBLAZE)
2818 {
2819 env->regs[0] = regs->r0;
2820 env->regs[1] = regs->r1;
2821 env->regs[2] = regs->r2;
2822 env->regs[3] = regs->r3;
2823 env->regs[4] = regs->r4;
2824 env->regs[5] = regs->r5;
2825 env->regs[6] = regs->r6;
2826 env->regs[7] = regs->r7;
2827 env->regs[8] = regs->r8;
2828 env->regs[9] = regs->r9;
2829 env->regs[10] = regs->r10;
2830 env->regs[11] = regs->r11;
2831 env->regs[12] = regs->r12;
2832 env->regs[13] = regs->r13;
2833 env->regs[14] = regs->r14;
2834 env->regs[15] = regs->r15;
2835 env->regs[16] = regs->r16;
2836 env->regs[17] = regs->r17;
2837 env->regs[18] = regs->r18;
2838 env->regs[19] = regs->r19;
2839 env->regs[20] = regs->r20;
2840 env->regs[21] = regs->r21;
2841 env->regs[22] = regs->r22;
2842 env->regs[23] = regs->r23;
2843 env->regs[24] = regs->r24;
2844 env->regs[25] = regs->r25;
2845 env->regs[26] = regs->r26;
2846 env->regs[27] = regs->r27;
2847 env->regs[28] = regs->r28;
2848 env->regs[29] = regs->r29;
2849 env->regs[30] = regs->r30;
2850 env->regs[31] = regs->r31;
2851 env->sregs[SR_PC] = regs->pc;
2852 }
048f6b4d
FB		 2853#elif defined(TARGET_MIPS)
2854 {
2855 int i;
2856
2857 for(i = 0; i < 32; i++) {
b5dc7732 2858 env->active_tc.gpr[i] = regs->regs[i];
048f6b4d 2859 }
b5dc7732 2860 env->active_tc.PC = regs->cp0_epc;
048f6b4d 2861 }
fdf9b3e8
FB		 2862#elif defined(TARGET_SH4)
2863 {
2864 int i;
2865
2866 for(i = 0; i < 16; i++) {
2867 env->gregs[i] = regs->regs[i];
2868 }
2869 env->pc = regs->pc;
2870 }
7a3148a9
JM		 2871#elif defined(TARGET_ALPHA)
2872 {
2873 int i;
2874
2875 for(i = 0; i < 28; i++) {
992f48a0 2876 env->ir[i] = ((abi_ulong *)regs)[i];
7a3148a9
JM		 2877 }
2878 env->ipr[IPR_USP] = regs->usp;
2879 env->ir[30] = regs->usp;
2880 env->pc = regs->pc;
2881 env->unique = regs->unique;
2882 }
48733d19
TS		 2883#elif defined(TARGET_CRIS)
2884 {
2885 env->regs[0] = regs->r0;
2886 env->regs[1] = regs->r1;
2887 env->regs[2] = regs->r2;
2888 env->regs[3] = regs->r3;
2889 env->regs[4] = regs->r4;
2890 env->regs[5] = regs->r5;
2891 env->regs[6] = regs->r6;
2892 env->regs[7] = regs->r7;
2893 env->regs[8] = regs->r8;
2894 env->regs[9] = regs->r9;
2895 env->regs[10] = regs->r10;
2896 env->regs[11] = regs->r11;
2897 env->regs[12] = regs->r12;
2898 env->regs[13] = regs->r13;
2899 env->regs[14] = info->start_stack;
2900 env->regs[15] = regs->acr;
2901 env->pc = regs->erp;
2902 }
b346ff46
FB		 2903#else
2904#error unsupported target CPU
2905#endif
31e31b8a 2906
a87295e8
PB		 2907#if defined(TARGET_ARM) || defined(TARGET_M68K)
2908 ts->stack_base = info->start_stack;
2909 ts->heap_base = info->brk;
2910 /* This will be filled in on the first SYS_HEAPINFO call. */
2911 ts->heap_limit = 0;
2912#endif
2913
74c33bed
FB		 2914 if (gdbstub_port) {
2915 gdbserver_start (gdbstub_port);
1fddef4b
FB		 2916 gdb_handlesig(env, 0);
2917 }
1b6b029e
FB		 2918 cpu_loop(env);
2919 /* never exits */
31e31b8a
FB		 2920 return 0;
2921}
QEMU mirror