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Commit | Line | Data |
---|---|---|
31e31b8a | 1 | /* |
93ac68bc | 2 | * qemu user main |
5fafdf24 | 3 | * |
31e31b8a FB |
4 | * Copyright (c) 2003 Fabrice Bellard |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | */ | |
20 | #include <stdlib.h> | |
21 | #include <stdio.h> | |
22 | #include <stdarg.h> | |
04369ff2 | 23 | #include <string.h> |
31e31b8a | 24 | #include <errno.h> |
0ecfa993 | 25 | #include <unistd.h> |
31e31b8a | 26 | |
3ef693a0 | 27 | #include "qemu.h" |
31e31b8a | 28 | |
3ef693a0 | 29 | #define DEBUG_LOGFILE "/tmp/qemu.log" |
586314f2 | 30 | |
74cd30b8 | 31 | static const char *interp_prefix = CONFIG_QEMU_PREFIX; |
c5937220 | 32 | const char *qemu_uname_release = CONFIG_UNAME_RELEASE; |
586314f2 | 33 | |
3a4739d6 | 34 | #if defined(__i386__) && !defined(CONFIG_STATIC) |
f801f97e FB |
35 | /* Force usage of an ELF interpreter even if it is an ELF shared |
36 | object ! */ | |
37 | const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2"; | |
4304763b | 38 | #endif |
74cd30b8 | 39 | |
93ac68bc | 40 | /* for recent libc, we add these dummy symbols which are not declared |
74cd30b8 | 41 | when generating a linked object (bug in ld ?) */ |
fbf59244 | 42 | #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC) |
46027c07 FB |
43 | asm(".globl __preinit_array_start\n" |
44 | ".globl __preinit_array_end\n" | |
45 | ".globl __init_array_start\n" | |
46 | ".globl __init_array_end\n" | |
47 | ".globl __fini_array_start\n" | |
48 | ".globl __fini_array_end\n" | |
49 | ".section \".rodata\"\n" | |
50 | "__preinit_array_start:\n" | |
51 | "__preinit_array_end:\n" | |
52 | "__init_array_start:\n" | |
53 | "__init_array_end:\n" | |
54 | "__fini_array_start:\n" | |
55 | "__fini_array_end:\n" | |
56 | ".long 0\n"); | |
74cd30b8 FB |
57 | #endif |
58 | ||
9de5e440 FB |
59 | /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so |
60 | we allocate a bigger stack. Need a better solution, for example | |
61 | by remapping the process stack directly at the right place */ | |
62 | unsigned long x86_stack_size = 512 * 1024; | |
31e31b8a FB |
63 | |
64 | void gemu_log(const char *fmt, ...) | |
65 | { | |
66 | va_list ap; | |
67 | ||
68 | va_start(ap, fmt); | |
69 | vfprintf(stderr, fmt, ap); | |
70 | va_end(ap); | |
71 | } | |
72 | ||
61190b14 | 73 | void cpu_outb(CPUState *env, int addr, int val) |
367e86e8 FB |
74 | { |
75 | fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val); | |
76 | } | |
77 | ||
61190b14 | 78 | void cpu_outw(CPUState *env, int addr, int val) |
367e86e8 FB |
79 | { |
80 | fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val); | |
81 | } | |
82 | ||
61190b14 | 83 | void cpu_outl(CPUState *env, int addr, int val) |
367e86e8 FB |
84 | { |
85 | fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val); | |
86 | } | |
87 | ||
61190b14 | 88 | int cpu_inb(CPUState *env, int addr) |
367e86e8 FB |
89 | { |
90 | fprintf(stderr, "inb: port=0x%04x\n", addr); | |
91 | return 0; | |
92 | } | |
93 | ||
61190b14 | 94 | int cpu_inw(CPUState *env, int addr) |
367e86e8 FB |
95 | { |
96 | fprintf(stderr, "inw: port=0x%04x\n", addr); | |
97 | return 0; | |
98 | } | |
99 | ||
61190b14 | 100 | int cpu_inl(CPUState *env, int addr) |
367e86e8 FB |
101 | { |
102 | fprintf(stderr, "inl: port=0x%04x\n", addr); | |
103 | return 0; | |
104 | } | |
105 | ||
a541f297 | 106 | int cpu_get_pic_interrupt(CPUState *env) |
92ccca6a FB |
107 | { |
108 | return -1; | |
109 | } | |
110 | ||
28ab0e2e FB |
111 | /* timers for rdtsc */ |
112 | ||
1dce7c3c | 113 | #if 0 |
28ab0e2e FB |
114 | |
115 | static uint64_t emu_time; | |
116 | ||
117 | int64_t cpu_get_real_ticks(void) | |
118 | { | |
119 | return emu_time++; | |
120 | } | |
121 | ||
122 | #endif | |
123 | ||
a541f297 FB |
124 | #ifdef TARGET_I386 |
125 | /***********************************************************/ | |
126 | /* CPUX86 core interface */ | |
127 | ||
02a1602e FB |
128 | void cpu_smm_update(CPUState *env) |
129 | { | |
130 | } | |
131 | ||
28ab0e2e FB |
132 | uint64_t cpu_get_tsc(CPUX86State *env) |
133 | { | |
134 | return cpu_get_real_ticks(); | |
135 | } | |
136 | ||
5fafdf24 | 137 | static void write_dt(void *ptr, unsigned long addr, unsigned long limit, |
f4beb510 | 138 | int flags) |
6dbad63e | 139 | { |
f4beb510 | 140 | unsigned int e1, e2; |
53a5960a | 141 | uint32_t *p; |
6dbad63e FB |
142 | e1 = (addr << 16) | (limit & 0xffff); |
143 | e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); | |
f4beb510 | 144 | e2 |= flags; |
53a5960a PB |
145 | p = ptr; |
146 | p[0] = tswapl(e1); | |
147 | p[1] = tswapl(e2); | |
f4beb510 FB |
148 | } |
149 | ||
5fafdf24 | 150 | static void set_gate(void *ptr, unsigned int type, unsigned int dpl, |
f4beb510 FB |
151 | unsigned long addr, unsigned int sel) |
152 | { | |
153 | unsigned int e1, e2; | |
53a5960a | 154 | uint32_t *p; |
f4beb510 FB |
155 | e1 = (addr & 0xffff) | (sel << 16); |
156 | e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); | |
53a5960a PB |
157 | p = ptr; |
158 | p[0] = tswapl(e1); | |
159 | p[1] = tswapl(e2); | |
6dbad63e FB |
160 | } |
161 | ||
162 | uint64_t gdt_table[6]; | |
f4beb510 FB |
163 | uint64_t idt_table[256]; |
164 | ||
165 | /* only dpl matters as we do only user space emulation */ | |
166 | static void set_idt(int n, unsigned int dpl) | |
167 | { | |
168 | set_gate(idt_table + n, 0, dpl, 0, 0); | |
169 | } | |
31e31b8a | 170 | |
89e957e7 | 171 | void cpu_loop(CPUX86State *env) |
1b6b029e | 172 | { |
bc8a22cc | 173 | int trapnr; |
992f48a0 | 174 | abi_ulong pc; |
9de5e440 | 175 | target_siginfo_t info; |
851e67a1 | 176 | |
1b6b029e | 177 | for(;;) { |
bc8a22cc | 178 | trapnr = cpu_x86_exec(env); |
bc8a22cc | 179 | switch(trapnr) { |
f4beb510 FB |
180 | case 0x80: |
181 | /* linux syscall */ | |
5fafdf24 TS |
182 | env->regs[R_EAX] = do_syscall(env, |
183 | env->regs[R_EAX], | |
f4beb510 FB |
184 | env->regs[R_EBX], |
185 | env->regs[R_ECX], | |
186 | env->regs[R_EDX], | |
187 | env->regs[R_ESI], | |
188 | env->regs[R_EDI], | |
189 | env->regs[R_EBP]); | |
190 | break; | |
191 | case EXCP0B_NOSEG: | |
192 | case EXCP0C_STACK: | |
193 | info.si_signo = SIGBUS; | |
194 | info.si_errno = 0; | |
195 | info.si_code = TARGET_SI_KERNEL; | |
196 | info._sifields._sigfault._addr = 0; | |
197 | queue_signal(info.si_signo, &info); | |
198 | break; | |
1b6b029e | 199 | case EXCP0D_GPF: |
84409ddb | 200 | #ifndef TARGET_X86_64 |
851e67a1 | 201 | if (env->eflags & VM_MASK) { |
89e957e7 | 202 | handle_vm86_fault(env); |
84409ddb JM |
203 | } else |
204 | #endif | |
205 | { | |
f4beb510 FB |
206 | info.si_signo = SIGSEGV; |
207 | info.si_errno = 0; | |
208 | info.si_code = TARGET_SI_KERNEL; | |
209 | info._sifields._sigfault._addr = 0; | |
210 | queue_signal(info.si_signo, &info); | |
1b6b029e FB |
211 | } |
212 | break; | |
b689bc57 FB |
213 | case EXCP0E_PAGE: |
214 | info.si_signo = SIGSEGV; | |
215 | info.si_errno = 0; | |
216 | if (!(env->error_code & 1)) | |
217 | info.si_code = TARGET_SEGV_MAPERR; | |
218 | else | |
219 | info.si_code = TARGET_SEGV_ACCERR; | |
970a87a6 | 220 | info._sifields._sigfault._addr = env->cr[2]; |
b689bc57 FB |
221 | queue_signal(info.si_signo, &info); |
222 | break; | |
9de5e440 | 223 | case EXCP00_DIVZ: |
84409ddb | 224 | #ifndef TARGET_X86_64 |
bc8a22cc | 225 | if (env->eflags & VM_MASK) { |
447db213 | 226 | handle_vm86_trap(env, trapnr); |
84409ddb JM |
227 | } else |
228 | #endif | |
229 | { | |
bc8a22cc FB |
230 | /* division by zero */ |
231 | info.si_signo = SIGFPE; | |
232 | info.si_errno = 0; | |
233 | info.si_code = TARGET_FPE_INTDIV; | |
234 | info._sifields._sigfault._addr = env->eip; | |
235 | queue_signal(info.si_signo, &info); | |
236 | } | |
9de5e440 | 237 | break; |
447db213 FB |
238 | case EXCP01_SSTP: |
239 | case EXCP03_INT3: | |
84409ddb | 240 | #ifndef TARGET_X86_64 |
447db213 FB |
241 | if (env->eflags & VM_MASK) { |
242 | handle_vm86_trap(env, trapnr); | |
84409ddb JM |
243 | } else |
244 | #endif | |
245 | { | |
447db213 FB |
246 | info.si_signo = SIGTRAP; |
247 | info.si_errno = 0; | |
248 | if (trapnr == EXCP01_SSTP) { | |
249 | info.si_code = TARGET_TRAP_BRKPT; | |
250 | info._sifields._sigfault._addr = env->eip; | |
251 | } else { | |
252 | info.si_code = TARGET_SI_KERNEL; | |
253 | info._sifields._sigfault._addr = 0; | |
254 | } | |
255 | queue_signal(info.si_signo, &info); | |
256 | } | |
257 | break; | |
9de5e440 FB |
258 | case EXCP04_INTO: |
259 | case EXCP05_BOUND: | |
84409ddb | 260 | #ifndef TARGET_X86_64 |
bc8a22cc | 261 | if (env->eflags & VM_MASK) { |
447db213 | 262 | handle_vm86_trap(env, trapnr); |
84409ddb JM |
263 | } else |
264 | #endif | |
265 | { | |
bc8a22cc FB |
266 | info.si_signo = SIGSEGV; |
267 | info.si_errno = 0; | |
b689bc57 | 268 | info.si_code = TARGET_SI_KERNEL; |
bc8a22cc FB |
269 | info._sifields._sigfault._addr = 0; |
270 | queue_signal(info.si_signo, &info); | |
271 | } | |
9de5e440 FB |
272 | break; |
273 | case EXCP06_ILLOP: | |
274 | info.si_signo = SIGILL; | |
275 | info.si_errno = 0; | |
276 | info.si_code = TARGET_ILL_ILLOPN; | |
277 | info._sifields._sigfault._addr = env->eip; | |
278 | queue_signal(info.si_signo, &info); | |
279 | break; | |
280 | case EXCP_INTERRUPT: | |
281 | /* just indicate that signals should be handled asap */ | |
282 | break; | |
1fddef4b FB |
283 | case EXCP_DEBUG: |
284 | { | |
285 | int sig; | |
286 | ||
287 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
288 | if (sig) | |
289 | { | |
290 | info.si_signo = sig; | |
291 | info.si_errno = 0; | |
292 | info.si_code = TARGET_TRAP_BRKPT; | |
293 | queue_signal(info.si_signo, &info); | |
294 | } | |
295 | } | |
296 | break; | |
1b6b029e | 297 | default: |
970a87a6 | 298 | pc = env->segs[R_CS].base + env->eip; |
5fafdf24 | 299 | fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n", |
bc8a22cc | 300 | (long)pc, trapnr); |
1b6b029e FB |
301 | abort(); |
302 | } | |
66fb9763 | 303 | process_pending_signals(env); |
1b6b029e FB |
304 | } |
305 | } | |
b346ff46 FB |
306 | #endif |
307 | ||
308 | #ifdef TARGET_ARM | |
309 | ||
6f1f31c0 | 310 | /* XXX: find a better solution */ |
992f48a0 | 311 | extern void tb_invalidate_page_range(abi_ulong start, abi_ulong end); |
6f1f31c0 | 312 | |
992f48a0 | 313 | static void arm_cache_flush(abi_ulong start, abi_ulong last) |
6f1f31c0 | 314 | { |
992f48a0 | 315 | abi_ulong addr, last1; |
6f1f31c0 FB |
316 | |
317 | if (last < start) | |
318 | return; | |
319 | addr = start; | |
320 | for(;;) { | |
321 | last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1; | |
322 | if (last1 > last) | |
323 | last1 = last; | |
324 | tb_invalidate_page_range(addr, last1 + 1); | |
325 | if (last1 == last) | |
326 | break; | |
327 | addr = last1 + 1; | |
328 | } | |
329 | } | |
330 | ||
b346ff46 FB |
331 | void cpu_loop(CPUARMState *env) |
332 | { | |
333 | int trapnr; | |
334 | unsigned int n, insn; | |
335 | target_siginfo_t info; | |
b5ff1b31 | 336 | uint32_t addr; |
3b46e624 | 337 | |
b346ff46 FB |
338 | for(;;) { |
339 | trapnr = cpu_arm_exec(env); | |
340 | switch(trapnr) { | |
341 | case EXCP_UDEF: | |
c6981055 FB |
342 | { |
343 | TaskState *ts = env->opaque; | |
344 | uint32_t opcode; | |
345 | ||
346 | /* we handle the FPU emulation here, as Linux */ | |
347 | /* we get the opcode */ | |
53a5960a | 348 | opcode = tget32(env->regs[15]); |
3b46e624 | 349 | |
19b045de | 350 | if (EmulateAll(opcode, &ts->fpa, env) == 0) { |
c6981055 FB |
351 | info.si_signo = SIGILL; |
352 | info.si_errno = 0; | |
353 | info.si_code = TARGET_ILL_ILLOPN; | |
354 | info._sifields._sigfault._addr = env->regs[15]; | |
355 | queue_signal(info.si_signo, &info); | |
356 | } else { | |
357 | /* increment PC */ | |
358 | env->regs[15] += 4; | |
359 | } | |
360 | } | |
b346ff46 FB |
361 | break; |
362 | case EXCP_SWI: | |
06c949e6 | 363 | case EXCP_BKPT: |
b346ff46 | 364 | { |
ce4defa0 | 365 | env->eabi = 1; |
b346ff46 | 366 | /* system call */ |
06c949e6 PB |
367 | if (trapnr == EXCP_BKPT) { |
368 | if (env->thumb) { | |
53a5960a | 369 | insn = tget16(env->regs[15]); |
06c949e6 PB |
370 | n = insn & 0xff; |
371 | env->regs[15] += 2; | |
372 | } else { | |
53a5960a | 373 | insn = tget32(env->regs[15]); |
06c949e6 PB |
374 | n = (insn & 0xf) | ((insn >> 4) & 0xff0); |
375 | env->regs[15] += 4; | |
376 | } | |
192c7bd9 | 377 | } else { |
06c949e6 | 378 | if (env->thumb) { |
53a5960a | 379 | insn = tget16(env->regs[15] - 2); |
06c949e6 PB |
380 | n = insn & 0xff; |
381 | } else { | |
53a5960a | 382 | insn = tget32(env->regs[15] - 4); |
06c949e6 PB |
383 | n = insn & 0xffffff; |
384 | } | |
192c7bd9 FB |
385 | } |
386 | ||
6f1f31c0 FB |
387 | if (n == ARM_NR_cacheflush) { |
388 | arm_cache_flush(env->regs[0], env->regs[1]); | |
a4f81979 FB |
389 | } else if (n == ARM_NR_semihosting |
390 | || n == ARM_NR_thumb_semihosting) { | |
391 | env->regs[0] = do_arm_semihosting (env); | |
ce4defa0 | 392 | } else if (n == 0 || n >= ARM_SYSCALL_BASE |
192c7bd9 | 393 | || (env->thumb && n == ARM_THUMB_SYSCALL)) { |
b346ff46 | 394 | /* linux syscall */ |
ce4defa0 | 395 | if (env->thumb || n == 0) { |
192c7bd9 FB |
396 | n = env->regs[7]; |
397 | } else { | |
398 | n -= ARM_SYSCALL_BASE; | |
ce4defa0 | 399 | env->eabi = 0; |
192c7bd9 | 400 | } |
5fafdf24 TS |
401 | env->regs[0] = do_syscall(env, |
402 | n, | |
b346ff46 FB |
403 | env->regs[0], |
404 | env->regs[1], | |
405 | env->regs[2], | |
406 | env->regs[3], | |
407 | env->regs[4], | |
e1a2849c | 408 | env->regs[5]); |
b346ff46 FB |
409 | } else { |
410 | goto error; | |
411 | } | |
412 | } | |
413 | break; | |
43fff238 FB |
414 | case EXCP_INTERRUPT: |
415 | /* just indicate that signals should be handled asap */ | |
416 | break; | |
68016c62 | 417 | case EXCP_PREFETCH_ABORT: |
b5ff1b31 FB |
418 | addr = env->cp15.c6_data; |
419 | goto do_segv; | |
68016c62 | 420 | case EXCP_DATA_ABORT: |
b5ff1b31 FB |
421 | addr = env->cp15.c6_insn; |
422 | goto do_segv; | |
423 | do_segv: | |
68016c62 FB |
424 | { |
425 | info.si_signo = SIGSEGV; | |
426 | info.si_errno = 0; | |
427 | /* XXX: check env->error_code */ | |
428 | info.si_code = TARGET_SEGV_MAPERR; | |
b5ff1b31 | 429 | info._sifields._sigfault._addr = addr; |
68016c62 FB |
430 | queue_signal(info.si_signo, &info); |
431 | } | |
432 | break; | |
1fddef4b FB |
433 | case EXCP_DEBUG: |
434 | { | |
435 | int sig; | |
436 | ||
437 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
438 | if (sig) | |
439 | { | |
440 | info.si_signo = sig; | |
441 | info.si_errno = 0; | |
442 | info.si_code = TARGET_TRAP_BRKPT; | |
443 | queue_signal(info.si_signo, &info); | |
444 | } | |
445 | } | |
446 | break; | |
b346ff46 FB |
447 | default: |
448 | error: | |
5fafdf24 | 449 | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", |
b346ff46 | 450 | trapnr); |
7fe48483 | 451 | cpu_dump_state(env, stderr, fprintf, 0); |
b346ff46 FB |
452 | abort(); |
453 | } | |
454 | process_pending_signals(env); | |
455 | } | |
456 | } | |
457 | ||
458 | #endif | |
1b6b029e | 459 | |
93ac68bc FB |
460 | #ifdef TARGET_SPARC |
461 | ||
060366c5 FB |
462 | //#define DEBUG_WIN |
463 | ||
2623cbaf FB |
464 | /* WARNING: dealing with register windows _is_ complicated. More info |
465 | can be found at http://www.sics.se/~psm/sparcstack.html */ | |
060366c5 FB |
466 | static inline int get_reg_index(CPUSPARCState *env, int cwp, int index) |
467 | { | |
468 | index = (index + cwp * 16) & (16 * NWINDOWS - 1); | |
469 | /* wrap handling : if cwp is on the last window, then we use the | |
470 | registers 'after' the end */ | |
471 | if (index < 8 && env->cwp == (NWINDOWS - 1)) | |
472 | index += (16 * NWINDOWS); | |
473 | return index; | |
474 | } | |
475 | ||
2623cbaf FB |
476 | /* save the register window 'cwp1' */ |
477 | static inline void save_window_offset(CPUSPARCState *env, int cwp1) | |
060366c5 | 478 | { |
2623cbaf | 479 | unsigned int i; |
992f48a0 | 480 | abi_ulong sp_ptr; |
3b46e624 | 481 | |
53a5960a | 482 | sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)]; |
060366c5 | 483 | #if defined(DEBUG_WIN) |
5fafdf24 | 484 | printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n", |
060366c5 FB |
485 | (int)sp_ptr, cwp1); |
486 | #endif | |
2623cbaf | 487 | for(i = 0; i < 16; i++) { |
53a5960a | 488 | tputl(sp_ptr, env->regbase[get_reg_index(env, cwp1, 8 + i)]); |
992f48a0 | 489 | sp_ptr += sizeof(abi_ulong); |
2623cbaf | 490 | } |
060366c5 FB |
491 | } |
492 | ||
493 | static void save_window(CPUSPARCState *env) | |
494 | { | |
5ef54116 | 495 | #ifndef TARGET_SPARC64 |
2623cbaf FB |
496 | unsigned int new_wim; |
497 | new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) & | |
498 | ((1LL << NWINDOWS) - 1); | |
499 | save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); | |
500 | env->wim = new_wim; | |
5ef54116 FB |
501 | #else |
502 | save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); | |
503 | env->cansave++; | |
504 | env->canrestore--; | |
505 | #endif | |
060366c5 FB |
506 | } |
507 | ||
508 | static void restore_window(CPUSPARCState *env) | |
509 | { | |
510 | unsigned int new_wim, i, cwp1; | |
992f48a0 | 511 | abi_ulong sp_ptr; |
3b46e624 | 512 | |
060366c5 FB |
513 | new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) & |
514 | ((1LL << NWINDOWS) - 1); | |
3b46e624 | 515 | |
060366c5 FB |
516 | /* restore the invalid window */ |
517 | cwp1 = (env->cwp + 1) & (NWINDOWS - 1); | |
53a5960a | 518 | sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)]; |
060366c5 | 519 | #if defined(DEBUG_WIN) |
5fafdf24 | 520 | printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n", |
060366c5 FB |
521 | (int)sp_ptr, cwp1); |
522 | #endif | |
2623cbaf | 523 | for(i = 0; i < 16; i++) { |
53a5960a | 524 | env->regbase[get_reg_index(env, cwp1, 8 + i)] = tgetl(sp_ptr); |
992f48a0 | 525 | sp_ptr += sizeof(abi_ulong); |
2623cbaf | 526 | } |
060366c5 | 527 | env->wim = new_wim; |
5ef54116 FB |
528 | #ifdef TARGET_SPARC64 |
529 | env->canrestore++; | |
530 | if (env->cleanwin < NWINDOWS - 1) | |
531 | env->cleanwin++; | |
532 | env->cansave--; | |
533 | #endif | |
060366c5 FB |
534 | } |
535 | ||
536 | static void flush_windows(CPUSPARCState *env) | |
537 | { | |
538 | int offset, cwp1; | |
2623cbaf FB |
539 | |
540 | offset = 1; | |
060366c5 FB |
541 | for(;;) { |
542 | /* if restore would invoke restore_window(), then we can stop */ | |
2623cbaf | 543 | cwp1 = (env->cwp + offset) & (NWINDOWS - 1); |
060366c5 FB |
544 | if (env->wim & (1 << cwp1)) |
545 | break; | |
2623cbaf | 546 | save_window_offset(env, cwp1); |
060366c5 FB |
547 | offset++; |
548 | } | |
2623cbaf FB |
549 | /* set wim so that restore will reload the registers */ |
550 | cwp1 = (env->cwp + 1) & (NWINDOWS - 1); | |
551 | env->wim = 1 << cwp1; | |
552 | #if defined(DEBUG_WIN) | |
553 | printf("flush_windows: nb=%d\n", offset - 1); | |
80a9d035 | 554 | #endif |
2623cbaf | 555 | } |
060366c5 | 556 | |
93ac68bc FB |
557 | void cpu_loop (CPUSPARCState *env) |
558 | { | |
060366c5 | 559 | int trapnr, ret; |
61ff6f58 | 560 | target_siginfo_t info; |
3b46e624 | 561 | |
060366c5 FB |
562 | while (1) { |
563 | trapnr = cpu_sparc_exec (env); | |
3b46e624 | 564 | |
060366c5 | 565 | switch (trapnr) { |
5ef54116 | 566 | #ifndef TARGET_SPARC64 |
5fafdf24 | 567 | case 0x88: |
060366c5 | 568 | case 0x90: |
5ef54116 | 569 | #else |
cb33da57 | 570 | case 0x110: |
5ef54116 FB |
571 | case 0x16d: |
572 | #endif | |
060366c5 | 573 | ret = do_syscall (env, env->gregs[1], |
5fafdf24 TS |
574 | env->regwptr[0], env->regwptr[1], |
575 | env->regwptr[2], env->regwptr[3], | |
060366c5 FB |
576 | env->regwptr[4], env->regwptr[5]); |
577 | if ((unsigned int)ret >= (unsigned int)(-515)) { | |
992f48a0 | 578 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) |
27908725 FB |
579 | env->xcc |= PSR_CARRY; |
580 | #else | |
060366c5 | 581 | env->psr |= PSR_CARRY; |
27908725 | 582 | #endif |
060366c5 FB |
583 | ret = -ret; |
584 | } else { | |
992f48a0 | 585 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) |
27908725 FB |
586 | env->xcc &= ~PSR_CARRY; |
587 | #else | |
060366c5 | 588 | env->psr &= ~PSR_CARRY; |
27908725 | 589 | #endif |
060366c5 FB |
590 | } |
591 | env->regwptr[0] = ret; | |
592 | /* next instruction */ | |
593 | env->pc = env->npc; | |
594 | env->npc = env->npc + 4; | |
595 | break; | |
596 | case 0x83: /* flush windows */ | |
992f48a0 BS |
597 | #ifdef TARGET_ABI32 |
598 | case 0x103: | |
599 | #endif | |
2623cbaf | 600 | flush_windows(env); |
060366c5 FB |
601 | /* next instruction */ |
602 | env->pc = env->npc; | |
603 | env->npc = env->npc + 4; | |
604 | break; | |
3475187d | 605 | #ifndef TARGET_SPARC64 |
060366c5 FB |
606 | case TT_WIN_OVF: /* window overflow */ |
607 | save_window(env); | |
608 | break; | |
609 | case TT_WIN_UNF: /* window underflow */ | |
610 | restore_window(env); | |
611 | break; | |
61ff6f58 FB |
612 | case TT_TFAULT: |
613 | case TT_DFAULT: | |
614 | { | |
615 | info.si_signo = SIGSEGV; | |
616 | info.si_errno = 0; | |
617 | /* XXX: check env->error_code */ | |
618 | info.si_code = TARGET_SEGV_MAPERR; | |
619 | info._sifields._sigfault._addr = env->mmuregs[4]; | |
620 | queue_signal(info.si_signo, &info); | |
621 | } | |
622 | break; | |
3475187d | 623 | #else |
5ef54116 FB |
624 | case TT_SPILL: /* window overflow */ |
625 | save_window(env); | |
626 | break; | |
627 | case TT_FILL: /* window underflow */ | |
628 | restore_window(env); | |
629 | break; | |
7f84a729 BS |
630 | case TT_TFAULT: |
631 | case TT_DFAULT: | |
632 | { | |
633 | info.si_signo = SIGSEGV; | |
634 | info.si_errno = 0; | |
635 | /* XXX: check env->error_code */ | |
636 | info.si_code = TARGET_SEGV_MAPERR; | |
637 | if (trapnr == TT_DFAULT) | |
638 | info._sifields._sigfault._addr = env->dmmuregs[4]; | |
639 | else | |
640 | info._sifields._sigfault._addr = env->tpc[env->tl]; | |
641 | queue_signal(info.si_signo, &info); | |
642 | } | |
643 | break; | |
5bfb56b2 BS |
644 | case 0x16e: |
645 | flush_windows(env); | |
646 | sparc64_get_context(env); | |
647 | break; | |
648 | case 0x16f: | |
649 | flush_windows(env); | |
650 | sparc64_set_context(env); | |
651 | break; | |
3475187d | 652 | #endif |
48dc41eb FB |
653 | case EXCP_INTERRUPT: |
654 | /* just indicate that signals should be handled asap */ | |
655 | break; | |
1fddef4b FB |
656 | case EXCP_DEBUG: |
657 | { | |
658 | int sig; | |
659 | ||
660 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
661 | if (sig) | |
662 | { | |
663 | info.si_signo = sig; | |
664 | info.si_errno = 0; | |
665 | info.si_code = TARGET_TRAP_BRKPT; | |
666 | queue_signal(info.si_signo, &info); | |
667 | } | |
668 | } | |
669 | break; | |
060366c5 FB |
670 | default: |
671 | printf ("Unhandled trap: 0x%x\n", trapnr); | |
7fe48483 | 672 | cpu_dump_state(env, stderr, fprintf, 0); |
060366c5 FB |
673 | exit (1); |
674 | } | |
675 | process_pending_signals (env); | |
676 | } | |
93ac68bc FB |
677 | } |
678 | ||
679 | #endif | |
680 | ||
67867308 | 681 | #ifdef TARGET_PPC |
9fddaa0c FB |
682 | static inline uint64_t cpu_ppc_get_tb (CPUState *env) |
683 | { | |
684 | /* TO FIX */ | |
685 | return 0; | |
686 | } | |
3b46e624 | 687 | |
9fddaa0c FB |
688 | uint32_t cpu_ppc_load_tbl (CPUState *env) |
689 | { | |
690 | return cpu_ppc_get_tb(env) & 0xFFFFFFFF; | |
691 | } | |
3b46e624 | 692 | |
9fddaa0c FB |
693 | uint32_t cpu_ppc_load_tbu (CPUState *env) |
694 | { | |
695 | return cpu_ppc_get_tb(env) >> 32; | |
696 | } | |
3b46e624 | 697 | |
a062e36c | 698 | uint32_t cpu_ppc_load_atbl (CPUState *env) |
9fddaa0c | 699 | { |
a062e36c | 700 | return cpu_ppc_get_tb(env) & 0xFFFFFFFF; |
9fddaa0c | 701 | } |
5fafdf24 | 702 | |
a062e36c | 703 | uint32_t cpu_ppc_load_atbu (CPUState *env) |
9fddaa0c | 704 | { |
a062e36c | 705 | return cpu_ppc_get_tb(env) >> 32; |
9fddaa0c | 706 | } |
76a66253 | 707 | |
76a66253 JM |
708 | uint32_t cpu_ppc601_load_rtcu (CPUState *env) |
709 | __attribute__ (( alias ("cpu_ppc_load_tbu") )); | |
710 | ||
76a66253 | 711 | uint32_t cpu_ppc601_load_rtcl (CPUState *env) |
9fddaa0c | 712 | { |
76a66253 | 713 | return cpu_ppc_load_tbl(env) & 0x3FFFFF80; |
9fddaa0c | 714 | } |
76a66253 | 715 | |
a750fc0b JM |
716 | /* XXX: to be fixed */ |
717 | int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp) | |
718 | { | |
719 | return -1; | |
720 | } | |
721 | ||
722 | int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val) | |
723 | { | |
724 | return -1; | |
725 | } | |
726 | ||
e1833e1f JM |
727 | #define EXCP_DUMP(env, fmt, args...) \ |
728 | do { \ | |
729 | fprintf(stderr, fmt , ##args); \ | |
730 | cpu_dump_state(env, stderr, fprintf, 0); \ | |
731 | if (loglevel != 0) { \ | |
732 | fprintf(logfile, fmt , ##args); \ | |
733 | cpu_dump_state(env, logfile, fprintf, 0); \ | |
734 | } \ | |
735 | } while (0) | |
736 | ||
67867308 FB |
737 | void cpu_loop(CPUPPCState *env) |
738 | { | |
67867308 | 739 | target_siginfo_t info; |
61190b14 FB |
740 | int trapnr; |
741 | uint32_t ret; | |
3b46e624 | 742 | |
67867308 FB |
743 | for(;;) { |
744 | trapnr = cpu_ppc_exec(env); | |
745 | switch(trapnr) { | |
e1833e1f JM |
746 | case POWERPC_EXCP_NONE: |
747 | /* Just go on */ | |
67867308 | 748 | break; |
e1833e1f JM |
749 | case POWERPC_EXCP_CRITICAL: /* Critical input */ |
750 | cpu_abort(env, "Critical interrupt while in user mode. " | |
751 | "Aborting\n"); | |
61190b14 | 752 | break; |
e1833e1f JM |
753 | case POWERPC_EXCP_MCHECK: /* Machine check exception */ |
754 | cpu_abort(env, "Machine check exception while in user mode. " | |
755 | "Aborting\n"); | |
756 | break; | |
757 | case POWERPC_EXCP_DSI: /* Data storage exception */ | |
758 | EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n", | |
759 | env->spr[SPR_DAR]); | |
760 | /* XXX: check this. Seems bugged */ | |
2be0071f FB |
761 | switch (env->error_code & 0xFF000000) { |
762 | case 0x40000000: | |
61190b14 FB |
763 | info.si_signo = TARGET_SIGSEGV; |
764 | info.si_errno = 0; | |
765 | info.si_code = TARGET_SEGV_MAPERR; | |
766 | break; | |
2be0071f | 767 | case 0x04000000: |
61190b14 FB |
768 | info.si_signo = TARGET_SIGILL; |
769 | info.si_errno = 0; | |
770 | info.si_code = TARGET_ILL_ILLADR; | |
771 | break; | |
2be0071f | 772 | case 0x08000000: |
61190b14 FB |
773 | info.si_signo = TARGET_SIGSEGV; |
774 | info.si_errno = 0; | |
775 | info.si_code = TARGET_SEGV_ACCERR; | |
776 | break; | |
61190b14 FB |
777 | default: |
778 | /* Let's send a regular segfault... */ | |
e1833e1f JM |
779 | EXCP_DUMP(env, "Invalid segfault errno (%02x)\n", |
780 | env->error_code); | |
61190b14 FB |
781 | info.si_signo = TARGET_SIGSEGV; |
782 | info.si_errno = 0; | |
783 | info.si_code = TARGET_SEGV_MAPERR; | |
784 | break; | |
785 | } | |
67867308 FB |
786 | info._sifields._sigfault._addr = env->nip; |
787 | queue_signal(info.si_signo, &info); | |
788 | break; | |
e1833e1f JM |
789 | case POWERPC_EXCP_ISI: /* Instruction storage exception */ |
790 | EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n", | |
f10c315f | 791 | env->spr[SPR_SRR0]); |
e1833e1f | 792 | /* XXX: check this */ |
2be0071f FB |
793 | switch (env->error_code & 0xFF000000) { |
794 | case 0x40000000: | |
61190b14 | 795 | info.si_signo = TARGET_SIGSEGV; |
67867308 | 796 | info.si_errno = 0; |
61190b14 FB |
797 | info.si_code = TARGET_SEGV_MAPERR; |
798 | break; | |
2be0071f FB |
799 | case 0x10000000: |
800 | case 0x08000000: | |
61190b14 FB |
801 | info.si_signo = TARGET_SIGSEGV; |
802 | info.si_errno = 0; | |
803 | info.si_code = TARGET_SEGV_ACCERR; | |
804 | break; | |
805 | default: | |
806 | /* Let's send a regular segfault... */ | |
e1833e1f JM |
807 | EXCP_DUMP(env, "Invalid segfault errno (%02x)\n", |
808 | env->error_code); | |
61190b14 FB |
809 | info.si_signo = TARGET_SIGSEGV; |
810 | info.si_errno = 0; | |
811 | info.si_code = TARGET_SEGV_MAPERR; | |
812 | break; | |
813 | } | |
814 | info._sifields._sigfault._addr = env->nip - 4; | |
67867308 FB |
815 | queue_signal(info.si_signo, &info); |
816 | break; | |
e1833e1f JM |
817 | case POWERPC_EXCP_EXTERNAL: /* External input */ |
818 | cpu_abort(env, "External interrupt while in user mode. " | |
819 | "Aborting\n"); | |
820 | break; | |
821 | case POWERPC_EXCP_ALIGN: /* Alignment exception */ | |
822 | EXCP_DUMP(env, "Unaligned memory access\n"); | |
823 | /* XXX: check this */ | |
61190b14 | 824 | info.si_signo = TARGET_SIGBUS; |
67867308 | 825 | info.si_errno = 0; |
61190b14 FB |
826 | info.si_code = TARGET_BUS_ADRALN; |
827 | info._sifields._sigfault._addr = env->nip - 4; | |
67867308 FB |
828 | queue_signal(info.si_signo, &info); |
829 | break; | |
e1833e1f JM |
830 | case POWERPC_EXCP_PROGRAM: /* Program exception */ |
831 | /* XXX: check this */ | |
61190b14 | 832 | switch (env->error_code & ~0xF) { |
e1833e1f JM |
833 | case POWERPC_EXCP_FP: |
834 | EXCP_DUMP(env, "Floating point program exception\n"); | |
61190b14 FB |
835 | info.si_signo = TARGET_SIGFPE; |
836 | info.si_errno = 0; | |
837 | switch (env->error_code & 0xF) { | |
e1833e1f | 838 | case POWERPC_EXCP_FP_OX: |
61190b14 FB |
839 | info.si_code = TARGET_FPE_FLTOVF; |
840 | break; | |
e1833e1f | 841 | case POWERPC_EXCP_FP_UX: |
61190b14 FB |
842 | info.si_code = TARGET_FPE_FLTUND; |
843 | break; | |
e1833e1f JM |
844 | case POWERPC_EXCP_FP_ZX: |
845 | case POWERPC_EXCP_FP_VXZDZ: | |
61190b14 FB |
846 | info.si_code = TARGET_FPE_FLTDIV; |
847 | break; | |
e1833e1f | 848 | case POWERPC_EXCP_FP_XX: |
61190b14 FB |
849 | info.si_code = TARGET_FPE_FLTRES; |
850 | break; | |
e1833e1f | 851 | case POWERPC_EXCP_FP_VXSOFT: |
61190b14 FB |
852 | info.si_code = TARGET_FPE_FLTINV; |
853 | break; | |
7c58044c | 854 | case POWERPC_EXCP_FP_VXSNAN: |
e1833e1f JM |
855 | case POWERPC_EXCP_FP_VXISI: |
856 | case POWERPC_EXCP_FP_VXIDI: | |
857 | case POWERPC_EXCP_FP_VXIMZ: | |
858 | case POWERPC_EXCP_FP_VXVC: | |
859 | case POWERPC_EXCP_FP_VXSQRT: | |
860 | case POWERPC_EXCP_FP_VXCVI: | |
61190b14 FB |
861 | info.si_code = TARGET_FPE_FLTSUB; |
862 | break; | |
863 | default: | |
e1833e1f JM |
864 | EXCP_DUMP(env, "Unknown floating point exception (%02x)\n", |
865 | env->error_code); | |
866 | break; | |
61190b14 | 867 | } |
e1833e1f JM |
868 | break; |
869 | case POWERPC_EXCP_INVAL: | |
870 | EXCP_DUMP(env, "Invalid instruction\n"); | |
61190b14 FB |
871 | info.si_signo = TARGET_SIGILL; |
872 | info.si_errno = 0; | |
873 | switch (env->error_code & 0xF) { | |
e1833e1f | 874 | case POWERPC_EXCP_INVAL_INVAL: |
61190b14 FB |
875 | info.si_code = TARGET_ILL_ILLOPC; |
876 | break; | |
e1833e1f | 877 | case POWERPC_EXCP_INVAL_LSWX: |
a750fc0b | 878 | info.si_code = TARGET_ILL_ILLOPN; |
61190b14 | 879 | break; |
e1833e1f | 880 | case POWERPC_EXCP_INVAL_SPR: |
61190b14 FB |
881 | info.si_code = TARGET_ILL_PRVREG; |
882 | break; | |
e1833e1f | 883 | case POWERPC_EXCP_INVAL_FP: |
61190b14 FB |
884 | info.si_code = TARGET_ILL_COPROC; |
885 | break; | |
886 | default: | |
e1833e1f JM |
887 | EXCP_DUMP(env, "Unknown invalid operation (%02x)\n", |
888 | env->error_code & 0xF); | |
61190b14 FB |
889 | info.si_code = TARGET_ILL_ILLADR; |
890 | break; | |
891 | } | |
892 | break; | |
e1833e1f JM |
893 | case POWERPC_EXCP_PRIV: |
894 | EXCP_DUMP(env, "Privilege violation\n"); | |
61190b14 FB |
895 | info.si_signo = TARGET_SIGILL; |
896 | info.si_errno = 0; | |
897 | switch (env->error_code & 0xF) { | |
e1833e1f | 898 | case POWERPC_EXCP_PRIV_OPC: |
61190b14 FB |
899 | info.si_code = TARGET_ILL_PRVOPC; |
900 | break; | |
e1833e1f | 901 | case POWERPC_EXCP_PRIV_REG: |
61190b14 | 902 | info.si_code = TARGET_ILL_PRVREG; |
e1833e1f | 903 | break; |
61190b14 | 904 | default: |
e1833e1f JM |
905 | EXCP_DUMP(env, "Unknown privilege violation (%02x)\n", |
906 | env->error_code & 0xF); | |
61190b14 FB |
907 | info.si_code = TARGET_ILL_PRVOPC; |
908 | break; | |
909 | } | |
910 | break; | |
e1833e1f JM |
911 | case POWERPC_EXCP_TRAP: |
912 | cpu_abort(env, "Tried to call a TRAP\n"); | |
913 | break; | |
61190b14 FB |
914 | default: |
915 | /* Should not happen ! */ | |
e1833e1f JM |
916 | cpu_abort(env, "Unknown program exception (%02x)\n", |
917 | env->error_code); | |
918 | break; | |
61190b14 FB |
919 | } |
920 | info._sifields._sigfault._addr = env->nip - 4; | |
67867308 FB |
921 | queue_signal(info.si_signo, &info); |
922 | break; | |
e1833e1f JM |
923 | case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ |
924 | EXCP_DUMP(env, "No floating point allowed\n"); | |
61190b14 | 925 | info.si_signo = TARGET_SIGILL; |
67867308 | 926 | info.si_errno = 0; |
61190b14 FB |
927 | info.si_code = TARGET_ILL_COPROC; |
928 | info._sifields._sigfault._addr = env->nip - 4; | |
67867308 FB |
929 | queue_signal(info.si_signo, &info); |
930 | break; | |
e1833e1f JM |
931 | case POWERPC_EXCP_SYSCALL: /* System call exception */ |
932 | cpu_abort(env, "Syscall exception while in user mode. " | |
933 | "Aborting\n"); | |
61190b14 | 934 | break; |
e1833e1f JM |
935 | case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ |
936 | EXCP_DUMP(env, "No APU instruction allowed\n"); | |
937 | info.si_signo = TARGET_SIGILL; | |
938 | info.si_errno = 0; | |
939 | info.si_code = TARGET_ILL_COPROC; | |
940 | info._sifields._sigfault._addr = env->nip - 4; | |
941 | queue_signal(info.si_signo, &info); | |
61190b14 | 942 | break; |
e1833e1f JM |
943 | case POWERPC_EXCP_DECR: /* Decrementer exception */ |
944 | cpu_abort(env, "Decrementer interrupt while in user mode. " | |
945 | "Aborting\n"); | |
61190b14 | 946 | break; |
e1833e1f JM |
947 | case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ |
948 | cpu_abort(env, "Fix interval timer interrupt while in user mode. " | |
949 | "Aborting\n"); | |
950 | break; | |
951 | case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */ | |
952 | cpu_abort(env, "Watchdog timer interrupt while in user mode. " | |
953 | "Aborting\n"); | |
954 | break; | |
955 | case POWERPC_EXCP_DTLB: /* Data TLB error */ | |
956 | cpu_abort(env, "Data TLB exception while in user mode. " | |
957 | "Aborting\n"); | |
958 | break; | |
959 | case POWERPC_EXCP_ITLB: /* Instruction TLB error */ | |
960 | cpu_abort(env, "Instruction TLB exception while in user mode. " | |
961 | "Aborting\n"); | |
962 | break; | |
963 | case POWERPC_EXCP_DEBUG: /* Debug interrupt */ | |
964 | /* XXX: check this */ | |
1fddef4b FB |
965 | { |
966 | int sig; | |
967 | ||
e1833e1f JM |
968 | sig = gdb_handlesig(env, TARGET_SIGTRAP); |
969 | if (sig) { | |
1fddef4b FB |
970 | info.si_signo = sig; |
971 | info.si_errno = 0; | |
972 | info.si_code = TARGET_TRAP_BRKPT; | |
973 | queue_signal(info.si_signo, &info); | |
974 | } | |
975 | } | |
976 | break; | |
e1833e1f JM |
977 | #if defined(TARGET_PPCEMB) |
978 | case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */ | |
979 | EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n"); | |
980 | info.si_signo = TARGET_SIGILL; | |
981 | info.si_errno = 0; | |
982 | info.si_code = TARGET_ILL_COPROC; | |
983 | info._sifields._sigfault._addr = env->nip - 4; | |
984 | queue_signal(info.si_signo, &info); | |
985 | break; | |
986 | case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */ | |
987 | cpu_abort(env, "Embedded floating-point data IRQ not handled\n"); | |
988 | break; | |
989 | case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */ | |
990 | cpu_abort(env, "Embedded floating-point round IRQ not handled\n"); | |
991 | break; | |
992 | case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */ | |
993 | cpu_abort(env, "Performance monitor exception not handled\n"); | |
994 | break; | |
995 | case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */ | |
996 | cpu_abort(env, "Doorbell interrupt while in user mode. " | |
997 | "Aborting\n"); | |
998 | break; | |
999 | case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */ | |
1000 | cpu_abort(env, "Doorbell critical interrupt while in user mode. " | |
1001 | "Aborting\n"); | |
1002 | break; | |
1003 | case POWERPC_EXCP_RESET: /* System reset exception */ | |
1004 | cpu_abort(env, "Reset interrupt while in user mode. " | |
1005 | "Aborting\n"); | |
1006 | break; | |
1007 | #endif /* defined(TARGET_PPCEMB) */ | |
e85e7c6e | 1008 | #if defined(TARGET_PPC64) && !defined(TARGET_ABI32) /* PowerPC 64 */ |
e1833e1f JM |
1009 | case POWERPC_EXCP_DSEG: /* Data segment exception */ |
1010 | cpu_abort(env, "Data segment exception while in user mode. " | |
1011 | "Aborting\n"); | |
1012 | break; | |
1013 | case POWERPC_EXCP_ISEG: /* Instruction segment exception */ | |
1014 | cpu_abort(env, "Instruction segment exception " | |
1015 | "while in user mode. Aborting\n"); | |
1016 | break; | |
e85e7c6e JM |
1017 | #endif /* defined(TARGET_PPC64) && !defined(TARGET_ABI32) */ |
1018 | #if defined(TARGET_PPC64H) && !defined(TARGET_ABI32) | |
1019 | /* PowerPC 64 with hypervisor mode support */ | |
e1833e1f JM |
1020 | case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */ |
1021 | cpu_abort(env, "Hypervisor decrementer interrupt " | |
1022 | "while in user mode. Aborting\n"); | |
1023 | break; | |
e85e7c6e | 1024 | #endif /* defined(TARGET_PPC64H) && !defined(TARGET_ABI32) */ |
e1833e1f JM |
1025 | case POWERPC_EXCP_TRACE: /* Trace exception */ |
1026 | /* Nothing to do: | |
1027 | * we use this exception to emulate step-by-step execution mode. | |
1028 | */ | |
1029 | break; | |
e85e7c6e JM |
1030 | #if defined(TARGET_PPC64H) && !defined(TARGET_ABI32) |
1031 | /* PowerPC 64 with hypervisor mode support */ | |
e1833e1f JM |
1032 | case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */ |
1033 | cpu_abort(env, "Hypervisor data storage exception " | |
1034 | "while in user mode. Aborting\n"); | |
1035 | break; | |
1036 | case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */ | |
1037 | cpu_abort(env, "Hypervisor instruction storage exception " | |
1038 | "while in user mode. Aborting\n"); | |
1039 | break; | |
1040 | case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */ | |
1041 | cpu_abort(env, "Hypervisor data segment exception " | |
1042 | "while in user mode. Aborting\n"); | |
1043 | break; | |
1044 | case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */ | |
1045 | cpu_abort(env, "Hypervisor instruction segment exception " | |
1046 | "while in user mode. Aborting\n"); | |
1047 | break; | |
e85e7c6e | 1048 | #endif /* defined(TARGET_PPC64H) && !defined(TARGET_ABI32) */ |
e1833e1f JM |
1049 | case POWERPC_EXCP_VPU: /* Vector unavailable exception */ |
1050 | EXCP_DUMP(env, "No Altivec instructions allowed\n"); | |
1051 | info.si_signo = TARGET_SIGILL; | |
1052 | info.si_errno = 0; | |
1053 | info.si_code = TARGET_ILL_COPROC; | |
1054 | info._sifields._sigfault._addr = env->nip - 4; | |
1055 | queue_signal(info.si_signo, &info); | |
1056 | break; | |
1057 | case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */ | |
1058 | cpu_abort(env, "Programable interval timer interrupt " | |
1059 | "while in user mode. Aborting\n"); | |
1060 | break; | |
1061 | case POWERPC_EXCP_IO: /* IO error exception */ | |
1062 | cpu_abort(env, "IO error exception while in user mode. " | |
1063 | "Aborting\n"); | |
1064 | break; | |
1065 | case POWERPC_EXCP_RUNM: /* Run mode exception */ | |
1066 | cpu_abort(env, "Run mode exception while in user mode. " | |
1067 | "Aborting\n"); | |
1068 | break; | |
1069 | case POWERPC_EXCP_EMUL: /* Emulation trap exception */ | |
1070 | cpu_abort(env, "Emulation trap exception not handled\n"); | |
1071 | break; | |
1072 | case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */ | |
1073 | cpu_abort(env, "Instruction fetch TLB exception " | |
1074 | "while in user-mode. Aborting"); | |
1075 | break; | |
1076 | case POWERPC_EXCP_DLTLB: /* Data load TLB miss */ | |
1077 | cpu_abort(env, "Data load TLB exception while in user-mode. " | |
1078 | "Aborting"); | |
1079 | break; | |
1080 | case POWERPC_EXCP_DSTLB: /* Data store TLB miss */ | |
1081 | cpu_abort(env, "Data store TLB exception while in user-mode. " | |
1082 | "Aborting"); | |
1083 | break; | |
1084 | case POWERPC_EXCP_FPA: /* Floating-point assist exception */ | |
1085 | cpu_abort(env, "Floating-point assist exception not handled\n"); | |
1086 | break; | |
1087 | case POWERPC_EXCP_IABR: /* Instruction address breakpoint */ | |
1088 | cpu_abort(env, "Instruction address breakpoint exception " | |
1089 | "not handled\n"); | |
1090 | break; | |
1091 | case POWERPC_EXCP_SMI: /* System management interrupt */ | |
1092 | cpu_abort(env, "System management interrupt while in user mode. " | |
1093 | "Aborting\n"); | |
1094 | break; | |
1095 | case POWERPC_EXCP_THERM: /* Thermal interrupt */ | |
1096 | cpu_abort(env, "Thermal interrupt interrupt while in user mode. " | |
1097 | "Aborting\n"); | |
1098 | break; | |
1099 | case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */ | |
1100 | cpu_abort(env, "Performance monitor exception not handled\n"); | |
1101 | break; | |
1102 | case POWERPC_EXCP_VPUA: /* Vector assist exception */ | |
1103 | cpu_abort(env, "Vector assist exception not handled\n"); | |
1104 | break; | |
1105 | case POWERPC_EXCP_SOFTP: /* Soft patch exception */ | |
1106 | cpu_abort(env, "Soft patch exception not handled\n"); | |
1107 | break; | |
1108 | case POWERPC_EXCP_MAINT: /* Maintenance exception */ | |
1109 | cpu_abort(env, "Maintenance exception while in user mode. " | |
1110 | "Aborting\n"); | |
1111 | break; | |
1112 | case POWERPC_EXCP_STOP: /* stop translation */ | |
1113 | /* We did invalidate the instruction cache. Go on */ | |
1114 | break; | |
1115 | case POWERPC_EXCP_BRANCH: /* branch instruction: */ | |
1116 | /* We just stopped because of a branch. Go on */ | |
1117 | break; | |
1118 | case POWERPC_EXCP_SYSCALL_USER: | |
1119 | /* system call in user-mode emulation */ | |
1120 | /* WARNING: | |
1121 | * PPC ABI uses overflow flag in cr0 to signal an error | |
1122 | * in syscalls. | |
1123 | */ | |
1124 | #if 0 | |
1125 | printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0], | |
1126 | env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]); | |
1127 | #endif | |
1128 | env->crf[0] &= ~0x1; | |
1129 | ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4], | |
1130 | env->gpr[5], env->gpr[6], env->gpr[7], | |
1131 | env->gpr[8]); | |
1132 | if (ret > (uint32_t)(-515)) { | |
1133 | env->crf[0] |= 0x1; | |
1134 | ret = -ret; | |
61190b14 | 1135 | } |
e1833e1f JM |
1136 | env->gpr[3] = ret; |
1137 | #if 0 | |
1138 | printf("syscall returned 0x%08x (%d)\n", ret, ret); | |
1139 | #endif | |
1140 | break; | |
56ba31ff JM |
1141 | case EXCP_INTERRUPT: |
1142 | /* just indicate that signals should be handled asap */ | |
1143 | break; | |
e1833e1f JM |
1144 | default: |
1145 | cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr); | |
1146 | break; | |
67867308 FB |
1147 | } |
1148 | process_pending_signals(env); | |
1149 | } | |
1150 | } | |
1151 | #endif | |
1152 | ||
048f6b4d FB |
1153 | #ifdef TARGET_MIPS |
1154 | ||
1155 | #define MIPS_SYS(name, args) args, | |
1156 | ||
1157 | static const uint8_t mips_syscall_args[] = { | |
1158 | MIPS_SYS(sys_syscall , 0) /* 4000 */ | |
1159 | MIPS_SYS(sys_exit , 1) | |
1160 | MIPS_SYS(sys_fork , 0) | |
1161 | MIPS_SYS(sys_read , 3) | |
1162 | MIPS_SYS(sys_write , 3) | |
1163 | MIPS_SYS(sys_open , 3) /* 4005 */ | |
1164 | MIPS_SYS(sys_close , 1) | |
1165 | MIPS_SYS(sys_waitpid , 3) | |
1166 | MIPS_SYS(sys_creat , 2) | |
1167 | MIPS_SYS(sys_link , 2) | |
1168 | MIPS_SYS(sys_unlink , 1) /* 4010 */ | |
1169 | MIPS_SYS(sys_execve , 0) | |
1170 | MIPS_SYS(sys_chdir , 1) | |
1171 | MIPS_SYS(sys_time , 1) | |
1172 | MIPS_SYS(sys_mknod , 3) | |
1173 | MIPS_SYS(sys_chmod , 2) /* 4015 */ | |
1174 | MIPS_SYS(sys_lchown , 3) | |
1175 | MIPS_SYS(sys_ni_syscall , 0) | |
1176 | MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */ | |
1177 | MIPS_SYS(sys_lseek , 3) | |
1178 | MIPS_SYS(sys_getpid , 0) /* 4020 */ | |
1179 | MIPS_SYS(sys_mount , 5) | |
1180 | MIPS_SYS(sys_oldumount , 1) | |
1181 | MIPS_SYS(sys_setuid , 1) | |
1182 | MIPS_SYS(sys_getuid , 0) | |
1183 | MIPS_SYS(sys_stime , 1) /* 4025 */ | |
1184 | MIPS_SYS(sys_ptrace , 4) | |
1185 | MIPS_SYS(sys_alarm , 1) | |
1186 | MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */ | |
1187 | MIPS_SYS(sys_pause , 0) | |
1188 | MIPS_SYS(sys_utime , 2) /* 4030 */ | |
1189 | MIPS_SYS(sys_ni_syscall , 0) | |
1190 | MIPS_SYS(sys_ni_syscall , 0) | |
1191 | MIPS_SYS(sys_access , 2) | |
1192 | MIPS_SYS(sys_nice , 1) | |
1193 | MIPS_SYS(sys_ni_syscall , 0) /* 4035 */ | |
1194 | MIPS_SYS(sys_sync , 0) | |
1195 | MIPS_SYS(sys_kill , 2) | |
1196 | MIPS_SYS(sys_rename , 2) | |
1197 | MIPS_SYS(sys_mkdir , 2) | |
1198 | MIPS_SYS(sys_rmdir , 1) /* 4040 */ | |
1199 | MIPS_SYS(sys_dup , 1) | |
1200 | MIPS_SYS(sys_pipe , 0) | |
1201 | MIPS_SYS(sys_times , 1) | |
1202 | MIPS_SYS(sys_ni_syscall , 0) | |
1203 | MIPS_SYS(sys_brk , 1) /* 4045 */ | |
1204 | MIPS_SYS(sys_setgid , 1) | |
1205 | MIPS_SYS(sys_getgid , 0) | |
1206 | MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */ | |
1207 | MIPS_SYS(sys_geteuid , 0) | |
1208 | MIPS_SYS(sys_getegid , 0) /* 4050 */ | |
1209 | MIPS_SYS(sys_acct , 0) | |
1210 | MIPS_SYS(sys_umount , 2) | |
1211 | MIPS_SYS(sys_ni_syscall , 0) | |
1212 | MIPS_SYS(sys_ioctl , 3) | |
1213 | MIPS_SYS(sys_fcntl , 3) /* 4055 */ | |
1214 | MIPS_SYS(sys_ni_syscall , 2) | |
1215 | MIPS_SYS(sys_setpgid , 2) | |
1216 | MIPS_SYS(sys_ni_syscall , 0) | |
1217 | MIPS_SYS(sys_olduname , 1) | |
1218 | MIPS_SYS(sys_umask , 1) /* 4060 */ | |
1219 | MIPS_SYS(sys_chroot , 1) | |
1220 | MIPS_SYS(sys_ustat , 2) | |
1221 | MIPS_SYS(sys_dup2 , 2) | |
1222 | MIPS_SYS(sys_getppid , 0) | |
1223 | MIPS_SYS(sys_getpgrp , 0) /* 4065 */ | |
1224 | MIPS_SYS(sys_setsid , 0) | |
1225 | MIPS_SYS(sys_sigaction , 3) | |
1226 | MIPS_SYS(sys_sgetmask , 0) | |
1227 | MIPS_SYS(sys_ssetmask , 1) | |
1228 | MIPS_SYS(sys_setreuid , 2) /* 4070 */ | |
1229 | MIPS_SYS(sys_setregid , 2) | |
1230 | MIPS_SYS(sys_sigsuspend , 0) | |
1231 | MIPS_SYS(sys_sigpending , 1) | |
1232 | MIPS_SYS(sys_sethostname , 2) | |
1233 | MIPS_SYS(sys_setrlimit , 2) /* 4075 */ | |
1234 | MIPS_SYS(sys_getrlimit , 2) | |
1235 | MIPS_SYS(sys_getrusage , 2) | |
1236 | MIPS_SYS(sys_gettimeofday, 2) | |
1237 | MIPS_SYS(sys_settimeofday, 2) | |
1238 | MIPS_SYS(sys_getgroups , 2) /* 4080 */ | |
1239 | MIPS_SYS(sys_setgroups , 2) | |
1240 | MIPS_SYS(sys_ni_syscall , 0) /* old_select */ | |
1241 | MIPS_SYS(sys_symlink , 2) | |
1242 | MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */ | |
1243 | MIPS_SYS(sys_readlink , 3) /* 4085 */ | |
1244 | MIPS_SYS(sys_uselib , 1) | |
1245 | MIPS_SYS(sys_swapon , 2) | |
1246 | MIPS_SYS(sys_reboot , 3) | |
1247 | MIPS_SYS(old_readdir , 3) | |
1248 | MIPS_SYS(old_mmap , 6) /* 4090 */ | |
1249 | MIPS_SYS(sys_munmap , 2) | |
1250 | MIPS_SYS(sys_truncate , 2) | |
1251 | MIPS_SYS(sys_ftruncate , 2) | |
1252 | MIPS_SYS(sys_fchmod , 2) | |
1253 | MIPS_SYS(sys_fchown , 3) /* 4095 */ | |
1254 | MIPS_SYS(sys_getpriority , 2) | |
1255 | MIPS_SYS(sys_setpriority , 3) | |
1256 | MIPS_SYS(sys_ni_syscall , 0) | |
1257 | MIPS_SYS(sys_statfs , 2) | |
1258 | MIPS_SYS(sys_fstatfs , 2) /* 4100 */ | |
1259 | MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */ | |
1260 | MIPS_SYS(sys_socketcall , 2) | |
1261 | MIPS_SYS(sys_syslog , 3) | |
1262 | MIPS_SYS(sys_setitimer , 3) | |
1263 | MIPS_SYS(sys_getitimer , 2) /* 4105 */ | |
1264 | MIPS_SYS(sys_newstat , 2) | |
1265 | MIPS_SYS(sys_newlstat , 2) | |
1266 | MIPS_SYS(sys_newfstat , 2) | |
1267 | MIPS_SYS(sys_uname , 1) | |
1268 | MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */ | |
1269 | MIPS_SYS(sys_vhangup , 0) | |
1270 | MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */ | |
1271 | MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */ | |
1272 | MIPS_SYS(sys_wait4 , 4) | |
1273 | MIPS_SYS(sys_swapoff , 1) /* 4115 */ | |
1274 | MIPS_SYS(sys_sysinfo , 1) | |
1275 | MIPS_SYS(sys_ipc , 6) | |
1276 | MIPS_SYS(sys_fsync , 1) | |
1277 | MIPS_SYS(sys_sigreturn , 0) | |
1278 | MIPS_SYS(sys_clone , 0) /* 4120 */ | |
1279 | MIPS_SYS(sys_setdomainname, 2) | |
1280 | MIPS_SYS(sys_newuname , 1) | |
1281 | MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */ | |
1282 | MIPS_SYS(sys_adjtimex , 1) | |
1283 | MIPS_SYS(sys_mprotect , 3) /* 4125 */ | |
1284 | MIPS_SYS(sys_sigprocmask , 3) | |
1285 | MIPS_SYS(sys_ni_syscall , 0) /* was create_module */ | |
1286 | MIPS_SYS(sys_init_module , 5) | |
1287 | MIPS_SYS(sys_delete_module, 1) | |
1288 | MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */ | |
1289 | MIPS_SYS(sys_quotactl , 0) | |
1290 | MIPS_SYS(sys_getpgid , 1) | |
1291 | MIPS_SYS(sys_fchdir , 1) | |
1292 | MIPS_SYS(sys_bdflush , 2) | |
1293 | MIPS_SYS(sys_sysfs , 3) /* 4135 */ | |
1294 | MIPS_SYS(sys_personality , 1) | |
1295 | MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */ | |
1296 | MIPS_SYS(sys_setfsuid , 1) | |
1297 | MIPS_SYS(sys_setfsgid , 1) | |
1298 | MIPS_SYS(sys_llseek , 5) /* 4140 */ | |
1299 | MIPS_SYS(sys_getdents , 3) | |
1300 | MIPS_SYS(sys_select , 5) | |
1301 | MIPS_SYS(sys_flock , 2) | |
1302 | MIPS_SYS(sys_msync , 3) | |
1303 | MIPS_SYS(sys_readv , 3) /* 4145 */ | |
1304 | MIPS_SYS(sys_writev , 3) | |
1305 | MIPS_SYS(sys_cacheflush , 3) | |
1306 | MIPS_SYS(sys_cachectl , 3) | |
1307 | MIPS_SYS(sys_sysmips , 4) | |
1308 | MIPS_SYS(sys_ni_syscall , 0) /* 4150 */ | |
1309 | MIPS_SYS(sys_getsid , 1) | |
1310 | MIPS_SYS(sys_fdatasync , 0) | |
1311 | MIPS_SYS(sys_sysctl , 1) | |
1312 | MIPS_SYS(sys_mlock , 2) | |
1313 | MIPS_SYS(sys_munlock , 2) /* 4155 */ | |
1314 | MIPS_SYS(sys_mlockall , 1) | |
1315 | MIPS_SYS(sys_munlockall , 0) | |
1316 | MIPS_SYS(sys_sched_setparam, 2) | |
1317 | MIPS_SYS(sys_sched_getparam, 2) | |
1318 | MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */ | |
1319 | MIPS_SYS(sys_sched_getscheduler, 1) | |
1320 | MIPS_SYS(sys_sched_yield , 0) | |
1321 | MIPS_SYS(sys_sched_get_priority_max, 1) | |
1322 | MIPS_SYS(sys_sched_get_priority_min, 1) | |
1323 | MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */ | |
1324 | MIPS_SYS(sys_nanosleep, 2) | |
1325 | MIPS_SYS(sys_mremap , 4) | |
1326 | MIPS_SYS(sys_accept , 3) | |
1327 | MIPS_SYS(sys_bind , 3) | |
1328 | MIPS_SYS(sys_connect , 3) /* 4170 */ | |
1329 | MIPS_SYS(sys_getpeername , 3) | |
1330 | MIPS_SYS(sys_getsockname , 3) | |
1331 | MIPS_SYS(sys_getsockopt , 5) | |
1332 | MIPS_SYS(sys_listen , 2) | |
1333 | MIPS_SYS(sys_recv , 4) /* 4175 */ | |
1334 | MIPS_SYS(sys_recvfrom , 6) | |
1335 | MIPS_SYS(sys_recvmsg , 3) | |
1336 | MIPS_SYS(sys_send , 4) | |
1337 | MIPS_SYS(sys_sendmsg , 3) | |
1338 | MIPS_SYS(sys_sendto , 6) /* 4180 */ | |
1339 | MIPS_SYS(sys_setsockopt , 5) | |
1340 | MIPS_SYS(sys_shutdown , 2) | |
1341 | MIPS_SYS(sys_socket , 3) | |
1342 | MIPS_SYS(sys_socketpair , 4) | |
1343 | MIPS_SYS(sys_setresuid , 3) /* 4185 */ | |
1344 | MIPS_SYS(sys_getresuid , 3) | |
1345 | MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */ | |
1346 | MIPS_SYS(sys_poll , 3) | |
1347 | MIPS_SYS(sys_nfsservctl , 3) | |
1348 | MIPS_SYS(sys_setresgid , 3) /* 4190 */ | |
1349 | MIPS_SYS(sys_getresgid , 3) | |
1350 | MIPS_SYS(sys_prctl , 5) | |
1351 | MIPS_SYS(sys_rt_sigreturn, 0) | |
1352 | MIPS_SYS(sys_rt_sigaction, 4) | |
1353 | MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */ | |
1354 | MIPS_SYS(sys_rt_sigpending, 2) | |
1355 | MIPS_SYS(sys_rt_sigtimedwait, 4) | |
1356 | MIPS_SYS(sys_rt_sigqueueinfo, 3) | |
1357 | MIPS_SYS(sys_rt_sigsuspend, 0) | |
1358 | MIPS_SYS(sys_pread64 , 6) /* 4200 */ | |
1359 | MIPS_SYS(sys_pwrite64 , 6) | |
1360 | MIPS_SYS(sys_chown , 3) | |
1361 | MIPS_SYS(sys_getcwd , 2) | |
1362 | MIPS_SYS(sys_capget , 2) | |
1363 | MIPS_SYS(sys_capset , 2) /* 4205 */ | |
1364 | MIPS_SYS(sys_sigaltstack , 0) | |
1365 | MIPS_SYS(sys_sendfile , 4) | |
1366 | MIPS_SYS(sys_ni_syscall , 0) | |
1367 | MIPS_SYS(sys_ni_syscall , 0) | |
1368 | MIPS_SYS(sys_mmap2 , 6) /* 4210 */ | |
1369 | MIPS_SYS(sys_truncate64 , 4) | |
1370 | MIPS_SYS(sys_ftruncate64 , 4) | |
1371 | MIPS_SYS(sys_stat64 , 2) | |
1372 | MIPS_SYS(sys_lstat64 , 2) | |
1373 | MIPS_SYS(sys_fstat64 , 2) /* 4215 */ | |
1374 | MIPS_SYS(sys_pivot_root , 2) | |
1375 | MIPS_SYS(sys_mincore , 3) | |
1376 | MIPS_SYS(sys_madvise , 3) | |
1377 | MIPS_SYS(sys_getdents64 , 3) | |
1378 | MIPS_SYS(sys_fcntl64 , 3) /* 4220 */ | |
1379 | MIPS_SYS(sys_ni_syscall , 0) | |
1380 | MIPS_SYS(sys_gettid , 0) | |
1381 | MIPS_SYS(sys_readahead , 5) | |
1382 | MIPS_SYS(sys_setxattr , 5) | |
1383 | MIPS_SYS(sys_lsetxattr , 5) /* 4225 */ | |
1384 | MIPS_SYS(sys_fsetxattr , 5) | |
1385 | MIPS_SYS(sys_getxattr , 4) | |
1386 | MIPS_SYS(sys_lgetxattr , 4) | |
1387 | MIPS_SYS(sys_fgetxattr , 4) | |
1388 | MIPS_SYS(sys_listxattr , 3) /* 4230 */ | |
1389 | MIPS_SYS(sys_llistxattr , 3) | |
1390 | MIPS_SYS(sys_flistxattr , 3) | |
1391 | MIPS_SYS(sys_removexattr , 2) | |
1392 | MIPS_SYS(sys_lremovexattr, 2) | |
1393 | MIPS_SYS(sys_fremovexattr, 2) /* 4235 */ | |
1394 | MIPS_SYS(sys_tkill , 2) | |
1395 | MIPS_SYS(sys_sendfile64 , 5) | |
1396 | MIPS_SYS(sys_futex , 2) | |
1397 | MIPS_SYS(sys_sched_setaffinity, 3) | |
1398 | MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */ | |
1399 | MIPS_SYS(sys_io_setup , 2) | |
1400 | MIPS_SYS(sys_io_destroy , 1) | |
1401 | MIPS_SYS(sys_io_getevents, 5) | |
1402 | MIPS_SYS(sys_io_submit , 3) | |
1403 | MIPS_SYS(sys_io_cancel , 3) /* 4245 */ | |
1404 | MIPS_SYS(sys_exit_group , 1) | |
1405 | MIPS_SYS(sys_lookup_dcookie, 3) | |
1406 | MIPS_SYS(sys_epoll_create, 1) | |
1407 | MIPS_SYS(sys_epoll_ctl , 4) | |
1408 | MIPS_SYS(sys_epoll_wait , 3) /* 4250 */ | |
1409 | MIPS_SYS(sys_remap_file_pages, 5) | |
1410 | MIPS_SYS(sys_set_tid_address, 1) | |
1411 | MIPS_SYS(sys_restart_syscall, 0) | |
1412 | MIPS_SYS(sys_fadvise64_64, 7) | |
1413 | MIPS_SYS(sys_statfs64 , 3) /* 4255 */ | |
1414 | MIPS_SYS(sys_fstatfs64 , 2) | |
1415 | MIPS_SYS(sys_timer_create, 3) | |
1416 | MIPS_SYS(sys_timer_settime, 4) | |
1417 | MIPS_SYS(sys_timer_gettime, 2) | |
1418 | MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */ | |
1419 | MIPS_SYS(sys_timer_delete, 1) | |
1420 | MIPS_SYS(sys_clock_settime, 2) | |
1421 | MIPS_SYS(sys_clock_gettime, 2) | |
1422 | MIPS_SYS(sys_clock_getres, 2) | |
1423 | MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */ | |
1424 | MIPS_SYS(sys_tgkill , 3) | |
1425 | MIPS_SYS(sys_utimes , 2) | |
1426 | MIPS_SYS(sys_mbind , 4) | |
1427 | MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */ | |
1428 | MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */ | |
1429 | MIPS_SYS(sys_mq_open , 4) | |
1430 | MIPS_SYS(sys_mq_unlink , 1) | |
1431 | MIPS_SYS(sys_mq_timedsend, 5) | |
1432 | MIPS_SYS(sys_mq_timedreceive, 5) | |
1433 | MIPS_SYS(sys_mq_notify , 2) /* 4275 */ | |
1434 | MIPS_SYS(sys_mq_getsetattr, 3) | |
1435 | MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */ | |
1436 | MIPS_SYS(sys_waitid , 4) | |
1437 | MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */ | |
1438 | MIPS_SYS(sys_add_key , 5) | |
388bb21a | 1439 | MIPS_SYS(sys_request_key, 4) |
048f6b4d | 1440 | MIPS_SYS(sys_keyctl , 5) |
6f5b89a0 | 1441 | MIPS_SYS(sys_set_thread_area, 1) |
388bb21a TS |
1442 | MIPS_SYS(sys_inotify_init, 0) |
1443 | MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */ | |
1444 | MIPS_SYS(sys_inotify_rm_watch, 2) | |
1445 | MIPS_SYS(sys_migrate_pages, 4) | |
1446 | MIPS_SYS(sys_openat, 4) | |
1447 | MIPS_SYS(sys_mkdirat, 3) | |
1448 | MIPS_SYS(sys_mknodat, 4) /* 4290 */ | |
1449 | MIPS_SYS(sys_fchownat, 5) | |
1450 | MIPS_SYS(sys_futimesat, 3) | |
1451 | MIPS_SYS(sys_fstatat64, 4) | |
1452 | MIPS_SYS(sys_unlinkat, 3) | |
1453 | MIPS_SYS(sys_renameat, 4) /* 4295 */ | |
1454 | MIPS_SYS(sys_linkat, 5) | |
1455 | MIPS_SYS(sys_symlinkat, 3) | |
1456 | MIPS_SYS(sys_readlinkat, 4) | |
1457 | MIPS_SYS(sys_fchmodat, 3) | |
1458 | MIPS_SYS(sys_faccessat, 3) /* 4300 */ | |
1459 | MIPS_SYS(sys_pselect6, 6) | |
1460 | MIPS_SYS(sys_ppoll, 5) | |
1461 | MIPS_SYS(sys_unshare, 1) | |
1462 | MIPS_SYS(sys_splice, 4) | |
1463 | MIPS_SYS(sys_sync_file_range, 7) /* 4305 */ | |
1464 | MIPS_SYS(sys_tee, 4) | |
1465 | MIPS_SYS(sys_vmsplice, 4) | |
1466 | MIPS_SYS(sys_move_pages, 6) | |
1467 | MIPS_SYS(sys_set_robust_list, 2) | |
1468 | MIPS_SYS(sys_get_robust_list, 3) /* 4310 */ | |
1469 | MIPS_SYS(sys_kexec_load, 4) | |
1470 | MIPS_SYS(sys_getcpu, 3) | |
1471 | MIPS_SYS(sys_epoll_pwait, 6) | |
1472 | MIPS_SYS(sys_ioprio_set, 3) | |
1473 | MIPS_SYS(sys_ioprio_get, 2) | |
048f6b4d FB |
1474 | }; |
1475 | ||
1476 | #undef MIPS_SYS | |
1477 | ||
1478 | void cpu_loop(CPUMIPSState *env) | |
1479 | { | |
1480 | target_siginfo_t info; | |
388bb21a | 1481 | int trapnr, ret; |
048f6b4d | 1482 | unsigned int syscall_num; |
048f6b4d FB |
1483 | |
1484 | for(;;) { | |
1485 | trapnr = cpu_mips_exec(env); | |
1486 | switch(trapnr) { | |
1487 | case EXCP_SYSCALL: | |
ead9360e TS |
1488 | syscall_num = env->gpr[2][env->current_tc] - 4000; |
1489 | env->PC[env->current_tc] += 4; | |
388bb21a TS |
1490 | if (syscall_num >= sizeof(mips_syscall_args)) { |
1491 | ret = -ENOSYS; | |
1492 | } else { | |
1493 | int nb_args; | |
992f48a0 BS |
1494 | abi_ulong sp_reg; |
1495 | abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0; | |
388bb21a TS |
1496 | |
1497 | nb_args = mips_syscall_args[syscall_num]; | |
ead9360e | 1498 | sp_reg = env->gpr[29][env->current_tc]; |
388bb21a TS |
1499 | switch (nb_args) { |
1500 | /* these arguments are taken from the stack */ | |
1501 | case 8: arg8 = tgetl(sp_reg + 28); | |
1502 | case 7: arg7 = tgetl(sp_reg + 24); | |
1503 | case 6: arg6 = tgetl(sp_reg + 20); | |
1504 | case 5: arg5 = tgetl(sp_reg + 16); | |
1505 | default: | |
1506 | break; | |
048f6b4d | 1507 | } |
ead9360e TS |
1508 | ret = do_syscall(env, env->gpr[2][env->current_tc], |
1509 | env->gpr[4][env->current_tc], | |
1510 | env->gpr[5][env->current_tc], | |
1511 | env->gpr[6][env->current_tc], | |
1512 | env->gpr[7][env->current_tc], | |
388bb21a TS |
1513 | arg5, arg6/*, arg7, arg8*/); |
1514 | } | |
1515 | if ((unsigned int)ret >= (unsigned int)(-1133)) { | |
ead9360e | 1516 | env->gpr[7][env->current_tc] = 1; /* error flag */ |
388bb21a TS |
1517 | ret = -ret; |
1518 | } else { | |
ead9360e | 1519 | env->gpr[7][env->current_tc] = 0; /* error flag */ |
048f6b4d | 1520 | } |
ead9360e | 1521 | env->gpr[2][env->current_tc] = ret; |
048f6b4d | 1522 | break; |
ca7c2b1b TS |
1523 | case EXCP_TLBL: |
1524 | case EXCP_TLBS: | |
6900e84b | 1525 | case EXCP_CpU: |
048f6b4d | 1526 | case EXCP_RI: |
bc1ad2de FB |
1527 | info.si_signo = TARGET_SIGILL; |
1528 | info.si_errno = 0; | |
1529 | info.si_code = 0; | |
1530 | queue_signal(info.si_signo, &info); | |
048f6b4d | 1531 | break; |
106ec879 FB |
1532 | case EXCP_INTERRUPT: |
1533 | /* just indicate that signals should be handled asap */ | |
1534 | break; | |
d08b2a28 PB |
1535 | case EXCP_DEBUG: |
1536 | { | |
1537 | int sig; | |
1538 | ||
1539 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
1540 | if (sig) | |
1541 | { | |
1542 | info.si_signo = sig; | |
1543 | info.si_errno = 0; | |
1544 | info.si_code = TARGET_TRAP_BRKPT; | |
1545 | queue_signal(info.si_signo, &info); | |
1546 | } | |
1547 | } | |
1548 | break; | |
048f6b4d FB |
1549 | default: |
1550 | // error: | |
5fafdf24 | 1551 | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", |
048f6b4d FB |
1552 | trapnr); |
1553 | cpu_dump_state(env, stderr, fprintf, 0); | |
1554 | abort(); | |
1555 | } | |
1556 | process_pending_signals(env); | |
1557 | } | |
1558 | } | |
1559 | #endif | |
1560 | ||
fdf9b3e8 FB |
1561 | #ifdef TARGET_SH4 |
1562 | void cpu_loop (CPUState *env) | |
1563 | { | |
1564 | int trapnr, ret; | |
355fb23d | 1565 | target_siginfo_t info; |
3b46e624 | 1566 | |
fdf9b3e8 FB |
1567 | while (1) { |
1568 | trapnr = cpu_sh4_exec (env); | |
3b46e624 | 1569 | |
fdf9b3e8 FB |
1570 | switch (trapnr) { |
1571 | case 0x160: | |
5fafdf24 TS |
1572 | ret = do_syscall(env, |
1573 | env->gregs[3], | |
1574 | env->gregs[4], | |
1575 | env->gregs[5], | |
1576 | env->gregs[6], | |
1577 | env->gregs[7], | |
1578 | env->gregs[0], | |
fdf9b3e8 | 1579 | 0); |
9c2a9ea1 | 1580 | env->gregs[0] = ret; |
fdf9b3e8 FB |
1581 | env->pc += 2; |
1582 | break; | |
355fb23d PB |
1583 | case EXCP_DEBUG: |
1584 | { | |
1585 | int sig; | |
1586 | ||
1587 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
1588 | if (sig) | |
1589 | { | |
1590 | info.si_signo = sig; | |
1591 | info.si_errno = 0; | |
1592 | info.si_code = TARGET_TRAP_BRKPT; | |
1593 | queue_signal(info.si_signo, &info); | |
1594 | } | |
1595 | } | |
1596 | break; | |
fdf9b3e8 FB |
1597 | default: |
1598 | printf ("Unhandled trap: 0x%x\n", trapnr); | |
1599 | cpu_dump_state(env, stderr, fprintf, 0); | |
1600 | exit (1); | |
1601 | } | |
1602 | process_pending_signals (env); | |
1603 | } | |
1604 | } | |
1605 | #endif | |
1606 | ||
48733d19 TS |
1607 | #ifdef TARGET_CRIS |
1608 | void cpu_loop (CPUState *env) | |
1609 | { | |
1610 | int trapnr, ret; | |
1611 | target_siginfo_t info; | |
1612 | ||
1613 | while (1) { | |
1614 | trapnr = cpu_cris_exec (env); | |
1615 | switch (trapnr) { | |
1616 | case 0xaa: | |
1617 | { | |
1618 | info.si_signo = SIGSEGV; | |
1619 | info.si_errno = 0; | |
1620 | /* XXX: check env->error_code */ | |
1621 | info.si_code = TARGET_SEGV_MAPERR; | |
1622 | info._sifields._sigfault._addr = env->debug1; | |
1623 | queue_signal(info.si_signo, &info); | |
1624 | } | |
1625 | break; | |
1626 | case EXCP_BREAK: | |
1627 | ret = do_syscall(env, | |
1628 | env->regs[9], | |
1629 | env->regs[10], | |
1630 | env->regs[11], | |
1631 | env->regs[12], | |
1632 | env->regs[13], | |
1633 | env->pregs[7], | |
1634 | env->pregs[11]); | |
1635 | env->regs[10] = ret; | |
1636 | env->pc += 2; | |
1637 | break; | |
1638 | case EXCP_DEBUG: | |
1639 | { | |
1640 | int sig; | |
1641 | ||
1642 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
1643 | if (sig) | |
1644 | { | |
1645 | info.si_signo = sig; | |
1646 | info.si_errno = 0; | |
1647 | info.si_code = TARGET_TRAP_BRKPT; | |
1648 | queue_signal(info.si_signo, &info); | |
1649 | } | |
1650 | } | |
1651 | break; | |
1652 | default: | |
1653 | printf ("Unhandled trap: 0x%x\n", trapnr); | |
1654 | cpu_dump_state(env, stderr, fprintf, 0); | |
1655 | exit (1); | |
1656 | } | |
1657 | process_pending_signals (env); | |
1658 | } | |
1659 | } | |
1660 | #endif | |
1661 | ||
e6e5906b PB |
1662 | #ifdef TARGET_M68K |
1663 | ||
1664 | void cpu_loop(CPUM68KState *env) | |
1665 | { | |
1666 | int trapnr; | |
1667 | unsigned int n; | |
1668 | target_siginfo_t info; | |
1669 | TaskState *ts = env->opaque; | |
3b46e624 | 1670 | |
e6e5906b PB |
1671 | for(;;) { |
1672 | trapnr = cpu_m68k_exec(env); | |
1673 | switch(trapnr) { | |
1674 | case EXCP_ILLEGAL: | |
1675 | { | |
1676 | if (ts->sim_syscalls) { | |
1677 | uint16_t nr; | |
1678 | nr = lduw(env->pc + 2); | |
1679 | env->pc += 4; | |
1680 | do_m68k_simcall(env, nr); | |
1681 | } else { | |
1682 | goto do_sigill; | |
1683 | } | |
1684 | } | |
1685 | break; | |
a87295e8 | 1686 | case EXCP_HALT_INSN: |
e6e5906b | 1687 | /* Semihosing syscall. */ |
a87295e8 | 1688 | env->pc += 4; |
e6e5906b PB |
1689 | do_m68k_semihosting(env, env->dregs[0]); |
1690 | break; | |
1691 | case EXCP_LINEA: | |
1692 | case EXCP_LINEF: | |
1693 | case EXCP_UNSUPPORTED: | |
1694 | do_sigill: | |
1695 | info.si_signo = SIGILL; | |
1696 | info.si_errno = 0; | |
1697 | info.si_code = TARGET_ILL_ILLOPN; | |
1698 | info._sifields._sigfault._addr = env->pc; | |
1699 | queue_signal(info.si_signo, &info); | |
1700 | break; | |
1701 | case EXCP_TRAP0: | |
1702 | { | |
1703 | ts->sim_syscalls = 0; | |
1704 | n = env->dregs[0]; | |
1705 | env->pc += 2; | |
5fafdf24 TS |
1706 | env->dregs[0] = do_syscall(env, |
1707 | n, | |
e6e5906b PB |
1708 | env->dregs[1], |
1709 | env->dregs[2], | |
1710 | env->dregs[3], | |
1711 | env->dregs[4], | |
1712 | env->dregs[5], | |
1713 | env->dregs[6]); | |
1714 | } | |
1715 | break; | |
1716 | case EXCP_INTERRUPT: | |
1717 | /* just indicate that signals should be handled asap */ | |
1718 | break; | |
1719 | case EXCP_ACCESS: | |
1720 | { | |
1721 | info.si_signo = SIGSEGV; | |
1722 | info.si_errno = 0; | |
1723 | /* XXX: check env->error_code */ | |
1724 | info.si_code = TARGET_SEGV_MAPERR; | |
1725 | info._sifields._sigfault._addr = env->mmu.ar; | |
1726 | queue_signal(info.si_signo, &info); | |
1727 | } | |
1728 | break; | |
1729 | case EXCP_DEBUG: | |
1730 | { | |
1731 | int sig; | |
1732 | ||
1733 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
1734 | if (sig) | |
1735 | { | |
1736 | info.si_signo = sig; | |
1737 | info.si_errno = 0; | |
1738 | info.si_code = TARGET_TRAP_BRKPT; | |
1739 | queue_signal(info.si_signo, &info); | |
1740 | } | |
1741 | } | |
1742 | break; | |
1743 | default: | |
5fafdf24 | 1744 | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", |
e6e5906b PB |
1745 | trapnr); |
1746 | cpu_dump_state(env, stderr, fprintf, 0); | |
1747 | abort(); | |
1748 | } | |
1749 | process_pending_signals(env); | |
1750 | } | |
1751 | } | |
1752 | #endif /* TARGET_M68K */ | |
1753 | ||
7a3148a9 JM |
1754 | #ifdef TARGET_ALPHA |
1755 | void cpu_loop (CPUState *env) | |
1756 | { | |
e96efcfc | 1757 | int trapnr; |
7a3148a9 | 1758 | target_siginfo_t info; |
3b46e624 | 1759 | |
7a3148a9 JM |
1760 | while (1) { |
1761 | trapnr = cpu_alpha_exec (env); | |
3b46e624 | 1762 | |
7a3148a9 JM |
1763 | switch (trapnr) { |
1764 | case EXCP_RESET: | |
1765 | fprintf(stderr, "Reset requested. Exit\n"); | |
1766 | exit(1); | |
1767 | break; | |
1768 | case EXCP_MCHK: | |
1769 | fprintf(stderr, "Machine check exception. Exit\n"); | |
1770 | exit(1); | |
1771 | break; | |
1772 | case EXCP_ARITH: | |
1773 | fprintf(stderr, "Arithmetic trap.\n"); | |
1774 | exit(1); | |
1775 | break; | |
1776 | case EXCP_HW_INTERRUPT: | |
5fafdf24 | 1777 | fprintf(stderr, "External interrupt. Exit\n"); |
7a3148a9 JM |
1778 | exit(1); |
1779 | break; | |
1780 | case EXCP_DFAULT: | |
1781 | fprintf(stderr, "MMU data fault\n"); | |
1782 | exit(1); | |
1783 | break; | |
1784 | case EXCP_DTB_MISS_PAL: | |
1785 | fprintf(stderr, "MMU data TLB miss in PALcode\n"); | |
1786 | exit(1); | |
1787 | break; | |
1788 | case EXCP_ITB_MISS: | |
1789 | fprintf(stderr, "MMU instruction TLB miss\n"); | |
1790 | exit(1); | |
1791 | break; | |
1792 | case EXCP_ITB_ACV: | |
1793 | fprintf(stderr, "MMU instruction access violation\n"); | |
1794 | exit(1); | |
1795 | break; | |
1796 | case EXCP_DTB_MISS_NATIVE: | |
1797 | fprintf(stderr, "MMU data TLB miss\n"); | |
1798 | exit(1); | |
1799 | break; | |
1800 | case EXCP_UNALIGN: | |
1801 | fprintf(stderr, "Unaligned access\n"); | |
1802 | exit(1); | |
1803 | break; | |
1804 | case EXCP_OPCDEC: | |
1805 | fprintf(stderr, "Invalid instruction\n"); | |
1806 | exit(1); | |
1807 | break; | |
1808 | case EXCP_FEN: | |
1809 | fprintf(stderr, "Floating-point not allowed\n"); | |
1810 | exit(1); | |
1811 | break; | |
1812 | case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1): | |
1813 | fprintf(stderr, "Call to PALcode\n"); | |
1814 | call_pal(env, (trapnr >> 6) | 0x80); | |
1815 | break; | |
1816 | case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1): | |
7f75ffd3 | 1817 | fprintf(stderr, "Privileged call to PALcode\n"); |
7a3148a9 JM |
1818 | exit(1); |
1819 | break; | |
1820 | case EXCP_DEBUG: | |
1821 | { | |
1822 | int sig; | |
1823 | ||
1824 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
1825 | if (sig) | |
1826 | { | |
1827 | info.si_signo = sig; | |
1828 | info.si_errno = 0; | |
1829 | info.si_code = TARGET_TRAP_BRKPT; | |
1830 | queue_signal(info.si_signo, &info); | |
1831 | } | |
1832 | } | |
1833 | break; | |
1834 | default: | |
1835 | printf ("Unhandled trap: 0x%x\n", trapnr); | |
1836 | cpu_dump_state(env, stderr, fprintf, 0); | |
1837 | exit (1); | |
1838 | } | |
1839 | process_pending_signals (env); | |
1840 | } | |
1841 | } | |
1842 | #endif /* TARGET_ALPHA */ | |
1843 | ||
31e31b8a FB |
1844 | void usage(void) |
1845 | { | |
84f2e8ef | 1846 | printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2007 Fabrice Bellard\n" |
b1f9be31 | 1847 | "usage: qemu-" TARGET_ARCH " [-h] [-g] [-d opts] [-L path] [-s size] [-cpu model] program [arguments...]\n" |
b346ff46 | 1848 | "Linux CPU emulator (compiled for %s emulation)\n" |
d691f669 | 1849 | "\n" |
b12b6a18 TS |
1850 | "-h print this help\n" |
1851 | "-g port wait gdb connection to port\n" | |
1852 | "-L path set the elf interpreter prefix (default=%s)\n" | |
1853 | "-s size set the stack size in bytes (default=%ld)\n" | |
1854 | "-cpu model select CPU (-cpu ? for list)\n" | |
1855 | "-drop-ld-preload drop LD_PRELOAD for target process\n" | |
54936004 FB |
1856 | "\n" |
1857 | "debug options:\n" | |
6f1f31c0 | 1858 | "-d options activate log (logfile=%s)\n" |
54936004 | 1859 | "-p pagesize set the host page size to 'pagesize'\n", |
b346ff46 | 1860 | TARGET_ARCH, |
5fafdf24 | 1861 | interp_prefix, |
54936004 FB |
1862 | x86_stack_size, |
1863 | DEBUG_LOGFILE); | |
74cd30b8 | 1864 | _exit(1); |
31e31b8a FB |
1865 | } |
1866 | ||
9de5e440 | 1867 | /* XXX: currently only used for async signals (see signal.c) */ |
b346ff46 | 1868 | CPUState *global_env; |
59faf6d6 | 1869 | |
851e67a1 FB |
1870 | /* used to free thread contexts */ |
1871 | TaskState *first_task_state; | |
9de5e440 | 1872 | |
31e31b8a FB |
1873 | int main(int argc, char **argv) |
1874 | { | |
1875 | const char *filename; | |
b1f9be31 | 1876 | const char *cpu_model; |
01ffc75b | 1877 | struct target_pt_regs regs1, *regs = ®s1; |
31e31b8a | 1878 | struct image_info info1, *info = &info1; |
851e67a1 | 1879 | TaskState ts1, *ts = &ts1; |
b346ff46 | 1880 | CPUState *env; |
586314f2 | 1881 | int optind; |
d691f669 | 1882 | const char *r; |
74c33bed | 1883 | int gdbstub_port = 0; |
b12b6a18 TS |
1884 | int drop_ld_preload = 0, environ_count = 0; |
1885 | char **target_environ, **wrk, **dst; | |
1886 | ||
31e31b8a FB |
1887 | if (argc <= 1) |
1888 | usage(); | |
f801f97e | 1889 | |
cc38b844 FB |
1890 | /* init debug */ |
1891 | cpu_set_log_filename(DEBUG_LOGFILE); | |
1892 | ||
b1f9be31 | 1893 | cpu_model = NULL; |
586314f2 | 1894 | optind = 1; |
d691f669 FB |
1895 | for(;;) { |
1896 | if (optind >= argc) | |
1897 | break; | |
1898 | r = argv[optind]; | |
1899 | if (r[0] != '-') | |
1900 | break; | |
586314f2 | 1901 | optind++; |
d691f669 FB |
1902 | r++; |
1903 | if (!strcmp(r, "-")) { | |
1904 | break; | |
1905 | } else if (!strcmp(r, "d")) { | |
e19e89a5 FB |
1906 | int mask; |
1907 | CPULogItem *item; | |
6f1f31c0 FB |
1908 | |
1909 | if (optind >= argc) | |
1910 | break; | |
3b46e624 | 1911 | |
6f1f31c0 FB |
1912 | r = argv[optind++]; |
1913 | mask = cpu_str_to_log_mask(r); | |
e19e89a5 FB |
1914 | if (!mask) { |
1915 | printf("Log items (comma separated):\n"); | |
1916 | for(item = cpu_log_items; item->mask != 0; item++) { | |
1917 | printf("%-10s %s\n", item->name, item->help); | |
1918 | } | |
1919 | exit(1); | |
1920 | } | |
1921 | cpu_set_log(mask); | |
d691f669 FB |
1922 | } else if (!strcmp(r, "s")) { |
1923 | r = argv[optind++]; | |
1924 | x86_stack_size = strtol(r, (char **)&r, 0); | |
1925 | if (x86_stack_size <= 0) | |
1926 | usage(); | |
1927 | if (*r == 'M') | |
1928 | x86_stack_size *= 1024 * 1024; | |
1929 | else if (*r == 'k' || *r == 'K') | |
1930 | x86_stack_size *= 1024; | |
1931 | } else if (!strcmp(r, "L")) { | |
1932 | interp_prefix = argv[optind++]; | |
54936004 | 1933 | } else if (!strcmp(r, "p")) { |
83fb7adf FB |
1934 | qemu_host_page_size = atoi(argv[optind++]); |
1935 | if (qemu_host_page_size == 0 || | |
1936 | (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) { | |
54936004 FB |
1937 | fprintf(stderr, "page size must be a power of two\n"); |
1938 | exit(1); | |
1939 | } | |
1fddef4b | 1940 | } else if (!strcmp(r, "g")) { |
74c33bed | 1941 | gdbstub_port = atoi(argv[optind++]); |
c5937220 PB |
1942 | } else if (!strcmp(r, "r")) { |
1943 | qemu_uname_release = argv[optind++]; | |
b1f9be31 JM |
1944 | } else if (!strcmp(r, "cpu")) { |
1945 | cpu_model = argv[optind++]; | |
1946 | if (strcmp(cpu_model, "?") == 0) { | |
c732abe2 JM |
1947 | /* XXX: implement xxx_cpu_list for targets that still miss it */ |
1948 | #if defined(cpu_list) | |
1949 | cpu_list(stdout, &fprintf); | |
b1f9be31 | 1950 | #endif |
cff4cbed | 1951 | _exit(1); |
b1f9be31 | 1952 | } |
b12b6a18 TS |
1953 | } else if (!strcmp(r, "drop-ld-preload")) { |
1954 | drop_ld_preload = 1; | |
5fafdf24 | 1955 | } else |
c6981055 | 1956 | { |
d691f669 FB |
1957 | usage(); |
1958 | } | |
586314f2 | 1959 | } |
d691f669 FB |
1960 | if (optind >= argc) |
1961 | usage(); | |
586314f2 FB |
1962 | filename = argv[optind]; |
1963 | ||
31e31b8a | 1964 | /* Zero out regs */ |
01ffc75b | 1965 | memset(regs, 0, sizeof(struct target_pt_regs)); |
31e31b8a FB |
1966 | |
1967 | /* Zero out image_info */ | |
1968 | memset(info, 0, sizeof(struct image_info)); | |
1969 | ||
74cd30b8 FB |
1970 | /* Scan interp_prefix dir for replacement files. */ |
1971 | init_paths(interp_prefix); | |
1972 | ||
46027c07 FB |
1973 | #if defined(TARGET_I386) |
1974 | /* must be done before cpu_init() for x86 XXX: suppress this hack | |
1975 | by adding a new parameter to cpu_init and by suppressing | |
1976 | cpu_xxx_register() */ | |
1977 | if (cpu_model == NULL) { | |
1978 | #ifdef TARGET_X86_64 | |
1979 | cpu_model = "qemu64"; | |
1980 | #else | |
1981 | cpu_model = "qemu32"; | |
1982 | #endif | |
1983 | } | |
1984 | if (x86_find_cpu_by_name(cpu_model)) { | |
1985 | fprintf(stderr, "Unable to find x86 CPU definition\n"); | |
1986 | exit(1); | |
1987 | } | |
1988 | #endif | |
1989 | ||
83fb7adf FB |
1990 | /* NOTE: we need to init the CPU at this stage to get |
1991 | qemu_host_page_size */ | |
b346ff46 | 1992 | env = cpu_init(); |
15338fd7 | 1993 | global_env = env; |
3b46e624 | 1994 | |
b92c47c1 TS |
1995 | if(getenv("QEMU_STRACE") ){ |
1996 | do_strace=1; | |
1997 | } | |
1998 | ||
b12b6a18 TS |
1999 | wrk = environ; |
2000 | while (*(wrk++)) | |
2001 | environ_count++; | |
2002 | ||
2003 | target_environ = malloc((environ_count + 1) * sizeof(char *)); | |
2004 | if (!target_environ) | |
2005 | abort(); | |
2006 | for (wrk = environ, dst = target_environ; *wrk; wrk++) { | |
2007 | if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11)) | |
2008 | continue; | |
2009 | *(dst++) = strdup(*wrk); | |
2010 | } | |
403f14ef | 2011 | *dst = NULL; /* NULL terminate target_environ */ |
b12b6a18 TS |
2012 | |
2013 | if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) { | |
2014 | printf("Error loading %s\n", filename); | |
2015 | _exit(1); | |
2016 | } | |
2017 | ||
2018 | for (wrk = target_environ; *wrk; wrk++) { | |
2019 | free(*wrk); | |
31e31b8a | 2020 | } |
3b46e624 | 2021 | |
b12b6a18 TS |
2022 | free(target_environ); |
2023 | ||
4b74fe1f | 2024 | if (loglevel) { |
54936004 | 2025 | page_dump(logfile); |
3b46e624 | 2026 | |
3d177870 JM |
2027 | fprintf(logfile, "start_brk 0x" TARGET_FMT_lx "\n", info->start_brk); |
2028 | fprintf(logfile, "end_code 0x" TARGET_FMT_lx "\n", info->end_code); | |
2029 | fprintf(logfile, "start_code 0x" TARGET_FMT_lx "\n", | |
2030 | info->start_code); | |
2031 | fprintf(logfile, "start_data 0x" TARGET_FMT_lx "\n", | |
2032 | info->start_data); | |
2033 | fprintf(logfile, "end_data 0x" TARGET_FMT_lx "\n", info->end_data); | |
2034 | fprintf(logfile, "start_stack 0x" TARGET_FMT_lx "\n", | |
2035 | info->start_stack); | |
2036 | fprintf(logfile, "brk 0x" TARGET_FMT_lx "\n", info->brk); | |
2037 | fprintf(logfile, "entry 0x" TARGET_FMT_lx "\n", info->entry); | |
4b74fe1f | 2038 | } |
31e31b8a | 2039 | |
53a5960a | 2040 | target_set_brk(info->brk); |
31e31b8a | 2041 | syscall_init(); |
66fb9763 | 2042 | signal_init(); |
31e31b8a | 2043 | |
851e67a1 FB |
2044 | /* build Task State */ |
2045 | memset(ts, 0, sizeof(TaskState)); | |
2046 | env->opaque = ts; | |
2047 | ts->used = 1; | |
978efd6a | 2048 | ts->info = info; |
59faf6d6 | 2049 | env->user_mode_only = 1; |
3b46e624 | 2050 | |
b346ff46 | 2051 | #if defined(TARGET_I386) |
2e255c6b FB |
2052 | cpu_x86_set_cpl(env, 3); |
2053 | ||
3802ce26 | 2054 | env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; |
1bde465e FB |
2055 | env->hflags |= HF_PE_MASK; |
2056 | if (env->cpuid_features & CPUID_SSE) { | |
2057 | env->cr[4] |= CR4_OSFXSR_MASK; | |
2058 | env->hflags |= HF_OSFXSR_MASK; | |
2059 | } | |
2060 | ||
415e561f FB |
2061 | /* flags setup : we activate the IRQs by default as in user mode */ |
2062 | env->eflags |= IF_MASK; | |
3b46e624 | 2063 | |
6dbad63e | 2064 | /* linux register setup */ |
84409ddb JM |
2065 | #if defined(TARGET_X86_64) |
2066 | env->regs[R_EAX] = regs->rax; | |
2067 | env->regs[R_EBX] = regs->rbx; | |
2068 | env->regs[R_ECX] = regs->rcx; | |
2069 | env->regs[R_EDX] = regs->rdx; | |
2070 | env->regs[R_ESI] = regs->rsi; | |
2071 | env->regs[R_EDI] = regs->rdi; | |
2072 | env->regs[R_EBP] = regs->rbp; | |
2073 | env->regs[R_ESP] = regs->rsp; | |
2074 | env->eip = regs->rip; | |
2075 | #else | |
0ecfa993 FB |
2076 | env->regs[R_EAX] = regs->eax; |
2077 | env->regs[R_EBX] = regs->ebx; | |
2078 | env->regs[R_ECX] = regs->ecx; | |
2079 | env->regs[R_EDX] = regs->edx; | |
2080 | env->regs[R_ESI] = regs->esi; | |
2081 | env->regs[R_EDI] = regs->edi; | |
2082 | env->regs[R_EBP] = regs->ebp; | |
2083 | env->regs[R_ESP] = regs->esp; | |
dab2ed99 | 2084 | env->eip = regs->eip; |
84409ddb | 2085 | #endif |
31e31b8a | 2086 | |
f4beb510 | 2087 | /* linux interrupt setup */ |
53a5960a | 2088 | env->idt.base = h2g(idt_table); |
f4beb510 FB |
2089 | env->idt.limit = sizeof(idt_table) - 1; |
2090 | set_idt(0, 0); | |
2091 | set_idt(1, 0); | |
2092 | set_idt(2, 0); | |
2093 | set_idt(3, 3); | |
2094 | set_idt(4, 3); | |
2095 | set_idt(5, 3); | |
2096 | set_idt(6, 0); | |
2097 | set_idt(7, 0); | |
2098 | set_idt(8, 0); | |
2099 | set_idt(9, 0); | |
2100 | set_idt(10, 0); | |
2101 | set_idt(11, 0); | |
2102 | set_idt(12, 0); | |
2103 | set_idt(13, 0); | |
2104 | set_idt(14, 0); | |
2105 | set_idt(15, 0); | |
2106 | set_idt(16, 0); | |
2107 | set_idt(17, 0); | |
2108 | set_idt(18, 0); | |
2109 | set_idt(19, 0); | |
2110 | set_idt(0x80, 3); | |
2111 | ||
6dbad63e | 2112 | /* linux segment setup */ |
53a5960a | 2113 | env->gdt.base = h2g(gdt_table); |
6dbad63e | 2114 | env->gdt.limit = sizeof(gdt_table) - 1; |
f4beb510 | 2115 | write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, |
5fafdf24 | 2116 | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
f4beb510 FB |
2117 | (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); |
2118 | write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff, | |
5fafdf24 | 2119 | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
f4beb510 | 2120 | (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT)); |
6dbad63e FB |
2121 | cpu_x86_load_seg(env, R_CS, __USER_CS); |
2122 | cpu_x86_load_seg(env, R_DS, __USER_DS); | |
2123 | cpu_x86_load_seg(env, R_ES, __USER_DS); | |
2124 | cpu_x86_load_seg(env, R_SS, __USER_DS); | |
2125 | cpu_x86_load_seg(env, R_FS, __USER_DS); | |
2126 | cpu_x86_load_seg(env, R_GS, __USER_DS); | |
92ccca6a | 2127 | |
d6eb40f6 TS |
2128 | /* This hack makes Wine work... */ |
2129 | env->segs[R_FS].selector = 0; | |
b346ff46 FB |
2130 | #elif defined(TARGET_ARM) |
2131 | { | |
2132 | int i; | |
b1f9be31 JM |
2133 | if (cpu_model == NULL) |
2134 | cpu_model = "arm926"; | |
2135 | cpu_arm_set_model(env, cpu_model); | |
b5ff1b31 | 2136 | cpsr_write(env, regs->uregs[16], 0xffffffff); |
b346ff46 FB |
2137 | for(i = 0; i < 16; i++) { |
2138 | env->regs[i] = regs->uregs[i]; | |
2139 | } | |
b346ff46 | 2140 | } |
93ac68bc | 2141 | #elif defined(TARGET_SPARC) |
060366c5 FB |
2142 | { |
2143 | int i; | |
925fb139 BS |
2144 | const sparc_def_t *def; |
2145 | #ifdef TARGET_SPARC64 | |
2146 | if (cpu_model == NULL) | |
2147 | cpu_model = "TI UltraSparc II"; | |
2148 | #else | |
2149 | if (cpu_model == NULL) | |
2150 | cpu_model = "Fujitsu MB86904"; | |
2151 | #endif | |
2152 | sparc_find_by_name(cpu_model, &def); | |
2153 | if (def == NULL) { | |
2154 | fprintf(stderr, "Unable to find Sparc CPU definition\n"); | |
2155 | exit(1); | |
2156 | } | |
952a328f | 2157 | cpu_sparc_register(env, def, 0); |
060366c5 FB |
2158 | env->pc = regs->pc; |
2159 | env->npc = regs->npc; | |
2160 | env->y = regs->y; | |
2161 | for(i = 0; i < 8; i++) | |
2162 | env->gregs[i] = regs->u_regs[i]; | |
2163 | for(i = 0; i < 8; i++) | |
2164 | env->regwptr[i] = regs->u_regs[i + 8]; | |
2165 | } | |
67867308 FB |
2166 | #elif defined(TARGET_PPC) |
2167 | { | |
3fc6c082 | 2168 | ppc_def_t *def; |
67867308 | 2169 | int i; |
3fc6c082 FB |
2170 | |
2171 | /* Choose and initialise CPU */ | |
b1f9be31 JM |
2172 | if (cpu_model == NULL) |
2173 | cpu_model = "750"; | |
2174 | ppc_find_by_name(cpu_model, &def); | |
3fc6c082 | 2175 | if (def == NULL) { |
c68ea704 | 2176 | cpu_abort(env, |
3fc6c082 FB |
2177 | "Unable to find PowerPC CPU definition\n"); |
2178 | } | |
c68ea704 | 2179 | cpu_ppc_register(env, def); |
1cc8e6f0 | 2180 | cpu_ppc_reset(env); |
0411a972 JM |
2181 | #if defined(TARGET_PPC64) |
2182 | #if defined(TARGET_ABI32) | |
2183 | env->msr &= ~((target_ulong)1 << MSR_SF); | |
e85e7c6e | 2184 | #else |
0411a972 JM |
2185 | env->msr |= (target_ulong)1 << MSR_SF; |
2186 | #endif | |
84409ddb | 2187 | #endif |
67867308 FB |
2188 | env->nip = regs->nip; |
2189 | for(i = 0; i < 32; i++) { | |
2190 | env->gpr[i] = regs->gpr[i]; | |
2191 | } | |
2192 | } | |
e6e5906b PB |
2193 | #elif defined(TARGET_M68K) |
2194 | { | |
0633879f | 2195 | if (cpu_model == NULL) |
0402f767 | 2196 | cpu_model = "any"; |
0633879f | 2197 | if (cpu_m68k_set_model(env, cpu_model)) { |
e6e5906b PB |
2198 | cpu_abort(cpu_single_env, |
2199 | "Unable to find m68k CPU definition\n"); | |
2200 | } | |
e6e5906b PB |
2201 | env->pc = regs->pc; |
2202 | env->dregs[0] = regs->d0; | |
2203 | env->dregs[1] = regs->d1; | |
2204 | env->dregs[2] = regs->d2; | |
2205 | env->dregs[3] = regs->d3; | |
2206 | env->dregs[4] = regs->d4; | |
2207 | env->dregs[5] = regs->d5; | |
2208 | env->dregs[6] = regs->d6; | |
2209 | env->dregs[7] = regs->d7; | |
2210 | env->aregs[0] = regs->a0; | |
2211 | env->aregs[1] = regs->a1; | |
2212 | env->aregs[2] = regs->a2; | |
2213 | env->aregs[3] = regs->a3; | |
2214 | env->aregs[4] = regs->a4; | |
2215 | env->aregs[5] = regs->a5; | |
2216 | env->aregs[6] = regs->a6; | |
2217 | env->aregs[7] = regs->usp; | |
2218 | env->sr = regs->sr; | |
2219 | ts->sim_syscalls = 1; | |
2220 | } | |
048f6b4d FB |
2221 | #elif defined(TARGET_MIPS) |
2222 | { | |
cff4cbed | 2223 | mips_def_t *def; |
048f6b4d FB |
2224 | int i; |
2225 | ||
cff4cbed TS |
2226 | /* Choose and initialise CPU */ |
2227 | if (cpu_model == NULL) | |
d26bc211 | 2228 | #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64) |
540635ba TS |
2229 | cpu_model = "20Kc"; |
2230 | #else | |
cff4cbed | 2231 | cpu_model = "24Kf"; |
540635ba | 2232 | #endif |
cff4cbed TS |
2233 | mips_find_by_name(cpu_model, &def); |
2234 | if (def == NULL) | |
2235 | cpu_abort(env, "Unable to find MIPS CPU definition\n"); | |
2236 | cpu_mips_register(env, def); | |
2237 | ||
048f6b4d | 2238 | for(i = 0; i < 32; i++) { |
ead9360e | 2239 | env->gpr[i][env->current_tc] = regs->regs[i]; |
048f6b4d | 2240 | } |
ead9360e | 2241 | env->PC[env->current_tc] = regs->cp0_epc; |
048f6b4d | 2242 | } |
fdf9b3e8 FB |
2243 | #elif defined(TARGET_SH4) |
2244 | { | |
2245 | int i; | |
2246 | ||
2247 | for(i = 0; i < 16; i++) { | |
2248 | env->gregs[i] = regs->regs[i]; | |
2249 | } | |
2250 | env->pc = regs->pc; | |
2251 | } | |
7a3148a9 JM |
2252 | #elif defined(TARGET_ALPHA) |
2253 | { | |
2254 | int i; | |
2255 | ||
2256 | for(i = 0; i < 28; i++) { | |
992f48a0 | 2257 | env->ir[i] = ((abi_ulong *)regs)[i]; |
7a3148a9 JM |
2258 | } |
2259 | env->ipr[IPR_USP] = regs->usp; | |
2260 | env->ir[30] = regs->usp; | |
2261 | env->pc = regs->pc; | |
2262 | env->unique = regs->unique; | |
2263 | } | |
48733d19 TS |
2264 | #elif defined(TARGET_CRIS) |
2265 | { | |
2266 | env->regs[0] = regs->r0; | |
2267 | env->regs[1] = regs->r1; | |
2268 | env->regs[2] = regs->r2; | |
2269 | env->regs[3] = regs->r3; | |
2270 | env->regs[4] = regs->r4; | |
2271 | env->regs[5] = regs->r5; | |
2272 | env->regs[6] = regs->r6; | |
2273 | env->regs[7] = regs->r7; | |
2274 | env->regs[8] = regs->r8; | |
2275 | env->regs[9] = regs->r9; | |
2276 | env->regs[10] = regs->r10; | |
2277 | env->regs[11] = regs->r11; | |
2278 | env->regs[12] = regs->r12; | |
2279 | env->regs[13] = regs->r13; | |
2280 | env->regs[14] = info->start_stack; | |
2281 | env->regs[15] = regs->acr; | |
2282 | env->pc = regs->erp; | |
2283 | } | |
b346ff46 FB |
2284 | #else |
2285 | #error unsupported target CPU | |
2286 | #endif | |
31e31b8a | 2287 | |
a87295e8 PB |
2288 | #if defined(TARGET_ARM) || defined(TARGET_M68K) |
2289 | ts->stack_base = info->start_stack; | |
2290 | ts->heap_base = info->brk; | |
2291 | /* This will be filled in on the first SYS_HEAPINFO call. */ | |
2292 | ts->heap_limit = 0; | |
2293 | #endif | |
2294 | ||
74c33bed FB |
2295 | if (gdbstub_port) { |
2296 | gdbserver_start (gdbstub_port); | |
1fddef4b FB |
2297 | gdb_handlesig(env, 0); |
2298 | } | |
1b6b029e FB |
2299 | cpu_loop(env); |
2300 | /* never exits */ | |
31e31b8a FB |
2301 | return 0; |
2302 | } |