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cd71c089 LV |
1 | /* |
2 | * qemu user cpu loop | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include "qemu/osdep.h" | |
a8d25326 | 21 | #include "qemu-common.h" |
cd71c089 | 22 | #include "qemu.h" |
3b249d26 | 23 | #include "user-internals.h" |
cd71c089 | 24 | #include "cpu_loop-common.h" |
2113aed6 | 25 | #include "signal-common.h" |
cd71c089 | 26 | |
1ef7bca2 LV |
27 | void cpu_loop(CPUOpenRISCState *env) |
28 | { | |
5ee2b02e | 29 | CPUState *cs = env_cpu(env); |
1ef7bca2 LV |
30 | int trapnr; |
31 | abi_long ret; | |
32 | target_siginfo_t info; | |
33 | ||
34 | for (;;) { | |
35 | cpu_exec_start(cs); | |
36 | trapnr = cpu_exec(cs); | |
37 | cpu_exec_end(cs); | |
38 | process_queued_cpu_work(cs); | |
39 | ||
40 | switch (trapnr) { | |
41 | case EXCP_SYSCALL: | |
42 | env->pc += 4; /* 0xc00; */ | |
43 | ret = do_syscall(env, | |
44 | cpu_get_gpr(env, 11), /* return value */ | |
45 | cpu_get_gpr(env, 3), /* r3 - r7 are params */ | |
46 | cpu_get_gpr(env, 4), | |
47 | cpu_get_gpr(env, 5), | |
48 | cpu_get_gpr(env, 6), | |
49 | cpu_get_gpr(env, 7), | |
50 | cpu_get_gpr(env, 8), 0, 0); | |
af254a27 | 51 | if (ret == -QEMU_ERESTARTSYS) { |
1ef7bca2 | 52 | env->pc -= 4; |
57a0c938 | 53 | } else if (ret != -QEMU_ESIGRETURN) { |
1ef7bca2 LV |
54 | cpu_set_gpr(env, 11, ret); |
55 | } | |
56 | break; | |
1ef7bca2 LV |
57 | case EXCP_ALIGN: |
58 | info.si_signo = TARGET_SIGBUS; | |
59 | info.si_errno = 0; | |
60 | info.si_code = TARGET_BUS_ADRALN; | |
61 | info._sifields._sigfault._addr = env->pc; | |
62 | queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); | |
63 | break; | |
64 | case EXCP_ILLEGAL: | |
65 | info.si_signo = TARGET_SIGILL; | |
66 | info.si_errno = 0; | |
67 | info.si_code = TARGET_ILL_ILLOPC; | |
68 | info._sifields._sigfault._addr = env->pc; | |
69 | queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); | |
70 | break; | |
1ef7bca2 LV |
71 | case EXCP_INTERRUPT: |
72 | /* We processed the pending cpu work above. */ | |
73 | break; | |
74 | case EXCP_DEBUG: | |
b10089a1 PM |
75 | info.si_signo = TARGET_SIGTRAP; |
76 | info.si_errno = 0; | |
77 | info.si_code = TARGET_TRAP_BRKPT; | |
78 | queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); | |
1ef7bca2 LV |
79 | break; |
80 | case EXCP_ATOMIC: | |
81 | cpu_exec_step_atomic(cs); | |
82 | break; | |
d315712b RH |
83 | case EXCP_RANGE: |
84 | /* Requires SR.OVE set, which linux-user won't do. */ | |
85 | cpu_abort(cs, "Unexpected RANGE exception"); | |
86 | case EXCP_FPE: | |
87 | /* | |
88 | * Requires FPSCR.FPEE set. Writes to FPSCR from usermode not | |
89 | * yet enabled in kernel ABI, so linux-user does not either. | |
90 | */ | |
91 | cpu_abort(cs, "Unexpected FPE exception"); | |
1ef7bca2 LV |
92 | default: |
93 | g_assert_not_reached(); | |
94 | } | |
95 | process_pending_signals(env); | |
96 | } | |
97 | } | |
98 | ||
cd71c089 LV |
99 | void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) |
100 | { | |
1ef7bca2 LV |
101 | int i; |
102 | ||
103 | for (i = 0; i < 32; i++) { | |
104 | cpu_set_gpr(env, i, regs->gpr[i]); | |
105 | } | |
106 | env->pc = regs->pc; | |
107 | cpu_set_sr(env, regs->sr); | |
cd71c089 | 108 | } |