]>
Commit | Line | Data |
---|---|---|
cd71c089 LV |
1 | /* |
2 | * qemu user cpu loop | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include "qemu/osdep.h" | |
a8d25326 | 21 | #include "qemu-common.h" |
cd71c089 LV |
22 | #include "qemu.h" |
23 | #include "cpu_loop-common.h" | |
24 | ||
a5fd8ee1 LV |
25 | /* s390x masks the fault address it reports in si_addr for SIGSEGV and SIGBUS */ |
26 | #define S390X_FAIL_ADDR_MASK -4096LL | |
27 | ||
28 | void cpu_loop(CPUS390XState *env) | |
29 | { | |
dc79e928 | 30 | CPUState *cs = env_cpu(env); |
a5fd8ee1 LV |
31 | int trapnr, n, sig; |
32 | target_siginfo_t info; | |
33 | target_ulong addr; | |
34 | abi_long ret; | |
35 | ||
36 | while (1) { | |
37 | cpu_exec_start(cs); | |
38 | trapnr = cpu_exec(cs); | |
39 | cpu_exec_end(cs); | |
40 | process_queued_cpu_work(cs); | |
41 | ||
42 | switch (trapnr) { | |
43 | case EXCP_INTERRUPT: | |
44 | /* Just indicate that signals should be handled asap. */ | |
45 | break; | |
46 | ||
47 | case EXCP_SVC: | |
48 | n = env->int_svc_code; | |
49 | if (!n) { | |
50 | /* syscalls > 255 */ | |
51 | n = env->regs[1]; | |
52 | } | |
53 | env->psw.addr += env->int_svc_ilen; | |
54 | ret = do_syscall(env, n, env->regs[2], env->regs[3], | |
55 | env->regs[4], env->regs[5], | |
56 | env->regs[6], env->regs[7], 0, 0); | |
57 | if (ret == -TARGET_ERESTARTSYS) { | |
58 | env->psw.addr -= env->int_svc_ilen; | |
59 | } else if (ret != -TARGET_QEMU_ESIGRETURN) { | |
60 | env->regs[2] = ret; | |
61 | } | |
62 | break; | |
63 | ||
64 | case EXCP_DEBUG: | |
b10089a1 PM |
65 | sig = TARGET_SIGTRAP; |
66 | n = TARGET_TRAP_BRKPT; | |
54ba2161 IL |
67 | /* |
68 | * For SIGTRAP the PSW must point after the instruction, which it | |
69 | * already does thanks to s390x_tr_tb_stop(). si_addr doesn't need | |
70 | * to be filled. | |
71 | */ | |
72 | addr = 0; | |
73 | goto do_signal; | |
a5fd8ee1 LV |
74 | case EXCP_PGM: |
75 | n = env->int_pgm_code; | |
76 | switch (n) { | |
77 | case PGM_OPERATION: | |
78 | case PGM_PRIVILEGED: | |
79 | sig = TARGET_SIGILL; | |
80 | n = TARGET_ILL_ILLOPC; | |
81 | goto do_signal_pc; | |
82 | case PGM_PROTECTION: | |
83 | case PGM_ADDRESSING: | |
84 | sig = TARGET_SIGSEGV; | |
85 | /* XXX: check env->error_code */ | |
86 | n = TARGET_SEGV_MAPERR; | |
87 | addr = env->__excp_addr & S390X_FAIL_ADDR_MASK; | |
88 | goto do_signal; | |
89 | case PGM_EXECUTE: | |
90 | case PGM_SPECIFICATION: | |
91 | case PGM_SPECIAL_OP: | |
92 | case PGM_OPERAND: | |
93 | do_sigill_opn: | |
94 | sig = TARGET_SIGILL; | |
95 | n = TARGET_ILL_ILLOPN; | |
96 | goto do_signal_pc; | |
97 | ||
98 | case PGM_FIXPT_OVERFLOW: | |
99 | sig = TARGET_SIGFPE; | |
100 | n = TARGET_FPE_INTOVF; | |
101 | goto do_signal_pc; | |
102 | case PGM_FIXPT_DIVIDE: | |
103 | sig = TARGET_SIGFPE; | |
104 | n = TARGET_FPE_INTDIV; | |
105 | goto do_signal_pc; | |
106 | ||
107 | case PGM_DATA: | |
108 | n = (env->fpc >> 8) & 0xff; | |
109 | if (n == 0xff) { | |
110 | /* compare-and-trap */ | |
111 | goto do_sigill_opn; | |
112 | } else { | |
113 | /* An IEEE exception, simulated or otherwise. */ | |
114 | if (n & 0x80) { | |
115 | n = TARGET_FPE_FLTINV; | |
116 | } else if (n & 0x40) { | |
117 | n = TARGET_FPE_FLTDIV; | |
118 | } else if (n & 0x20) { | |
119 | n = TARGET_FPE_FLTOVF; | |
120 | } else if (n & 0x10) { | |
121 | n = TARGET_FPE_FLTUND; | |
122 | } else if (n & 0x08) { | |
123 | n = TARGET_FPE_FLTRES; | |
124 | } else { | |
125 | /* ??? Quantum exception; BFP, DFP error. */ | |
126 | goto do_sigill_opn; | |
127 | } | |
128 | sig = TARGET_SIGFPE; | |
129 | goto do_signal_pc; | |
130 | } | |
131 | ||
132 | default: | |
133 | fprintf(stderr, "Unhandled program exception: %#x\n", n); | |
90c84c56 | 134 | cpu_dump_state(cs, stderr, 0); |
a5fd8ee1 LV |
135 | exit(EXIT_FAILURE); |
136 | } | |
137 | break; | |
138 | ||
139 | do_signal_pc: | |
140 | addr = env->psw.addr; | |
54ba2161 IL |
141 | /* |
142 | * For SIGILL and SIGFPE the PSW must point after the instruction. | |
143 | */ | |
144 | env->psw.addr += env->int_pgm_ilen; | |
a5fd8ee1 LV |
145 | do_signal: |
146 | info.si_signo = sig; | |
147 | info.si_errno = 0; | |
148 | info.si_code = n; | |
149 | info._sifields._sigfault._addr = addr; | |
150 | queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); | |
151 | break; | |
152 | ||
153 | case EXCP_ATOMIC: | |
154 | cpu_exec_step_atomic(cs); | |
155 | break; | |
156 | default: | |
157 | fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr); | |
90c84c56 | 158 | cpu_dump_state(cs, stderr, 0); |
a5fd8ee1 LV |
159 | exit(EXIT_FAILURE); |
160 | } | |
161 | process_pending_signals (env); | |
162 | } | |
163 | } | |
164 | ||
cd71c089 LV |
165 | void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) |
166 | { | |
a5fd8ee1 LV |
167 | int i; |
168 | for (i = 0; i < 16; i++) { | |
169 | env->regs[i] = regs->gprs[i]; | |
170 | } | |
171 | env->psw.mask = regs->psw.mask; | |
172 | env->psw.addr = regs->psw.addr; | |
cd71c089 | 173 | } |