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dd086d18 FE |
1 | From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 |
2 | From: Alex Deucher <alexander.deucher@amd.com> | |
3 | Date: Fri, 27 Oct 2023 16:40:47 -0400 | |
4 | Subject: [PATCH] drm/amd: Fix UBSAN array-index-out-of-bounds for Powerplay | |
5 | headers | |
6 | MIME-Version: 1.0 | |
7 | Content-Type: text/plain; charset=UTF-8 | |
8 | Content-Transfer-Encoding: 8bit | |
9 | ||
10 | For pptable structs that use flexible array sizes, use flexible arrays. | |
11 | ||
12 | Link: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/2039926 | |
13 | Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> | |
14 | Acked-by: Christian König <christian.koenig@amd.com> | |
15 | Signed-off-by: Alex Deucher <alexander.deucher@amd.com> | |
16 | (cherry-picked from commit 49afe91370b86566857a3c2c39612cf098110885) | |
17 | Signed-off-by: Fiona Ebner <f.ebner@proxmox.com> | |
18 | --- | |
19 | .../drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h | 4 ++-- | |
20 | .../amd/pm/powerplay/hwmgr/vega10_pptable.h | 24 +++++++++---------- | |
21 | 2 files changed, 14 insertions(+), 14 deletions(-) | |
22 | ||
23 | diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h | |
24 | index e0e40b054c08..5ec564dbf339 100644 | |
25 | --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h | |
26 | +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h | |
27 | @@ -367,7 +367,7 @@ typedef struct _ATOM_Tonga_VCE_State_Record { | |
28 | typedef struct _ATOM_Tonga_VCE_State_Table { | |
29 | UCHAR ucRevId; | |
30 | UCHAR ucNumEntries; | |
31 | - ATOM_Tonga_VCE_State_Record entries[1]; | |
32 | + ATOM_Tonga_VCE_State_Record entries[]; | |
33 | } ATOM_Tonga_VCE_State_Table; | |
34 | ||
35 | typedef struct _ATOM_Tonga_PowerTune_Table { | |
36 | @@ -482,7 +482,7 @@ typedef struct _ATOM_Tonga_Hard_Limit_Record { | |
37 | typedef struct _ATOM_Tonga_Hard_Limit_Table { | |
38 | UCHAR ucRevId; | |
39 | UCHAR ucNumEntries; | |
40 | - ATOM_Tonga_Hard_Limit_Record entries[1]; | |
41 | + ATOM_Tonga_Hard_Limit_Record entries[]; | |
42 | } ATOM_Tonga_Hard_Limit_Table; | |
43 | ||
44 | typedef struct _ATOM_Tonga_GPIO_Table { | |
45 | diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_pptable.h b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_pptable.h | |
46 | index 9c479bd9a786..a372abcd01be 100644 | |
47 | --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_pptable.h | |
48 | +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_pptable.h | |
49 | @@ -129,7 +129,7 @@ typedef struct _ATOM_Vega10_State { | |
50 | typedef struct _ATOM_Vega10_State_Array { | |
51 | UCHAR ucRevId; | |
52 | UCHAR ucNumEntries; /* Number of entries. */ | |
53 | - ATOM_Vega10_State states[1]; /* Dynamically allocate entries. */ | |
54 | + ATOM_Vega10_State states[]; /* Dynamically allocate entries. */ | |
55 | } ATOM_Vega10_State_Array; | |
56 | ||
57 | typedef struct _ATOM_Vega10_CLK_Dependency_Record { | |
58 | @@ -169,37 +169,37 @@ typedef struct _ATOM_Vega10_GFXCLK_Dependency_Table { | |
59 | typedef struct _ATOM_Vega10_MCLK_Dependency_Table { | |
60 | UCHAR ucRevId; | |
61 | UCHAR ucNumEntries; /* Number of entries. */ | |
62 | - ATOM_Vega10_MCLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ | |
63 | + ATOM_Vega10_MCLK_Dependency_Record entries[]; /* Dynamically allocate entries. */ | |
64 | } ATOM_Vega10_MCLK_Dependency_Table; | |
65 | ||
66 | typedef struct _ATOM_Vega10_SOCCLK_Dependency_Table { | |
67 | UCHAR ucRevId; | |
68 | UCHAR ucNumEntries; /* Number of entries. */ | |
69 | - ATOM_Vega10_CLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ | |
70 | + ATOM_Vega10_CLK_Dependency_Record entries[]; /* Dynamically allocate entries. */ | |
71 | } ATOM_Vega10_SOCCLK_Dependency_Table; | |
72 | ||
73 | typedef struct _ATOM_Vega10_DCEFCLK_Dependency_Table { | |
74 | UCHAR ucRevId; | |
75 | UCHAR ucNumEntries; /* Number of entries. */ | |
76 | - ATOM_Vega10_CLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ | |
77 | + ATOM_Vega10_CLK_Dependency_Record entries[]; /* Dynamically allocate entries. */ | |
78 | } ATOM_Vega10_DCEFCLK_Dependency_Table; | |
79 | ||
80 | typedef struct _ATOM_Vega10_PIXCLK_Dependency_Table { | |
81 | UCHAR ucRevId; | |
82 | UCHAR ucNumEntries; /* Number of entries. */ | |
83 | - ATOM_Vega10_CLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ | |
84 | + ATOM_Vega10_CLK_Dependency_Record entries[]; /* Dynamically allocate entries. */ | |
85 | } ATOM_Vega10_PIXCLK_Dependency_Table; | |
86 | ||
87 | typedef struct _ATOM_Vega10_DISPCLK_Dependency_Table { | |
88 | UCHAR ucRevId; | |
89 | UCHAR ucNumEntries; /* Number of entries.*/ | |
90 | - ATOM_Vega10_CLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ | |
91 | + ATOM_Vega10_CLK_Dependency_Record entries[]; /* Dynamically allocate entries. */ | |
92 | } ATOM_Vega10_DISPCLK_Dependency_Table; | |
93 | ||
94 | typedef struct _ATOM_Vega10_PHYCLK_Dependency_Table { | |
95 | UCHAR ucRevId; | |
96 | UCHAR ucNumEntries; /* Number of entries. */ | |
97 | - ATOM_Vega10_CLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ | |
98 | + ATOM_Vega10_CLK_Dependency_Record entries[]; /* Dynamically allocate entries. */ | |
99 | } ATOM_Vega10_PHYCLK_Dependency_Table; | |
100 | ||
101 | typedef struct _ATOM_Vega10_MM_Dependency_Record { | |
102 | @@ -213,7 +213,7 @@ typedef struct _ATOM_Vega10_MM_Dependency_Record { | |
103 | typedef struct _ATOM_Vega10_MM_Dependency_Table { | |
104 | UCHAR ucRevId; | |
105 | UCHAR ucNumEntries; /* Number of entries */ | |
106 | - ATOM_Vega10_MM_Dependency_Record entries[1]; /* Dynamically allocate entries */ | |
107 | + ATOM_Vega10_MM_Dependency_Record entries[]; /* Dynamically allocate entries */ | |
108 | } ATOM_Vega10_MM_Dependency_Table; | |
109 | ||
110 | typedef struct _ATOM_Vega10_PCIE_Record { | |
111 | @@ -225,7 +225,7 @@ typedef struct _ATOM_Vega10_PCIE_Record { | |
112 | typedef struct _ATOM_Vega10_PCIE_Table { | |
113 | UCHAR ucRevId; | |
114 | UCHAR ucNumEntries; /* Number of entries */ | |
115 | - ATOM_Vega10_PCIE_Record entries[1]; /* Dynamically allocate entries. */ | |
116 | + ATOM_Vega10_PCIE_Record entries[]; /* Dynamically allocate entries. */ | |
117 | } ATOM_Vega10_PCIE_Table; | |
118 | ||
119 | typedef struct _ATOM_Vega10_Voltage_Lookup_Record { | |
120 | @@ -235,7 +235,7 @@ typedef struct _ATOM_Vega10_Voltage_Lookup_Record { | |
121 | typedef struct _ATOM_Vega10_Voltage_Lookup_Table { | |
122 | UCHAR ucRevId; | |
123 | UCHAR ucNumEntries; /* Number of entries */ | |
124 | - ATOM_Vega10_Voltage_Lookup_Record entries[1]; /* Dynamically allocate entries */ | |
125 | + ATOM_Vega10_Voltage_Lookup_Record entries[]; /* Dynamically allocate entries */ | |
126 | } ATOM_Vega10_Voltage_Lookup_Table; | |
127 | ||
128 | typedef struct _ATOM_Vega10_Fan_Table { | |
129 | @@ -329,7 +329,7 @@ typedef struct _ATOM_Vega10_VCE_State_Table | |
130 | { | |
131 | UCHAR ucRevId; | |
132 | UCHAR ucNumEntries; | |
133 | - ATOM_Vega10_VCE_State_Record entries[1]; | |
134 | + ATOM_Vega10_VCE_State_Record entries[]; | |
135 | } ATOM_Vega10_VCE_State_Table; | |
136 | ||
137 | typedef struct _ATOM_Vega10_PowerTune_Table { | |
138 | @@ -432,7 +432,7 @@ typedef struct _ATOM_Vega10_Hard_Limit_Table | |
139 | { | |
140 | UCHAR ucRevId; | |
141 | UCHAR ucNumEntries; | |
142 | - ATOM_Vega10_Hard_Limit_Record entries[1]; | |
143 | + ATOM_Vega10_Hard_Limit_Record entries[]; | |
144 | } ATOM_Vega10_Hard_Limit_Table; | |
145 | ||
146 | typedef struct _Vega10_PPTable_Generic_SubTable_Header |