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fix #1622: i40e memory leak
[pve-kernel.git] / patches / kernel / 0237-x86-tlb-Drop-the-_GPL-from-the-cpu_tlbstate-export.patch
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59d5af67 1From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
e4cdf2a5
FG
2From: Thomas Gleixner <tglx@linutronix.de>
3Date: Thu, 4 Jan 2018 22:19:04 +0100
59d5af67 4Subject: [PATCH] x86/tlb: Drop the _GPL from the cpu_tlbstate export
e4cdf2a5
FG
5MIME-Version: 1.0
6Content-Type: text/plain; charset=UTF-8
7Content-Transfer-Encoding: 8bit
8
9commit 1e5476815fd7f98b888e01a0f9522b63085f96c9 upstream.
10
11The recent changes for PTI touch cpu_tlbstate from various tlb_flush
12inlines. cpu_tlbstate is exported as GPL symbol, so this causes a
13regression when building out of tree drivers for certain graphics cards.
14
15Aside of that the export was wrong since it was introduced as it should
16have been EXPORT_PER_CPU_SYMBOL_GPL().
17
18Use the correct PER_CPU export and drop the _GPL to restore the previous
19state which allows users to utilize the cards they payed for.
20
21As always I'm really thrilled to make this kind of change to support the
22#friends (or however the hot hashtag of today is spelled) from that closet
23sauce graphics corp.
24
25Fixes: 1e02ce4cccdc ("x86: Store a per-cpu shadow copy of CR4")
26Fixes: 6fd166aae78c ("x86/mm: Use/Fix PCID to optimize user/kernel switches")
27Reported-by: Kees Cook <keescook@google.com>
28Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
29Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
30Cc: Peter Zijlstra <peterz@infradead.org>
31Cc: Andy Lutomirski <luto@kernel.org>
32Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
33Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com>
34---
35 arch/x86/mm/init.c | 2 +-
36 1 file changed, 1 insertion(+), 1 deletion(-)
37
38diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
39index 80259ad8c386..6b462a472a7b 100644
40--- a/arch/x86/mm/init.c
41+++ b/arch/x86/mm/init.c
42@@ -870,7 +870,7 @@ __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
43 .next_asid = 1,
44 .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */
45 };
46-EXPORT_SYMBOL_GPL(cpu_tlbstate);
47+EXPORT_PER_CPU_SYMBOL(cpu_tlbstate);
48
49 void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
50 {
51--
522.14.2
53