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59d5af67 | 1 | From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 |
e4cdf2a5 FG |
2 | From: Thomas Gleixner <tglx@linutronix.de> |
3 | Date: Thu, 4 Jan 2018 22:19:04 +0100 | |
59d5af67 | 4 | Subject: [PATCH] x86/tlb: Drop the _GPL from the cpu_tlbstate export |
e4cdf2a5 FG |
5 | MIME-Version: 1.0 |
6 | Content-Type: text/plain; charset=UTF-8 | |
7 | Content-Transfer-Encoding: 8bit | |
8 | ||
9 | commit 1e5476815fd7f98b888e01a0f9522b63085f96c9 upstream. | |
10 | ||
11 | The recent changes for PTI touch cpu_tlbstate from various tlb_flush | |
12 | inlines. cpu_tlbstate is exported as GPL symbol, so this causes a | |
13 | regression when building out of tree drivers for certain graphics cards. | |
14 | ||
15 | Aside of that the export was wrong since it was introduced as it should | |
16 | have been EXPORT_PER_CPU_SYMBOL_GPL(). | |
17 | ||
18 | Use the correct PER_CPU export and drop the _GPL to restore the previous | |
19 | state which allows users to utilize the cards they payed for. | |
20 | ||
21 | As always I'm really thrilled to make this kind of change to support the | |
22 | #friends (or however the hot hashtag of today is spelled) from that closet | |
23 | sauce graphics corp. | |
24 | ||
25 | Fixes: 1e02ce4cccdc ("x86: Store a per-cpu shadow copy of CR4") | |
26 | Fixes: 6fd166aae78c ("x86/mm: Use/Fix PCID to optimize user/kernel switches") | |
27 | Reported-by: Kees Cook <keescook@google.com> | |
28 | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> | |
29 | Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
30 | Cc: Peter Zijlstra <peterz@infradead.org> | |
31 | Cc: Andy Lutomirski <luto@kernel.org> | |
32 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
33 | Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com> | |
34 | --- | |
35 | arch/x86/mm/init.c | 2 +- | |
36 | 1 file changed, 1 insertion(+), 1 deletion(-) | |
37 | ||
38 | diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c | |
39 | index 80259ad8c386..6b462a472a7b 100644 | |
40 | --- a/arch/x86/mm/init.c | |
41 | +++ b/arch/x86/mm/init.c | |
42 | @@ -870,7 +870,7 @@ __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = { | |
43 | .next_asid = 1, | |
44 | .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */ | |
45 | }; | |
46 | -EXPORT_SYMBOL_GPL(cpu_tlbstate); | |
47 | +EXPORT_PER_CPU_SYMBOL(cpu_tlbstate); | |
48 | ||
49 | void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache) | |
50 | { | |
51 | -- | |
52 | 2.14.2 | |
53 |