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1# -*- Mode: Python -*-
2# vim: filetype=python
3
4##
5# = CXL devices
6##
7
8##
9# @CxlUncorErrorType:
10#
11# Type of uncorrectable CXL error to inject. These errors are reported via
12# an AER uncorrectable internal error with additional information logged at
13# the CXL device.
14#
15# @cache-data-parity: Data error such as data parity or data ECC error CXL.cache
16# @cache-address-parity: Address parity or other errors associated with the
17# address field on CXL.cache
18# @cache-be-parity: Byte enable parity or other byte enable errors on CXL.cache
19# @cache-data-ecc: ECC error on CXL.cache
20# @mem-data-parity: Data error such as data parity or data ECC error on CXL.mem
21# @mem-address-parity: Address parity or other errors associated with the
22# address field on CXL.mem
23# @mem-be-parity: Byte enable parity or other byte enable errors on CXL.mem.
24# @mem-data-ecc: Data ECC error on CXL.mem.
25# @reinit-threshold: REINIT threshold hit.
26# @rsvd-encoding: Received unrecognized encoding.
27# @poison-received: Received poison from the peer.
28# @receiver-overflow: Buffer overflows (first 3 bits of header log indicate which)
29# @internal: Component specific error
30# @cxl-ide-tx: Integrity and data encryption tx error.
31# @cxl-ide-rx: Integrity and data encryption rx error.
32#
33# Since: 8.0
34##
35
36{ 'enum': 'CxlUncorErrorType',
37 'data': ['cache-data-parity',
38 'cache-address-parity',
39 'cache-be-parity',
40 'cache-data-ecc',
41 'mem-data-parity',
42 'mem-address-parity',
43 'mem-be-parity',
44 'mem-data-ecc',
45 'reinit-threshold',
46 'rsvd-encoding',
47 'poison-received',
48 'receiver-overflow',
49 'internal',
50 'cxl-ide-tx',
51 'cxl-ide-rx'
52 ]
53 }
54
55##
56# @CXLUncorErrorRecord:
57#
58# Record of a single error including header log.
59#
60# @type: Type of error
61# @header: 16 DWORD of header.
62#
63# Since: 8.0
64##
65{ 'struct': 'CXLUncorErrorRecord',
66 'data': {
67 'type': 'CxlUncorErrorType',
68 'header': [ 'uint32' ]
69 }
70}
71
72##
73# @cxl-inject-uncorrectable-errors:
74#
75# Command to allow injection of multiple errors in one go. This allows testing
76# of multiple header log handling in the OS.
77#
78# @path: CXL Type 3 device canonical QOM path
79# @errors: Errors to inject
80#
81# Since: 8.0
82##
83{ 'command': 'cxl-inject-uncorrectable-errors',
84 'data': { 'path': 'str',
85 'errors': [ 'CXLUncorErrorRecord' ] }}
86
87##
88# @CxlCorErrorType:
89#
90# Type of CXL correctable error to inject
91#
92# @cache-data-ecc: Data ECC error on CXL.cache
93# @mem-data-ecc: Data ECC error on CXL.mem
94# @crc-threshold: Component specific and applicable to 68 byte Flit mode only.
95# @cache-poison-received: Received poison from a peer on CXL.cache.
96# @mem-poison-received: Received poison from a peer on CXL.mem
97# @physical: Received error indication from the physical layer.
98#
99# Since: 8.0
100##
101{ 'enum': 'CxlCorErrorType',
102 'data': ['cache-data-ecc',
103 'mem-data-ecc',
104 'crc-threshold',
105 'retry-threshold',
106 'cache-poison-received',
107 'mem-poison-received',
108 'physical']
109}
110
111##
112# @cxl-inject-correctable-error:
113#
114# Command to inject a single correctable error. Multiple error injection
115# of this error type is not interesting as there is no associated header log.
116# These errors are reported via AER as a correctable internal error, with
117# additional detail available from the CXL device.
118#
119# @path: CXL Type 3 device canonical QOM path
120# @type: Type of error.
121#
122# Since: 8.0
123##
124{ 'command': 'cxl-inject-correctable-error',
125 'data': { 'path': 'str',
126 'type': 'CxlCorErrorType'
127 }
128}