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Commit | Line | Data |
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87ecb68b PB |
1 | #ifndef QEMU_CHAR_H |
2 | #define QEMU_CHAR_H | |
3 | ||
376253ec | 4 | #include "qemu-common.h" |
5ccfae10 | 5 | #include "sys-queue.h" |
376253ec | 6 | |
87ecb68b PB |
7 | /* character device */ |
8 | ||
9 | #define CHR_EVENT_BREAK 0 /* serial break char */ | |
10 | #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ | |
11 | #define CHR_EVENT_RESET 2 /* new connection established */ | |
12 | ||
13 | ||
14 | #define CHR_IOCTL_SERIAL_SET_PARAMS 1 | |
15 | typedef struct { | |
16 | int speed; | |
17 | int parity; | |
18 | int data_bits; | |
19 | int stop_bits; | |
20 | } QEMUSerialSetParams; | |
21 | ||
22 | #define CHR_IOCTL_SERIAL_SET_BREAK 2 | |
23 | ||
24 | #define CHR_IOCTL_PP_READ_DATA 3 | |
25 | #define CHR_IOCTL_PP_WRITE_DATA 4 | |
26 | #define CHR_IOCTL_PP_READ_CONTROL 5 | |
27 | #define CHR_IOCTL_PP_WRITE_CONTROL 6 | |
28 | #define CHR_IOCTL_PP_READ_STATUS 7 | |
29 | #define CHR_IOCTL_PP_EPP_READ_ADDR 8 | |
30 | #define CHR_IOCTL_PP_EPP_READ 9 | |
31 | #define CHR_IOCTL_PP_EPP_WRITE_ADDR 10 | |
32 | #define CHR_IOCTL_PP_EPP_WRITE 11 | |
563e3c6e | 33 | #define CHR_IOCTL_PP_DATA_DIR 12 |
87ecb68b | 34 | |
f0664048 AJ |
35 | #define CHR_IOCTL_SERIAL_SET_TIOCM 13 |
36 | #define CHR_IOCTL_SERIAL_GET_TIOCM 14 | |
81174dae AL |
37 | |
38 | #define CHR_TIOCM_CTS 0x020 | |
39 | #define CHR_TIOCM_CAR 0x040 | |
40 | #define CHR_TIOCM_DSR 0x100 | |
41 | #define CHR_TIOCM_RI 0x080 | |
42 | #define CHR_TIOCM_DTR 0x002 | |
43 | #define CHR_TIOCM_RTS 0x004 | |
44 | ||
87ecb68b PB |
45 | typedef void IOEventHandler(void *opaque, int event); |
46 | ||
47 | struct CharDriverState { | |
ceecf1d1 | 48 | void (*init)(struct CharDriverState *s); |
87ecb68b PB |
49 | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); |
50 | void (*chr_update_read_handler)(struct CharDriverState *s); | |
51 | int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); | |
52 | IOEventHandler *chr_event; | |
53 | IOCanRWHandler *chr_can_read; | |
54 | IOReadHandler *chr_read; | |
55 | void *handler_opaque; | |
56 | void (*chr_send_event)(struct CharDriverState *chr, int event); | |
57 | void (*chr_close)(struct CharDriverState *chr); | |
bd9bdce6 | 58 | void (*chr_accept_input)(struct CharDriverState *chr); |
87ecb68b PB |
59 | void *opaque; |
60 | int focus; | |
61 | QEMUBH *bh; | |
5ccfae10 AL |
62 | char *label; |
63 | char *filename; | |
64 | TAILQ_ENTRY(CharDriverState) next; | |
87ecb68b PB |
65 | }; |
66 | ||
ceecf1d1 | 67 | CharDriverState *qemu_chr_open(const char *label, const char *filename, void (*init)(struct CharDriverState *s)); |
9596ebb7 | 68 | void qemu_chr_close(CharDriverState *chr); |
87ecb68b PB |
69 | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); |
70 | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); | |
71 | void qemu_chr_send_event(CharDriverState *s, int event); | |
72 | void qemu_chr_add_handlers(CharDriverState *s, | |
73 | IOCanRWHandler *fd_can_read, | |
74 | IOReadHandler *fd_read, | |
75 | IOEventHandler *fd_event, | |
76 | void *opaque); | |
77 | int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); | |
78 | void qemu_chr_reset(CharDriverState *s); | |
2970a6c9 | 79 | void qemu_chr_initial_reset(void); |
87ecb68b PB |
80 | int qemu_chr_can_read(CharDriverState *s); |
81 | void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len); | |
bd9bdce6 | 82 | void qemu_chr_accept_input(CharDriverState *s); |
376253ec | 83 | void qemu_chr_info(Monitor *mon); |
87ecb68b | 84 | |
0e82f34d AL |
85 | extern int term_escape_char; |
86 | ||
87ecb68b PB |
87 | /* async I/O support */ |
88 | ||
89 | int qemu_set_fd_handler2(int fd, | |
90 | IOCanRWHandler *fd_read_poll, | |
91 | IOHandler *fd_read, | |
92 | IOHandler *fd_write, | |
93 | void *opaque); | |
94 | int qemu_set_fd_handler(int fd, | |
95 | IOHandler *fd_read, | |
96 | IOHandler *fd_write, | |
97 | void *opaque); | |
98 | ||
99 | #endif |