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1f673135 1\input texinfo @c -*- texinfo -*-
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2@c %**start of header
3@setfilename qemu-tech.info
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4
5@documentlanguage en
6@documentencoding UTF-8
7
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8@settitle QEMU Internals
9@exampleindent 0
10@paragraphindent 0
11@c %**end of header
1f673135 12
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13@ifinfo
14@direntry
15* QEMU Internals: (qemu-tech). The QEMU Emulator Internals.
16@end direntry
17@end ifinfo
18
1f673135 19@iftex
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20@titlepage
21@sp 7
22@center @titlefont{QEMU Internals}
23@sp 3
24@end titlepage
25@end iftex
26
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27@ifnottex
28@node Top
29@top
30
31@menu
32* Introduction::
33* QEMU Internals::
34* Regression Tests::
35* Index::
36@end menu
37@end ifnottex
38
39@contents
40
41@node Introduction
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42@chapter Introduction
43
debc7065 44@menu
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45* intro_features:: Features
46* intro_x86_emulation:: x86 and x86-64 emulation
47* intro_arm_emulation:: ARM emulation
48* intro_mips_emulation:: MIPS emulation
49* intro_ppc_emulation:: PowerPC emulation
50* intro_sparc_emulation:: Sparc32 and Sparc64 emulation
51* intro_xtensa_emulation:: Xtensa emulation
52* intro_other_emulation:: Other CPU emulation
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53@end menu
54
55@node intro_features
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56@section Features
57
58QEMU is a FAST! processor emulator using a portable dynamic
59translator.
60
61QEMU has two operating modes:
62
63@itemize @minus
64
5fafdf24 65@item
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66Full system emulation. In this mode (full platform virtualization),
67QEMU emulates a full system (usually a PC), including a processor and
68various peripherals. It can be used to launch several different
69Operating Systems at once without rebooting the host machine or to
70debug system code.
1f673135 71
5fafdf24 72@item
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73User mode emulation. In this mode (application level virtualization),
74QEMU can launch processes compiled for one CPU on another CPU, however
75the Operating Systems must match. This can be used for example to ease
76cross-compilation and cross-debugging.
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77@end itemize
78
79As QEMU requires no host kernel driver to run, it is very safe and
80easy to use.
81
82QEMU generic features:
83
5fafdf24 84@itemize
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85
86@item User space only or full system emulation.
87
debc7065 88@item Using dynamic translation to native code for reasonable speed.
1f673135 89
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90@item
91Working on x86, x86_64 and PowerPC32/64 hosts. Being tested on ARM,
d41f3c3c 92S390x, Sparc32 and Sparc64.
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93
94@item Self-modifying code support.
95
96@item Precise exceptions support.
97
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98@item
99Floating point library supporting both full software emulation and
100native host FPU instructions.
101
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102@end itemize
103
104QEMU user mode emulation features:
5fafdf24 105@itemize
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106@item Generic Linux system call converter, including most ioctls.
107
108@item clone() emulation using native CPU clone() to use Linux scheduler for threads.
109
5fafdf24 110@item Accurate signal handling by remapping host signals to target signals.
1f673135 111@end itemize
1f673135 112
998a0501 113Linux user emulator (Linux host only) can be used to launch the Wine
0adb1246 114Windows API emulator (@url{http://www.winehq.org}). A BSD user emulator for BSD
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115hosts is under development. It would also be possible to develop a
116similar user emulator for Solaris.
117
1f673135 118QEMU full system emulation features:
5fafdf24 119@itemize
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120@item
121QEMU uses a full software MMU for maximum portability.
122
123@item
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124QEMU can optionally use an in-kernel accelerator, like kvm. The accelerators
125execute some of the guest code natively, while
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126continuing to emulate the rest of the machine.
127
128@item
129Various hardware devices can be emulated and in some cases, host
130devices (e.g. serial and parallel ports, USB, drives) can be used
131transparently by the guest Operating System. Host device passthrough
132can be used for talking to external physical peripherals (e.g. a
133webcam, modem or tape drive).
134
135@item
136Symmetric multiprocessing (SMP) even on a host with a single CPU. On a
137SMP host system, QEMU can use only one CPU fully due to difficulty in
138implementing atomic memory accesses efficiently.
139
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140@end itemize
141
debc7065 142@node intro_x86_emulation
998a0501 143@section x86 and x86-64 emulation
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144
145QEMU x86 target features:
146
5fafdf24 147@itemize
1f673135 148
5fafdf24 149@item The virtual x86 CPU supports 16 bit and 32 bit addressing with segmentation.
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150LDT/GDT and IDT are emulated. VM86 mode is also supported to run
151DOSEMU. There is some support for MMX/3DNow!, SSE, SSE2, SSE3, SSSE3,
152and SSE4 as well as x86-64 SVM.
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153
154@item Support of host page sizes bigger than 4KB in user mode emulation.
155
156@item QEMU can emulate itself on x86.
157
5fafdf24 158@item An extensive Linux x86 CPU test program is included @file{tests/test-i386}.
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159It can be used to test other x86 virtual CPUs.
160
161@end itemize
162
163Current QEMU limitations:
164
5fafdf24 165@itemize
1f673135 166
998a0501 167@item Limited x86-64 support.
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168
169@item IPC syscalls are missing.
170
5fafdf24 171@item The x86 segment limits and access rights are not tested at every
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172memory access (yet). Hopefully, very few OSes seem to rely on that for
173normal use.
174
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175@end itemize
176
debc7065 177@node intro_arm_emulation
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178@section ARM emulation
179
180@itemize
181
182@item Full ARM 7 user emulation.
183
184@item NWFPE FPU support included in user Linux emulation.
185
186@item Can run most ARM Linux binaries.
187
188@end itemize
189
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190@node intro_mips_emulation
191@section MIPS emulation
192
193@itemize
194
195@item The system emulation allows full MIPS32/MIPS64 Release 2 emulation,
196including privileged instructions, FPU and MMU, in both little and big
197endian modes.
198
199@item The Linux userland emulation can run many 32 bit MIPS Linux binaries.
200
201@end itemize
202
203Current QEMU limitations:
204
205@itemize
206
207@item Self-modifying code is not always handled correctly.
208
209@item 64 bit userland emulation is not implemented.
210
211@item The system emulation is not complete enough to run real firmware.
212
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213@item The watchpoint debug facility is not implemented.
214
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215@end itemize
216
debc7065 217@node intro_ppc_emulation
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218@section PowerPC emulation
219
220@itemize
221
5fafdf24 222@item Full PowerPC 32 bit emulation, including privileged instructions,
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223FPU and MMU.
224
225@item Can run most PowerPC Linux binaries.
226
227@end itemize
228
debc7065 229@node intro_sparc_emulation
998a0501 230@section Sparc32 and Sparc64 emulation
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231
232@itemize
233
f6b647cd 234@item Full SPARC V8 emulation, including privileged
3475187d 235instructions, FPU and MMU. SPARC V9 emulation includes most privileged
a785e42e 236and VIS instructions, FPU and I/D MMU. Alignment is fully enforced.
1f673135 237
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238@item Can run most 32-bit SPARC Linux binaries, SPARC32PLUS Linux binaries and
239some 64-bit SPARC Linux binaries.
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240
241@end itemize
242
243Current QEMU limitations:
244
5fafdf24 245@itemize
3475187d 246
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247@item IPC syscalls are missing.
248
1f587329 249@item Floating point exception support is buggy.
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250
251@item Atomic instructions are not correctly implemented.
252
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253@item There are still some problems with Sparc64 emulators.
254
255@end itemize
256
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257@node intro_xtensa_emulation
258@section Xtensa emulation
259
260@itemize
261
262@item Core Xtensa ISA emulation, including most options: code density,
263loop, extended L32R, 16- and 32-bit multiplication, 32-bit division,
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264MAC16, miscellaneous operations, boolean, FP coprocessor, coprocessor
265context, debug, multiprocessor synchronization,
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266conditional store, exceptions, relocatable vectors, unaligned exception,
267interrupts (including high priority and timer), hardware alignment,
268region protection, region translation, MMU, windowed registers, thread
269pointer, processor ID.
270
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271@item Not implemented options: data/instruction cache (including cache
272prefetch and locking), XLMI, processor interface. Also options not
273covered by the core ISA (e.g. FLIX, wide branches) are not implemented.
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274
275@item Can run most Xtensa Linux binaries.
276
277@item New core configuration that requires no additional instructions
278may be created from overlay with minimal amount of hand-written code.
279
280@end itemize
281
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282@node intro_other_emulation
283@section Other CPU emulation
1f673135 284
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285In addition to the above, QEMU supports emulation of other CPUs with
286varying levels of success. These are:
287
288@itemize
289
290@item
291Alpha
292@item
293CRIS
294@item
295M68k
296@item
297SH4
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298@end itemize
299
debc7065 300@node QEMU Internals
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301@chapter QEMU Internals
302
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303@menu
304* QEMU compared to other emulators::
305* Portable dynamic translation::
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306* Condition code optimisations::
307* CPU state optimisations::
308* Translation cache::
309* Direct block chaining::
310* Self-modifying code and translated code invalidation::
311* Exception support::
312* MMU emulation::
998a0501 313* Device emulation::
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314* Hardware interrupts::
315* User emulation specific details::
316* Bibliography::
317@end menu
318
319@node QEMU compared to other emulators
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320@section QEMU compared to other emulators
321
8e9620a6 322Like bochs [1], QEMU emulates an x86 CPU. But QEMU is much faster than
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323bochs as it uses dynamic compilation. Bochs is closely tied to x86 PC
324emulation while QEMU can emulate several processors.
325
326Like Valgrind [2], QEMU does user space emulation and dynamic
327translation. Valgrind is mainly a memory debugger while QEMU has no
328support for it (QEMU could be used to detect out of bound memory
329accesses as Valgrind, but it has no support to track uninitialised data
330as Valgrind does). The Valgrind dynamic translator generates better code
331than QEMU (in particular it does register allocation) but it is closely
332tied to an x86 host and target and has no support for precise exceptions
333and system emulation.
334
8e9620a6 335EM86 [3] is the closest project to user space QEMU (and QEMU still uses
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336some of its code, in particular the ELF file loader). EM86 was limited
337to an alpha host and used a proprietary and slow interpreter (the
8e9620a6 338interpreter part of the FX!32 Digital Win32 code translator [4]).
1f673135 339
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340TWIN from Willows Software was a Windows API emulator like Wine. It is less
341accurate than Wine but includes a protected mode x86 interpreter to launch
342x86 Windows executables. Such an approach has greater potential because most
343of the Windows API is executed natively but it is far more difficult to
344develop because all the data structures and function parameters exchanged
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345between the API and the x86 code must be converted.
346
8e9620a6 347User mode Linux [5] was the only solution before QEMU to launch a
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348Linux kernel as a process while not needing any host kernel
349patches. However, user mode Linux requires heavy kernel patches while
350QEMU accepts unpatched Linux kernels. The price to pay is that QEMU is
351slower.
352
8e9620a6 353The Plex86 [6] PC virtualizer is done in the same spirit as the now
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354obsolete qemu-fast system emulator. It requires a patched Linux kernel
355to work (you cannot launch the same kernel on your PC), but the
356patches are really small. As it is a PC virtualizer (no emulation is
357done except for some privileged instructions), it has the potential of
358being faster than QEMU. The downside is that a complicated (and
359potentially unsafe) host kernel patch is needed.
1f673135 360
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361The commercial PC Virtualizers (VMWare [7], VirtualPC [8]) are faster
362than QEMU (without virtualization), but they all need specific, proprietary
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363and potentially unsafe host drivers. Moreover, they are unable to
364provide cycle exact simulation as an emulator can.
365
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366VirtualBox [9], Xen [10] and KVM [11] are based on QEMU. QEMU-SystemC
367[12] uses QEMU to simulate a system where some hardware devices are
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368developed in SystemC.
369
debc7065 370@node Portable dynamic translation
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371@section Portable dynamic translation
372
373QEMU is a dynamic translator. When it first encounters a piece of code,
374it converts it to the host instruction set. Usually dynamic translators
375are very complicated and highly CPU dependent. QEMU uses some tricks
376which make it relatively easily portable and simple while achieving good
377performances.
378
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379After the release of version 0.9.1, QEMU switched to a new method of
380generating code, Tiny Code Generator or TCG. TCG relaxes the
381dependency on the exact version of the compiler used. The basic idea
382is to split every target instruction into a couple of RISC-like TCG
383ops (see @code{target-i386/translate.c}). Some optimizations can be
384performed at this stage, including liveness analysis and trivial
385constant expression evaluation. TCG ops are then implemented in the
386host CPU back end, also known as TCG target (see
ce151109 387@code{tcg/i386/tcg-target.inc.c}). For more information, please take a
998a0501 388look at @code{tcg/README}.
1f673135 389
debc7065 390@node Condition code optimisations
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391@section Condition code optimisations
392
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393Lazy evaluation of CPU condition codes (@code{EFLAGS} register on x86)
394is important for CPUs where every instruction sets the condition
395codes. It tends to be less important on conventional RISC systems
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396where condition codes are only updated when explicitly requested. On
397Sparc64, costly update of both 32 and 64 bit condition codes can be
398avoided with lazy evaluation.
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399
400Instead of computing the condition codes after each x86 instruction,
401QEMU just stores one operand (called @code{CC_SRC}), the result
402(called @code{CC_DST}) and the type of operation (called
403@code{CC_OP}). When the condition codes are needed, the condition
404codes can be calculated using this information. In addition, an
405optimized calculation can be performed for some instruction types like
406conditional branches.
1f673135 407
1235fc06 408@code{CC_OP} is almost never explicitly set in the generated code
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409because it is known at translation time.
410
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411The lazy condition code evaluation is used on x86, m68k, cris and
412Sparc. ARM uses a simplified variant for the N and Z flags.
1f673135 413
debc7065 414@node CPU state optimisations
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415@section CPU state optimisations
416
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417The target CPUs have many internal states which change the way it
418evaluates instructions. In order to achieve a good speed, the
419translation phase considers that some state information of the virtual
420CPU cannot change in it. The state is recorded in the Translation
421Block (TB). If the state changes (e.g. privilege level), a new TB will
422be generated and the previous TB won't be used anymore until the state
423matches the state recorded in the previous TB. For example, if the SS,
424DS and ES segments have a zero base, then the translator does not even
425generate an addition for the segment base.
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426
427[The FPU stack pointer register is not handled that way yet].
428
debc7065 429@node Translation cache
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430@section Translation cache
431
27c8efcb 432A 32 MByte cache holds the most recently used translations. For
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433simplicity, it is completely flushed when it is full. A translation unit
434contains just a single basic block (a block of x86 instructions
435terminated by a jump or by a virtual CPU state change which the
436translator cannot deduce statically).
437
debc7065 438@node Direct block chaining
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439@section Direct block chaining
440
441After each translated basic block is executed, QEMU uses the simulated
d274e07c 442Program Counter (PC) and other cpu state information (such as the CS
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443segment base value) to find the next basic block.
444
445In order to accelerate the most common cases where the new simulated PC
446is known, QEMU can patch a basic block so that it jumps directly to the
447next one.
448
449The most portable code uses an indirect jump. An indirect jump makes
450it easier to make the jump target modification atomic. On some host
451architectures (such as x86 or PowerPC), the @code{JUMP} opcode is
452directly patched so that the block chaining has no overhead.
453
debc7065 454@node Self-modifying code and translated code invalidation
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455@section Self-modifying code and translated code invalidation
456
457Self-modifying code is a special challenge in x86 emulation because no
458instruction cache invalidation is signaled by the application when code
459is modified.
460
461When translated code is generated for a basic block, the corresponding
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462host page is write protected if it is not already read-only. Then, if
463a write access is done to the page, Linux raises a SEGV signal. QEMU
464then invalidates all the translated code in the page and enables write
465accesses to the page.
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466
467Correct translated code invalidation is done efficiently by maintaining
468a linked list of every translated block contained in a given page. Other
5fafdf24 469linked lists are also maintained to undo direct block chaining.
1f673135 470
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471On RISC targets, correctly written software uses memory barriers and
472cache flushes, so some of the protection above would not be
473necessary. However, QEMU still requires that the generated code always
474matches the target instructions in memory in order to handle
475exceptions correctly.
1f673135 476
debc7065 477@node Exception support
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478@section Exception support
479
480longjmp() is used when an exception such as division by zero is
5fafdf24 481encountered.
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482
483The host SIGSEGV and SIGBUS signal handlers are used to get invalid
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484memory accesses. The simulated program counter is found by
485retranslating the corresponding basic block and by looking where the
486host program counter was at the exception point.
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487
488The virtual CPU cannot retrieve the exact @code{EFLAGS} register because
489in some cases it is not computed because of condition code
490optimisations. It is not a big concern because the emulated code can
491still be restarted in any cases.
492
debc7065 493@node MMU emulation
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494@section MMU emulation
495
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496For system emulation QEMU supports a soft MMU. In that mode, the MMU
497virtual to physical address translation is done at every memory
498access. QEMU uses an address translation cache to speed up the
499translation.
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500
501In order to avoid flushing the translated code each time the MMU
502mappings change, QEMU uses a physically indexed translation cache. It
5fafdf24 503means that each basic block is indexed with its physical address.
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504
505When MMU mappings change, only the chaining of the basic blocks is
506reset (i.e. a basic block can no longer jump directly to another one).
507
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508@node Device emulation
509@section Device emulation
510
511Systems emulated by QEMU are organized by boards. At initialization
512phase, each board instantiates a number of CPUs, devices, RAM and
513ROM. Each device in turn can assign I/O ports or memory areas (for
514MMIO) to its handlers. When the emulation starts, an access to the
515ports or MMIO memory areas assigned to the device causes the
516corresponding handler to be called.
517
518RAM and ROM are handled more optimally, only the offset to the host
519memory needs to be added to the guest address.
520
521The video RAM of VGA and other display cards is special: it can be
522read or written directly like RAM, but write accesses cause the memory
523to be marked with VGA_DIRTY flag as well.
524
525QEMU supports some device classes like serial and parallel ports, USB,
526drives and network devices, by providing APIs for easier connection to
527the generic, higher level implementations. The API hides the
528implementation details from the devices, like native device use or
529advanced block device formats like QCOW.
530
531Usually the devices implement a reset method and register support for
532saving and loading of the device state. The devices can also use
533timers, especially together with the use of bottom halves (BHs).
534
debc7065 535@node Hardware interrupts
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536@section Hardware interrupts
537
e1b4382c 538In order to be faster, QEMU does not check at every basic block if a
e8dc0938 539hardware interrupt is pending. Instead, the user must asynchronously
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540call a specific function to tell that an interrupt is pending. This
541function resets the chaining of the currently executing basic
542block. It ensures that the execution will return soon in the main loop
543of the CPU emulator. Then the main loop can test if the interrupt is
544pending and handle it.
545
debc7065 546@node User emulation specific details
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547@section User emulation specific details
548
549@subsection Linux system call translation
550
551QEMU includes a generic system call translator for Linux. It means that
552the parameters of the system calls can be converted to fix the
553endianness and 32/64 bit issues. The IOCTLs are converted with a generic
554type description system (see @file{ioctls.h} and @file{thunk.c}).
555
556QEMU supports host CPUs which have pages bigger than 4KB. It records all
557the mappings the process does and try to emulated the @code{mmap()}
558system calls in cases where the host @code{mmap()} call would fail
559because of bad page alignment.
560
561@subsection Linux signals
562
563Normal and real-time signals are queued along with their information
564(@code{siginfo_t}) as it is done in the Linux kernel. Then an interrupt
565request is done to the virtual CPU. When it is interrupted, one queued
566signal is handled by generating a stack frame in the virtual CPU as the
567Linux kernel does. The @code{sigreturn()} system call is emulated to return
568from the virtual signal handler.
569
570Some signals (such as SIGALRM) directly come from the host. Other
e8dc0938 571signals are synthesized from the virtual CPU exceptions such as SIGFPE
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572when a division by zero is done (see @code{main.c:cpu_loop()}).
573
574The blocked signal mask is still handled by the host Linux kernel so
575that most signal system calls can be redirected directly to the host
576Linux kernel. Only the @code{sigaction()} and @code{sigreturn()} system
577calls need to be fully emulated (see @file{signal.c}).
578
579@subsection clone() system call and threads
580
581The Linux clone() system call is usually used to create a thread. QEMU
582uses the host clone() system call so that real host threads are created
583for each emulated thread. One virtual CPU instance is created for each
584thread.
585
586The virtual x86 CPU atomic operations are emulated with a global lock so
587that their semantic is preserved.
588
589Note that currently there are still some locking issues in QEMU. In
590particular, the translated cache flush is not protected yet against
591reentrancy.
592
593@subsection Self-virtualization
594
595QEMU was conceived so that ultimately it can emulate itself. Although
596it is not very useful, it is an important test to show the power of the
597emulator.
598
599Achieving self-virtualization is not easy because there may be address
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600space conflicts. QEMU user emulators solve this problem by being an
601executable ELF shared object as the ld-linux.so ELF interpreter. That
602way, it can be relocated at load time.
1f673135 603
debc7065 604@node Bibliography
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605@section Bibliography
606
607@table @asis
608
5fafdf24 609@item [1]
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610@url{http://bochs.sourceforge.net/}, the Bochs IA-32 Emulator Project,
611by Kevin Lawton et al.
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612
613@item [2]
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614@url{http://www.valgrind.org/}, Valgrind, an open-source memory debugger
615for GNU/Linux.
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616
617@item [3]
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618@url{http://ftp.dreamtime.org/pub/linux/Linux-Alpha/em86/v0.2/docs/em86.html},
619the EM86 x86 emulator on Alpha-Linux.
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620
621@item [4]
debc7065 622@url{http://www.usenix.org/publications/library/proceedings/usenix-nt97/@/full_papers/chernoff/chernoff.pdf},
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623DIGITAL FX!32: Running 32-Bit x86 Applications on Alpha NT, by Anton
624Chernoff and Ray Hookway.
625
8e9620a6 626@item [5]
5fafdf24 627@url{http://user-mode-linux.sourceforge.net/},
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628The User-mode Linux Kernel.
629
8e9620a6 630@item [6]
5fafdf24 631@url{http://www.plex86.org/},
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632The new Plex86 project.
633
8e9620a6 634@item [7]
5fafdf24 635@url{http://www.vmware.com/},
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636The VMWare PC virtualizer.
637
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638@item [8]
639@url{https://www.microsoft.com/download/details.aspx?id=3702},
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640The VirtualPC PC virtualizer.
641
8e9620a6 642@item [9]
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643@url{http://virtualbox.org/},
644The VirtualBox PC virtualizer.
645
8e9620a6 646@item [10]
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647@url{http://www.xen.org/},
648The Xen hypervisor.
649
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650@item [11]
651@url{http://www.linux-kvm.org/},
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652Kernel Based Virtual Machine (KVM).
653
8e9620a6 654@item [12]
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655@url{http://www.greensocs.com/projects/QEMUSystemC},
656QEMU-SystemC, a hardware co-simulator.
657
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658@end table
659
debc7065 660@node Regression Tests
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661@chapter Regression Tests
662
663In the directory @file{tests/}, various interesting testing programs
b1f45238 664are available. They are used for regression testing.
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666@menu
667* test-i386::
668* linux-test::
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669@end menu
670
671@node test-i386
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672@section @file{test-i386}
673
674This program executes most of the 16 bit and 32 bit x86 instructions and
675generates a text output. It can be compared with the output obtained with
676a real CPU or another emulator. The target @code{make test} runs this
677program and a @code{diff} on the generated output.
678
679The Linux system call @code{modify_ldt()} is used to create x86 selectors
680to test some 16 bit addressing and 32 bit with segmentation cases.
681
682The Linux system call @code{vm86()} is used to test vm86 emulation.
683
684Various exceptions are raised to test most of the x86 user space
685exception reporting.
686
debc7065 687@node linux-test
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688@section @file{linux-test}
689
690This program tests various Linux system calls. It is used to verify
691that the system call parameters are correctly converted between target
692and host CPUs.
693
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694@node Index
695@chapter Index
696@printindex cp
697
698@bye