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dd83b06a
AF
1/*
2 * QEMU CPU model
3 *
1590bbcb 4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
dd83b06a
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5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20
1ef26b1f 21#include "qemu/osdep.h"
da34e65c 22#include "qapi/error.h"
dd83b06a 23#include "qemu-common.h"
878096ee 24#include "qom/cpu.h"
13eed94e 25#include "sysemu/kvm.h"
066e9b27 26#include "qemu/notify.h"
91b1df8c 27#include "qemu/log.h"
508127e2 28#include "exec/log.h"
9262685b 29#include "qemu/error-report.h"
066e9b27 30#include "sysemu/sysemu.h"
62a48a2a 31#include "hw/qdev-properties.h"
066e9b27 32
69e5ff06
IM
33bool cpu_exists(int64_t id)
34{
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35 CPUState *cpu;
36
37 CPU_FOREACH(cpu) {
38 CPUClass *cc = CPU_GET_CLASS(cpu);
69e5ff06 39
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40 if (cc->get_arch_id(cpu) == id) {
41 return true;
42 }
43 }
44 return false;
69e5ff06
IM
45}
46
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AF
47CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
48{
49 char *str, *name, *featurestr;
62a48a2a 50 CPUState *cpu = NULL;
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AF
51 ObjectClass *oc;
52 CPUClass *cc;
53 Error *err = NULL;
54
55 str = g_strdup(cpu_model);
56 name = strtok(str, ",");
57
58 oc = cpu_class_by_name(typename, name);
59 if (oc == NULL) {
60 g_free(str);
61 return NULL;
62 }
63
62a48a2a 64 cc = CPU_CLASS(oc);
9262685b 65 featurestr = strtok(NULL, ",");
62a48a2a
IM
66 /* TODO: all callers of cpu_generic_init() need to be converted to
67 * call parse_features() only once, before calling cpu_generic_init().
68 */
69 cc->parse_features(object_class_get_name(oc), featurestr, &err);
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AF
70 g_free(str);
71 if (err != NULL) {
72 goto out;
73 }
74
62a48a2a 75 cpu = CPU(object_new(object_class_get_name(oc)));
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AF
76 object_property_set_bool(OBJECT(cpu), true, "realized", &err);
77
78out:
79 if (err != NULL) {
565f65d2 80 error_report_err(err);
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AF
81 object_unref(OBJECT(cpu));
82 return NULL;
83 }
84
85 return cpu;
86}
87
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AF
88bool cpu_paging_enabled(const CPUState *cpu)
89{
90 CPUClass *cc = CPU_GET_CLASS(cpu);
91
92 return cc->get_paging_enabled(cpu);
93}
94
95static bool cpu_common_get_paging_enabled(const CPUState *cpu)
96{
6db297ea 97 return false;
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98}
99
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100void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
101 Error **errp)
102{
103 CPUClass *cc = CPU_GET_CLASS(cpu);
104
fbe95bfb 105 cc->get_memory_mapping(cpu, list, errp);
a23bbfda
AF
106}
107
108static void cpu_common_get_memory_mapping(CPUState *cpu,
109 MemoryMappingList *list,
110 Error **errp)
111{
112 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
113}
114
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115void cpu_reset_interrupt(CPUState *cpu, int mask)
116{
117 cpu->interrupt_request &= ~mask;
118}
119
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120void cpu_exit(CPUState *cpu)
121{
122 cpu->exit_request = 1;
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123 /* Ensure cpu_exec will see the exit request after TCG has exited. */
124 smp_wmb();
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AF
125 cpu->tcg_exit_req = 1;
126}
127
c72bf468
JF
128int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
129 void *opaque)
130{
131 CPUClass *cc = CPU_GET_CLASS(cpu);
132
133 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
134}
135
136static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
137 CPUState *cpu, void *opaque)
138{
b09afd58 139 return 0;
c72bf468
JF
140}
141
142int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
143 int cpuid, void *opaque)
144{
145 CPUClass *cc = CPU_GET_CLASS(cpu);
146
147 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
148}
149
150static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
151 CPUState *cpu, int cpuid,
152 void *opaque)
153{
154 return -1;
155}
156
157int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
158 void *opaque)
159{
160 CPUClass *cc = CPU_GET_CLASS(cpu);
161
162 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
163}
164
165static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
166 CPUState *cpu, void *opaque)
167{
b09afd58 168 return 0;
c72bf468
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169}
170
171int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
172 int cpuid, void *opaque)
173{
174 CPUClass *cc = CPU_GET_CLASS(cpu);
175
176 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
177}
178
179static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
180 CPUState *cpu, int cpuid,
181 void *opaque)
182{
183 return -1;
184}
185
186
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187static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
188{
189 return 0;
190}
191
192static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
193{
194 return 0;
195}
196
568496c0
SF
197static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
198{
199 /* If no extra check is required, QEMU watchpoint match can be considered
200 * as an architectural match.
201 */
202 return true;
203}
204
bf7663c4
GK
205bool target_words_bigendian(void);
206static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
207{
208 return target_words_bigendian();
209}
5b50e790 210
cffe7b32 211static void cpu_common_noop(CPUState *cpu)
86025ee4
PM
212{
213}
214
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215static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
216{
217 return false;
218}
219
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AF
220void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
221 int flags)
222{
223 CPUClass *cc = CPU_GET_CLASS(cpu);
224
225 if (cc->dump_state) {
97577fd4 226 cpu_synchronize_state(cpu);
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AF
227 cc->dump_state(cpu, f, cpu_fprintf, flags);
228 }
229}
230
231void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
232 int flags)
233{
234 CPUClass *cc = CPU_GET_CLASS(cpu);
235
236 if (cc->dump_statistics) {
237 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
238 }
239}
240
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AF
241void cpu_reset(CPUState *cpu)
242{
243 CPUClass *klass = CPU_GET_CLASS(cpu);
244
245 if (klass->reset != NULL) {
246 (*klass->reset)(cpu);
247 }
248}
249
250static void cpu_common_reset(CPUState *cpu)
251{
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AF
252 CPUClass *cc = CPU_GET_CLASS(cpu);
253
254 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
255 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
256 log_cpu_state(cpu, cc->reset_dump_flags);
257 }
258
259186a7 259 cpu->interrupt_request = 0;
259186a7 260 cpu->halted = 0;
93afeade
AF
261 cpu->mem_io_pc = 0;
262 cpu->mem_io_vaddr = 0;
efee7340 263 cpu->icount_extra = 0;
28ecfd7a 264 cpu->icount_decr.u32 = 0;
414b15c9 265 cpu->can_do_io = 1;
f9d8f667 266 cpu->exception_index = -1;
bac05aa9 267 cpu->crash_occurred = false;
8cd70437 268 memset(cpu->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof(void *));
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AF
269}
270
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271static bool cpu_common_has_work(CPUState *cs)
272{
273 return false;
274}
275
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AF
276ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
277{
278 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
279
280 return cc->class_by_name(cpu_model);
281}
282
283static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
284{
285 return NULL;
286}
287
62a48a2a 288static void cpu_common_parse_features(const char *typename, char *features,
1590bbcb
AF
289 Error **errp)
290{
291 char *featurestr; /* Single "key=value" string being parsed */
292 char *val;
62a48a2a
IM
293 static bool cpu_globals_initialized;
294
295 /* TODO: all callers of ->parse_features() need to be changed to
296 * call it only once, so we can remove this check (or change it
297 * to assert(!cpu_globals_initialized).
298 * Current callers of ->parse_features() are:
62a48a2a 299 * - cpu_generic_init()
62a48a2a
IM
300 */
301 if (cpu_globals_initialized) {
302 return;
303 }
304 cpu_globals_initialized = true;
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AF
305
306 featurestr = features ? strtok(features, ",") : NULL;
307
308 while (featurestr) {
309 val = strchr(featurestr, '=');
310 if (val) {
62a48a2a 311 GlobalProperty *prop = g_new0(typeof(*prop), 1);
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AF
312 *val = 0;
313 val++;
62a48a2a
IM
314 prop->driver = typename;
315 prop->property = g_strdup(featurestr);
316 prop->value = g_strdup(val);
317 prop->errp = &error_fatal;
318 qdev_prop_register_global(prop);
1590bbcb
AF
319 } else {
320 error_setg(errp, "Expected key=value format, found %s.",
321 featurestr);
322 return;
323 }
324 featurestr = strtok(NULL, ",");
325 }
326}
327
4f658099
AF
328static void cpu_common_realizefn(DeviceState *dev, Error **errp)
329{
13eed94e
IM
330 CPUState *cpu = CPU(dev);
331
332 if (dev->hotplugged) {
333 cpu_synchronize_post_init(cpu);
6afb4721 334 cpu_resume(cpu);
13eed94e 335 }
4f658099
AF
336}
337
a0e372f0
AF
338static void cpu_common_initfn(Object *obj)
339{
340 CPUState *cpu = CPU(obj);
341 CPUClass *cc = CPU_GET_CLASS(obj);
342
a07f953e 343 cpu->cpu_index = UNASSIGNED_CPU_INDEX;
35143f01 344 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
376692b9 345 qemu_mutex_init(&cpu->work_mutex);
7c39163e
EH
346 QTAILQ_INIT(&cpu->breakpoints);
347 QTAILQ_INIT(&cpu->watchpoints);
48151859 348 bitmap_zero(cpu->trace_dstate, TRACE_VCPU_EVENT_COUNT);
a0e372f0
AF
349}
350
b7bca733
BR
351static void cpu_common_finalize(Object *obj)
352{
353 cpu_exec_exit(CPU(obj));
354}
355
997395d3
IM
356static int64_t cpu_common_get_arch_id(CPUState *cpu)
357{
358 return cpu->cpu_index;
359}
360
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AF
361static void cpu_class_init(ObjectClass *klass, void *data)
362{
961f8395 363 DeviceClass *dc = DEVICE_CLASS(klass);
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AF
364 CPUClass *k = CPU_CLASS(klass);
365
2b8c2754 366 k->class_by_name = cpu_common_class_by_name;
1590bbcb 367 k->parse_features = cpu_common_parse_features;
dd83b06a 368 k->reset = cpu_common_reset;
997395d3 369 k->get_arch_id = cpu_common_get_arch_id;
8c2e1b00 370 k->has_work = cpu_common_has_work;
444d5590 371 k->get_paging_enabled = cpu_common_get_paging_enabled;
a23bbfda 372 k->get_memory_mapping = cpu_common_get_memory_mapping;
c72bf468
JF
373 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
374 k->write_elf32_note = cpu_common_write_elf32_note;
375 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
376 k->write_elf64_note = cpu_common_write_elf64_note;
5b50e790
AF
377 k->gdb_read_register = cpu_common_gdb_read_register;
378 k->gdb_write_register = cpu_common_gdb_write_register;
bf7663c4 379 k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
cffe7b32 380 k->debug_excp_handler = cpu_common_noop;
568496c0 381 k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
cffe7b32
RH
382 k->cpu_exec_enter = cpu_common_noop;
383 k->cpu_exec_exit = cpu_common_noop;
9585db68 384 k->cpu_exec_interrupt = cpu_common_exec_interrupt;
4f658099 385 dc->realize = cpu_common_realizefn;
ffa95714
MA
386 /*
387 * Reason: CPUs still need special care by board code: wiring up
388 * IRQs, adding reset handlers, halting non-first CPUs, ...
389 */
390 dc->cannot_instantiate_with_device_add_yet = true;
dd83b06a
AF
391}
392
961f8395 393static const TypeInfo cpu_type_info = {
dd83b06a 394 .name = TYPE_CPU,
961f8395 395 .parent = TYPE_DEVICE,
dd83b06a 396 .instance_size = sizeof(CPUState),
a0e372f0 397 .instance_init = cpu_common_initfn,
b7bca733 398 .instance_finalize = cpu_common_finalize,
dd83b06a
AF
399 .abstract = true,
400 .class_size = sizeof(CPUClass),
401 .class_init = cpu_class_init,
402};
403
404static void cpu_register_types(void)
405{
406 type_register_static(&cpu_type_info);
407}
408
409type_init(cpu_register_types)