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CommitLineData
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1/*
2 * QEMU CPU model
3 *
1590bbcb 4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
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5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20
dd83b06a 21#include "qemu-common.h"
878096ee 22#include "qom/cpu.h"
13eed94e 23#include "sysemu/kvm.h"
066e9b27 24#include "qemu/notify.h"
91b1df8c 25#include "qemu/log.h"
9262685b 26#include "qemu/error-report.h"
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27#include "sysemu/sysemu.h"
28
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29bool cpu_exists(int64_t id)
30{
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31 CPUState *cpu;
32
33 CPU_FOREACH(cpu) {
34 CPUClass *cc = CPU_GET_CLASS(cpu);
69e5ff06 35
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36 if (cc->get_arch_id(cpu) == id) {
37 return true;
38 }
39 }
40 return false;
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41}
42
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43CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
44{
45 char *str, *name, *featurestr;
46 CPUState *cpu;
47 ObjectClass *oc;
48 CPUClass *cc;
49 Error *err = NULL;
50
51 str = g_strdup(cpu_model);
52 name = strtok(str, ",");
53
54 oc = cpu_class_by_name(typename, name);
55 if (oc == NULL) {
56 g_free(str);
57 return NULL;
58 }
59
60 cpu = CPU(object_new(object_class_get_name(oc)));
61 cc = CPU_GET_CLASS(cpu);
62
63 featurestr = strtok(NULL, ",");
64 cc->parse_features(cpu, featurestr, &err);
65 g_free(str);
66 if (err != NULL) {
67 goto out;
68 }
69
70 object_property_set_bool(OBJECT(cpu), true, "realized", &err);
71
72out:
73 if (err != NULL) {
565f65d2 74 error_report_err(err);
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75 object_unref(OBJECT(cpu));
76 return NULL;
77 }
78
79 return cpu;
80}
81
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82bool cpu_paging_enabled(const CPUState *cpu)
83{
84 CPUClass *cc = CPU_GET_CLASS(cpu);
85
86 return cc->get_paging_enabled(cpu);
87}
88
89static bool cpu_common_get_paging_enabled(const CPUState *cpu)
90{
6db297ea 91 return false;
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92}
93
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94void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
95 Error **errp)
96{
97 CPUClass *cc = CPU_GET_CLASS(cpu);
98
fbe95bfb 99 cc->get_memory_mapping(cpu, list, errp);
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100}
101
102static void cpu_common_get_memory_mapping(CPUState *cpu,
103 MemoryMappingList *list,
104 Error **errp)
105{
106 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
107}
108
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109void cpu_reset_interrupt(CPUState *cpu, int mask)
110{
111 cpu->interrupt_request &= ~mask;
112}
113
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114void cpu_exit(CPUState *cpu)
115{
116 cpu->exit_request = 1;
117 cpu->tcg_exit_req = 1;
118}
119
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120int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
121 void *opaque)
122{
123 CPUClass *cc = CPU_GET_CLASS(cpu);
124
125 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
126}
127
128static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
129 CPUState *cpu, void *opaque)
130{
131 return -1;
132}
133
134int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
135 int cpuid, void *opaque)
136{
137 CPUClass *cc = CPU_GET_CLASS(cpu);
138
139 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
140}
141
142static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
143 CPUState *cpu, int cpuid,
144 void *opaque)
145{
146 return -1;
147}
148
149int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
150 void *opaque)
151{
152 CPUClass *cc = CPU_GET_CLASS(cpu);
153
154 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
155}
156
157static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
158 CPUState *cpu, void *opaque)
159{
160 return -1;
161}
162
163int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
164 int cpuid, void *opaque)
165{
166 CPUClass *cc = CPU_GET_CLASS(cpu);
167
168 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
169}
170
171static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
172 CPUState *cpu, int cpuid,
173 void *opaque)
174{
175 return -1;
176}
177
178
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179static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
180{
181 return 0;
182}
183
184static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
185{
186 return 0;
187}
188
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GK
189bool target_words_bigendian(void);
190static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
191{
192 return target_words_bigendian();
193}
5b50e790 194
cffe7b32 195static void cpu_common_noop(CPUState *cpu)
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PM
196{
197}
198
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199static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
200{
201 return false;
202}
203
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204void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
205 int flags)
206{
207 CPUClass *cc = CPU_GET_CLASS(cpu);
208
209 if (cc->dump_state) {
97577fd4 210 cpu_synchronize_state(cpu);
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211 cc->dump_state(cpu, f, cpu_fprintf, flags);
212 }
213}
214
215void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
216 int flags)
217{
218 CPUClass *cc = CPU_GET_CLASS(cpu);
219
220 if (cc->dump_statistics) {
221 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
222 }
223}
224
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225void cpu_reset(CPUState *cpu)
226{
227 CPUClass *klass = CPU_GET_CLASS(cpu);
228
229 if (klass->reset != NULL) {
230 (*klass->reset)(cpu);
231 }
232}
233
234static void cpu_common_reset(CPUState *cpu)
235{
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236 CPUClass *cc = CPU_GET_CLASS(cpu);
237
238 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
239 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
240 log_cpu_state(cpu, cc->reset_dump_flags);
241 }
242
259186a7 243 cpu->interrupt_request = 0;
d77953b9 244 cpu->current_tb = NULL;
259186a7 245 cpu->halted = 0;
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246 cpu->mem_io_pc = 0;
247 cpu->mem_io_vaddr = 0;
efee7340 248 cpu->icount_extra = 0;
28ecfd7a 249 cpu->icount_decr.u32 = 0;
99df7dce 250 cpu->can_do_io = 0;
f9d8f667 251 cpu->exception_index = -1;
8cd70437 252 memset(cpu->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof(void *));
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253}
254
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255static bool cpu_common_has_work(CPUState *cs)
256{
257 return false;
258}
259
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260ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
261{
262 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
263
264 return cc->class_by_name(cpu_model);
265}
266
267static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
268{
269 return NULL;
270}
271
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272static void cpu_common_parse_features(CPUState *cpu, char *features,
273 Error **errp)
274{
275 char *featurestr; /* Single "key=value" string being parsed */
276 char *val;
277 Error *err = NULL;
278
279 featurestr = features ? strtok(features, ",") : NULL;
280
281 while (featurestr) {
282 val = strchr(featurestr, '=');
283 if (val) {
284 *val = 0;
285 val++;
286 object_property_parse(OBJECT(cpu), val, featurestr, &err);
287 if (err) {
288 error_propagate(errp, err);
289 return;
290 }
291 } else {
292 error_setg(errp, "Expected key=value format, found %s.",
293 featurestr);
294 return;
295 }
296 featurestr = strtok(NULL, ",");
297 }
298}
299
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300static void cpu_common_realizefn(DeviceState *dev, Error **errp)
301{
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302 CPUState *cpu = CPU(dev);
303
304 if (dev->hotplugged) {
305 cpu_synchronize_post_init(cpu);
6afb4721 306 cpu_resume(cpu);
13eed94e 307 }
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308}
309
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310static void cpu_common_initfn(Object *obj)
311{
312 CPUState *cpu = CPU(obj);
313 CPUClass *cc = CPU_GET_CLASS(obj);
314
b7bca733 315 cpu->cpu_index = -1;
35143f01 316 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
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EH
317 QTAILQ_INIT(&cpu->breakpoints);
318 QTAILQ_INIT(&cpu->watchpoints);
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319}
320
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321static void cpu_common_finalize(Object *obj)
322{
323 cpu_exec_exit(CPU(obj));
324}
325
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326static int64_t cpu_common_get_arch_id(CPUState *cpu)
327{
328 return cpu->cpu_index;
329}
330
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331static void cpu_class_init(ObjectClass *klass, void *data)
332{
961f8395 333 DeviceClass *dc = DEVICE_CLASS(klass);
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334 CPUClass *k = CPU_CLASS(klass);
335
2b8c2754 336 k->class_by_name = cpu_common_class_by_name;
1590bbcb 337 k->parse_features = cpu_common_parse_features;
dd83b06a 338 k->reset = cpu_common_reset;
997395d3 339 k->get_arch_id = cpu_common_get_arch_id;
8c2e1b00 340 k->has_work = cpu_common_has_work;
444d5590 341 k->get_paging_enabled = cpu_common_get_paging_enabled;
a23bbfda 342 k->get_memory_mapping = cpu_common_get_memory_mapping;
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343 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
344 k->write_elf32_note = cpu_common_write_elf32_note;
345 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
346 k->write_elf64_note = cpu_common_write_elf64_note;
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347 k->gdb_read_register = cpu_common_gdb_read_register;
348 k->gdb_write_register = cpu_common_gdb_write_register;
bf7663c4 349 k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
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350 k->debug_excp_handler = cpu_common_noop;
351 k->cpu_exec_enter = cpu_common_noop;
352 k->cpu_exec_exit = cpu_common_noop;
9585db68 353 k->cpu_exec_interrupt = cpu_common_exec_interrupt;
4f658099 354 dc->realize = cpu_common_realizefn;
ffa95714
MA
355 /*
356 * Reason: CPUs still need special care by board code: wiring up
357 * IRQs, adding reset handlers, halting non-first CPUs, ...
358 */
359 dc->cannot_instantiate_with_device_add_yet = true;
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360}
361
961f8395 362static const TypeInfo cpu_type_info = {
dd83b06a 363 .name = TYPE_CPU,
961f8395 364 .parent = TYPE_DEVICE,
dd83b06a 365 .instance_size = sizeof(CPUState),
a0e372f0 366 .instance_init = cpu_common_initfn,
b7bca733 367 .instance_finalize = cpu_common_finalize,
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368 .abstract = true,
369 .class_size = sizeof(CPUClass),
370 .class_init = cpu_class_init,
371};
372
373static void cpu_register_types(void)
374{
375 type_register_static(&cpu_type_info);
376}
377
378type_init(cpu_register_types)