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Commit | Line | Data |
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dd83b06a AF |
1 | /* |
2 | * QEMU CPU model | |
3 | * | |
1590bbcb | 4 | * Copyright (c) 2012-2014 SUSE LINUX Products GmbH |
dd83b06a AF |
5 | * |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version 2 | |
9 | * of the License, or (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, see | |
18 | * <http://www.gnu.org/licenses/gpl-2.0.html> | |
19 | */ | |
20 | ||
1ef26b1f | 21 | #include "qemu/osdep.h" |
dd83b06a | 22 | #include "qemu-common.h" |
878096ee | 23 | #include "qom/cpu.h" |
13eed94e | 24 | #include "sysemu/kvm.h" |
066e9b27 | 25 | #include "qemu/notify.h" |
91b1df8c | 26 | #include "qemu/log.h" |
508127e2 | 27 | #include "exec/log.h" |
9262685b | 28 | #include "qemu/error-report.h" |
066e9b27 IM |
29 | #include "sysemu/sysemu.h" |
30 | ||
69e5ff06 IM |
31 | bool cpu_exists(int64_t id) |
32 | { | |
38fcbd3f AF |
33 | CPUState *cpu; |
34 | ||
35 | CPU_FOREACH(cpu) { | |
36 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
69e5ff06 | 37 | |
38fcbd3f AF |
38 | if (cc->get_arch_id(cpu) == id) { |
39 | return true; | |
40 | } | |
41 | } | |
42 | return false; | |
69e5ff06 IM |
43 | } |
44 | ||
9262685b AF |
45 | CPUState *cpu_generic_init(const char *typename, const char *cpu_model) |
46 | { | |
47 | char *str, *name, *featurestr; | |
48 | CPUState *cpu; | |
49 | ObjectClass *oc; | |
50 | CPUClass *cc; | |
51 | Error *err = NULL; | |
52 | ||
53 | str = g_strdup(cpu_model); | |
54 | name = strtok(str, ","); | |
55 | ||
56 | oc = cpu_class_by_name(typename, name); | |
57 | if (oc == NULL) { | |
58 | g_free(str); | |
59 | return NULL; | |
60 | } | |
61 | ||
62 | cpu = CPU(object_new(object_class_get_name(oc))); | |
63 | cc = CPU_GET_CLASS(cpu); | |
64 | ||
65 | featurestr = strtok(NULL, ","); | |
66 | cc->parse_features(cpu, featurestr, &err); | |
67 | g_free(str); | |
68 | if (err != NULL) { | |
69 | goto out; | |
70 | } | |
71 | ||
72 | object_property_set_bool(OBJECT(cpu), true, "realized", &err); | |
73 | ||
74 | out: | |
75 | if (err != NULL) { | |
565f65d2 | 76 | error_report_err(err); |
9262685b AF |
77 | object_unref(OBJECT(cpu)); |
78 | return NULL; | |
79 | } | |
80 | ||
81 | return cpu; | |
82 | } | |
83 | ||
444d5590 AF |
84 | bool cpu_paging_enabled(const CPUState *cpu) |
85 | { | |
86 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
87 | ||
88 | return cc->get_paging_enabled(cpu); | |
89 | } | |
90 | ||
91 | static bool cpu_common_get_paging_enabled(const CPUState *cpu) | |
92 | { | |
6db297ea | 93 | return false; |
444d5590 AF |
94 | } |
95 | ||
a23bbfda AF |
96 | void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, |
97 | Error **errp) | |
98 | { | |
99 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
100 | ||
fbe95bfb | 101 | cc->get_memory_mapping(cpu, list, errp); |
a23bbfda AF |
102 | } |
103 | ||
104 | static void cpu_common_get_memory_mapping(CPUState *cpu, | |
105 | MemoryMappingList *list, | |
106 | Error **errp) | |
107 | { | |
108 | error_setg(errp, "Obtaining memory mappings is unsupported on this CPU."); | |
109 | } | |
110 | ||
d8ed887b AF |
111 | void cpu_reset_interrupt(CPUState *cpu, int mask) |
112 | { | |
113 | cpu->interrupt_request &= ~mask; | |
114 | } | |
115 | ||
60a3e17a AF |
116 | void cpu_exit(CPUState *cpu) |
117 | { | |
118 | cpu->exit_request = 1; | |
ab096a75 PB |
119 | /* Ensure cpu_exec will see the exit request after TCG has exited. */ |
120 | smp_wmb(); | |
60a3e17a AF |
121 | cpu->tcg_exit_req = 1; |
122 | } | |
123 | ||
c72bf468 JF |
124 | int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, |
125 | void *opaque) | |
126 | { | |
127 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
128 | ||
129 | return (*cc->write_elf32_qemunote)(f, cpu, opaque); | |
130 | } | |
131 | ||
132 | static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f, | |
133 | CPUState *cpu, void *opaque) | |
134 | { | |
b09afd58 | 135 | return 0; |
c72bf468 JF |
136 | } |
137 | ||
138 | int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, | |
139 | int cpuid, void *opaque) | |
140 | { | |
141 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
142 | ||
143 | return (*cc->write_elf32_note)(f, cpu, cpuid, opaque); | |
144 | } | |
145 | ||
146 | static int cpu_common_write_elf32_note(WriteCoreDumpFunction f, | |
147 | CPUState *cpu, int cpuid, | |
148 | void *opaque) | |
149 | { | |
150 | return -1; | |
151 | } | |
152 | ||
153 | int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu, | |
154 | void *opaque) | |
155 | { | |
156 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
157 | ||
158 | return (*cc->write_elf64_qemunote)(f, cpu, opaque); | |
159 | } | |
160 | ||
161 | static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f, | |
162 | CPUState *cpu, void *opaque) | |
163 | { | |
b09afd58 | 164 | return 0; |
c72bf468 JF |
165 | } |
166 | ||
167 | int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, | |
168 | int cpuid, void *opaque) | |
169 | { | |
170 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
171 | ||
172 | return (*cc->write_elf64_note)(f, cpu, cpuid, opaque); | |
173 | } | |
174 | ||
175 | static int cpu_common_write_elf64_note(WriteCoreDumpFunction f, | |
176 | CPUState *cpu, int cpuid, | |
177 | void *opaque) | |
178 | { | |
179 | return -1; | |
180 | } | |
181 | ||
182 | ||
5b50e790 AF |
183 | static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg) |
184 | { | |
185 | return 0; | |
186 | } | |
187 | ||
188 | static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg) | |
189 | { | |
190 | return 0; | |
191 | } | |
192 | ||
568496c0 SF |
193 | static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp) |
194 | { | |
195 | /* If no extra check is required, QEMU watchpoint match can be considered | |
196 | * as an architectural match. | |
197 | */ | |
198 | return true; | |
199 | } | |
200 | ||
bf7663c4 GK |
201 | bool target_words_bigendian(void); |
202 | static bool cpu_common_virtio_is_big_endian(CPUState *cpu) | |
203 | { | |
204 | return target_words_bigendian(); | |
205 | } | |
5b50e790 | 206 | |
cffe7b32 | 207 | static void cpu_common_noop(CPUState *cpu) |
86025ee4 PM |
208 | { |
209 | } | |
210 | ||
9585db68 RH |
211 | static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req) |
212 | { | |
213 | return false; | |
214 | } | |
215 | ||
878096ee AF |
216 | void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, |
217 | int flags) | |
218 | { | |
219 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
220 | ||
221 | if (cc->dump_state) { | |
97577fd4 | 222 | cpu_synchronize_state(cpu); |
878096ee AF |
223 | cc->dump_state(cpu, f, cpu_fprintf, flags); |
224 | } | |
225 | } | |
226 | ||
227 | void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, | |
228 | int flags) | |
229 | { | |
230 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
231 | ||
232 | if (cc->dump_statistics) { | |
233 | cc->dump_statistics(cpu, f, cpu_fprintf, flags); | |
234 | } | |
235 | } | |
236 | ||
dd83b06a AF |
237 | void cpu_reset(CPUState *cpu) |
238 | { | |
239 | CPUClass *klass = CPU_GET_CLASS(cpu); | |
240 | ||
241 | if (klass->reset != NULL) { | |
242 | (*klass->reset)(cpu); | |
243 | } | |
244 | } | |
245 | ||
246 | static void cpu_common_reset(CPUState *cpu) | |
247 | { | |
91b1df8c AF |
248 | CPUClass *cc = CPU_GET_CLASS(cpu); |
249 | ||
250 | if (qemu_loglevel_mask(CPU_LOG_RESET)) { | |
251 | qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index); | |
252 | log_cpu_state(cpu, cc->reset_dump_flags); | |
253 | } | |
254 | ||
259186a7 | 255 | cpu->interrupt_request = 0; |
d77953b9 | 256 | cpu->current_tb = NULL; |
259186a7 | 257 | cpu->halted = 0; |
93afeade AF |
258 | cpu->mem_io_pc = 0; |
259 | cpu->mem_io_vaddr = 0; | |
efee7340 | 260 | cpu->icount_extra = 0; |
28ecfd7a | 261 | cpu->icount_decr.u32 = 0; |
414b15c9 | 262 | cpu->can_do_io = 1; |
f9d8f667 | 263 | cpu->exception_index = -1; |
bac05aa9 | 264 | cpu->crash_occurred = false; |
8cd70437 | 265 | memset(cpu->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof(void *)); |
dd83b06a AF |
266 | } |
267 | ||
8c2e1b00 AF |
268 | static bool cpu_common_has_work(CPUState *cs) |
269 | { | |
270 | return false; | |
271 | } | |
272 | ||
2b8c2754 AF |
273 | ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) |
274 | { | |
275 | CPUClass *cc = CPU_CLASS(object_class_by_name(typename)); | |
276 | ||
277 | return cc->class_by_name(cpu_model); | |
278 | } | |
279 | ||
280 | static ObjectClass *cpu_common_class_by_name(const char *cpu_model) | |
281 | { | |
282 | return NULL; | |
283 | } | |
284 | ||
1590bbcb AF |
285 | static void cpu_common_parse_features(CPUState *cpu, char *features, |
286 | Error **errp) | |
287 | { | |
288 | char *featurestr; /* Single "key=value" string being parsed */ | |
289 | char *val; | |
290 | Error *err = NULL; | |
291 | ||
292 | featurestr = features ? strtok(features, ",") : NULL; | |
293 | ||
294 | while (featurestr) { | |
295 | val = strchr(featurestr, '='); | |
296 | if (val) { | |
297 | *val = 0; | |
298 | val++; | |
299 | object_property_parse(OBJECT(cpu), val, featurestr, &err); | |
300 | if (err) { | |
301 | error_propagate(errp, err); | |
302 | return; | |
303 | } | |
304 | } else { | |
305 | error_setg(errp, "Expected key=value format, found %s.", | |
306 | featurestr); | |
307 | return; | |
308 | } | |
309 | featurestr = strtok(NULL, ","); | |
310 | } | |
311 | } | |
312 | ||
4f658099 AF |
313 | static void cpu_common_realizefn(DeviceState *dev, Error **errp) |
314 | { | |
13eed94e IM |
315 | CPUState *cpu = CPU(dev); |
316 | ||
317 | if (dev->hotplugged) { | |
318 | cpu_synchronize_post_init(cpu); | |
6afb4721 | 319 | cpu_resume(cpu); |
13eed94e | 320 | } |
4f658099 AF |
321 | } |
322 | ||
a0e372f0 AF |
323 | static void cpu_common_initfn(Object *obj) |
324 | { | |
325 | CPUState *cpu = CPU(obj); | |
326 | CPUClass *cc = CPU_GET_CLASS(obj); | |
327 | ||
b7bca733 | 328 | cpu->cpu_index = -1; |
35143f01 | 329 | cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs; |
376692b9 | 330 | qemu_mutex_init(&cpu->work_mutex); |
7c39163e EH |
331 | QTAILQ_INIT(&cpu->breakpoints); |
332 | QTAILQ_INIT(&cpu->watchpoints); | |
a0e372f0 AF |
333 | } |
334 | ||
b7bca733 BR |
335 | static void cpu_common_finalize(Object *obj) |
336 | { | |
337 | cpu_exec_exit(CPU(obj)); | |
338 | } | |
339 | ||
997395d3 IM |
340 | static int64_t cpu_common_get_arch_id(CPUState *cpu) |
341 | { | |
342 | return cpu->cpu_index; | |
343 | } | |
344 | ||
dd83b06a AF |
345 | static void cpu_class_init(ObjectClass *klass, void *data) |
346 | { | |
961f8395 | 347 | DeviceClass *dc = DEVICE_CLASS(klass); |
dd83b06a AF |
348 | CPUClass *k = CPU_CLASS(klass); |
349 | ||
2b8c2754 | 350 | k->class_by_name = cpu_common_class_by_name; |
1590bbcb | 351 | k->parse_features = cpu_common_parse_features; |
dd83b06a | 352 | k->reset = cpu_common_reset; |
997395d3 | 353 | k->get_arch_id = cpu_common_get_arch_id; |
8c2e1b00 | 354 | k->has_work = cpu_common_has_work; |
444d5590 | 355 | k->get_paging_enabled = cpu_common_get_paging_enabled; |
a23bbfda | 356 | k->get_memory_mapping = cpu_common_get_memory_mapping; |
c72bf468 JF |
357 | k->write_elf32_qemunote = cpu_common_write_elf32_qemunote; |
358 | k->write_elf32_note = cpu_common_write_elf32_note; | |
359 | k->write_elf64_qemunote = cpu_common_write_elf64_qemunote; | |
360 | k->write_elf64_note = cpu_common_write_elf64_note; | |
5b50e790 AF |
361 | k->gdb_read_register = cpu_common_gdb_read_register; |
362 | k->gdb_write_register = cpu_common_gdb_write_register; | |
bf7663c4 | 363 | k->virtio_is_big_endian = cpu_common_virtio_is_big_endian; |
cffe7b32 | 364 | k->debug_excp_handler = cpu_common_noop; |
568496c0 | 365 | k->debug_check_watchpoint = cpu_common_debug_check_watchpoint; |
cffe7b32 RH |
366 | k->cpu_exec_enter = cpu_common_noop; |
367 | k->cpu_exec_exit = cpu_common_noop; | |
9585db68 | 368 | k->cpu_exec_interrupt = cpu_common_exec_interrupt; |
4f658099 | 369 | dc->realize = cpu_common_realizefn; |
ffa95714 MA |
370 | /* |
371 | * Reason: CPUs still need special care by board code: wiring up | |
372 | * IRQs, adding reset handlers, halting non-first CPUs, ... | |
373 | */ | |
374 | dc->cannot_instantiate_with_device_add_yet = true; | |
dd83b06a AF |
375 | } |
376 | ||
961f8395 | 377 | static const TypeInfo cpu_type_info = { |
dd83b06a | 378 | .name = TYPE_CPU, |
961f8395 | 379 | .parent = TYPE_DEVICE, |
dd83b06a | 380 | .instance_size = sizeof(CPUState), |
a0e372f0 | 381 | .instance_init = cpu_common_initfn, |
b7bca733 | 382 | .instance_finalize = cpu_common_finalize, |
dd83b06a AF |
383 | .abstract = true, |
384 | .class_size = sizeof(CPUClass), | |
385 | .class_init = cpu_class_init, | |
386 | }; | |
387 | ||
388 | static void cpu_register_types(void) | |
389 | { | |
390 | type_register_static(&cpu_type_info); | |
391 | } | |
392 | ||
393 | type_init(cpu_register_types) |