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c7f0f3b1 AL |
1 | /* |
2 | * Test Server | |
3 | * | |
4 | * Copyright IBM, Corp. 2011 | |
5 | * | |
6 | * Authors: | |
7 | * Anthony Liguori <aliguori@us.ibm.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | * | |
12 | */ | |
13 | ||
14 | #include "qtest.h" | |
20288345 | 15 | #include "hw/qdev.h" |
c7f0f3b1 AL |
16 | #include "qemu-char.h" |
17 | #include "ioport.h" | |
18 | #include "memory.h" | |
19 | #include "hw/irq.h" | |
20 | #include "sysemu.h" | |
21 | ||
22 | #define MAX_IRQ 256 | |
23 | ||
24 | const char *qtest_chrdev; | |
25 | const char *qtest_log; | |
26 | int qtest_allowed = 0; | |
27 | ||
20288345 | 28 | static DeviceState *irq_intercept_dev; |
c7f0f3b1 AL |
29 | static FILE *qtest_log_fp; |
30 | static CharDriverState *qtest_chr; | |
31 | static GString *inbuf; | |
32 | static int irq_levels[MAX_IRQ]; | |
33 | static struct timeval start_time; | |
34 | static bool qtest_opened; | |
35 | ||
36 | #define FMT_timeval "%" PRId64 ".%06" PRId64 | |
37 | ||
38 | /** | |
39 | * QTest Protocol | |
40 | * | |
41 | * Line based protocol, request/response based. Server can send async messages | |
42 | * so clients should always handle many async messages before the response | |
43 | * comes in. | |
44 | * | |
45 | * Valid requests | |
46 | * | |
47 | * > outb ADDR VALUE | |
48 | * < OK | |
49 | * | |
50 | * > outw ADDR VALUE | |
51 | * < OK | |
52 | * | |
53 | * > outl ADDR VALUE | |
54 | * < OK | |
55 | * | |
56 | * > inb ADDR | |
57 | * < OK VALUE | |
58 | * | |
59 | * > inw ADDR | |
60 | * < OK VALUE | |
61 | * | |
62 | * > inl ADDR | |
63 | * < OK VALUE | |
64 | * | |
65 | * > read ADDR SIZE | |
66 | * < OK DATA | |
67 | * | |
68 | * > write ADDR SIZE DATA | |
69 | * < OK | |
70 | * | |
c7f0f3b1 AL |
71 | * ADDR, SIZE, VALUE are all integers parsed with strtoul() with a base of 0. |
72 | * | |
73 | * DATA is an arbitrarily long hex number prefixed with '0x'. If it's smaller | |
74 | * than the expected size, the value will be zero filled at the end of the data | |
75 | * sequence. | |
76 | * | |
20288345 PB |
77 | * IRQ management: |
78 | * | |
79 | * > irq_intercept_in QOM-PATH | |
80 | * < OK | |
81 | * | |
82 | * > irq_intercept_out QOM-PATH | |
83 | * < OK | |
84 | * | |
85 | * Attach to the gpio-in (resp. gpio-out) pins exported by the device at | |
86 | * QOM-PATH. When the pin is triggered, one of the following async messages | |
87 | * will be printed to the qtest stream: | |
88 | * | |
89 | * IRQ raise NUM | |
90 | * IRQ lower NUM | |
91 | * | |
92 | * where NUM is an IRQ number. For the PC, interrupts can be intercepted | |
93 | * simply with "irq_intercept_in ioapic" (note that IRQ0 comes out with | |
94 | * NUM=0 even though it is remapped to GSI 2). | |
c7f0f3b1 AL |
95 | */ |
96 | ||
97 | static int hex2nib(char ch) | |
98 | { | |
99 | if (ch >= '0' && ch <= '9') { | |
100 | return ch - '0'; | |
101 | } else if (ch >= 'a' && ch <= 'f') { | |
102 | return 10 + (ch - 'a'); | |
103 | } else if (ch >= 'A' && ch <= 'F') { | |
104 | return 10 + (ch - 'a'); | |
105 | } else { | |
106 | return -1; | |
107 | } | |
108 | } | |
109 | ||
110 | static void qtest_get_time(struct timeval *tv) | |
111 | { | |
112 | gettimeofday(tv, NULL); | |
113 | tv->tv_sec -= start_time.tv_sec; | |
114 | tv->tv_usec -= start_time.tv_usec; | |
115 | if (tv->tv_usec < 0) { | |
116 | tv->tv_usec += 1000000; | |
117 | tv->tv_sec -= 1; | |
118 | } | |
119 | } | |
120 | ||
121 | static void qtest_send_prefix(CharDriverState *chr) | |
122 | { | |
123 | struct timeval tv; | |
124 | ||
125 | if (!qtest_log_fp || !qtest_opened) { | |
126 | return; | |
127 | } | |
128 | ||
129 | qtest_get_time(&tv); | |
130 | fprintf(qtest_log_fp, "[S +" FMT_timeval "] ", | |
131 | tv.tv_sec, tv.tv_usec); | |
132 | } | |
133 | ||
134 | static void qtest_send(CharDriverState *chr, const char *fmt, ...) | |
135 | { | |
136 | va_list ap; | |
137 | char buffer[1024]; | |
138 | size_t len; | |
139 | ||
140 | va_start(ap, fmt); | |
141 | len = vsnprintf(buffer, sizeof(buffer), fmt, ap); | |
142 | va_end(ap); | |
143 | ||
144 | qemu_chr_fe_write(chr, (uint8_t *)buffer, len); | |
145 | if (qtest_log_fp && qtest_opened) { | |
146 | fprintf(qtest_log_fp, "%s", buffer); | |
147 | } | |
148 | } | |
149 | ||
20288345 PB |
150 | static void qtest_irq_handler(void *opaque, int n, int level) |
151 | { | |
152 | qemu_irq *old_irqs = opaque; | |
153 | qemu_set_irq(old_irqs[n], level); | |
154 | ||
155 | if (irq_levels[n] != level) { | |
156 | CharDriverState *chr = qtest_chr; | |
157 | irq_levels[n] = level; | |
158 | qtest_send_prefix(chr); | |
159 | qtest_send(chr, "IRQ %s %d\n", | |
160 | level ? "raise" : "lower", n); | |
161 | } | |
162 | } | |
163 | ||
c7f0f3b1 AL |
164 | static void qtest_process_command(CharDriverState *chr, gchar **words) |
165 | { | |
166 | const gchar *command; | |
167 | ||
168 | g_assert(words); | |
169 | ||
170 | command = words[0]; | |
171 | ||
172 | if (qtest_log_fp) { | |
173 | struct timeval tv; | |
174 | int i; | |
175 | ||
176 | qtest_get_time(&tv); | |
177 | fprintf(qtest_log_fp, "[R +" FMT_timeval "]", | |
178 | tv.tv_sec, tv.tv_usec); | |
179 | for (i = 0; words[i]; i++) { | |
180 | fprintf(qtest_log_fp, " %s", words[i]); | |
181 | } | |
182 | fprintf(qtest_log_fp, "\n"); | |
183 | } | |
184 | ||
185 | g_assert(command); | |
20288345 PB |
186 | if (strcmp(words[0], "irq_intercept_out") == 0 |
187 | || strcmp(words[0], "irq_intercept_in") == 0) { | |
188 | DeviceState *dev; | |
189 | ||
190 | g_assert(words[1]); | |
191 | dev = DEVICE(object_resolve_path(words[1], NULL)); | |
192 | if (!dev) { | |
193 | qtest_send_prefix(chr); | |
194 | qtest_send(chr, "FAIL Unknown device\n"); | |
195 | return; | |
196 | } | |
197 | ||
198 | if (irq_intercept_dev) { | |
199 | qtest_send_prefix(chr); | |
200 | if (irq_intercept_dev != dev) { | |
201 | qtest_send(chr, "FAIL IRQ intercept already enabled\n"); | |
202 | } else { | |
203 | qtest_send(chr, "OK\n"); | |
204 | } | |
205 | return; | |
206 | } | |
207 | ||
208 | if (words[0][14] == 'o') { | |
209 | qemu_irq_intercept_out(&dev->gpio_out, qtest_irq_handler, dev->num_gpio_out); | |
210 | } else { | |
211 | qemu_irq_intercept_in(dev->gpio_in, qtest_irq_handler, dev->num_gpio_in); | |
212 | } | |
213 | irq_intercept_dev = dev; | |
214 | qtest_send_prefix(chr); | |
215 | qtest_send(chr, "OK\n"); | |
216 | ||
217 | } else if (strcmp(words[0], "outb") == 0 || | |
218 | strcmp(words[0], "outw") == 0 || | |
219 | strcmp(words[0], "outl") == 0) { | |
c7f0f3b1 AL |
220 | uint16_t addr; |
221 | uint32_t value; | |
222 | ||
223 | g_assert(words[1] && words[2]); | |
224 | addr = strtol(words[1], NULL, 0); | |
225 | value = strtol(words[2], NULL, 0); | |
226 | ||
227 | if (words[0][3] == 'b') { | |
228 | cpu_outb(addr, value); | |
229 | } else if (words[0][3] == 'w') { | |
230 | cpu_outw(addr, value); | |
231 | } else if (words[0][3] == 'l') { | |
232 | cpu_outl(addr, value); | |
233 | } | |
234 | qtest_send_prefix(chr); | |
235 | qtest_send(chr, "OK\n"); | |
236 | } else if (strcmp(words[0], "inb") == 0 || | |
237 | strcmp(words[0], "inw") == 0 || | |
238 | strcmp(words[0], "inl") == 0) { | |
239 | uint16_t addr; | |
240 | uint32_t value = -1U; | |
241 | ||
242 | g_assert(words[1]); | |
243 | addr = strtol(words[1], NULL, 0); | |
244 | ||
245 | if (words[0][2] == 'b') { | |
246 | value = cpu_inb(addr); | |
247 | } else if (words[0][2] == 'w') { | |
248 | value = cpu_inw(addr); | |
249 | } else if (words[0][2] == 'l') { | |
250 | value = cpu_inl(addr); | |
251 | } | |
252 | qtest_send_prefix(chr); | |
253 | qtest_send(chr, "OK 0x%04x\n", value); | |
254 | } else if (strcmp(words[0], "read") == 0) { | |
255 | uint64_t addr, len, i; | |
256 | uint8_t *data; | |
257 | ||
258 | g_assert(words[1] && words[2]); | |
259 | addr = strtoul(words[1], NULL, 0); | |
260 | len = strtoul(words[2], NULL, 0); | |
261 | ||
262 | data = g_malloc(len); | |
263 | cpu_physical_memory_read(addr, data, len); | |
264 | ||
265 | qtest_send_prefix(chr); | |
266 | qtest_send(chr, "OK 0x"); | |
267 | for (i = 0; i < len; i++) { | |
268 | qtest_send(chr, "%02x", data[i]); | |
269 | } | |
270 | qtest_send(chr, "\n"); | |
271 | ||
272 | g_free(data); | |
273 | } else if (strcmp(words[0], "write") == 0) { | |
274 | uint64_t addr, len, i; | |
275 | uint8_t *data; | |
276 | size_t data_len; | |
277 | ||
278 | g_assert(words[1] && words[2] && words[3]); | |
279 | addr = strtoul(words[1], NULL, 0); | |
280 | len = strtoul(words[2], NULL, 0); | |
281 | ||
282 | data_len = strlen(words[3]); | |
283 | if (data_len < 3) { | |
284 | qtest_send(chr, "ERR invalid argument size\n"); | |
285 | return; | |
286 | } | |
287 | ||
288 | data = g_malloc(len); | |
289 | for (i = 0; i < len; i++) { | |
290 | if ((i * 2 + 4) <= data_len) { | |
291 | data[i] = hex2nib(words[3][i * 2 + 2]) << 4; | |
292 | data[i] |= hex2nib(words[3][i * 2 + 3]); | |
293 | } else { | |
294 | data[i] = 0; | |
295 | } | |
296 | } | |
297 | cpu_physical_memory_write(addr, data, len); | |
298 | g_free(data); | |
299 | ||
300 | qtest_send_prefix(chr); | |
301 | qtest_send(chr, "OK\n"); | |
302 | } else { | |
303 | qtest_send_prefix(chr); | |
304 | qtest_send(chr, "FAIL Unknown command `%s'\n", words[0]); | |
305 | } | |
306 | } | |
307 | ||
308 | static void qtest_process_inbuf(CharDriverState *chr, GString *inbuf) | |
309 | { | |
310 | char *end; | |
311 | ||
312 | while ((end = strchr(inbuf->str, '\n')) != NULL) { | |
313 | size_t offset; | |
314 | GString *cmd; | |
315 | gchar **words; | |
316 | ||
317 | offset = end - inbuf->str; | |
318 | ||
319 | cmd = g_string_new_len(inbuf->str, offset); | |
320 | g_string_erase(inbuf, 0, offset + 1); | |
321 | ||
322 | words = g_strsplit(cmd->str, " ", 0); | |
323 | qtest_process_command(chr, words); | |
324 | g_strfreev(words); | |
325 | ||
326 | g_string_free(cmd, TRUE); | |
327 | } | |
328 | } | |
329 | ||
330 | static void qtest_read(void *opaque, const uint8_t *buf, int size) | |
331 | { | |
332 | CharDriverState *chr = opaque; | |
333 | ||
334 | g_string_append_len(inbuf, (const gchar *)buf, size); | |
335 | qtest_process_inbuf(chr, inbuf); | |
336 | } | |
337 | ||
338 | static int qtest_can_read(void *opaque) | |
339 | { | |
340 | return 1024; | |
341 | } | |
342 | ||
343 | static void qtest_event(void *opaque, int event) | |
344 | { | |
345 | int i; | |
346 | ||
347 | switch (event) { | |
348 | case CHR_EVENT_OPENED: | |
349 | qemu_system_reset(false); | |
350 | for (i = 0; i < ARRAY_SIZE(irq_levels); i++) { | |
351 | irq_levels[i] = 0; | |
352 | } | |
353 | gettimeofday(&start_time, NULL); | |
354 | qtest_opened = true; | |
355 | if (qtest_log_fp) { | |
356 | fprintf(qtest_log_fp, "[I " FMT_timeval "] OPENED\n", | |
357 | start_time.tv_sec, start_time.tv_usec); | |
358 | } | |
359 | break; | |
360 | case CHR_EVENT_CLOSED: | |
361 | qtest_opened = false; | |
362 | if (qtest_log_fp) { | |
363 | struct timeval tv; | |
364 | qtest_get_time(&tv); | |
365 | fprintf(qtest_log_fp, "[I +" FMT_timeval "] CLOSED\n", | |
366 | tv.tv_sec, tv.tv_usec); | |
367 | } | |
368 | break; | |
369 | default: | |
370 | break; | |
371 | } | |
372 | } | |
373 | ||
c7f0f3b1 AL |
374 | int qtest_init(void) |
375 | { | |
376 | CharDriverState *chr; | |
377 | ||
378 | g_assert(qtest_chrdev != NULL); | |
379 | ||
380 | chr = qemu_chr_new("qtest", qtest_chrdev, NULL); | |
381 | ||
382 | qemu_chr_add_handlers(chr, qtest_can_read, qtest_read, qtest_event, chr); | |
383 | qemu_chr_fe_set_echo(chr, true); | |
384 | ||
385 | inbuf = g_string_new(""); | |
386 | ||
387 | if (qtest_log) { | |
388 | if (strcmp(qtest_log, "none") != 0) { | |
389 | qtest_log_fp = fopen(qtest_log, "w+"); | |
390 | } | |
391 | } else { | |
392 | qtest_log_fp = stderr; | |
393 | } | |
394 | ||
395 | qtest_chr = chr; | |
396 | ||
397 | return 0; | |
398 | } |