[mirror_qemu.git] / scripts / kvm / vmxcap

#!/usr/bin/python
#
# tool for querying VMX capabilities
#
# Copyright 2009-2010 Red Hat, Inc.
#
# Authors:
#  Avi Kivity <avi@redhat.com>
#
# This work is licensed under the terms of the GNU GPL, version 2.  See
# the COPYING file in the top-level directory.

from __future__ import print_function
MSR_IA32_VMX_BASIC = 0x480
MSR_IA32_VMX_PINBASED_CTLS = 0x481
MSR_IA32_VMX_PROCBASED_CTLS = 0x482
MSR_IA32_VMX_EXIT_CTLS = 0x483
MSR_IA32_VMX_ENTRY_CTLS = 0x484
MSR_IA32_VMX_MISC_CTLS = 0x485
MSR_IA32_VMX_PROCBASED_CTLS2 = 0x48B
MSR_IA32_VMX_EPT_VPID_CAP = 0x48C
MSR_IA32_VMX_TRUE_PINBASED_CTLS = 0x48D
MSR_IA32_VMX_TRUE_PROCBASED_CTLS = 0x48E
MSR_IA32_VMX_TRUE_EXIT_CTLS = 0x48F
MSR_IA32_VMX_TRUE_ENTRY_CTLS = 0x490
MSR_IA32_VMX_VMFUNC = 0x491

class msr(object):
    def __init__(self):
        try:
            self.f = open('/dev/cpu/0/msr', 'rb', 0)
        except:
            self.f = open('/dev/msr0', 'rb', 0)
    def read(self, index, default = None):
        import struct
        self.f.seek(index)
        try:
            return struct.unpack('Q', self.f.read(8))[0]
        except:
            return default

class Control(object):
    def __init__(self, name, bits, cap_msr, true_cap_msr = None):
        self.name = name
        self.bits = bits
        self.cap_msr = cap_msr
        self.true_cap_msr = true_cap_msr
    def read2(self, nr):
        m = msr()
        val = m.read(nr, 0)
        return (val & 0xffffffff, val >> 32)
    def show(self):
        print(self.name)
        mbz, mb1 = self.read2(self.cap_msr)
        tmbz, tmb1 = 0, 0
        if self.true_cap_msr:
            tmbz, tmb1 = self.read2(self.true_cap_msr)
        for bit in sorted(self.bits.keys()):
            zero = not (mbz & (1 << bit))
            one = mb1 & (1 << bit)
            true_zero = not (tmbz & (1 << bit))
            true_one = tmb1 & (1 << bit)
            s= '?'
            if (self.true_cap_msr and true_zero and true_one
                and one and not zero):
                s = 'default'
            elif zero and not one:
                s = 'no'
            elif one and not zero:
                s = 'forced'
            elif one and zero:
                s = 'yes'
            print('  %-40s %s' % (self.bits[bit], s))

class Misc(object):
    def __init__(self, name, bits, msr):
        self.name = name
        self.bits = bits
        self.msr = msr
    def show(self):
        print(self.name)
        value = msr().read(self.msr, 0)
        print('  Hex: 0x%x' % (value))
        def first_bit(key):
            if type(key) is tuple:
                return key[0]
            else:
                return key
        for bits in sorted(self.bits.keys(), key = first_bit):
            if type(bits) is tuple:
                lo, hi = bits
                fmt = int
            else:
                lo = hi = bits
                def fmt(x):
                    return { True: 'yes', False: 'no' }[x]
            v = (value >> lo) & ((1 << (hi - lo + 1)) - 1)
            print('  %-40s %s' % (self.bits[bits], fmt(v)))

controls = [
    Misc(
        name = 'Basic VMX Information',
        bits = {
            (0, 30): 'Revision',
            (32,44): 'VMCS size',
            48: 'VMCS restricted to 32 bit addresses',
            49: 'Dual-monitor support',
            (50, 53): 'VMCS memory type',
            54: 'INS/OUTS instruction information',
            55: 'IA32_VMX_TRUE_*_CTLS support',
            },
        msr = MSR_IA32_VMX_BASIC,
        ),
    Control(
        name = 'pin-based controls',
        bits = {
            0: 'External interrupt exiting',
            3: 'NMI exiting',
            5: 'Virtual NMIs',
            6: 'Activate VMX-preemption timer',
            7: 'Process posted interrupts',
            },
        cap_msr = MSR_IA32_VMX_PINBASED_CTLS,
        true_cap_msr = MSR_IA32_VMX_TRUE_PINBASED_CTLS,
        ),

    Control(
        name = 'primary processor-based controls',
        bits = {
            2: 'Interrupt window exiting',
            3: 'Use TSC offsetting',
            7: 'HLT exiting',
            9: 'INVLPG exiting',
            10: 'MWAIT exiting',
            11: 'RDPMC exiting',
            12: 'RDTSC exiting',
            15: 'CR3-load exiting',
            16: 'CR3-store exiting',
            19: 'CR8-load exiting',
            20: 'CR8-store exiting',
            21: 'Use TPR shadow',
            22: 'NMI-window exiting',
            23: 'MOV-DR exiting',
            24: 'Unconditional I/O exiting',
            25: 'Use I/O bitmaps',
            27: 'Monitor trap flag',
            28: 'Use MSR bitmaps',
            29: 'MONITOR exiting',
            30: 'PAUSE exiting',
            31: 'Activate secondary control',
            },
        cap_msr = MSR_IA32_VMX_PROCBASED_CTLS,
        true_cap_msr = MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
        ),

    Control(
        name = 'secondary processor-based controls',
        bits = {
            0: 'Virtualize APIC accesses',
            1: 'Enable EPT',
            2: 'Descriptor-table exiting',
            3: 'Enable RDTSCP',
            4: 'Virtualize x2APIC mode',
            5: 'Enable VPID',
            6: 'WBINVD exiting',
            7: 'Unrestricted guest',
            8: 'APIC register emulation',
            9: 'Virtual interrupt delivery',
            10: 'PAUSE-loop exiting',
            11: 'RDRAND exiting',
            12: 'Enable INVPCID',
            13: 'Enable VM functions',
            14: 'VMCS shadowing',
            15: 'Enable ENCLS exiting',
            16: 'RDSEED exiting',
            17: 'Enable PML',
            18: 'EPT-violation #VE',
            19: 'Conceal non-root operation from PT',
            20: 'Enable XSAVES/XRSTORS',
            22: 'Mode-based execute control (XS/XU)',
            25: 'TSC scaling',
            },
        cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
        ),

    Control(
        name = 'VM-Exit controls',
        bits = {
            2: 'Save debug controls',
            9: 'Host address-space size',
            12: 'Load IA32_PERF_GLOBAL_CTRL',
            15: 'Acknowledge interrupt on exit',
            18: 'Save IA32_PAT',
            19: 'Load IA32_PAT',
            20: 'Save IA32_EFER',
            21: 'Load IA32_EFER',
            22: 'Save VMX-preemption timer value',
            23: 'Clear IA32_BNDCFGS',
            24: 'Conceal VM exits from PT',
            },
        cap_msr = MSR_IA32_VMX_EXIT_CTLS,
        true_cap_msr = MSR_IA32_VMX_TRUE_EXIT_CTLS,
        ),

    Control(
        name = 'VM-Entry controls',
        bits = {
            2: 'Load debug controls',
            9: 'IA-32e mode guest',
            10: 'Entry to SMM',
            11: 'Deactivate dual-monitor treatment',
            13: 'Load IA32_PERF_GLOBAL_CTRL',
            14: 'Load IA32_PAT',
            15: 'Load IA32_EFER',
            16: 'Load IA32_BNDCFGS',
            17: 'Conceal VM entries from PT',
            },
        cap_msr = MSR_IA32_VMX_ENTRY_CTLS,
        true_cap_msr = MSR_IA32_VMX_TRUE_ENTRY_CTLS,
        ),

    Misc(
        name = 'Miscellaneous data',
        bits = {
            (0,4): 'VMX-preemption timer scale (log2)',
            5: 'Store EFER.LMA into IA-32e mode guest control',
            6: 'HLT activity state',
            7: 'Shutdown activity state',
            8: 'Wait-for-SIPI activity state',
            15: 'IA32_SMBASE support',
            (16,24): 'Number of CR3-target values',
            (25,27): 'MSR-load/store count recommendation',
            28: 'IA32_SMM_MONITOR_CTL[2] can be set to 1',
            29: 'VMWRITE to VM-exit information fields',
            30: 'Inject event with insn length=0',
            (32,63): 'MSEG revision identifier',
            },
        msr = MSR_IA32_VMX_MISC_CTLS,
        ),

    Misc(
        name = 'VPID and EPT capabilities',
        bits = {
            0: 'Execute-only EPT translations',
            6: 'Page-walk length 4',
            8: 'Paging-structure memory type UC',
            14: 'Paging-structure memory type WB',
            16: '2MB EPT pages',
            17: '1GB EPT pages',
            20: 'INVEPT supported',
            21: 'EPT accessed and dirty flags',
            25: 'Single-context INVEPT',
            26: 'All-context INVEPT',
            32: 'INVVPID supported',
            40: 'Individual-address INVVPID',
            41: 'Single-context INVVPID',
            42: 'All-context INVVPID',
            43: 'Single-context-retaining-globals INVVPID',
            },
        msr = MSR_IA32_VMX_EPT_VPID_CAP,
        ),
    Misc(
        name = 'VM Functions',
        bits = {
            0: 'EPTP Switching',
            },
        msr = MSR_IA32_VMX_VMFUNC,
        ),
    ]

for c in controls:
    c.show()
Commit	Line	Data
5f6caa4f JK	1	#!/usr/bin/python
	2	#
	3	# tool for querying VMX capabilities
	4	#
	5	# Copyright 2009-2010 Red Hat, Inc.
	6	#
	7	# Authors:
	8	# Avi Kivity <avi@redhat.com>
	9	#
	10	# This work is licensed under the terms of the GNU GPL, version 2. See
	11	# the COPYING file in the top-level directory.
	12
f03868bd	13	from __future__ import print_function
5f6caa4f JK	14	MSR_IA32_VMX_BASIC = 0x480
	15	MSR_IA32_VMX_PINBASED_CTLS = 0x481
	16	MSR_IA32_VMX_PROCBASED_CTLS = 0x482
	17	MSR_IA32_VMX_EXIT_CTLS = 0x483
	18	MSR_IA32_VMX_ENTRY_CTLS = 0x484
	19	MSR_IA32_VMX_MISC_CTLS = 0x485
	20	MSR_IA32_VMX_PROCBASED_CTLS2 = 0x48B
	21	MSR_IA32_VMX_EPT_VPID_CAP = 0x48C
	22	MSR_IA32_VMX_TRUE_PINBASED_CTLS = 0x48D
	23	MSR_IA32_VMX_TRUE_PROCBASED_CTLS = 0x48E
	24	MSR_IA32_VMX_TRUE_EXIT_CTLS = 0x48F
	25	MSR_IA32_VMX_TRUE_ENTRY_CTLS = 0x490
287d55c6	26	MSR_IA32_VMX_VMFUNC = 0x491
5f6caa4f JK	27
	28	class msr(object):
	29	def __init__(self):
	30	try:
c3e31eaa	31	self.f = open('/dev/cpu/0/msr', 'rb', 0)
5f6caa4f	32	except:
c3e31eaa	33	self.f = open('/dev/msr0', 'rb', 0)
5f6caa4f JK	34	def read(self, index, default = None):
	35	import struct
	36	self.f.seek(index)
	37	try:
	38	return struct.unpack('Q', self.f.read(8))[0]
	39	except:
	40	return default
	41
	42	class Control(object):
	43	def __init__(self, name, bits, cap_msr, true_cap_msr = None):
	44	self.name = name
	45	self.bits = bits
	46	self.cap_msr = cap_msr
	47	self.true_cap_msr = true_cap_msr
	48	def read2(self, nr):
	49	m = msr()
	50	val = m.read(nr, 0)
	51	return (val & 0xffffffff, val >> 32)
	52	def show(self):
c3e31eaa	53	print(self.name)
5f6caa4f JK	54	mbz, mb1 = self.read2(self.cap_msr)
	55	tmbz, tmb1 = 0, 0
	56	if self.true_cap_msr:
	57	tmbz, tmb1 = self.read2(self.true_cap_msr)
	58	for bit in sorted(self.bits.keys()):
	59	zero = not (mbz & (1 << bit))
	60	one = mb1 & (1 << bit)
	61	true_zero = not (tmbz & (1 << bit))
	62	true_one = tmb1 & (1 << bit)
	63	s= '?'
	64	if (self.true_cap_msr and true_zero and true_one
	65	and one and not zero):
	66	s = 'default'
	67	elif zero and not one:
	68	s = 'no'
	69	elif one and not zero:
	70	s = 'forced'
	71	elif one and zero:
	72	s = 'yes'
c3e31eaa	73	print(' %-40s %s' % (self.bits[bit], s))
5f6caa4f JK	74
	75	class Misc(object):
	76	def __init__(self, name, bits, msr):
	77	self.name = name
	78	self.bits = bits
	79	self.msr = msr
	80	def show(self):
c3e31eaa	81	print(self.name)
5f6caa4f	82	value = msr().read(self.msr, 0)
c3e31eaa	83	print(' Hex: 0x%x' % (value))
5f6caa4f JK	84	def first_bit(key):
	85	if type(key) is tuple:
	86	return key[0]
	87	else:
	88	return key
	89	for bits in sorted(self.bits.keys(), key = first_bit):
	90	if type(bits) is tuple:
	91	lo, hi = bits
	92	fmt = int
	93	else:
	94	lo = hi = bits
	95	def fmt(x):
	96	return { True: 'yes', False: 'no' }[x]
	97	v = (value >> lo) & ((1 << (hi - lo + 1)) - 1)
c3e31eaa	98	print(' %-40s %s' % (self.bits[bits], fmt(v)))
5f6caa4f JK	99
5f6caa4f JK	100	controls = [
ea4ee283 JK	101	Misc(
	102	name = 'Basic VMX Information',
	103	bits = {
c5d1e2cc	104	(0, 30): 'Revision',
ea4ee283 JK	105	(32,44): 'VMCS size',
	106	48: 'VMCS restricted to 32 bit addresses',
	107	49: 'Dual-monitor support',
	108	(50, 53): 'VMCS memory type',
	109	54: 'INS/OUTS instruction information',
	110	55: 'IA32_VMX_TRUE_*_CTLS support',
	111	},
	112	msr = MSR_IA32_VMX_BASIC,
	113	),
5f6caa4f JK	114	Control(
	115	name = 'pin-based controls',
	116	bits = {
	117	0: 'External interrupt exiting',
	118	3: 'NMI exiting',
	119	5: 'Virtual NMIs',
	120	6: 'Activate VMX-preemption timer',
ea4ee283	121	7: 'Process posted interrupts',
5f6caa4f JK	122	},
	123	cap_msr = MSR_IA32_VMX_PINBASED_CTLS,
	124	true_cap_msr = MSR_IA32_VMX_TRUE_PINBASED_CTLS,
	125	),
	126
	127	Control(
	128	name = 'primary processor-based controls',
	129	bits = {
	130	2: 'Interrupt window exiting',
	131	3: 'Use TSC offsetting',
	132	7: 'HLT exiting',
	133	9: 'INVLPG exiting',
	134	10: 'MWAIT exiting',
	135	11: 'RDPMC exiting',
	136	12: 'RDTSC exiting',
	137	15: 'CR3-load exiting',
	138	16: 'CR3-store exiting',
	139	19: 'CR8-load exiting',
	140	20: 'CR8-store exiting',
	141	21: 'Use TPR shadow',
	142	22: 'NMI-window exiting',
	143	23: 'MOV-DR exiting',
	144	24: 'Unconditional I/O exiting',
	145	25: 'Use I/O bitmaps',
	146	27: 'Monitor trap flag',
	147	28: 'Use MSR bitmaps',
	148	29: 'MONITOR exiting',
	149	30: 'PAUSE exiting',
	150	31: 'Activate secondary control',
	151	},
	152	cap_msr = MSR_IA32_VMX_PROCBASED_CTLS,
	153	true_cap_msr = MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
	154	),
	155
	156	Control(
	157	name = 'secondary processor-based controls',
	158	bits = {
	159	0: 'Virtualize APIC accesses',
	160	1: 'Enable EPT',
	161	2: 'Descriptor-table exiting',
614413f7	162	3: 'Enable RDTSCP',
5f6caa4f JK	163	4: 'Virtualize x2APIC mode',
	164	5: 'Enable VPID',
	165	6: 'WBINVD exiting',
	166	7: 'Unrestricted guest',
614413f7	167	8: 'APIC register emulation',
f9e90c79	168	9: 'Virtual interrupt delivery',
5f6caa4f	169	10: 'PAUSE-loop exiting',
287d55c6 AK	170	11: 'RDRAND exiting',
	171	12: 'Enable INVPCID',
	172	13: 'Enable VM functions',
007e986f	173	14: 'VMCS shadowing',
025533f6	174	15: 'Enable ENCLS exiting',
c5d1e2cc	175	16: 'RDSEED exiting',
025533f6	176	17: 'Enable PML',
c5d1e2cc	177	18: 'EPT-violation #VE',
025533f6	178	19: 'Conceal non-root operation from PT',
c5d1e2cc	179	20: 'Enable XSAVES/XRSTORS',
025533f6	180	22: 'Mode-based execute control (XS/XU)',
349cb2fb	181	25: 'TSC scaling',
5f6caa4f JK	182	},
	183	cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
	184	),
	185
	186	Control(
	187	name = 'VM-Exit controls',
	188	bits = {
	189	2: 'Save debug controls',
	190	9: 'Host address-space size',
	191	12: 'Load IA32_PERF_GLOBAL_CTRL',
	192	15: 'Acknowledge interrupt on exit',
	193	18: 'Save IA32_PAT',
	194	19: 'Load IA32_PAT',
	195	20: 'Save IA32_EFER',
	196	21: 'Load IA32_EFER',
	197	22: 'Save VMX-preemption timer value',
025533f6 PB	198	23: 'Clear IA32_BNDCFGS',
025533f6 PB	199	24: 'Conceal VM exits from PT',
5f6caa4f JK	200	},
	201	cap_msr = MSR_IA32_VMX_EXIT_CTLS,
	202	true_cap_msr = MSR_IA32_VMX_TRUE_EXIT_CTLS,
	203	),
	204
	205	Control(
	206	name = 'VM-Entry controls',
	207	bits = {
	208	2: 'Load debug controls',
c5d1e2cc	209	9: 'IA-32e mode guest',
5f6caa4f JK	210	10: 'Entry to SMM',
	211	11: 'Deactivate dual-monitor treatment',
	212	13: 'Load IA32_PERF_GLOBAL_CTRL',
	213	14: 'Load IA32_PAT',
	214	15: 'Load IA32_EFER',
025533f6 PB	215	16: 'Load IA32_BNDCFGS',
025533f6 PB	216	17: 'Conceal VM entries from PT',
5f6caa4f JK	217	},
	218	cap_msr = MSR_IA32_VMX_ENTRY_CTLS,
	219	true_cap_msr = MSR_IA32_VMX_TRUE_ENTRY_CTLS,
	220	),
	221
	222	Misc(
	223	name = 'Miscellaneous data',
	224	bits = {
	225	(0,4): 'VMX-preemption timer scale (log2)',
	226	5: 'Store EFER.LMA into IA-32e mode guest control',
	227	6: 'HLT activity state',
	228	7: 'Shutdown activity state',
	229	8: 'Wait-for-SIPI activity state',
007e986f	230	15: 'IA32_SMBASE support',
5f6caa4f	231	(16,24): 'Number of CR3-target values',
c5d1e2cc	232	(25,27): 'MSR-load/store count recommendation',
287d55c6	233	28: 'IA32_SMM_MONITOR_CTL[2] can be set to 1',
007e986f	234	29: 'VMWRITE to VM-exit information fields',
025533f6	235	30: 'Inject event with insn length=0',
007e986f	236	(32,63): 'MSEG revision identifier',
5f6caa4f JK	237	},
	238	msr = MSR_IA32_VMX_MISC_CTLS,
	239	),
	240
	241	Misc(
	242	name = 'VPID and EPT capabilities',
	243	bits = {
	244	0: 'Execute-only EPT translations',
	245	6: 'Page-walk length 4',
	246	8: 'Paging-structure memory type UC',
	247	14: 'Paging-structure memory type WB',
	248	16: '2MB EPT pages',
	249	17: '1GB EPT pages',
	250	20: 'INVEPT supported',
287d55c6	251	21: 'EPT accessed and dirty flags',
5f6caa4f JK	252	25: 'Single-context INVEPT',
	253	26: 'All-context INVEPT',
	254	32: 'INVVPID supported',
	255	40: 'Individual-address INVVPID',
	256	41: 'Single-context INVVPID',
	257	42: 'All-context INVVPID',
	258	43: 'Single-context-retaining-globals INVVPID',
	259	},
	260	msr = MSR_IA32_VMX_EPT_VPID_CAP,
	261	),
287d55c6 AK	262	Misc(
	263	name = 'VM Functions',
	264	bits = {
	265	0: 'EPTP Switching',
	266	},
	267	msr = MSR_IA32_VMX_VMFUNC,
	268	),
5f6caa4f JK	269	]
	270
	271	for c in controls:
	272	c.show()