]> git.proxmox.com Git - mirror_qemu.git/blame - softmmu/arch_init.c
cpus: prepare new CpusAccel cpu accelerator interface
[mirror_qemu.git] / softmmu / arch_init.c
CommitLineData
ad96090a
BS
1/*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
d38ea87a 24#include "qemu/osdep.h"
33c11879 25#include "cpu.h"
9c17d615 26#include "sysemu/sysemu.h"
9c17d615 27#include "sysemu/arch_init.h"
a2cb15b0 28#include "hw/pci/pci.h"
8a824e4d 29#include "hw/audio/soundhw.h"
b47aa7b3 30#include "qapi/error.h"
1de7afc9 31#include "qemu/config-file.h"
d97326ee 32#include "qemu/error-report.h"
0445259b 33#include "hw/acpi/acpi.h"
f348b6d1 34#include "qemu/help_option.h"
ad96090a
BS
35
36#ifdef TARGET_SPARC
37int graphic_width = 1024;
38int graphic_height = 768;
39int graphic_depth = 8;
8ac919a0
LV
40#elif defined(TARGET_M68K)
41int graphic_width = 800;
42int graphic_height = 600;
43int graphic_depth = 8;
ad96090a
BS
44#else
45int graphic_width = 800;
46int graphic_height = 600;
f1ff0e89 47int graphic_depth = 32;
ad96090a
BS
48#endif
49
ad96090a
BS
50
51#if defined(TARGET_ALPHA)
52#define QEMU_ARCH QEMU_ARCH_ALPHA
53#elif defined(TARGET_ARM)
54#define QEMU_ARCH QEMU_ARCH_ARM
55#elif defined(TARGET_CRIS)
56#define QEMU_ARCH QEMU_ARCH_CRIS
813dff13
HD
57#elif defined(TARGET_HPPA)
58#define QEMU_ARCH QEMU_ARCH_HPPA
d35ea39e
MT
59#elif defined(TARGET_I386)
60#define QEMU_ARCH QEMU_ARCH_I386
81ea0e13
MW
61#elif defined(TARGET_LM32)
62#define QEMU_ARCH QEMU_ARCH_LM32
d35ea39e
MT
63#elif defined(TARGET_M68K)
64#define QEMU_ARCH QEMU_ARCH_M68K
ad96090a
BS
65#elif defined(TARGET_MICROBLAZE)
66#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
67#elif defined(TARGET_MIPS)
68#define QEMU_ARCH QEMU_ARCH_MIPS
d15a9c23
AG
69#elif defined(TARGET_MOXIE)
70#define QEMU_ARCH QEMU_ARCH_MOXIE
e671711c
MV
71#elif defined(TARGET_NIOS2)
72#define QEMU_ARCH QEMU_ARCH_NIOS2
e67db06e
JL
73#elif defined(TARGET_OPENRISC)
74#define QEMU_ARCH QEMU_ARCH_OPENRISC
ad96090a
BS
75#elif defined(TARGET_PPC)
76#define QEMU_ARCH QEMU_ARCH_PPC
25fa194b
MC
77#elif defined(TARGET_RISCV)
78#define QEMU_ARCH QEMU_ARCH_RISCV
c8c35e5f
YS
79#elif defined(TARGET_RX)
80#define QEMU_ARCH QEMU_ARCH_RX
ad96090a
BS
81#elif defined(TARGET_S390X)
82#define QEMU_ARCH QEMU_ARCH_S390X
83#elif defined(TARGET_SH4)
84#define QEMU_ARCH QEMU_ARCH_SH4
85#elif defined(TARGET_SPARC)
86#define QEMU_ARCH QEMU_ARCH_SPARC
48e06fe0
BK
87#elif defined(TARGET_TRICORE)
88#define QEMU_ARCH QEMU_ARCH_TRICORE
d35ea39e
MT
89#elif defined(TARGET_UNICORE32)
90#define QEMU_ARCH QEMU_ARCH_UNICORE32
91#elif defined(TARGET_XTENSA)
92#define QEMU_ARCH QEMU_ARCH_XTENSA
42f3ff00
MR
93#elif defined(TARGET_AVR)
94#define QEMU_ARCH QEMU_ARCH_AVR
ad96090a
BS
95#endif
96
97const uint32_t arch_type = QEMU_ARCH;
ad96090a 98
ad96090a
BS
99int kvm_available(void)
100{
101#ifdef CONFIG_KVM
102 return 1;
103#else
104 return 0;
105#endif
106}
107
108int xen_available(void)
109{
110#ifdef CONFIG_XEN
111 return 1;
112#else
113 return 0;
114#endif
115}