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milkymist: convert to memory API
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1/*
2 * Software MMU support
5fafdf24 3 *
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4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 */
19#if DATA_SIZE == 8
20#define SUFFIX q
61382a50 21#define USUFFIX q
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22#define DATA_TYPE uint64_t
23#elif DATA_SIZE == 4
24#define SUFFIX l
61382a50 25#define USUFFIX l
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26#define DATA_TYPE uint32_t
27#elif DATA_SIZE == 2
28#define SUFFIX w
61382a50 29#define USUFFIX uw
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30#define DATA_TYPE uint16_t
31#define DATA_STYPE int16_t
32#elif DATA_SIZE == 1
33#define SUFFIX b
61382a50 34#define USUFFIX ub
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35#define DATA_TYPE uint8_t
36#define DATA_STYPE int8_t
37#else
38#error unsupported data size
39#endif
40
6ebbf390 41#if ACCESS_TYPE < (NB_MMU_MODES)
61382a50 42
6ebbf390 43#define CPU_MMU_INDEX ACCESS_TYPE
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44#define MMUSUFFIX _mmu
45
6ebbf390 46#elif ACCESS_TYPE == (NB_MMU_MODES)
61382a50 47
6ebbf390 48#define CPU_MMU_INDEX (cpu_mmu_index(env))
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49#define MMUSUFFIX _mmu
50
6ebbf390 51#elif ACCESS_TYPE == (NB_MMU_MODES + 1)
61382a50 52
6ebbf390 53#define CPU_MMU_INDEX (cpu_mmu_index(env))
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54#define MMUSUFFIX _cmmu
55
b92e5a22 56#else
61382a50 57#error invalid ACCESS_TYPE
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58#endif
59
60#if DATA_SIZE == 8
61#define RES_TYPE uint64_t
62#else
c086b783 63#define RES_TYPE uint32_t
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64#endif
65
6ebbf390 66#if ACCESS_TYPE == (NB_MMU_MODES + 1)
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67#define ADDR_READ addr_code
68#else
69#define ADDR_READ addr_read
70#endif
b92e5a22 71
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72/* generic load/store macros */
73
c27004ec 74static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
b92e5a22 75{
4d7a0880 76 int page_index;
b92e5a22 77 RES_TYPE res;
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78 target_ulong addr;
79 unsigned long physaddr;
6ebbf390 80 int mmu_idx;
61382a50 81
c27004ec 82 addr = ptr;
4d7a0880 83 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
6ebbf390 84 mmu_idx = CPU_MMU_INDEX;
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85 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
86 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
6ebbf390 87 res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
b92e5a22 88 } else {
4d7a0880 89 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
61382a50 90 res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
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91 }
92 return res;
93}
94
95#if DATA_SIZE <= 2
c27004ec 96static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
b92e5a22 97{
4d7a0880 98 int res, page_index;
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99 target_ulong addr;
100 unsigned long physaddr;
6ebbf390 101 int mmu_idx;
61382a50 102
c27004ec 103 addr = ptr;
4d7a0880 104 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
6ebbf390 105 mmu_idx = CPU_MMU_INDEX;
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106 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
107 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
6ebbf390 108 res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
b92e5a22 109 } else {
4d7a0880 110 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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111 res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
112 }
113 return res;
114}
115#endif
116
6ebbf390 117#if ACCESS_TYPE != (NB_MMU_MODES + 1)
84b7b8e7 118
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119/* generic store macro */
120
c27004ec 121static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
b92e5a22 122{
4d7a0880 123 int page_index;
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124 target_ulong addr;
125 unsigned long physaddr;
6ebbf390 126 int mmu_idx;
61382a50 127
c27004ec 128 addr = ptr;
4d7a0880 129 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
6ebbf390 130 mmu_idx = CPU_MMU_INDEX;
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131 if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
132 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
6ebbf390 133 glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
b92e5a22 134 } else {
4d7a0880 135 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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136 glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
137 }
138}
139
6ebbf390 140#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
84b7b8e7 141
6ebbf390 142#if ACCESS_TYPE != (NB_MMU_MODES + 1)
e16c53fa 143
2d603d22 144#if DATA_SIZE == 8
3f87bf69 145static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
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146{
147 union {
3f87bf69 148 float64 d;
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149 uint64_t i;
150 } u;
151 u.i = glue(ldq, MEMSUFFIX)(ptr);
152 return u.d;
153}
154
3f87bf69 155static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
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156{
157 union {
3f87bf69 158 float64 d;
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159 uint64_t i;
160 } u;
161 u.d = v;
162 glue(stq, MEMSUFFIX)(ptr, u.i);
163}
164#endif /* DATA_SIZE == 8 */
165
166#if DATA_SIZE == 4
3f87bf69 167static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
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168{
169 union {
3f87bf69 170 float32 f;
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171 uint32_t i;
172 } u;
173 u.i = glue(ldl, MEMSUFFIX)(ptr);
174 return u.f;
175}
176
3f87bf69 177static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
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178{
179 union {
3f87bf69 180 float32 f;
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181 uint32_t i;
182 } u;
183 u.f = v;
184 glue(stl, MEMSUFFIX)(ptr, u.i);
185}
186#endif /* DATA_SIZE == 4 */
187
6ebbf390 188#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
84b7b8e7 189
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190#undef RES_TYPE
191#undef DATA_TYPE
192#undef DATA_STYPE
193#undef SUFFIX
61382a50 194#undef USUFFIX
b92e5a22 195#undef DATA_SIZE
6ebbf390 196#undef CPU_MMU_INDEX
61382a50 197#undef MMUSUFFIX
84b7b8e7 198#undef ADDR_READ