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1da177e4
LT
1/*
2 * Driver for Philips UDA1341TS on Compaq iPAQ H3600 soundcard
3 * Copyright (C) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License.
7 *
8 * History:
9 *
10 * 2002-03-13 Tomas Kasparek initial release - based on h3600-uda1341.c from OSS
11 * 2002-03-20 Tomas Kasparek playback over ALSA is working
12 * 2002-03-28 Tomas Kasparek playback over OSS emulation is working
13 * 2002-03-29 Tomas Kasparek basic capture is working (native ALSA)
14 * 2002-03-29 Tomas Kasparek capture is working (OSS emulation)
15 * 2002-04-04 Tomas Kasparek better rates handling (allow non-standard rates)
16 * 2003-02-14 Brian Avery fixed full duplex mode, other updates
17 * 2003-02-20 Tomas Kasparek merged updates by Brian (except HAL)
18 * 2003-04-19 Jaroslav Kysela recoded DMA stuff to follow 2.4.18rmk3-hh24 kernel
19 * working suspend and resume
20 * 2003-04-28 Tomas Kasparek updated work by Jaroslav to compile it under 2.5.x again
21 * merged HAL layer (patches from Brian)
22 */
23
f7a9275d 24/* $Id: sa11xx-uda1341.c,v 1.27 2005/12/07 09:13:42 cladisch Exp $ */
1da177e4
LT
25
26/***************************************************************************************************
27*
28* To understand what Alsa Drivers should be doing look at "Writing an Alsa Driver" by Takashi Iwai
29* available in the Alsa doc section on the website
30*
31* A few notes to make things clearer. The UDA1341 is hooked up to Serial port 4 on the SA1100.
32* We are using SSP mode to talk to the UDA1341. The UDA1341 bit & wordselect clocks are generated
33* by this UART. Unfortunately, the clock only runs if the transmit buffer has something in it.
34* So, if we are just recording, we feed the transmit DMA stream a bunch of 0x0000 so that the
35* transmit buffer is full and the clock keeps going. The zeroes come from FLUSH_BASE_PHYS which
36* is a mem loc that always decodes to 0's w/ no off chip access.
37*
38* Some alsa terminology:
39* frame => num_channels * sample_size e.g stereo 16 bit is 2 * 16 = 32 bytes
40* period => the least number of bytes that will generate an interrupt e.g. we have a 1024 byte
41* buffer and 4 periods in the runtime structure this means we'll get an int every 256
42* bytes or 4 times per buffer.
43* A number of the sizes are in frames rather than bytes, use frames_to_bytes and
44* bytes_to_frames to convert. The easiest way to tell the units is to look at the
45* type i.e. runtime-> buffer_size is in frames and its type is snd_pcm_uframes_t
46*
47* Notes about the pointer fxn:
48* The pointer fxn needs to return the offset into the dma buffer in frames.
49* Interrupts must be blocked before calling the dma_get_pos fxn to avoid race with interrupts.
50*
51* Notes about pause/resume
52* Implementing this would be complicated so it's skipped. The problem case is:
53* A full duplex connection is going, then play is paused. At this point you need to start xmitting
54* 0's to keep the record active which means you cant just freeze the dma and resume it later you'd
55* need to save off the dma info, and restore it properly on a resume. Yeach!
56*
57* Notes about transfer methods:
58* The async write calls fail. I probably need to implement something else to support them?
59*
60***************************************************************************************************/
61
1da177e4
LT
62#include <sound/driver.h>
63#include <linux/module.h>
64#include <linux/moduleparam.h>
65#include <linux/init.h>
2b3f5587
TI
66#include <linux/err.h>
67#include <linux/platform_device.h>
1da177e4
LT
68#include <linux/errno.h>
69#include <linux/ioctl.h>
70#include <linux/delay.h>
71#include <linux/slab.h>
72
73#ifdef CONFIG_PM
74#include <linux/pm.h>
75#endif
76
77#include <asm/hardware.h>
78#include <asm/arch/h3600.h>
79#include <asm/mach-types.h>
80#include <asm/dma.h>
81
82#ifdef CONFIG_H3600_HAL
83#include <asm/semaphore.h>
84#include <asm/uaccess.h>
85#include <asm/arch/h3600_hal.h>
86#endif
87
88#include <sound/core.h>
89#include <sound/pcm.h>
90#include <sound/initval.h>
91
92#include <linux/l3/l3.h>
93
94#undef DEBUG_MODE
95#undef DEBUG_FUNCTION_NAMES
96#include <sound/uda1341.h>
97
98/*
99 * FIXME: Is this enough as autodetection of 2.4.X-rmkY-hhZ kernels?
100 * We use DMA stuff from 2.4.18-rmk3-hh24 here to be able to compile this
101 * module for Familiar 0.6.1
102 */
103#ifdef CONFIG_H3600_HAL
104#define HH_VERSION 1
105#endif
106
107/* {{{ Type definitions */
108
109MODULE_AUTHOR("Tomas Kasparek <tomas.kasparek@seznam.cz>");
110MODULE_LICENSE("GPL");
111MODULE_DESCRIPTION("SA1100/SA1111 + UDA1341TS driver for ALSA");
112MODULE_SUPPORTED_DEVICE("{{UDA1341,iPAQ H3600 UDA1341TS}}");
113
6581f4e7 114static char *id; /* ID for this card */
1da177e4
LT
115
116module_param(id, charp, 0444);
117MODULE_PARM_DESC(id, "ID string for SA1100/SA1111 + UDA1341TS soundcard.");
118
af0fbfb5 119struct audio_stream {
1da177e4
LT
120 char *id; /* identification string */
121 int stream_id; /* numeric identification */
122 dma_device_t dma_dev; /* device identifier for DMA */
123#ifdef HH_VERSION
124 dmach_t dmach; /* dma channel identification */
125#else
126 dma_regs_t *dma_regs; /* points to our DMA registers */
127#endif
128 int active:1; /* we are using this stream for transfer now */
129 int period; /* current transfer period */
130 int periods; /* current count of periods registerd in the DMA engine */
131 int tx_spin; /* are we recoding - flag used to do DMA trans. for sync */
132 unsigned int old_offset;
133 spinlock_t dma_lock; /* for locking in DMA operations (see dma-sa1100.c in the kernel) */
af0fbfb5
TI
134 struct snd_pcm_substream *stream;
135};
1da177e4 136
af0fbfb5
TI
137struct sa11xx_uda1341 {
138 struct snd_card *card;
1da177e4 139 struct l3_client *uda1341;
af0fbfb5 140 struct snd_pcm *pcm;
1da177e4 141 long samplerate;
af0fbfb5
TI
142 struct audio_stream s[2]; /* playback & capture */
143};
1da177e4 144
1da177e4
LT
145static unsigned int rates[] = {
146 8000, 10666, 10985, 14647,
147 16000, 21970, 22050, 24000,
148 29400, 32000, 44100, 48000,
149};
150
af0fbfb5 151static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT
152 .count = ARRAY_SIZE(rates),
153 .list = rates,
154 .mask = 0,
155};
156
f7a9275d
CL
157static struct platform_device *device;
158
1da177e4
LT
159/* }}} */
160
161/* {{{ Clock and sample rate stuff */
162
163/*
164 * Stop-gap solution until rest of hh.org HAL stuff is merged.
165 */
166#define GPIO_H3600_CLK_SET0 GPIO_GPIO (12)
167#define GPIO_H3600_CLK_SET1 GPIO_GPIO (13)
168
169#ifdef CONFIG_SA1100_H3XXX
170#define clr_sa11xx_uda1341_egpio(x) clr_h3600_egpio(x)
171#define set_sa11xx_uda1341_egpio(x) set_h3600_egpio(x)
172#else
173#error This driver could serve H3x00 handhelds only!
174#endif
175
176static void sa11xx_uda1341_set_audio_clock(long val)
177{
178 switch (val) {
179 case 24000: case 32000: case 48000: /* 00: 12.288 MHz */
180 GPCR = GPIO_H3600_CLK_SET0 | GPIO_H3600_CLK_SET1;
181 break;
182
183 case 22050: case 29400: case 44100: /* 01: 11.2896 MHz */
184 GPSR = GPIO_H3600_CLK_SET0;
185 GPCR = GPIO_H3600_CLK_SET1;
186 break;
187
188 case 8000: case 10666: case 16000: /* 10: 4.096 MHz */
189 GPCR = GPIO_H3600_CLK_SET0;
190 GPSR = GPIO_H3600_CLK_SET1;
191 break;
192
193 case 10985: case 14647: case 21970: /* 11: 5.6245 MHz */
194 GPSR = GPIO_H3600_CLK_SET0 | GPIO_H3600_CLK_SET1;
195 break;
196 }
197}
198
af0fbfb5 199static void sa11xx_uda1341_set_samplerate(struct sa11xx_uda1341 *sa11xx_uda1341, long rate)
1da177e4
LT
200{
201 int clk_div = 0;
202 int clk=0;
203
204 /* We don't want to mess with clocks when frames are in flight */
205 Ser4SSCR0 &= ~SSCR0_SSE;
206 /* wait for any frame to complete */
207 udelay(125);
208
209 /*
210 * We have the following clock sources:
211 * 4.096 MHz, 5.6245 MHz, 11.2896 MHz, 12.288 MHz
212 * Those can be divided either by 256, 384 or 512.
213 * This makes up 12 combinations for the following samplerates...
214 */
215 if (rate >= 48000)
216 rate = 48000;
217 else if (rate >= 44100)
218 rate = 44100;
219 else if (rate >= 32000)
220 rate = 32000;
221 else if (rate >= 29400)
222 rate = 29400;
223 else if (rate >= 24000)
224 rate = 24000;
225 else if (rate >= 22050)
226 rate = 22050;
227 else if (rate >= 21970)
228 rate = 21970;
229 else if (rate >= 16000)
230 rate = 16000;
231 else if (rate >= 14647)
232 rate = 14647;
233 else if (rate >= 10985)
234 rate = 10985;
235 else if (rate >= 10666)
236 rate = 10666;
237 else
238 rate = 8000;
239
240 /* Set the external clock generator */
241#ifdef CONFIG_H3600_HAL
242 h3600_audio_clock(rate);
243#else
244 sa11xx_uda1341_set_audio_clock(rate);
245#endif
246
247 /* Select the clock divisor */
248 switch (rate) {
249 case 8000:
250 case 10985:
251 case 22050:
252 case 24000:
253 clk = F512;
254 clk_div = SSCR0_SerClkDiv(16);
255 break;
256 case 16000:
257 case 21970:
258 case 44100:
259 case 48000:
260 clk = F256;
261 clk_div = SSCR0_SerClkDiv(8);
262 break;
263 case 10666:
264 case 14647:
265 case 29400:
266 case 32000:
267 clk = F384;
268 clk_div = SSCR0_SerClkDiv(12);
269 break;
270 }
271
272 /* FMT setting should be moved away when other FMTs are added (FIXME) */
273 l3_command(sa11xx_uda1341->uda1341, CMD_FORMAT, (void *)LSB16);
274
275 l3_command(sa11xx_uda1341->uda1341, CMD_FS, (void *)clk);
276 Ser4SSCR0 = (Ser4SSCR0 & ~0xff00) + clk_div + SSCR0_SSE;
277 sa11xx_uda1341->samplerate = rate;
278}
279
280/* }}} */
281
282/* {{{ HW init and shutdown */
283
af0fbfb5 284static void sa11xx_uda1341_audio_init(struct sa11xx_uda1341 *sa11xx_uda1341)
1da177e4
LT
285{
286 unsigned long flags;
287
288 /* Setup DMA stuff */
289 sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].id = "UDA1341 out";
290 sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].stream_id = SNDRV_PCM_STREAM_PLAYBACK;
291 sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].dma_dev = DMA_Ser4SSPWr;
292
293 sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].id = "UDA1341 in";
294 sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].stream_id = SNDRV_PCM_STREAM_CAPTURE;
295 sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].dma_dev = DMA_Ser4SSPRd;
296
297 /* Initialize the UDA1341 internal state */
298
299 /* Setup the uarts */
300 local_irq_save(flags);
301 GAFR |= (GPIO_SSP_CLK);
302 GPDR &= ~(GPIO_SSP_CLK);
303 Ser4SSCR0 = 0;
304 Ser4SSCR0 = SSCR0_DataSize(16) + SSCR0_TI + SSCR0_SerClkDiv(8);
305 Ser4SSCR1 = SSCR1_SClkIactL + SSCR1_SClk1P + SSCR1_ExtClk;
306 Ser4SSCR0 |= SSCR0_SSE;
307 local_irq_restore(flags);
308
309 /* Enable the audio power */
310#ifdef CONFIG_H3600_HAL
311 h3600_audio_power(AUDIO_RATE_DEFAULT);
312#else
313 clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
314 set_sa11xx_uda1341_egpio(IPAQ_EGPIO_AUDIO_ON);
315 set_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
316#endif
317
318 /* Wait for the UDA1341 to wake up */
319 mdelay(1); //FIXME - was removed by Perex - Why?
320
321 /* Initialize the UDA1341 internal state */
322 l3_open(sa11xx_uda1341->uda1341);
323
324 /* external clock configuration (after l3_open - regs must be initialized */
325 sa11xx_uda1341_set_samplerate(sa11xx_uda1341, sa11xx_uda1341->samplerate);
326
327 /* Wait for the UDA1341 to wake up */
328 set_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
329 mdelay(1);
330
331 /* make the left and right channels unswapped (flip the WS latch) */
332 Ser4SSDR = 0;
333
334#ifdef CONFIG_H3600_HAL
335 h3600_audio_mute(0);
336#else
337 clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
338#endif
339}
340
af0fbfb5 341static void sa11xx_uda1341_audio_shutdown(struct sa11xx_uda1341 *sa11xx_uda1341)
1da177e4
LT
342{
343 /* mute on */
344#ifdef CONFIG_H3600_HAL
345 h3600_audio_mute(1);
346#else
347 set_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
348#endif
349
350 /* disable the audio power and all signals leading to the audio chip */
351 l3_close(sa11xx_uda1341->uda1341);
352 Ser4SSCR0 = 0;
353 clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
354
355 /* power off and mute off */
356 /* FIXME - is muting off necesary??? */
357#ifdef CONFIG_H3600_HAL
358 h3600_audio_power(0);
359 h3600_audio_mute(0);
360#else
361 clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_AUDIO_ON);
362 clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
363#endif
364}
365
366/* }}} */
367
368/* {{{ DMA staff */
369
370/*
371 * these are the address and sizes used to fill the xmit buffer
372 * so we can get a clock in record only mode
373 */
374#define FORCE_CLOCK_ADDR (dma_addr_t)FLUSH_BASE_PHYS
375#define FORCE_CLOCK_SIZE 4096 // was 2048
376
377// FIXME Why this value exactly - wrote comment
378#define DMA_BUF_SIZE 8176 /* <= MAX_DMA_SIZE from asm/arch-sa1100/dma.h */
379
380#ifdef HH_VERSION
381
af0fbfb5 382static int audio_dma_request(struct audio_stream *s, void (*callback)(void *, int))
1da177e4
LT
383{
384 int ret;
385
386 ret = sa1100_request_dma(&s->dmach, s->id, s->dma_dev);
387 if (ret < 0) {
388 printk(KERN_ERR "unable to grab audio dma 0x%x\n", s->dma_dev);
389 return ret;
390 }
391 sa1100_dma_set_callback(s->dmach, callback);
392 return 0;
393}
394
af0fbfb5 395static inline void audio_dma_free(struct audio_stream *s)
1da177e4
LT
396{
397 sa1100_free_dma(s->dmach);
398 s->dmach = -1;
399}
400
401#else
402
af0fbfb5 403static int audio_dma_request(struct audio_stream *s, void (*callback)(void *))
1da177e4
LT
404{
405 int ret;
406
407 ret = sa1100_request_dma(s->dma_dev, s->id, callback, s, &s->dma_regs);
408 if (ret < 0)
409 printk(KERN_ERR "unable to grab audio dma 0x%x\n", s->dma_dev);
410 return ret;
411}
412
af0fbfb5 413static void audio_dma_free(struct audio_stream *s)
1da177e4 414{
0948e3c8
TI
415 sa1100_free_dma(s->dma_regs);
416 s->dma_regs = 0;
1da177e4
LT
417}
418
419#endif
420
af0fbfb5 421static u_int audio_get_dma_pos(struct audio_stream *s)
1da177e4 422{
af0fbfb5
TI
423 struct snd_pcm_substream *substream = s->stream;
424 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
425 unsigned int offset;
426 unsigned long flags;
427 dma_addr_t addr;
428
429 // this must be called w/ interrupts locked out see dma-sa1100.c in the kernel
430 spin_lock_irqsave(&s->dma_lock, flags);
431#ifdef HH_VERSION
432 sa1100_dma_get_current(s->dmach, NULL, &addr);
433#else
434 addr = sa1100_get_dma_pos((s)->dma_regs);
435#endif
436 offset = addr - runtime->dma_addr;
437 spin_unlock_irqrestore(&s->dma_lock, flags);
438
439 offset = bytes_to_frames(runtime,offset);
440 if (offset >= runtime->buffer_size)
441 offset = 0;
442
443 return offset;
444}
445
446/*
447 * this stops the dma and clears the dma ptrs
448 */
af0fbfb5 449static void audio_stop_dma(struct audio_stream *s)
1da177e4
LT
450{
451 unsigned long flags;
452
453 spin_lock_irqsave(&s->dma_lock, flags);
454 s->active = 0;
455 s->period = 0;
456 /* this stops the dma channel and clears the buffer ptrs */
457#ifdef HH_VERSION
458 sa1100_dma_flush_all(s->dmach);
459#else
460 sa1100_clear_dma(s->dma_regs);
461#endif
462 spin_unlock_irqrestore(&s->dma_lock, flags);
463}
464
af0fbfb5 465static void audio_process_dma(struct audio_stream *s)
1da177e4 466{
af0fbfb5
TI
467 struct snd_pcm_substream *substream = s->stream;
468 struct snd_pcm_runtime *runtime;
1da177e4
LT
469 unsigned int dma_size;
470 unsigned int offset;
471 int ret;
472
473 /* we are requested to process synchronization DMA transfer */
474 if (s->tx_spin) {
475 snd_assert(s->stream_id == SNDRV_PCM_STREAM_PLAYBACK, return);
476 /* fill the xmit dma buffers and return */
477#ifdef HH_VERSION
478 sa1100_dma_set_spin(s->dmach, FORCE_CLOCK_ADDR, FORCE_CLOCK_SIZE);
479#else
480 while (1) {
481 ret = sa1100_start_dma(s->dma_regs, FORCE_CLOCK_ADDR, FORCE_CLOCK_SIZE);
482 if (ret)
483 return;
484 }
485#endif
486 return;
487 }
488
489 /* must be set here - only valid for running streams, not for forced_clock dma fills */
490 runtime = substream->runtime;
491 while (s->active && s->periods < runtime->periods) {
492 dma_size = frames_to_bytes(runtime, runtime->period_size);
493 if (s->old_offset) {
494 /* a little trick, we need resume from old position */
495 offset = frames_to_bytes(runtime, s->old_offset - 1);
496 s->old_offset = 0;
497 s->periods = 0;
498 s->period = offset / dma_size;
499 offset %= dma_size;
500 dma_size = dma_size - offset;
501 if (!dma_size)
502 continue; /* special case */
503 } else {
504 offset = dma_size * s->period;
505 snd_assert(dma_size <= DMA_BUF_SIZE, );
506 }
507#ifdef HH_VERSION
508 ret = sa1100_dma_queue_buffer(s->dmach, s, runtime->dma_addr + offset, dma_size);
509 if (ret)
510 return; //FIXME
511#else
512 ret = sa1100_start_dma((s)->dma_regs, runtime->dma_addr + offset, dma_size);
513 if (ret) {
514 printk(KERN_ERR "audio_process_dma: cannot queue DMA buffer (%i)\n", ret);
515 return;
516 }
517#endif
518
519 s->period++;
520 s->period %= runtime->periods;
521 s->periods++;
522 }
523}
524
525#ifdef HH_VERSION
526static void audio_dma_callback(void *data, int size)
527#else
528static void audio_dma_callback(void *data)
529#endif
530{
af0fbfb5 531 struct audio_stream *s = data;
1da177e4
LT
532
533 /*
534 * If we are getting a callback for an active stream then we inform
535 * the PCM middle layer we've finished a period
536 */
537 if (s->active)
538 snd_pcm_period_elapsed(s->stream);
539
540 spin_lock(&s->dma_lock);
541 if (!s->tx_spin && s->periods > 0)
542 s->periods--;
543 audio_process_dma(s);
544 spin_unlock(&s->dma_lock);
545}
546
547/* }}} */
548
549/* {{{ PCM setting */
550
551/* {{{ trigger & timer */
552
af0fbfb5 553static int snd_sa11xx_uda1341_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 554{
af0fbfb5 555 struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
1da177e4 556 int stream_id = substream->pstr->stream;
af0fbfb5
TI
557 struct audio_stream *s = &chip->s[stream_id];
558 struct audio_stream *s1 = &chip->s[stream_id ^ 1];
1da177e4
LT
559 int err = 0;
560
561 /* note local interrupts are already disabled in the midlevel code */
562 spin_lock(&s->dma_lock);
563 switch (cmd) {
564 case SNDRV_PCM_TRIGGER_START:
565 /* now we need to make sure a record only stream has a clock */
566 if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
567 /* we need to force fill the xmit DMA with zeros */
568 s1->tx_spin = 1;
569 audio_process_dma(s1);
570 }
571 /* this case is when you were recording then you turn on a
572 * playback stream so we stop (also clears it) the dma first,
573 * clear the sync flag and then we let it turned on
574 */
575 else {
576 s->tx_spin = 0;
577 }
578
579 /* requested stream startup */
580 s->active = 1;
581 audio_process_dma(s);
582 break;
583 case SNDRV_PCM_TRIGGER_STOP:
584 /* requested stream shutdown */
585 audio_stop_dma(s);
586
587 /*
588 * now we need to make sure a record only stream has a clock
589 * so if we're stopping a playback with an active capture
590 * we need to turn the 0 fill dma on for the xmit side
591 */
592 if (stream_id == SNDRV_PCM_STREAM_PLAYBACK && s1->active) {
593 /* we need to force fill the xmit DMA with zeros */
594 s->tx_spin = 1;
595 audio_process_dma(s);
596 }
597 /*
598 * we killed a capture only stream, so we should also kill
599 * the zero fill transmit
600 */
601 else {
602 if (s1->tx_spin) {
603 s1->tx_spin = 0;
604 audio_stop_dma(s1);
605 }
606 }
607
608 break;
609 case SNDRV_PCM_TRIGGER_SUSPEND:
610 s->active = 0;
611#ifdef HH_VERSION
612 sa1100_dma_stop(s->dmach);
613#else
614 //FIXME - DMA API
615#endif
616 s->old_offset = audio_get_dma_pos(s) + 1;
617#ifdef HH_VERSION
618 sa1100_dma_flush_all(s->dmach);
619#else
620 //FIXME - DMA API
621#endif
622 s->periods = 0;
623 break;
624 case SNDRV_PCM_TRIGGER_RESUME:
625 s->active = 1;
626 s->tx_spin = 0;
627 audio_process_dma(s);
628 if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
629 s1->tx_spin = 1;
630 audio_process_dma(s1);
631 }
632 break;
633 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
634#ifdef HH_VERSION
635 sa1100_dma_stop(s->dmach);
636#else
637 //FIXME - DMA API
638#endif
639 s->active = 0;
640 if (stream_id == SNDRV_PCM_STREAM_PLAYBACK) {
641 if (s1->active) {
642 s->tx_spin = 1;
643 s->old_offset = audio_get_dma_pos(s) + 1;
644#ifdef HH_VERSION
645 sa1100_dma_flush_all(s->dmach);
646#else
647 //FIXME - DMA API
648#endif
649 audio_process_dma(s);
650 }
651 } else {
652 if (s1->tx_spin) {
653 s1->tx_spin = 0;
654#ifdef HH_VERSION
655 sa1100_dma_flush_all(s1->dmach);
656#else
657 //FIXME - DMA API
658#endif
659 }
660 }
661 break;
662 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
663 s->active = 1;
664 if (s->old_offset) {
665 s->tx_spin = 0;
666 audio_process_dma(s);
667 break;
668 }
669 if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
670 s1->tx_spin = 1;
671 audio_process_dma(s1);
672 }
673#ifdef HH_VERSION
674 sa1100_dma_resume(s->dmach);
675#else
676 //FIXME - DMA API
677#endif
678 break;
679 default:
680 err = -EINVAL;
681 break;
682 }
683 spin_unlock(&s->dma_lock);
684 return err;
685}
686
af0fbfb5 687static int snd_sa11xx_uda1341_prepare(struct snd_pcm_substream *substream)
1da177e4 688{
af0fbfb5
TI
689 struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
690 struct snd_pcm_runtime *runtime = substream->runtime;
691 struct audio_stream *s = &chip->s[substream->pstr->stream];
1da177e4
LT
692
693 /* set requested samplerate */
694 sa11xx_uda1341_set_samplerate(chip, runtime->rate);
695
696 /* set requestd format when available */
697 /* set FMT here !!! FIXME */
698
699 s->period = 0;
700 s->periods = 0;
701
702 return 0;
703}
704
af0fbfb5 705static snd_pcm_uframes_t snd_sa11xx_uda1341_pointer(struct snd_pcm_substream *substream)
1da177e4 706{
af0fbfb5 707 struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
708 return audio_get_dma_pos(&chip->s[substream->pstr->stream]);
709}
710
711/* }}} */
712
af0fbfb5 713static struct snd_pcm_hardware snd_sa11xx_uda1341_capture =
1da177e4
LT
714{
715 .info = (SNDRV_PCM_INFO_INTERLEAVED |
716 SNDRV_PCM_INFO_BLOCK_TRANSFER |
717 SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
718 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
719 .formats = SNDRV_PCM_FMTBIT_S16_LE,
720 .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
721 SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |\
722 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
723 SNDRV_PCM_RATE_KNOT),
724 .rate_min = 8000,
725 .rate_max = 48000,
726 .channels_min = 2,
727 .channels_max = 2,
728 .buffer_bytes_max = 64*1024,
729 .period_bytes_min = 64,
730 .period_bytes_max = DMA_BUF_SIZE,
731 .periods_min = 2,
732 .periods_max = 255,
733 .fifo_size = 0,
734};
735
af0fbfb5 736static struct snd_pcm_hardware snd_sa11xx_uda1341_playback =
1da177e4
LT
737{
738 .info = (SNDRV_PCM_INFO_INTERLEAVED |
739 SNDRV_PCM_INFO_BLOCK_TRANSFER |
740 SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
741 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
742 .formats = SNDRV_PCM_FMTBIT_S16_LE,
743 .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
744 SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |\
745 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
746 SNDRV_PCM_RATE_KNOT),
747 .rate_min = 8000,
748 .rate_max = 48000,
749 .channels_min = 2,
750 .channels_max = 2,
751 .buffer_bytes_max = 64*1024,
752 .period_bytes_min = 64,
753 .period_bytes_max = DMA_BUF_SIZE,
754 .periods_min = 2,
755 .periods_max = 255,
756 .fifo_size = 0,
757};
758
af0fbfb5 759static int snd_card_sa11xx_uda1341_open(struct snd_pcm_substream *substream)
1da177e4 760{
af0fbfb5
TI
761 struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
762 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
763 int stream_id = substream->pstr->stream;
764 int err;
765
766 chip->s[stream_id].stream = substream;
767
768 if (stream_id == SNDRV_PCM_STREAM_PLAYBACK)
769 runtime->hw = snd_sa11xx_uda1341_playback;
770 else
771 runtime->hw = snd_sa11xx_uda1341_capture;
772 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
773 return err;
774 if ((err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates)) < 0)
775 return err;
776
777 return 0;
778}
779
af0fbfb5 780static int snd_card_sa11xx_uda1341_close(struct snd_pcm_substream *substream)
1da177e4 781{
af0fbfb5 782 struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
783
784 chip->s[substream->pstr->stream].stream = NULL;
785 return 0;
786}
787
788/* {{{ HW params & free */
789
af0fbfb5
TI
790static int snd_sa11xx_uda1341_hw_params(struct snd_pcm_substream *substream,
791 struct snd_pcm_hw_params *hw_params)
1da177e4
LT
792{
793
794 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
795}
796
af0fbfb5 797static int snd_sa11xx_uda1341_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT
798{
799 return snd_pcm_lib_free_pages(substream);
800}
801
802/* }}} */
803
af0fbfb5 804static struct snd_pcm_ops snd_card_sa11xx_uda1341_playback_ops = {
1da177e4
LT
805 .open = snd_card_sa11xx_uda1341_open,
806 .close = snd_card_sa11xx_uda1341_close,
807 .ioctl = snd_pcm_lib_ioctl,
808 .hw_params = snd_sa11xx_uda1341_hw_params,
809 .hw_free = snd_sa11xx_uda1341_hw_free,
810 .prepare = snd_sa11xx_uda1341_prepare,
811 .trigger = snd_sa11xx_uda1341_trigger,
812 .pointer = snd_sa11xx_uda1341_pointer,
813};
814
af0fbfb5 815static struct snd_pcm_ops snd_card_sa11xx_uda1341_capture_ops = {
1da177e4
LT
816 .open = snd_card_sa11xx_uda1341_open,
817 .close = snd_card_sa11xx_uda1341_close,
818 .ioctl = snd_pcm_lib_ioctl,
819 .hw_params = snd_sa11xx_uda1341_hw_params,
820 .hw_free = snd_sa11xx_uda1341_hw_free,
821 .prepare = snd_sa11xx_uda1341_prepare,
822 .trigger = snd_sa11xx_uda1341_trigger,
823 .pointer = snd_sa11xx_uda1341_pointer,
824};
825
af0fbfb5 826static int __init snd_card_sa11xx_uda1341_pcm(struct sa11xx_uda1341 *sa11xx_uda1341, int device)
1da177e4 827{
af0fbfb5 828 struct snd_pcm *pcm;
1da177e4
LT
829 int err;
830
831 if ((err = snd_pcm_new(sa11xx_uda1341->card, "UDA1341 PCM", device, 1, 1, &pcm)) < 0)
832 return err;
833
834 /*
835 * this sets up our initial buffers and sets the dma_type to isa.
836 * isa works but I'm not sure why (or if) it's the right choice
837 * this may be too large, trying it for now
838 */
0948e3c8
TI
839 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
840 snd_dma_isa_data(),
1da177e4
LT
841 64*1024, 64*1024);
842
843 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_card_sa11xx_uda1341_playback_ops);
844 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_card_sa11xx_uda1341_capture_ops);
845 pcm->private_data = sa11xx_uda1341;
846 pcm->info_flags = 0;
847 strcpy(pcm->name, "UDA1341 PCM");
848
849 sa11xx_uda1341_audio_init(sa11xx_uda1341);
850
851 /* setup DMA controller */
852 audio_dma_request(&sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK], audio_dma_callback);
853 audio_dma_request(&sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE], audio_dma_callback);
854
855 sa11xx_uda1341->pcm = pcm;
856
857 return 0;
858}
859
860/* }}} */
861
862/* {{{ module init & exit */
863
864#ifdef CONFIG_PM
865
2b3f5587
TI
866static int snd_sa11xx_uda1341_suspend(struct platform_device *devptr,
867 pm_message_t state)
1da177e4 868{
2b3f5587
TI
869 struct snd_card *card = platform_get_drvdata(devptr);
870 struct sa11xx_uda1341 *chip = card->private_data;
1da177e4 871
2b3f5587 872 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4 873 snd_pcm_suspend_all(chip->pcm);
2b3f5587 874#ifdef HH_VERSION
1da177e4
LT
875 sa1100_dma_sleep(chip->s[SNDRV_PCM_STREAM_PLAYBACK].dmach);
876 sa1100_dma_sleep(chip->s[SNDRV_PCM_STREAM_CAPTURE].dmach);
877#else
878 //FIXME
879#endif
880 l3_command(chip->uda1341, CMD_SUSPEND, NULL);
881 sa11xx_uda1341_audio_shutdown(chip);
2b3f5587 882
1da177e4
LT
883 return 0;
884}
885
2b3f5587 886static int snd_sa11xx_uda1341_resume(struct platform_device *devptr)
1da177e4 887{
2b3f5587
TI
888 struct snd_card *card = platform_get_drvdata(devptr);
889 struct sa11xx_uda1341 *chip = card->private_data;
1da177e4
LT
890
891 sa11xx_uda1341_audio_init(chip);
892 l3_command(chip->uda1341, CMD_RESUME, NULL);
893#ifdef HH_VERSION
894 sa1100_dma_wakeup(chip->s[SNDRV_PCM_STREAM_PLAYBACK].dmach);
895 sa1100_dma_wakeup(chip->s[SNDRV_PCM_STREAM_CAPTURE].dmach);
896#else
897 //FIXME
898#endif
2b3f5587 899 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT
900 return 0;
901}
902#endif /* COMFIG_PM */
903
af0fbfb5 904void snd_sa11xx_uda1341_free(struct snd_card *card)
1da177e4 905{
af0fbfb5 906 struct sa11xx_uda1341 *chip = card->private_data;
1da177e4
LT
907
908 audio_dma_free(&chip->s[SNDRV_PCM_STREAM_PLAYBACK]);
909 audio_dma_free(&chip->s[SNDRV_PCM_STREAM_CAPTURE]);
1da177e4
LT
910}
911
2b3f5587 912static int __init sa11xx_uda1341_probe(struct platform_device *devptr)
1da177e4
LT
913{
914 int err;
af0fbfb5
TI
915 struct snd_card *card;
916 struct sa11xx_uda1341 *chip;
1da177e4 917
1da177e4 918 /* register the soundcard */
af0fbfb5 919 card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct sa11xx_uda1341));
1da177e4
LT
920 if (card == NULL)
921 return -ENOMEM;
922
0948e3c8 923 chip = card->private_data;
1da177e4
LT
924 spin_lock_init(&chip->s[0].dma_lock);
925 spin_lock_init(&chip->s[1].dma_lock);
af0fbfb5 926
2b3f5587 927 card->private_free = snd_sa11xx_uda1341_free;
0948e3c8
TI
928 chip->card = card;
929 chip->samplerate = AUDIO_RATE_DEFAULT;
1da177e4
LT
930
931 // mixer
af0fbfb5 932 if ((err = snd_chip_uda1341_mixer_new(card, &chip->uda1341)))
1da177e4
LT
933 goto nodev;
934
935 // PCM
0948e3c8 936 if ((err = snd_card_sa11xx_uda1341_pcm(chip, 0)) < 0)
1da177e4
LT
937 goto nodev;
938
1da177e4
LT
939 strcpy(card->driver, "UDA1341");
940 strcpy(card->shortname, "H3600 UDA1341TS");
941 sprintf(card->longname, "Compaq iPAQ H3600 with Philips UDA1341TS");
942
2b3f5587 943 snd_card_set_dev(card, &devptr->dev);
16dab54b 944
1da177e4
LT
945 if ((err = snd_card_register(card)) == 0) {
946 printk( KERN_INFO "iPAQ audio support initialized\n" );
2b3f5587 947 platform_set_drvdata(devptr, card);
1da177e4
LT
948 return 0;
949 }
950
951 nodev:
952 snd_card_free(card);
953 return err;
954}
955
2b3f5587
TI
956static int __devexit sa11xx_uda1341_remove(struct platform_device *devptr)
957{
958 snd_card_free(platform_get_drvdata(devptr));
959 platform_set_drvdata(devptr, NULL);
960 return 0;
961}
962
963#define SA11XX_UDA1341_DRIVER "sa11xx_uda1341"
964
965static struct platform_driver sa11xx_uda1341_driver = {
966 .probe = sa11xx_uda1341_probe,
967 .remove = __devexit_p(sa11xx_uda1341_remove),
968#ifdef CONFIG_PM
969 .suspend = snd_sa11xx_uda1341_suspend,
970 .resume = snd_sa11xx_uda1341_resume,
971#endif
972 .driver = {
973 .name = SA11XX_UDA1341_DRIVER,
974 },
975};
976
977static int __init sa11xx_uda1341_init(void)
978{
979 int err;
2b3f5587
TI
980
981 if (!machine_is_h3xxx())
982 return -ENODEV;
983 if ((err = platform_driver_register(&sa11xx_uda1341_driver)) < 0)
984 return err;
985 device = platform_device_register_simple(SA11XX_UDA1341_DRIVER, -1, NULL, 0);
7152447d
RH
986 if (!IS_ERR(device)) {
987 if (platform_get_drvdata(device))
988 return 0;
989 platform_device_unregister(device);
990 err = -ENODEV
991 } else
992 err = PTR_ERR(device);
993 platform_driver_unregister(&sa11xx_uda1341_driver);
994 return err;
2b3f5587
TI
995}
996
1da177e4
LT
997static void __exit sa11xx_uda1341_exit(void)
998{
f7a9275d 999 platform_device_unregister(device);
2b3f5587 1000 platform_driver_unregister(&sa11xx_uda1341_driver);
1da177e4
LT
1001}
1002
1003module_init(sa11xx_uda1341_init);
1004module_exit(sa11xx_uda1341_exit);
1005
1006/* }}} */
1007
1008/*
1009 * Local variables:
1010 * indent-tabs-mode: t
1011 * End:
1012 */