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e4967d60 HCE |
1 | /* |
2 | * Driver for the Atmel on-chip Audio Bitstream DAC (ABDAC) | |
3 | * | |
4 | * Copyright (C) 2006-2009 Atmel Corporation | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License version 2 as published by | |
8 | * the Free Software Foundation. | |
9 | */ | |
10 | #include <linux/clk.h> | |
11 | #include <linux/bitmap.h> | |
12 | #include <linux/dw_dmac.h> | |
13 | #include <linux/dmaengine.h> | |
14 | #include <linux/dma-mapping.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/platform_device.h> | |
e2b35f3d | 19 | #include <linux/types.h> |
e4967d60 HCE |
20 | #include <linux/io.h> |
21 | ||
22 | #include <sound/core.h> | |
23 | #include <sound/initval.h> | |
24 | #include <sound/pcm.h> | |
25 | #include <sound/pcm_params.h> | |
26 | #include <sound/atmel-abdac.h> | |
27 | ||
28 | /* DAC register offsets */ | |
29 | #define DAC_DATA 0x0000 | |
30 | #define DAC_CTRL 0x0008 | |
31 | #define DAC_INT_MASK 0x000c | |
32 | #define DAC_INT_EN 0x0010 | |
33 | #define DAC_INT_DIS 0x0014 | |
34 | #define DAC_INT_CLR 0x0018 | |
35 | #define DAC_INT_STATUS 0x001c | |
36 | ||
37 | /* Bitfields in CTRL */ | |
38 | #define DAC_SWAP_OFFSET 30 | |
39 | #define DAC_SWAP_SIZE 1 | |
40 | #define DAC_EN_OFFSET 31 | |
41 | #define DAC_EN_SIZE 1 | |
42 | ||
43 | /* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */ | |
44 | #define DAC_UNDERRUN_OFFSET 28 | |
45 | #define DAC_UNDERRUN_SIZE 1 | |
46 | #define DAC_TX_READY_OFFSET 29 | |
47 | #define DAC_TX_READY_SIZE 1 | |
48 | ||
49 | /* Bit manipulation macros */ | |
50 | #define DAC_BIT(name) \ | |
51 | (1 << DAC_##name##_OFFSET) | |
52 | #define DAC_BF(name, value) \ | |
53 | (((value) & ((1 << DAC_##name##_SIZE) - 1)) \ | |
54 | << DAC_##name##_OFFSET) | |
55 | #define DAC_BFEXT(name, value) \ | |
56 | (((value) >> DAC_##name##_OFFSET) \ | |
57 | & ((1 << DAC_##name##_SIZE) - 1)) | |
58 | #define DAC_BFINS(name, value, old) \ | |
59 | (((old) & ~(((1 << DAC_##name##_SIZE) - 1) \ | |
60 | << DAC_##name##_OFFSET)) \ | |
61 | | DAC_BF(name, value)) | |
62 | ||
63 | /* Register access macros */ | |
64 | #define dac_readl(port, reg) \ | |
65 | __raw_readl((port)->regs + DAC_##reg) | |
66 | #define dac_writel(port, reg, value) \ | |
67 | __raw_writel((value), (port)->regs + DAC_##reg) | |
68 | ||
69 | /* | |
70 | * ABDAC supports a maximum of 6 different rates from a generic clock. The | |
71 | * generic clock has a power of two divider, which gives 6 steps from 192 kHz | |
72 | * to 5112 Hz. | |
73 | */ | |
74 | #define MAX_NUM_RATES 6 | |
75 | /* ALSA seems to use rates between 192000 Hz and 5112 Hz. */ | |
76 | #define RATE_MAX 192000 | |
77 | #define RATE_MIN 5112 | |
78 | ||
79 | enum { | |
80 | DMA_READY = 0, | |
81 | }; | |
82 | ||
83 | struct atmel_abdac_dma { | |
84 | struct dma_chan *chan; | |
85 | struct dw_cyclic_desc *cdesc; | |
86 | }; | |
87 | ||
88 | struct atmel_abdac { | |
89 | struct clk *pclk; | |
90 | struct clk *sample_clk; | |
91 | struct platform_device *pdev; | |
92 | struct atmel_abdac_dma dma; | |
93 | ||
94 | struct snd_pcm_hw_constraint_list constraints_rates; | |
95 | struct snd_pcm_substream *substream; | |
96 | struct snd_card *card; | |
97 | struct snd_pcm *pcm; | |
98 | ||
99 | void __iomem *regs; | |
100 | unsigned long flags; | |
101 | unsigned int rates[MAX_NUM_RATES]; | |
102 | unsigned int rates_num; | |
103 | int irq; | |
104 | }; | |
105 | ||
106 | #define get_dac(card) ((struct atmel_abdac *)(card)->private_data) | |
107 | ||
108 | /* This function is called by the DMA driver. */ | |
109 | static void atmel_abdac_dma_period_done(void *arg) | |
110 | { | |
111 | struct atmel_abdac *dac = arg; | |
112 | snd_pcm_period_elapsed(dac->substream); | |
113 | } | |
114 | ||
115 | static int atmel_abdac_prepare_dma(struct atmel_abdac *dac, | |
116 | struct snd_pcm_substream *substream, | |
117 | enum dma_data_direction direction) | |
118 | { | |
119 | struct dma_chan *chan = dac->dma.chan; | |
120 | struct dw_cyclic_desc *cdesc; | |
121 | struct snd_pcm_runtime *runtime = substream->runtime; | |
122 | unsigned long buffer_len, period_len; | |
123 | ||
124 | /* | |
125 | * We don't do DMA on "complex" transfers, i.e. with | |
126 | * non-halfword-aligned buffers or lengths. | |
127 | */ | |
128 | if (runtime->dma_addr & 1 || runtime->buffer_size & 1) { | |
129 | dev_dbg(&dac->pdev->dev, "too complex transfer\n"); | |
130 | return -EINVAL; | |
131 | } | |
132 | ||
133 | buffer_len = frames_to_bytes(runtime, runtime->buffer_size); | |
134 | period_len = frames_to_bytes(runtime, runtime->period_size); | |
135 | ||
136 | cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len, | |
35e16581 | 137 | period_len, DMA_MEM_TO_DEV); |
e4967d60 HCE |
138 | if (IS_ERR(cdesc)) { |
139 | dev_dbg(&dac->pdev->dev, "could not prepare cyclic DMA\n"); | |
140 | return PTR_ERR(cdesc); | |
141 | } | |
142 | ||
143 | cdesc->period_callback = atmel_abdac_dma_period_done; | |
144 | cdesc->period_callback_param = dac; | |
145 | ||
146 | dac->dma.cdesc = cdesc; | |
147 | ||
148 | set_bit(DMA_READY, &dac->flags); | |
149 | ||
150 | return 0; | |
151 | } | |
152 | ||
153 | static struct snd_pcm_hardware atmel_abdac_hw = { | |
154 | .info = (SNDRV_PCM_INFO_MMAP | |
155 | | SNDRV_PCM_INFO_MMAP_VALID | |
156 | | SNDRV_PCM_INFO_INTERLEAVED | |
157 | | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
158 | | SNDRV_PCM_INFO_RESUME | |
159 | | SNDRV_PCM_INFO_PAUSE), | |
160 | .formats = (SNDRV_PCM_FMTBIT_S16_BE), | |
161 | .rates = (SNDRV_PCM_RATE_KNOT), | |
162 | .rate_min = RATE_MIN, | |
163 | .rate_max = RATE_MAX, | |
164 | .channels_min = 2, | |
165 | .channels_max = 2, | |
166 | .buffer_bytes_max = 64 * 4096, | |
167 | .period_bytes_min = 4096, | |
168 | .period_bytes_max = 4096, | |
fa075ed2 | 169 | .periods_min = 6, |
e4967d60 HCE |
170 | .periods_max = 64, |
171 | }; | |
172 | ||
173 | static int atmel_abdac_open(struct snd_pcm_substream *substream) | |
174 | { | |
175 | struct atmel_abdac *dac = snd_pcm_substream_chip(substream); | |
176 | ||
177 | dac->substream = substream; | |
178 | atmel_abdac_hw.rate_max = dac->rates[dac->rates_num - 1]; | |
179 | atmel_abdac_hw.rate_min = dac->rates[0]; | |
180 | substream->runtime->hw = atmel_abdac_hw; | |
181 | ||
182 | return snd_pcm_hw_constraint_list(substream->runtime, 0, | |
183 | SNDRV_PCM_HW_PARAM_RATE, &dac->constraints_rates); | |
184 | } | |
185 | ||
186 | static int atmel_abdac_close(struct snd_pcm_substream *substream) | |
187 | { | |
188 | struct atmel_abdac *dac = snd_pcm_substream_chip(substream); | |
189 | dac->substream = NULL; | |
190 | return 0; | |
191 | } | |
192 | ||
193 | static int atmel_abdac_hw_params(struct snd_pcm_substream *substream, | |
194 | struct snd_pcm_hw_params *hw_params) | |
195 | { | |
196 | struct atmel_abdac *dac = snd_pcm_substream_chip(substream); | |
197 | int retval; | |
198 | ||
199 | retval = snd_pcm_lib_malloc_pages(substream, | |
200 | params_buffer_bytes(hw_params)); | |
201 | if (retval < 0) | |
202 | return retval; | |
203 | /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ | |
204 | if (retval == 1) | |
205 | if (test_and_clear_bit(DMA_READY, &dac->flags)) | |
206 | dw_dma_cyclic_free(dac->dma.chan); | |
207 | ||
208 | return retval; | |
209 | } | |
210 | ||
211 | static int atmel_abdac_hw_free(struct snd_pcm_substream *substream) | |
212 | { | |
213 | struct atmel_abdac *dac = snd_pcm_substream_chip(substream); | |
214 | if (test_and_clear_bit(DMA_READY, &dac->flags)) | |
215 | dw_dma_cyclic_free(dac->dma.chan); | |
216 | return snd_pcm_lib_free_pages(substream); | |
217 | } | |
218 | ||
219 | static int atmel_abdac_prepare(struct snd_pcm_substream *substream) | |
220 | { | |
221 | struct atmel_abdac *dac = snd_pcm_substream_chip(substream); | |
222 | int retval; | |
223 | ||
224 | retval = clk_set_rate(dac->sample_clk, 256 * substream->runtime->rate); | |
225 | if (retval) | |
226 | return retval; | |
227 | ||
228 | if (!test_bit(DMA_READY, &dac->flags)) | |
229 | retval = atmel_abdac_prepare_dma(dac, substream, DMA_TO_DEVICE); | |
230 | ||
231 | return retval; | |
232 | } | |
233 | ||
234 | static int atmel_abdac_trigger(struct snd_pcm_substream *substream, int cmd) | |
235 | { | |
236 | struct atmel_abdac *dac = snd_pcm_substream_chip(substream); | |
237 | int retval = 0; | |
238 | ||
239 | switch (cmd) { | |
240 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */ | |
241 | case SNDRV_PCM_TRIGGER_RESUME: /* fall through */ | |
242 | case SNDRV_PCM_TRIGGER_START: | |
243 | clk_enable(dac->sample_clk); | |
244 | retval = dw_dma_cyclic_start(dac->dma.chan); | |
245 | if (retval) | |
246 | goto out; | |
247 | dac_writel(dac, CTRL, DAC_BIT(EN)); | |
248 | break; | |
249 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */ | |
250 | case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */ | |
251 | case SNDRV_PCM_TRIGGER_STOP: | |
252 | dw_dma_cyclic_stop(dac->dma.chan); | |
253 | dac_writel(dac, DATA, 0); | |
254 | dac_writel(dac, CTRL, 0); | |
255 | clk_disable(dac->sample_clk); | |
256 | break; | |
257 | default: | |
258 | retval = -EINVAL; | |
259 | break; | |
260 | } | |
261 | out: | |
262 | return retval; | |
263 | } | |
264 | ||
265 | static snd_pcm_uframes_t | |
266 | atmel_abdac_pointer(struct snd_pcm_substream *substream) | |
267 | { | |
268 | struct atmel_abdac *dac = snd_pcm_substream_chip(substream); | |
269 | struct snd_pcm_runtime *runtime = substream->runtime; | |
270 | snd_pcm_uframes_t frames; | |
271 | unsigned long bytes; | |
272 | ||
273 | bytes = dw_dma_get_src_addr(dac->dma.chan); | |
274 | bytes -= runtime->dma_addr; | |
275 | ||
276 | frames = bytes_to_frames(runtime, bytes); | |
277 | if (frames >= runtime->buffer_size) | |
278 | frames -= runtime->buffer_size; | |
279 | ||
280 | return frames; | |
281 | } | |
282 | ||
283 | static irqreturn_t abdac_interrupt(int irq, void *dev_id) | |
284 | { | |
285 | struct atmel_abdac *dac = dev_id; | |
286 | u32 status; | |
287 | ||
288 | status = dac_readl(dac, INT_STATUS); | |
289 | if (status & DAC_BIT(UNDERRUN)) { | |
290 | dev_err(&dac->pdev->dev, "underrun detected\n"); | |
291 | dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN)); | |
292 | } else { | |
293 | dev_err(&dac->pdev->dev, "spurious interrupt (status=0x%x)\n", | |
294 | status); | |
295 | dac_writel(dac, INT_CLR, status); | |
296 | } | |
297 | ||
298 | return IRQ_HANDLED; | |
299 | } | |
300 | ||
301 | static struct snd_pcm_ops atmel_abdac_ops = { | |
302 | .open = atmel_abdac_open, | |
303 | .close = atmel_abdac_close, | |
304 | .ioctl = snd_pcm_lib_ioctl, | |
305 | .hw_params = atmel_abdac_hw_params, | |
306 | .hw_free = atmel_abdac_hw_free, | |
307 | .prepare = atmel_abdac_prepare, | |
308 | .trigger = atmel_abdac_trigger, | |
309 | .pointer = atmel_abdac_pointer, | |
310 | }; | |
311 | ||
61dc674c | 312 | static int atmel_abdac_pcm_new(struct atmel_abdac *dac) |
e4967d60 HCE |
313 | { |
314 | struct snd_pcm_hardware hw = atmel_abdac_hw; | |
315 | struct snd_pcm *pcm; | |
316 | int retval; | |
317 | ||
318 | retval = snd_pcm_new(dac->card, dac->card->shortname, | |
319 | dac->pdev->id, 1, 0, &pcm); | |
320 | if (retval) | |
321 | return retval; | |
322 | ||
323 | strcpy(pcm->name, dac->card->shortname); | |
324 | pcm->private_data = dac; | |
325 | pcm->info_flags = 0; | |
326 | dac->pcm = pcm; | |
327 | ||
328 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &atmel_abdac_ops); | |
329 | ||
330 | retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
331 | &dac->pdev->dev, hw.periods_min * hw.period_bytes_min, | |
332 | hw.buffer_bytes_max); | |
333 | ||
334 | return retval; | |
335 | } | |
336 | ||
337 | static bool filter(struct dma_chan *chan, void *slave) | |
338 | { | |
339 | struct dw_dma_slave *dws = slave; | |
340 | ||
341 | if (dws->dma_dev == chan->device->dev) { | |
342 | chan->private = dws; | |
343 | return true; | |
344 | } else | |
345 | return false; | |
346 | } | |
347 | ||
348 | static int set_sample_rates(struct atmel_abdac *dac) | |
349 | { | |
350 | long new_rate = RATE_MAX; | |
351 | int retval = -EINVAL; | |
352 | int index = 0; | |
353 | ||
354 | /* we start at 192 kHz and work our way down to 5112 Hz */ | |
355 | while (new_rate >= RATE_MIN && index < (MAX_NUM_RATES + 1)) { | |
356 | new_rate = clk_round_rate(dac->sample_clk, 256 * new_rate); | |
337bb336 | 357 | if (new_rate <= 0) |
e4967d60 HCE |
358 | break; |
359 | /* make sure we are below the ABDAC clock */ | |
e4de211c TI |
360 | if (index < MAX_NUM_RATES && |
361 | new_rate <= clk_get_rate(dac->pclk)) { | |
e4967d60 HCE |
362 | dac->rates[index] = new_rate / 256; |
363 | index++; | |
364 | } | |
365 | /* divide by 256 and then by two to get next rate */ | |
366 | new_rate /= 256 * 2; | |
367 | } | |
368 | ||
369 | if (index) { | |
370 | int i; | |
371 | ||
372 | /* reverse array, smallest go first */ | |
373 | for (i = 0; i < (index / 2); i++) { | |
374 | unsigned int tmp = dac->rates[index - 1 - i]; | |
375 | dac->rates[index - 1 - i] = dac->rates[i]; | |
376 | dac->rates[i] = tmp; | |
377 | } | |
378 | ||
379 | dac->constraints_rates.count = index; | |
380 | dac->constraints_rates.list = dac->rates; | |
381 | dac->constraints_rates.mask = 0; | |
382 | dac->rates_num = index; | |
383 | ||
384 | retval = 0; | |
385 | } | |
386 | ||
387 | return retval; | |
388 | } | |
389 | ||
61dc674c | 390 | static int atmel_abdac_probe(struct platform_device *pdev) |
e4967d60 HCE |
391 | { |
392 | struct snd_card *card; | |
393 | struct atmel_abdac *dac; | |
394 | struct resource *regs; | |
395 | struct atmel_abdac_pdata *pdata; | |
396 | struct clk *pclk; | |
397 | struct clk *sample_clk; | |
398 | int retval; | |
399 | int irq; | |
400 | ||
401 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
402 | if (!regs) { | |
403 | dev_dbg(&pdev->dev, "no memory resource\n"); | |
404 | return -ENXIO; | |
405 | } | |
406 | ||
407 | irq = platform_get_irq(pdev, 0); | |
408 | if (irq < 0) { | |
409 | dev_dbg(&pdev->dev, "could not get IRQ number\n"); | |
410 | return irq; | |
411 | } | |
412 | ||
413 | pdata = pdev->dev.platform_data; | |
414 | if (!pdata) { | |
415 | dev_dbg(&pdev->dev, "no platform data\n"); | |
416 | return -ENXIO; | |
417 | } | |
418 | ||
419 | pclk = clk_get(&pdev->dev, "pclk"); | |
420 | if (IS_ERR(pclk)) { | |
421 | dev_dbg(&pdev->dev, "no peripheral clock\n"); | |
422 | return PTR_ERR(pclk); | |
423 | } | |
424 | sample_clk = clk_get(&pdev->dev, "sample_clk"); | |
c0763e68 | 425 | if (IS_ERR(sample_clk)) { |
e4967d60 | 426 | dev_dbg(&pdev->dev, "no sample clock\n"); |
1beded5d | 427 | retval = PTR_ERR(sample_clk); |
e4967d60 HCE |
428 | goto out_put_pclk; |
429 | } | |
430 | clk_enable(pclk); | |
431 | ||
432 | retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, | |
433 | THIS_MODULE, sizeof(struct atmel_abdac), &card); | |
434 | if (retval) { | |
435 | dev_dbg(&pdev->dev, "could not create sound card device\n"); | |
436 | goto out_put_sample_clk; | |
437 | } | |
438 | ||
439 | dac = get_dac(card); | |
440 | ||
441 | dac->irq = irq; | |
442 | dac->card = card; | |
443 | dac->pclk = pclk; | |
444 | dac->sample_clk = sample_clk; | |
445 | dac->pdev = pdev; | |
446 | ||
447 | retval = set_sample_rates(dac); | |
448 | if (retval < 0) { | |
449 | dev_dbg(&pdev->dev, "could not set supported rates\n"); | |
450 | goto out_free_card; | |
451 | } | |
452 | ||
28f65c11 | 453 | dac->regs = ioremap(regs->start, resource_size(regs)); |
e4967d60 HCE |
454 | if (!dac->regs) { |
455 | dev_dbg(&pdev->dev, "could not remap register memory\n"); | |
aaf265c2 | 456 | retval = -ENOMEM; |
e4967d60 HCE |
457 | goto out_free_card; |
458 | } | |
459 | ||
460 | /* make sure the DAC is silent and disabled */ | |
461 | dac_writel(dac, DATA, 0); | |
462 | dac_writel(dac, CTRL, 0); | |
463 | ||
464 | retval = request_irq(irq, abdac_interrupt, 0, "abdac", dac); | |
465 | if (retval) { | |
466 | dev_dbg(&pdev->dev, "could not request irq\n"); | |
467 | goto out_unmap_regs; | |
468 | } | |
469 | ||
470 | snd_card_set_dev(card, &pdev->dev); | |
471 | ||
472 | if (pdata->dws.dma_dev) { | |
e4967d60 HCE |
473 | dma_cap_mask_t mask; |
474 | ||
e4967d60 HCE |
475 | dma_cap_zero(mask); |
476 | dma_cap_set(DMA_SLAVE, mask); | |
477 | ||
e2b35f3d VK |
478 | dac->dma.chan = dma_request_channel(mask, filter, &pdata->dws); |
479 | if (dac->dma.chan) { | |
480 | struct dma_slave_config dma_conf = { | |
481 | .dst_addr = regs->start + DAC_DATA, | |
482 | .dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, | |
483 | .src_maxburst = 1, | |
484 | .dst_maxburst = 1, | |
485 | .direction = DMA_MEM_TO_DEV, | |
486 | .device_fc = false, | |
487 | }; | |
488 | ||
489 | dmaengine_slave_config(dac->dma.chan, &dma_conf); | |
490 | } | |
e4967d60 HCE |
491 | } |
492 | if (!pdata->dws.dma_dev || !dac->dma.chan) { | |
493 | dev_dbg(&pdev->dev, "DMA not available\n"); | |
494 | retval = -ENODEV; | |
495 | goto out_unset_card_dev; | |
496 | } | |
497 | ||
498 | strcpy(card->driver, "Atmel ABDAC"); | |
499 | strcpy(card->shortname, "Atmel ABDAC"); | |
500 | sprintf(card->longname, "Atmel Audio Bitstream DAC"); | |
501 | ||
502 | retval = atmel_abdac_pcm_new(dac); | |
503 | if (retval) { | |
504 | dev_dbg(&pdev->dev, "could not register ABDAC pcm device\n"); | |
505 | goto out_release_dma; | |
506 | } | |
507 | ||
508 | retval = snd_card_register(card); | |
509 | if (retval) { | |
510 | dev_dbg(&pdev->dev, "could not register sound card\n"); | |
511 | goto out_release_dma; | |
512 | } | |
513 | ||
514 | platform_set_drvdata(pdev, card); | |
515 | ||
516 | dev_info(&pdev->dev, "Atmel ABDAC at 0x%p using %s\n", | |
60a56cce | 517 | dac->regs, dev_name(&dac->dma.chan->dev->device)); |
e4967d60 HCE |
518 | |
519 | return retval; | |
520 | ||
521 | out_release_dma: | |
522 | dma_release_channel(dac->dma.chan); | |
523 | dac->dma.chan = NULL; | |
524 | out_unset_card_dev: | |
525 | snd_card_set_dev(card, NULL); | |
526 | free_irq(irq, dac); | |
527 | out_unmap_regs: | |
528 | iounmap(dac->regs); | |
529 | out_free_card: | |
530 | snd_card_free(card); | |
531 | out_put_sample_clk: | |
532 | clk_put(sample_clk); | |
533 | clk_disable(pclk); | |
534 | out_put_pclk: | |
535 | clk_put(pclk); | |
536 | return retval; | |
537 | } | |
538 | ||
d34e4e00 | 539 | #ifdef CONFIG_PM_SLEEP |
284e7ca7 | 540 | static int atmel_abdac_suspend(struct device *pdev) |
e4967d60 | 541 | { |
284e7ca7 | 542 | struct snd_card *card = dev_get_drvdata(pdev); |
e4967d60 HCE |
543 | struct atmel_abdac *dac = card->private_data; |
544 | ||
545 | dw_dma_cyclic_stop(dac->dma.chan); | |
546 | clk_disable(dac->sample_clk); | |
547 | clk_disable(dac->pclk); | |
548 | ||
549 | return 0; | |
550 | } | |
551 | ||
284e7ca7 | 552 | static int atmel_abdac_resume(struct device *pdev) |
e4967d60 | 553 | { |
284e7ca7 | 554 | struct snd_card *card = dev_get_drvdata(pdev); |
e4967d60 HCE |
555 | struct atmel_abdac *dac = card->private_data; |
556 | ||
557 | clk_enable(dac->pclk); | |
558 | clk_enable(dac->sample_clk); | |
559 | if (test_bit(DMA_READY, &dac->flags)) | |
560 | dw_dma_cyclic_start(dac->dma.chan); | |
561 | ||
562 | return 0; | |
563 | } | |
284e7ca7 TI |
564 | |
565 | static SIMPLE_DEV_PM_OPS(atmel_abdac_pm, atmel_abdac_suspend, atmel_abdac_resume); | |
566 | #define ATMEL_ABDAC_PM_OPS &atmel_abdac_pm | |
e4967d60 | 567 | #else |
284e7ca7 | 568 | #define ATMEL_ABDAC_PM_OPS NULL |
e4967d60 HCE |
569 | #endif |
570 | ||
61dc674c | 571 | static int atmel_abdac_remove(struct platform_device *pdev) |
e4967d60 HCE |
572 | { |
573 | struct snd_card *card = platform_get_drvdata(pdev); | |
574 | struct atmel_abdac *dac = get_dac(card); | |
575 | ||
576 | clk_put(dac->sample_clk); | |
577 | clk_disable(dac->pclk); | |
578 | clk_put(dac->pclk); | |
579 | ||
580 | dma_release_channel(dac->dma.chan); | |
581 | dac->dma.chan = NULL; | |
582 | snd_card_set_dev(card, NULL); | |
583 | iounmap(dac->regs); | |
584 | free_irq(dac->irq, dac); | |
585 | snd_card_free(card); | |
586 | ||
e4967d60 HCE |
587 | return 0; |
588 | } | |
589 | ||
590 | static struct platform_driver atmel_abdac_driver = { | |
61dc674c | 591 | .remove = atmel_abdac_remove, |
e4967d60 HCE |
592 | .driver = { |
593 | .name = "atmel_abdac", | |
8bf01d8a | 594 | .owner = THIS_MODULE, |
284e7ca7 | 595 | .pm = ATMEL_ABDAC_PM_OPS, |
e4967d60 | 596 | }, |
e4967d60 HCE |
597 | }; |
598 | ||
599 | static int __init atmel_abdac_init(void) | |
600 | { | |
601 | return platform_driver_probe(&atmel_abdac_driver, | |
602 | atmel_abdac_probe); | |
603 | } | |
604 | module_init(atmel_abdac_init); | |
605 | ||
606 | static void __exit atmel_abdac_exit(void) | |
607 | { | |
608 | platform_driver_unregister(&atmel_abdac_driver); | |
609 | } | |
610 | module_exit(atmel_abdac_exit); | |
611 | ||
612 | MODULE_LICENSE("GPL"); | |
613 | MODULE_DESCRIPTION("Driver for Atmel Audio Bitstream DAC (ABDAC)"); | |
0cfae7c9 | 614 | MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>"); |