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4ede028f | 1 | /* |
128ed6a9 | 2 | * Driver for Atmel AC97C |
4ede028f HCE |
3 | * |
4 | * Copyright (C) 2005-2009 Atmel Corporation | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License version 2 as published by | |
8 | * the Free Software Foundation. | |
9 | */ | |
10 | #include <linux/clk.h> | |
11 | #include <linux/delay.h> | |
12 | #include <linux/bitmap.h> | |
128ed6a9 | 13 | #include <linux/device.h> |
7177395f | 14 | #include <linux/atmel_pdc.h> |
4ede028f HCE |
15 | #include <linux/init.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/mutex.h> | |
20 | #include <linux/gpio.h> | |
e2b35f3d | 21 | #include <linux/types.h> |
4ede028f | 22 | #include <linux/io.h> |
b2d8957f AS |
23 | #include <linux/of.h> |
24 | #include <linux/of_gpio.h> | |
25 | #include <linux/of_device.h> | |
4ede028f HCE |
26 | |
27 | #include <sound/core.h> | |
28 | #include <sound/initval.h> | |
29 | #include <sound/pcm.h> | |
30 | #include <sound/pcm_params.h> | |
31 | #include <sound/ac97_codec.h> | |
32 | #include <sound/atmel-ac97c.h> | |
33 | #include <sound/memalloc.h> | |
34 | ||
4ede028f HCE |
35 | #include "ac97c.h" |
36 | ||
4ede028f HCE |
37 | /* Serialize access to opened variable */ |
38 | static DEFINE_MUTEX(opened_mutex); | |
39 | ||
4ede028f HCE |
40 | struct atmel_ac97c { |
41 | struct clk *pclk; | |
42 | struct platform_device *pdev; | |
4ede028f HCE |
43 | |
44 | struct snd_pcm_substream *playback_substream; | |
45 | struct snd_pcm_substream *capture_substream; | |
46 | struct snd_card *card; | |
47 | struct snd_pcm *pcm; | |
48 | struct snd_ac97 *ac97; | |
49 | struct snd_ac97_bus *ac97_bus; | |
50 | ||
51 | u64 cur_format; | |
52 | unsigned int cur_rate; | |
7177395f | 53 | int playback_period, capture_period; |
4ede028f HCE |
54 | /* Serialize access to opened variable */ |
55 | spinlock_t lock; | |
56 | void __iomem *regs; | |
df163587 | 57 | int irq; |
4ede028f HCE |
58 | int opened; |
59 | int reset_pin; | |
60 | }; | |
61 | ||
62 | #define get_chip(card) ((struct atmel_ac97c *)(card)->private_data) | |
63 | ||
64 | #define ac97c_writel(chip, reg, val) \ | |
65 | __raw_writel((val), (chip)->regs + AC97C_##reg) | |
66 | #define ac97c_readl(chip, reg) \ | |
67 | __raw_readl((chip)->regs + AC97C_##reg) | |
68 | ||
4ede028f HCE |
69 | static struct snd_pcm_hardware atmel_ac97c_hw = { |
70 | .info = (SNDRV_PCM_INFO_MMAP | |
71 | | SNDRV_PCM_INFO_MMAP_VALID | |
72 | | SNDRV_PCM_INFO_INTERLEAVED | |
73 | | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
74 | | SNDRV_PCM_INFO_JOINT_DUPLEX | |
75 | | SNDRV_PCM_INFO_RESUME | |
76 | | SNDRV_PCM_INFO_PAUSE), | |
77 | .formats = (SNDRV_PCM_FMTBIT_S16_BE | |
78 | | SNDRV_PCM_FMTBIT_S16_LE), | |
79 | .rates = (SNDRV_PCM_RATE_CONTINUOUS), | |
80 | .rate_min = 4000, | |
81 | .rate_max = 48000, | |
82 | .channels_min = 1, | |
83 | .channels_max = 2, | |
c42eec0f | 84 | .buffer_bytes_max = 2 * 2 * 64 * 2048, |
4ede028f HCE |
85 | .period_bytes_min = 4096, |
86 | .period_bytes_max = 4096, | |
c42eec0f | 87 | .periods_min = 6, |
4ede028f HCE |
88 | .periods_max = 64, |
89 | }; | |
90 | ||
91 | static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream) | |
92 | { | |
93 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
94 | struct snd_pcm_runtime *runtime = substream->runtime; | |
95 | ||
96 | mutex_lock(&opened_mutex); | |
97 | chip->opened++; | |
98 | runtime->hw = atmel_ac97c_hw; | |
99 | if (chip->cur_rate) { | |
100 | runtime->hw.rate_min = chip->cur_rate; | |
101 | runtime->hw.rate_max = chip->cur_rate; | |
102 | } | |
103 | if (chip->cur_format) | |
74c34ca1 | 104 | runtime->hw.formats = pcm_format_to_bits(chip->cur_format); |
4ede028f HCE |
105 | mutex_unlock(&opened_mutex); |
106 | chip->playback_substream = substream; | |
107 | return 0; | |
108 | } | |
109 | ||
110 | static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream) | |
111 | { | |
112 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
113 | struct snd_pcm_runtime *runtime = substream->runtime; | |
114 | ||
115 | mutex_lock(&opened_mutex); | |
116 | chip->opened++; | |
117 | runtime->hw = atmel_ac97c_hw; | |
118 | if (chip->cur_rate) { | |
119 | runtime->hw.rate_min = chip->cur_rate; | |
120 | runtime->hw.rate_max = chip->cur_rate; | |
121 | } | |
122 | if (chip->cur_format) | |
74c34ca1 | 123 | runtime->hw.formats = pcm_format_to_bits(chip->cur_format); |
4ede028f HCE |
124 | mutex_unlock(&opened_mutex); |
125 | chip->capture_substream = substream; | |
126 | return 0; | |
127 | } | |
128 | ||
129 | static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream) | |
130 | { | |
131 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
132 | ||
133 | mutex_lock(&opened_mutex); | |
134 | chip->opened--; | |
135 | if (!chip->opened) { | |
136 | chip->cur_rate = 0; | |
137 | chip->cur_format = 0; | |
138 | } | |
139 | mutex_unlock(&opened_mutex); | |
140 | ||
141 | chip->playback_substream = NULL; | |
142 | ||
143 | return 0; | |
144 | } | |
145 | ||
146 | static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream) | |
147 | { | |
148 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
149 | ||
150 | mutex_lock(&opened_mutex); | |
151 | chip->opened--; | |
152 | if (!chip->opened) { | |
153 | chip->cur_rate = 0; | |
154 | chip->cur_format = 0; | |
155 | } | |
156 | mutex_unlock(&opened_mutex); | |
157 | ||
158 | chip->capture_substream = NULL; | |
159 | ||
160 | return 0; | |
161 | } | |
162 | ||
163 | static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream, | |
164 | struct snd_pcm_hw_params *hw_params) | |
165 | { | |
166 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
167 | int retval; | |
168 | ||
169 | retval = snd_pcm_lib_malloc_pages(substream, | |
170 | params_buffer_bytes(hw_params)); | |
171 | if (retval < 0) | |
172 | return retval; | |
020c5260 | 173 | |
4ede028f HCE |
174 | /* Set restrictions to params. */ |
175 | mutex_lock(&opened_mutex); | |
176 | chip->cur_rate = params_rate(hw_params); | |
177 | chip->cur_format = params_format(hw_params); | |
178 | mutex_unlock(&opened_mutex); | |
179 | ||
180 | return retval; | |
181 | } | |
182 | ||
183 | static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream, | |
184 | struct snd_pcm_hw_params *hw_params) | |
185 | { | |
186 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
187 | int retval; | |
188 | ||
189 | retval = snd_pcm_lib_malloc_pages(substream, | |
190 | params_buffer_bytes(hw_params)); | |
191 | if (retval < 0) | |
192 | return retval; | |
4ede028f HCE |
193 | |
194 | /* Set restrictions to params. */ | |
195 | mutex_lock(&opened_mutex); | |
196 | chip->cur_rate = params_rate(hw_params); | |
197 | chip->cur_format = params_format(hw_params); | |
198 | mutex_unlock(&opened_mutex); | |
199 | ||
200 | return retval; | |
201 | } | |
202 | ||
4ede028f HCE |
203 | static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream) |
204 | { | |
205 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
206 | struct snd_pcm_runtime *runtime = substream->runtime; | |
7177395f | 207 | int block_size = frames_to_bytes(runtime, runtime->period_size); |
128ed6a9 | 208 | unsigned long word = ac97c_readl(chip, OCA); |
4ede028f HCE |
209 | int retval; |
210 | ||
7177395f | 211 | chip->playback_period = 0; |
128ed6a9 HCE |
212 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); |
213 | ||
4ede028f HCE |
214 | /* assign channels to AC97C channel A */ |
215 | switch (runtime->channels) { | |
216 | case 1: | |
217 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A); | |
218 | break; | |
219 | case 2: | |
220 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A) | |
221 | | AC97C_CH_ASSIGN(PCM_RIGHT, A); | |
222 | break; | |
223 | default: | |
224 | /* TODO: support more than two channels */ | |
225 | return -EINVAL; | |
4ede028f HCE |
226 | } |
227 | ac97c_writel(chip, OCA, word); | |
228 | ||
229 | /* configure sample format and size */ | |
ec2755a9 SG |
230 | word = ac97c_readl(chip, CAMR); |
231 | if (chip->opened <= 1) | |
232 | word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
233 | else | |
234 | word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
4ede028f HCE |
235 | |
236 | switch (runtime->format) { | |
237 | case SNDRV_PCM_FORMAT_S16_LE: | |
4ede028f HCE |
238 | break; |
239 | case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ | |
4ede028f HCE |
240 | word &= ~(AC97C_CMR_CEM_LITTLE); |
241 | break; | |
128ed6a9 HCE |
242 | default: |
243 | word = ac97c_readl(chip, OCA); | |
244 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); | |
245 | ac97c_writel(chip, OCA, word); | |
246 | return -EINVAL; | |
4ede028f HCE |
247 | } |
248 | ||
df163587 HCE |
249 | /* Enable underrun interrupt on channel A */ |
250 | word |= AC97C_CSR_UNRUN; | |
251 | ||
4ede028f HCE |
252 | ac97c_writel(chip, CAMR, word); |
253 | ||
df163587 HCE |
254 | /* Enable channel A event interrupt */ |
255 | word = ac97c_readl(chip, IMR); | |
256 | word |= AC97C_SR_CAEVT; | |
257 | ac97c_writel(chip, IER, word); | |
258 | ||
4ede028f HCE |
259 | /* set variable rate if needed */ |
260 | if (runtime->rate != 48000) { | |
261 | word = ac97c_readl(chip, MR); | |
262 | word |= AC97C_MR_VRA; | |
263 | ac97c_writel(chip, MR, word); | |
264 | } else { | |
265 | word = ac97c_readl(chip, MR); | |
266 | word &= ~(AC97C_MR_VRA); | |
267 | ac97c_writel(chip, MR, word); | |
268 | } | |
269 | ||
270 | retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, | |
271 | runtime->rate); | |
272 | if (retval) | |
273 | dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n", | |
274 | runtime->rate); | |
275 | ||
020c5260 AS |
276 | /* Initialize and start the PDC */ |
277 | writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR); | |
278 | writel(block_size / 2, chip->regs + ATMEL_PDC_TCR); | |
279 | writel(runtime->dma_addr + block_size, chip->regs + ATMEL_PDC_TNPR); | |
280 | writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR); | |
4ede028f HCE |
281 | |
282 | return retval; | |
283 | } | |
284 | ||
285 | static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream) | |
286 | { | |
287 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
288 | struct snd_pcm_runtime *runtime = substream->runtime; | |
7177395f | 289 | int block_size = frames_to_bytes(runtime, runtime->period_size); |
128ed6a9 | 290 | unsigned long word = ac97c_readl(chip, ICA); |
4ede028f HCE |
291 | int retval; |
292 | ||
7177395f | 293 | chip->capture_period = 0; |
128ed6a9 HCE |
294 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); |
295 | ||
4ede028f HCE |
296 | /* assign channels to AC97C channel A */ |
297 | switch (runtime->channels) { | |
298 | case 1: | |
299 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A); | |
300 | break; | |
301 | case 2: | |
302 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A) | |
303 | | AC97C_CH_ASSIGN(PCM_RIGHT, A); | |
304 | break; | |
305 | default: | |
306 | /* TODO: support more than two channels */ | |
307 | return -EINVAL; | |
4ede028f HCE |
308 | } |
309 | ac97c_writel(chip, ICA, word); | |
310 | ||
311 | /* configure sample format and size */ | |
ec2755a9 SG |
312 | word = ac97c_readl(chip, CAMR); |
313 | if (chip->opened <= 1) | |
314 | word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
315 | else | |
316 | word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
4ede028f HCE |
317 | |
318 | switch (runtime->format) { | |
319 | case SNDRV_PCM_FORMAT_S16_LE: | |
4ede028f HCE |
320 | break; |
321 | case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ | |
4ede028f HCE |
322 | word &= ~(AC97C_CMR_CEM_LITTLE); |
323 | break; | |
128ed6a9 HCE |
324 | default: |
325 | word = ac97c_readl(chip, ICA); | |
326 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); | |
327 | ac97c_writel(chip, ICA, word); | |
328 | return -EINVAL; | |
4ede028f HCE |
329 | } |
330 | ||
df163587 HCE |
331 | /* Enable overrun interrupt on channel A */ |
332 | word |= AC97C_CSR_OVRUN; | |
333 | ||
4ede028f HCE |
334 | ac97c_writel(chip, CAMR, word); |
335 | ||
df163587 HCE |
336 | /* Enable channel A event interrupt */ |
337 | word = ac97c_readl(chip, IMR); | |
338 | word |= AC97C_SR_CAEVT; | |
339 | ac97c_writel(chip, IER, word); | |
340 | ||
4ede028f HCE |
341 | /* set variable rate if needed */ |
342 | if (runtime->rate != 48000) { | |
343 | word = ac97c_readl(chip, MR); | |
344 | word |= AC97C_MR_VRA; | |
345 | ac97c_writel(chip, MR, word); | |
346 | } else { | |
347 | word = ac97c_readl(chip, MR); | |
348 | word &= ~(AC97C_MR_VRA); | |
349 | ac97c_writel(chip, MR, word); | |
350 | } | |
351 | ||
352 | retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, | |
353 | runtime->rate); | |
354 | if (retval) | |
355 | dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n", | |
356 | runtime->rate); | |
357 | ||
020c5260 AS |
358 | /* Initialize and start the PDC */ |
359 | writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR); | |
360 | writel(block_size / 2, chip->regs + ATMEL_PDC_RCR); | |
361 | writel(runtime->dma_addr + block_size, chip->regs + ATMEL_PDC_RNPR); | |
362 | writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR); | |
4ede028f HCE |
363 | |
364 | return retval; | |
365 | } | |
366 | ||
367 | static int | |
368 | atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd) | |
369 | { | |
370 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
7177395f | 371 | unsigned long camr, ptcr = 0; |
4ede028f HCE |
372 | |
373 | camr = ac97c_readl(chip, CAMR); | |
374 | ||
375 | switch (cmd) { | |
376 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */ | |
377 | case SNDRV_PCM_TRIGGER_RESUME: /* fall through */ | |
378 | case SNDRV_PCM_TRIGGER_START: | |
020c5260 | 379 | ptcr = ATMEL_PDC_TXTEN; |
ec2755a9 | 380 | camr |= AC97C_CMR_CENA | AC97C_CSR_ENDTX; |
4ede028f HCE |
381 | break; |
382 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */ | |
383 | case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */ | |
384 | case SNDRV_PCM_TRIGGER_STOP: | |
020c5260 | 385 | ptcr |= ATMEL_PDC_TXTDIS; |
4ede028f HCE |
386 | if (chip->opened <= 1) |
387 | camr &= ~AC97C_CMR_CENA; | |
388 | break; | |
389 | default: | |
020c5260 | 390 | return -EINVAL; |
4ede028f HCE |
391 | } |
392 | ||
393 | ac97c_writel(chip, CAMR, camr); | |
020c5260 AS |
394 | writel(ptcr, chip->regs + ATMEL_PDC_PTCR); |
395 | return 0; | |
4ede028f HCE |
396 | } |
397 | ||
398 | static int | |
399 | atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd) | |
400 | { | |
401 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
7177395f | 402 | unsigned long camr, ptcr = 0; |
4ede028f HCE |
403 | |
404 | camr = ac97c_readl(chip, CAMR); | |
7177395f | 405 | ptcr = readl(chip->regs + ATMEL_PDC_PTSR); |
4ede028f HCE |
406 | |
407 | switch (cmd) { | |
408 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */ | |
409 | case SNDRV_PCM_TRIGGER_RESUME: /* fall through */ | |
410 | case SNDRV_PCM_TRIGGER_START: | |
020c5260 | 411 | ptcr = ATMEL_PDC_RXTEN; |
ec2755a9 | 412 | camr |= AC97C_CMR_CENA | AC97C_CSR_ENDRX; |
4ede028f HCE |
413 | break; |
414 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */ | |
415 | case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */ | |
416 | case SNDRV_PCM_TRIGGER_STOP: | |
020c5260 | 417 | ptcr |= ATMEL_PDC_RXTDIS; |
4ede028f HCE |
418 | if (chip->opened <= 1) |
419 | camr &= ~AC97C_CMR_CENA; | |
420 | break; | |
421 | default: | |
020c5260 | 422 | return -EINVAL; |
4ede028f HCE |
423 | } |
424 | ||
425 | ac97c_writel(chip, CAMR, camr); | |
020c5260 AS |
426 | writel(ptcr, chip->regs + ATMEL_PDC_PTCR); |
427 | return 0; | |
4ede028f HCE |
428 | } |
429 | ||
430 | static snd_pcm_uframes_t | |
431 | atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream) | |
432 | { | |
433 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
434 | struct snd_pcm_runtime *runtime = substream->runtime; | |
435 | snd_pcm_uframes_t frames; | |
436 | unsigned long bytes; | |
437 | ||
020c5260 | 438 | bytes = readl(chip->regs + ATMEL_PDC_TPR); |
4ede028f HCE |
439 | bytes -= runtime->dma_addr; |
440 | ||
441 | frames = bytes_to_frames(runtime, bytes); | |
442 | if (frames >= runtime->buffer_size) | |
443 | frames -= runtime->buffer_size; | |
444 | return frames; | |
445 | } | |
446 | ||
447 | static snd_pcm_uframes_t | |
448 | atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream) | |
449 | { | |
450 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
451 | struct snd_pcm_runtime *runtime = substream->runtime; | |
452 | snd_pcm_uframes_t frames; | |
453 | unsigned long bytes; | |
454 | ||
020c5260 | 455 | bytes = readl(chip->regs + ATMEL_PDC_RPR); |
4ede028f HCE |
456 | bytes -= runtime->dma_addr; |
457 | ||
458 | frames = bytes_to_frames(runtime, bytes); | |
459 | if (frames >= runtime->buffer_size) | |
460 | frames -= runtime->buffer_size; | |
461 | return frames; | |
462 | } | |
463 | ||
464 | static struct snd_pcm_ops atmel_ac97_playback_ops = { | |
465 | .open = atmel_ac97c_playback_open, | |
466 | .close = atmel_ac97c_playback_close, | |
467 | .ioctl = snd_pcm_lib_ioctl, | |
468 | .hw_params = atmel_ac97c_playback_hw_params, | |
020c5260 | 469 | .hw_free = snd_pcm_lib_free_pages, |
4ede028f HCE |
470 | .prepare = atmel_ac97c_playback_prepare, |
471 | .trigger = atmel_ac97c_playback_trigger, | |
472 | .pointer = atmel_ac97c_playback_pointer, | |
473 | }; | |
474 | ||
475 | static struct snd_pcm_ops atmel_ac97_capture_ops = { | |
476 | .open = atmel_ac97c_capture_open, | |
477 | .close = atmel_ac97c_capture_close, | |
478 | .ioctl = snd_pcm_lib_ioctl, | |
479 | .hw_params = atmel_ac97c_capture_hw_params, | |
020c5260 | 480 | .hw_free = snd_pcm_lib_free_pages, |
4ede028f HCE |
481 | .prepare = atmel_ac97c_capture_prepare, |
482 | .trigger = atmel_ac97c_capture_trigger, | |
483 | .pointer = atmel_ac97c_capture_pointer, | |
484 | }; | |
485 | ||
df163587 HCE |
486 | static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev) |
487 | { | |
488 | struct atmel_ac97c *chip = (struct atmel_ac97c *)dev; | |
489 | irqreturn_t retval = IRQ_NONE; | |
490 | u32 sr = ac97c_readl(chip, SR); | |
491 | u32 casr = ac97c_readl(chip, CASR); | |
492 | u32 cosr = ac97c_readl(chip, COSR); | |
7177395f | 493 | u32 camr = ac97c_readl(chip, CAMR); |
df163587 HCE |
494 | |
495 | if (sr & AC97C_SR_CAEVT) { | |
7177395f SG |
496 | struct snd_pcm_runtime *runtime; |
497 | int offset, next_period, block_size; | |
f5341163 | 498 | dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n", |
df163587 HCE |
499 | casr & AC97C_CSR_OVRUN ? " OVRUN" : "", |
500 | casr & AC97C_CSR_RXRDY ? " RXRDY" : "", | |
501 | casr & AC97C_CSR_UNRUN ? " UNRUN" : "", | |
502 | casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "", | |
503 | casr & AC97C_CSR_TXRDY ? " TXRDY" : "", | |
504 | !casr ? " NONE" : ""); | |
020c5260 AS |
505 | if ((casr & camr) & AC97C_CSR_ENDTX) { |
506 | runtime = chip->playback_substream->runtime; | |
507 | block_size = frames_to_bytes(runtime, runtime->period_size); | |
508 | chip->playback_period++; | |
509 | ||
510 | if (chip->playback_period == runtime->periods) | |
511 | chip->playback_period = 0; | |
512 | next_period = chip->playback_period + 1; | |
513 | if (next_period == runtime->periods) | |
514 | next_period = 0; | |
515 | ||
516 | offset = block_size * next_period; | |
517 | ||
518 | writel(runtime->dma_addr + offset, chip->regs + ATMEL_PDC_TNPR); | |
519 | writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR); | |
520 | ||
521 | snd_pcm_period_elapsed(chip->playback_substream); | |
522 | } | |
523 | if ((casr & camr) & AC97C_CSR_ENDRX) { | |
524 | runtime = chip->capture_substream->runtime; | |
525 | block_size = frames_to_bytes(runtime, runtime->period_size); | |
526 | chip->capture_period++; | |
527 | ||
528 | if (chip->capture_period == runtime->periods) | |
529 | chip->capture_period = 0; | |
530 | next_period = chip->capture_period + 1; | |
531 | if (next_period == runtime->periods) | |
532 | next_period = 0; | |
533 | ||
534 | offset = block_size * next_period; | |
535 | ||
536 | writel(runtime->dma_addr + offset, chip->regs + ATMEL_PDC_RNPR); | |
537 | writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR); | |
538 | snd_pcm_period_elapsed(chip->capture_substream); | |
7177395f | 539 | } |
df163587 HCE |
540 | retval = IRQ_HANDLED; |
541 | } | |
542 | ||
543 | if (sr & AC97C_SR_COEVT) { | |
544 | dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n", | |
545 | cosr & AC97C_CSR_OVRUN ? " OVRUN" : "", | |
546 | cosr & AC97C_CSR_RXRDY ? " RXRDY" : "", | |
547 | cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "", | |
548 | cosr & AC97C_CSR_TXRDY ? " TXRDY" : "", | |
549 | !cosr ? " NONE" : ""); | |
550 | retval = IRQ_HANDLED; | |
551 | } | |
552 | ||
553 | if (retval == IRQ_NONE) { | |
554 | dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x " | |
555 | "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr); | |
556 | } | |
557 | ||
558 | return retval; | |
559 | } | |
560 | ||
61dc674c | 561 | static struct ac97_pcm at91_ac97_pcm_defs[] = { |
7177395f SG |
562 | /* Playback */ |
563 | { | |
564 | .exclusive = 1, | |
565 | .r = { { | |
566 | .slots = ((1 << AC97_SLOT_PCM_LEFT) | |
567 | | (1 << AC97_SLOT_PCM_RIGHT)), | |
568 | } }, | |
569 | }, | |
570 | /* PCM in */ | |
571 | { | |
572 | .stream = 1, | |
573 | .exclusive = 1, | |
574 | .r = { { | |
575 | .slots = ((1 << AC97_SLOT_PCM_LEFT) | |
576 | | (1 << AC97_SLOT_PCM_RIGHT)), | |
577 | } } | |
578 | }, | |
579 | /* Mic in */ | |
580 | { | |
581 | .stream = 1, | |
582 | .exclusive = 1, | |
583 | .r = { { | |
584 | .slots = (1<<AC97_SLOT_MIC), | |
585 | } } | |
586 | }, | |
587 | }; | |
588 | ||
61dc674c | 589 | static int atmel_ac97c_pcm_new(struct atmel_ac97c *chip) |
4ede028f HCE |
590 | { |
591 | struct snd_pcm *pcm; | |
592 | struct snd_pcm_hardware hw = atmel_ac97c_hw; | |
020c5260 | 593 | int retval; |
4ede028f | 594 | |
020c5260 AS |
595 | retval = snd_ac97_pcm_assign(chip->ac97_bus, |
596 | ARRAY_SIZE(at91_ac97_pcm_defs), | |
597 | at91_ac97_pcm_defs); | |
598 | if (retval) | |
599 | return retval; | |
4ede028f | 600 | |
020c5260 | 601 | retval = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm); |
4ede028f HCE |
602 | if (retval) |
603 | return retval; | |
604 | ||
020c5260 AS |
605 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &atmel_ac97_capture_ops); |
606 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &atmel_ac97_playback_ops); | |
4ede028f HCE |
607 | |
608 | retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
609 | &chip->pdev->dev, hw.periods_min * hw.period_bytes_min, | |
610 | hw.buffer_bytes_max); | |
611 | if (retval) | |
612 | return retval; | |
613 | ||
614 | pcm->private_data = chip; | |
615 | pcm->info_flags = 0; | |
616 | strcpy(pcm->name, chip->card->shortname); | |
617 | chip->pcm = pcm; | |
618 | ||
619 | return 0; | |
620 | } | |
621 | ||
622 | static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip) | |
623 | { | |
624 | struct snd_ac97_template template; | |
625 | memset(&template, 0, sizeof(template)); | |
626 | template.private_data = chip; | |
627 | return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97); | |
628 | } | |
629 | ||
630 | static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg, | |
631 | unsigned short val) | |
632 | { | |
633 | struct atmel_ac97c *chip = get_chip(ac97); | |
634 | unsigned long word; | |
635 | int timeout = 40; | |
636 | ||
637 | word = (reg & 0x7f) << 16 | val; | |
638 | ||
639 | do { | |
640 | if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) { | |
641 | ac97c_writel(chip, COTHR, word); | |
642 | return; | |
643 | } | |
644 | udelay(1); | |
645 | } while (--timeout); | |
646 | ||
647 | dev_dbg(&chip->pdev->dev, "codec write timeout\n"); | |
648 | } | |
649 | ||
650 | static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97, | |
651 | unsigned short reg) | |
652 | { | |
653 | struct atmel_ac97c *chip = get_chip(ac97); | |
654 | unsigned long word; | |
655 | int timeout = 40; | |
656 | int write = 10; | |
657 | ||
658 | word = (0x80 | (reg & 0x7f)) << 16; | |
659 | ||
660 | if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) | |
661 | ac97c_readl(chip, CORHR); | |
662 | ||
663 | retry_write: | |
664 | timeout = 40; | |
665 | ||
666 | do { | |
667 | if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) { | |
668 | ac97c_writel(chip, COTHR, word); | |
669 | goto read_reg; | |
670 | } | |
671 | udelay(10); | |
672 | } while (--timeout); | |
673 | ||
674 | if (!--write) | |
675 | goto timed_out; | |
676 | goto retry_write; | |
677 | ||
678 | read_reg: | |
679 | do { | |
680 | if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) { | |
681 | unsigned short val = ac97c_readl(chip, CORHR); | |
682 | return val; | |
683 | } | |
684 | udelay(10); | |
685 | } while (--timeout); | |
686 | ||
687 | if (!--write) | |
688 | goto timed_out; | |
689 | goto retry_write; | |
690 | ||
691 | timed_out: | |
692 | dev_dbg(&chip->pdev->dev, "codec read timeout\n"); | |
693 | return 0xffff; | |
694 | } | |
695 | ||
4ede028f HCE |
696 | static void atmel_ac97c_reset(struct atmel_ac97c *chip) |
697 | { | |
81baf3a7 HCE |
698 | ac97c_writel(chip, MR, 0); |
699 | ac97c_writel(chip, MR, AC97C_MR_ENA); | |
700 | ac97c_writel(chip, CAMR, 0); | |
701 | ac97c_writel(chip, COMR, 0); | |
4ede028f HCE |
702 | |
703 | if (gpio_is_valid(chip->reset_pin)) { | |
704 | gpio_set_value(chip->reset_pin, 0); | |
705 | /* AC97 v2.2 specifications says minimum 1 us. */ | |
81baf3a7 | 706 | udelay(2); |
4ede028f | 707 | gpio_set_value(chip->reset_pin, 1); |
8015e3de BS |
708 | } else { |
709 | ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA); | |
710 | udelay(2); | |
711 | ac97c_writel(chip, MR, AC97C_MR_ENA); | |
4ede028f | 712 | } |
4ede028f HCE |
713 | } |
714 | ||
b2d8957f AS |
715 | #ifdef CONFIG_OF |
716 | static const struct of_device_id atmel_ac97c_dt_ids[] = { | |
717 | { .compatible = "atmel,at91sam9263-ac97c", }, | |
718 | { } | |
719 | }; | |
720 | MODULE_DEVICE_TABLE(of, atmel_ac97c_dt_ids); | |
721 | ||
722 | static struct ac97c_platform_data *atmel_ac97c_probe_dt(struct device *dev) | |
723 | { | |
724 | struct ac97c_platform_data *pdata; | |
725 | struct device_node *node = dev->of_node; | |
b2d8957f AS |
726 | |
727 | if (!node) { | |
728 | dev_err(dev, "Device does not have associated DT data\n"); | |
729 | return ERR_PTR(-EINVAL); | |
730 | } | |
731 | ||
732 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
733 | if (!pdata) | |
734 | return ERR_PTR(-ENOMEM); | |
735 | ||
736 | pdata->reset_pin = of_get_named_gpio(dev->of_node, "ac97-gpios", 2); | |
737 | ||
738 | return pdata; | |
739 | } | |
740 | #else | |
741 | static struct ac97c_platform_data *atmel_ac97c_probe_dt(struct device *dev) | |
742 | { | |
743 | dev_err(dev, "no platform data defined\n"); | |
744 | return ERR_PTR(-ENXIO); | |
745 | } | |
746 | #endif | |
747 | ||
61dc674c | 748 | static int atmel_ac97c_probe(struct platform_device *pdev) |
4ede028f HCE |
749 | { |
750 | struct snd_card *card; | |
751 | struct atmel_ac97c *chip; | |
752 | struct resource *regs; | |
753 | struct ac97c_platform_data *pdata; | |
754 | struct clk *pclk; | |
755 | static struct snd_ac97_bus_ops ops = { | |
756 | .write = atmel_ac97c_write, | |
757 | .read = atmel_ac97c_read, | |
758 | }; | |
759 | int retval; | |
df163587 | 760 | int irq; |
4ede028f HCE |
761 | |
762 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
763 | if (!regs) { | |
764 | dev_dbg(&pdev->dev, "no memory resource\n"); | |
765 | return -ENXIO; | |
766 | } | |
767 | ||
b2d8957f | 768 | pdata = dev_get_platdata(&pdev->dev); |
4ede028f | 769 | if (!pdata) { |
b2d8957f AS |
770 | pdata = atmel_ac97c_probe_dt(&pdev->dev); |
771 | if (IS_ERR(pdata)) | |
772 | return PTR_ERR(pdata); | |
4ede028f HCE |
773 | } |
774 | ||
df163587 HCE |
775 | irq = platform_get_irq(pdev, 0); |
776 | if (irq < 0) { | |
77201135 GS |
777 | dev_dbg(&pdev->dev, "could not get irq: %d\n", irq); |
778 | return irq; | |
df163587 HCE |
779 | } |
780 | ||
020c5260 | 781 | pclk = clk_get(&pdev->dev, "ac97_clk"); |
4ede028f HCE |
782 | if (IS_ERR(pclk)) { |
783 | dev_dbg(&pdev->dev, "no peripheral clock\n"); | |
784 | return PTR_ERR(pclk); | |
785 | } | |
1132015b | 786 | clk_prepare_enable(pclk); |
4ede028f | 787 | |
a4f2473d TI |
788 | retval = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1, |
789 | SNDRV_DEFAULT_STR1, THIS_MODULE, | |
790 | sizeof(struct atmel_ac97c), &card); | |
4ede028f HCE |
791 | if (retval) { |
792 | dev_dbg(&pdev->dev, "could not create sound card device\n"); | |
793 | goto err_snd_card_new; | |
794 | } | |
795 | ||
796 | chip = get_chip(card); | |
797 | ||
df163587 HCE |
798 | retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip); |
799 | if (retval) { | |
800 | dev_dbg(&pdev->dev, "unable to request irq %d\n", irq); | |
801 | goto err_request_irq; | |
802 | } | |
803 | chip->irq = irq; | |
804 | ||
4ede028f HCE |
805 | spin_lock_init(&chip->lock); |
806 | ||
807 | strcpy(card->driver, "Atmel AC97C"); | |
808 | strcpy(card->shortname, "Atmel AC97C"); | |
809 | sprintf(card->longname, "Atmel AC97 controller"); | |
810 | ||
811 | chip->card = card; | |
812 | chip->pclk = pclk; | |
813 | chip->pdev = pdev; | |
28f65c11 | 814 | chip->regs = ioremap(regs->start, resource_size(regs)); |
4ede028f HCE |
815 | |
816 | if (!chip->regs) { | |
817 | dev_dbg(&pdev->dev, "could not remap register memory\n"); | |
0c23e46e | 818 | retval = -ENOMEM; |
4ede028f HCE |
819 | goto err_ioremap; |
820 | } | |
821 | ||
822 | if (gpio_is_valid(pdata->reset_pin)) { | |
823 | if (gpio_request(pdata->reset_pin, "reset_pin")) { | |
824 | dev_dbg(&pdev->dev, "reset pin not available\n"); | |
825 | chip->reset_pin = -ENODEV; | |
826 | } else { | |
827 | gpio_direction_output(pdata->reset_pin, 1); | |
828 | chip->reset_pin = pdata->reset_pin; | |
829 | } | |
b2522f92 BS |
830 | } else { |
831 | chip->reset_pin = -EINVAL; | |
4ede028f HCE |
832 | } |
833 | ||
81baf3a7 HCE |
834 | atmel_ac97c_reset(chip); |
835 | ||
df163587 HCE |
836 | /* Enable overrun interrupt from codec channel */ |
837 | ac97c_writel(chip, COMR, AC97C_CSR_OVRUN); | |
838 | ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT); | |
839 | ||
4ede028f HCE |
840 | retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus); |
841 | if (retval) { | |
842 | dev_dbg(&pdev->dev, "could not register on ac97 bus\n"); | |
843 | goto err_ac97_bus; | |
844 | } | |
845 | ||
4ede028f HCE |
846 | retval = atmel_ac97c_mixer_new(chip); |
847 | if (retval) { | |
848 | dev_dbg(&pdev->dev, "could not register ac97 mixer\n"); | |
849 | goto err_ac97_bus; | |
850 | } | |
851 | ||
4ede028f HCE |
852 | retval = atmel_ac97c_pcm_new(chip); |
853 | if (retval) { | |
854 | dev_dbg(&pdev->dev, "could not register ac97 pcm device\n"); | |
020c5260 | 855 | goto err_ac97_bus; |
4ede028f HCE |
856 | } |
857 | ||
858 | retval = snd_card_register(card); | |
859 | if (retval) { | |
860 | dev_dbg(&pdev->dev, "could not register sound card\n"); | |
020c5260 | 861 | goto err_ac97_bus; |
4ede028f HCE |
862 | } |
863 | ||
864 | platform_set_drvdata(pdev, card); | |
865 | ||
7177395f SG |
866 | dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n", |
867 | chip->regs, irq); | |
4ede028f HCE |
868 | |
869 | return 0; | |
870 | ||
4ede028f | 871 | err_ac97_bus: |
4ede028f HCE |
872 | if (gpio_is_valid(chip->reset_pin)) |
873 | gpio_free(chip->reset_pin); | |
874 | ||
875 | iounmap(chip->regs); | |
876 | err_ioremap: | |
df163587 HCE |
877 | free_irq(irq, chip); |
878 | err_request_irq: | |
4ede028f HCE |
879 | snd_card_free(card); |
880 | err_snd_card_new: | |
1132015b | 881 | clk_disable_unprepare(pclk); |
4ede028f HCE |
882 | clk_put(pclk); |
883 | return retval; | |
884 | } | |
885 | ||
d34e4e00 | 886 | #ifdef CONFIG_PM_SLEEP |
284e7ca7 | 887 | static int atmel_ac97c_suspend(struct device *pdev) |
4ede028f | 888 | { |
284e7ca7 | 889 | struct snd_card *card = dev_get_drvdata(pdev); |
4ede028f HCE |
890 | struct atmel_ac97c *chip = card->private_data; |
891 | ||
1132015b | 892 | clk_disable_unprepare(chip->pclk); |
4ede028f HCE |
893 | return 0; |
894 | } | |
895 | ||
284e7ca7 | 896 | static int atmel_ac97c_resume(struct device *pdev) |
4ede028f | 897 | { |
284e7ca7 | 898 | struct snd_card *card = dev_get_drvdata(pdev); |
4ede028f HCE |
899 | struct atmel_ac97c *chip = card->private_data; |
900 | ||
1132015b | 901 | clk_prepare_enable(chip->pclk); |
4ede028f HCE |
902 | return 0; |
903 | } | |
284e7ca7 TI |
904 | |
905 | static SIMPLE_DEV_PM_OPS(atmel_ac97c_pm, atmel_ac97c_suspend, atmel_ac97c_resume); | |
906 | #define ATMEL_AC97C_PM_OPS &atmel_ac97c_pm | |
4ede028f | 907 | #else |
284e7ca7 | 908 | #define ATMEL_AC97C_PM_OPS NULL |
4ede028f HCE |
909 | #endif |
910 | ||
61dc674c | 911 | static int atmel_ac97c_remove(struct platform_device *pdev) |
4ede028f HCE |
912 | { |
913 | struct snd_card *card = platform_get_drvdata(pdev); | |
914 | struct atmel_ac97c *chip = get_chip(card); | |
915 | ||
916 | if (gpio_is_valid(chip->reset_pin)) | |
917 | gpio_free(chip->reset_pin); | |
918 | ||
bd74a184 HCE |
919 | ac97c_writel(chip, CAMR, 0); |
920 | ac97c_writel(chip, COMR, 0); | |
921 | ac97c_writel(chip, MR, 0); | |
922 | ||
1132015b | 923 | clk_disable_unprepare(chip->pclk); |
4ede028f HCE |
924 | clk_put(chip->pclk); |
925 | iounmap(chip->regs); | |
df163587 | 926 | free_irq(chip->irq, chip); |
4ede028f | 927 | |
4ede028f HCE |
928 | snd_card_free(card); |
929 | ||
4ede028f HCE |
930 | return 0; |
931 | } | |
932 | ||
933 | static struct platform_driver atmel_ac97c_driver = { | |
4b973ee0 | 934 | .probe = atmel_ac97c_probe, |
61dc674c | 935 | .remove = atmel_ac97c_remove, |
4ede028f HCE |
936 | .driver = { |
937 | .name = "atmel_ac97c", | |
284e7ca7 | 938 | .pm = ATMEL_AC97C_PM_OPS, |
b2d8957f | 939 | .of_match_table = of_match_ptr(atmel_ac97c_dt_ids), |
4ede028f | 940 | }, |
4ede028f | 941 | }; |
4b973ee0 | 942 | module_platform_driver(atmel_ac97c_driver); |
4ede028f HCE |
943 | |
944 | MODULE_LICENSE("GPL"); | |
945 | MODULE_DESCRIPTION("Driver for Atmel AC97 controller"); | |
0cfae7c9 | 946 | MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>"); |