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CommitLineData
31ef9134
CL
1/*
2 * Audio and Music Data Transmission Protocol (IEC 61883-6) streams
3 * with Common Isochronous Packet (IEC 61883-1) headers
4 *
5 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
6 * Licensed under the terms of the GNU General Public License, version 2.
7 */
8
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/firewire.h>
12#include <linux/module.h>
13#include <linux/slab.h>
14#include <sound/pcm.h>
7b2d99fa 15#include <sound/pcm_params.h>
d67c46b9 16#include "amdtp-stream.h"
31ef9134
CL
17
18#define TICKS_PER_CYCLE 3072
19#define CYCLES_PER_SECOND 8000
20#define TICKS_PER_SECOND (TICKS_PER_CYCLE * CYCLES_PER_SECOND)
21
0c95c1d6
TS
22/* Always support Linux tracing subsystem. */
23#define CREATE_TRACE_POINTS
24#include "amdtp-stream-trace.h"
25
ca5b5050 26#define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 microseconds */
31ef9134 27
b445db44
TS
28/* isochronous header parameters */
29#define ISO_DATA_LENGTH_SHIFT 16
31ef9134
CL
30#define TAG_CIP 1
31
b445db44 32/* common isochronous packet header parameters */
9a2820c1
TS
33#define CIP_EOH_SHIFT 31
34#define CIP_EOH (1u << CIP_EOH_SHIFT)
b445db44 35#define CIP_EOH_MASK 0x80000000
9a2820c1
TS
36#define CIP_SID_SHIFT 24
37#define CIP_SID_MASK 0x3f000000
38#define CIP_DBS_MASK 0x00ff0000
39#define CIP_DBS_SHIFT 16
40#define CIP_DBC_MASK 0x000000ff
41#define CIP_FMT_SHIFT 24
b445db44 42#define CIP_FMT_MASK 0x3f000000
9a2820c1
TS
43#define CIP_FDF_MASK 0x00ff0000
44#define CIP_FDF_SHIFT 16
b445db44
TS
45#define CIP_SYT_MASK 0x0000ffff
46#define CIP_SYT_NO_INFO 0xffff
b445db44 47
51c29fd2 48/* Audio and Music transfer protocol specific parameters */
414ba022 49#define CIP_FMT_AM 0x10
2b3fc456 50#define AMDTP_FDF_NO_DATA 0xff
31ef9134
CL
51
52/* TODO: make these configurable */
53#define INTERRUPT_INTERVAL 16
54#define QUEUE_LENGTH 48
55
2b3fc456 56#define IN_PACKET_HEADER_SIZE 4
4b7da117
TS
57#define OUT_PACKET_HEADER_SIZE 0
58
76fb8789
CL
59static void pcm_period_tasklet(unsigned long data);
60
31ef9134 61/**
be4a2894
TS
62 * amdtp_stream_init - initialize an AMDTP stream structure
63 * @s: the AMDTP stream to initialize
31ef9134 64 * @unit: the target of the stream
3ff7e8f0 65 * @dir: the direction of stream
31ef9134 66 * @flags: the packet transmission method to use
5955815e 67 * @fmt: the value of fmt field in CIP header
df075fee
TS
68 * @process_data_blocks: callback handler to process data blocks
69 * @protocol_size: the size to allocate newly for protocol
31ef9134 70 */
be4a2894 71int amdtp_stream_init(struct amdtp_stream *s, struct fw_unit *unit,
5955815e 72 enum amdtp_stream_direction dir, enum cip_flags flags,
df075fee
TS
73 unsigned int fmt,
74 amdtp_stream_process_data_blocks_t process_data_blocks,
75 unsigned int protocol_size)
31ef9134 76{
df075fee
TS
77 if (process_data_blocks == NULL)
78 return -EINVAL;
79
80 s->protocol = kzalloc(protocol_size, GFP_KERNEL);
81 if (!s->protocol)
82 return -ENOMEM;
83
c6f224dc 84 s->unit = unit;
3ff7e8f0 85 s->direction = dir;
31ef9134
CL
86 s->flags = flags;
87 s->context = ERR_PTR(-1);
88 mutex_init(&s->mutex);
76fb8789 89 tasklet_init(&s->period_tasklet, pcm_period_tasklet, (unsigned long)s);
ec00f5e4 90 s->packet_index = 0;
31ef9134 91
7b3b0d85
TS
92 init_waitqueue_head(&s->callback_wait);
93 s->callbacked = false;
7b3b0d85 94
5955815e 95 s->fmt = fmt;
df075fee 96 s->process_data_blocks = process_data_blocks;
414ba022 97
31ef9134
CL
98 return 0;
99}
be4a2894 100EXPORT_SYMBOL(amdtp_stream_init);
31ef9134
CL
101
102/**
be4a2894
TS
103 * amdtp_stream_destroy - free stream resources
104 * @s: the AMDTP stream to destroy
31ef9134 105 */
be4a2894 106void amdtp_stream_destroy(struct amdtp_stream *s)
31ef9134 107{
44c376b9
TS
108 /* Not initialized. */
109 if (s->protocol == NULL)
110 return;
111
be4a2894 112 WARN_ON(amdtp_stream_running(s));
df075fee 113 kfree(s->protocol);
31ef9134 114 mutex_destroy(&s->mutex);
31ef9134 115}
be4a2894 116EXPORT_SYMBOL(amdtp_stream_destroy);
31ef9134 117
c5280e99 118const unsigned int amdtp_syt_intervals[CIP_SFC_COUNT] = {
a7304e3b
CL
119 [CIP_SFC_32000] = 8,
120 [CIP_SFC_44100] = 8,
121 [CIP_SFC_48000] = 8,
122 [CIP_SFC_88200] = 16,
123 [CIP_SFC_96000] = 16,
124 [CIP_SFC_176400] = 32,
125 [CIP_SFC_192000] = 32,
126};
127EXPORT_SYMBOL(amdtp_syt_intervals);
128
f9503a68 129const unsigned int amdtp_rate_table[CIP_SFC_COUNT] = {
1017abed
TS
130 [CIP_SFC_32000] = 32000,
131 [CIP_SFC_44100] = 44100,
132 [CIP_SFC_48000] = 48000,
133 [CIP_SFC_88200] = 88200,
134 [CIP_SFC_96000] = 96000,
135 [CIP_SFC_176400] = 176400,
136 [CIP_SFC_192000] = 192000,
137};
138EXPORT_SYMBOL(amdtp_rate_table);
139
7b2d99fa
TS
140/**
141 * amdtp_stream_add_pcm_hw_constraints - add hw constraints for PCM substream
142 * @s: the AMDTP stream, which must be initialized.
143 * @runtime: the PCM substream runtime
144 */
145int amdtp_stream_add_pcm_hw_constraints(struct amdtp_stream *s,
146 struct snd_pcm_runtime *runtime)
147{
148 int err;
149
7b2d99fa
TS
150 /*
151 * Currently firewire-lib processes 16 packets in one software
152 * interrupt callback. This equals to 2msec but actually the
153 * interval of the interrupts has a jitter.
154 * Additionally, even if adding a constraint to fit period size to
155 * 2msec, actual calculated frames per period doesn't equal to 2msec,
156 * depending on sampling rate.
157 * Anyway, the interval to call snd_pcm_period_elapsed() cannot 2msec.
158 * Here let us use 5msec for safe period interrupt.
159 */
160 err = snd_pcm_hw_constraint_minmax(runtime,
161 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
162 5000, UINT_MAX);
163 if (err < 0)
164 goto end;
165
166 /* Non-Blocking stream has no more constraints */
167 if (!(s->flags & CIP_BLOCKING))
168 goto end;
169
170 /*
171 * One AMDTP packet can include some frames. In blocking mode, the
172 * number equals to SYT_INTERVAL. So the number is 8, 16 or 32,
173 * depending on its sampling rate. For accurate period interrupt, it's
ce991981 174 * preferrable to align period/buffer sizes to current SYT_INTERVAL.
7b2d99fa 175 *
ce991981
YG
176 * TODO: These constraints can be improved with proper rules.
177 * Currently apply LCM of SYT_INTERVALs.
7b2d99fa
TS
178 */
179 err = snd_pcm_hw_constraint_step(runtime, 0,
180 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 32);
181 if (err < 0)
182 goto end;
183 err = snd_pcm_hw_constraint_step(runtime, 0,
184 SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 32);
185end:
186 return err;
187}
188EXPORT_SYMBOL(amdtp_stream_add_pcm_hw_constraints);
189
31ef9134 190/**
be4a2894
TS
191 * amdtp_stream_set_parameters - set stream parameters
192 * @s: the AMDTP stream to configure
31ef9134 193 * @rate: the sample rate
df075fee 194 * @data_block_quadlets: the size of a data block in quadlet unit
31ef9134 195 *
a7304e3b 196 * The parameters must be set before the stream is started, and must not be
31ef9134
CL
197 * changed while the stream is running.
198 */
df075fee
TS
199int amdtp_stream_set_parameters(struct amdtp_stream *s, unsigned int rate,
200 unsigned int data_block_quadlets)
31ef9134 201{
df075fee 202 unsigned int sfc;
31ef9134 203
547e631c 204 for (sfc = 0; sfc < ARRAY_SIZE(amdtp_rate_table); ++sfc) {
1017abed 205 if (amdtp_rate_table[sfc] == rate)
547e631c
TS
206 break;
207 }
208 if (sfc == ARRAY_SIZE(amdtp_rate_table))
209 return -EINVAL;
e84d15f6 210
e84d15f6 211 s->sfc = sfc;
df075fee 212 s->data_block_quadlets = data_block_quadlets;
a7304e3b 213 s->syt_interval = amdtp_syt_intervals[sfc];
e84d15f6
CL
214
215 /* default buffering in the device */
216 s->transfer_delay = TRANSFER_DELAY_TICKS - TICKS_PER_CYCLE;
217 if (s->flags & CIP_BLOCKING)
218 /* additional buffering needed to adjust for no-data packets */
219 s->transfer_delay += TICKS_PER_SECOND * s->syt_interval / rate;
77d2a8a4 220
547e631c 221 return 0;
31ef9134 222}
be4a2894 223EXPORT_SYMBOL(amdtp_stream_set_parameters);
31ef9134
CL
224
225/**
be4a2894
TS
226 * amdtp_stream_get_max_payload - get the stream's packet size
227 * @s: the AMDTP stream
31ef9134
CL
228 *
229 * This function must not be called before the stream has been configured
be4a2894 230 * with amdtp_stream_set_parameters().
31ef9134 231 */
be4a2894 232unsigned int amdtp_stream_get_max_payload(struct amdtp_stream *s)
31ef9134 233{
a2064710
TS
234 unsigned int multiplier = 1;
235
236 if (s->flags & CIP_JUMBO_PAYLOAD)
237 multiplier = 5;
238
239 return 8 + s->syt_interval * s->data_block_quadlets * 4 * multiplier;
31ef9134 240}
be4a2894 241EXPORT_SYMBOL(amdtp_stream_get_max_payload);
31ef9134 242
76fb8789 243/**
be4a2894
TS
244 * amdtp_stream_pcm_prepare - prepare PCM device for running
245 * @s: the AMDTP stream
76fb8789
CL
246 *
247 * This function should be called from the PCM device's .prepare callback.
248 */
be4a2894 249void amdtp_stream_pcm_prepare(struct amdtp_stream *s)
76fb8789
CL
250{
251 tasklet_kill(&s->period_tasklet);
252 s->pcm_buffer_pointer = 0;
253 s->pcm_period_pointer = 0;
254}
be4a2894 255EXPORT_SYMBOL(amdtp_stream_pcm_prepare);
76fb8789 256
875be091
TS
257static unsigned int calculate_data_blocks(struct amdtp_stream *s,
258 unsigned int syt)
31ef9134
CL
259{
260 unsigned int phase, data_blocks;
261
875be091
TS
262 /* Blocking mode. */
263 if (s->flags & CIP_BLOCKING) {
264 /* This module generate empty packet for 'no data'. */
265 if (syt == CIP_SYT_NO_INFO)
266 data_blocks = 0;
267 else
268 data_blocks = s->syt_interval;
269 /* Non-blocking mode. */
31ef9134 270 } else {
875be091
TS
271 if (!cip_sfc_is_base_44100(s->sfc)) {
272 /* Sample_rate / 8000 is an integer, and precomputed. */
273 data_blocks = s->data_block_state;
274 } else {
275 phase = s->data_block_state;
31ef9134
CL
276
277 /*
278 * This calculates the number of data blocks per packet so that
279 * 1) the overall rate is correct and exactly synchronized to
280 * the bus clock, and
281 * 2) packets with a rounded-up number of blocks occur as early
282 * as possible in the sequence (to prevent underruns of the
283 * device's buffer).
284 */
875be091
TS
285 if (s->sfc == CIP_SFC_44100)
286 /* 6 6 5 6 5 6 5 ... */
287 data_blocks = 5 + ((phase & 1) ^
288 (phase == 0 || phase >= 40));
289 else
290 /* 12 11 11 11 11 ... or 23 22 22 22 22 ... */
291 data_blocks = 11 * (s->sfc >> 1) + (phase == 0);
292 if (++phase >= (80 >> (s->sfc >> 1)))
293 phase = 0;
294 s->data_block_state = phase;
295 }
31ef9134
CL
296 }
297
298 return data_blocks;
299}
300
be4a2894 301static unsigned int calculate_syt(struct amdtp_stream *s,
31ef9134
CL
302 unsigned int cycle)
303{
304 unsigned int syt_offset, phase, index, syt;
305
306 if (s->last_syt_offset < TICKS_PER_CYCLE) {
307 if (!cip_sfc_is_base_44100(s->sfc))
308 syt_offset = s->last_syt_offset + s->syt_offset_state;
309 else {
310 /*
311 * The time, in ticks, of the n'th SYT_INTERVAL sample is:
312 * n * SYT_INTERVAL * 24576000 / sample_rate
313 * Modulo TICKS_PER_CYCLE, the difference between successive
314 * elements is about 1386.23. Rounding the results of this
315 * formula to the SYT precision results in a sequence of
316 * differences that begins with:
317 * 1386 1386 1387 1386 1386 1386 1387 1386 1386 1386 1387 ...
318 * This code generates _exactly_ the same sequence.
319 */
320 phase = s->syt_offset_state;
321 index = phase % 13;
322 syt_offset = s->last_syt_offset;
323 syt_offset += 1386 + ((index && !(index & 3)) ||
324 phase == 146);
325 if (++phase >= 147)
326 phase = 0;
327 s->syt_offset_state = phase;
328 }
329 } else
330 syt_offset = s->last_syt_offset - TICKS_PER_CYCLE;
331 s->last_syt_offset = syt_offset;
332
be454366 333 if (syt_offset < TICKS_PER_CYCLE) {
e84d15f6 334 syt_offset += s->transfer_delay;
be454366
CL
335 syt = (cycle + syt_offset / TICKS_PER_CYCLE) << 12;
336 syt += syt_offset % TICKS_PER_CYCLE;
31ef9134 337
b445db44 338 return syt & CIP_SYT_MASK;
be454366 339 } else {
b445db44 340 return CIP_SYT_NO_INFO;
be454366 341 }
31ef9134
CL
342}
343
4b7da117
TS
344static void update_pcm_pointers(struct amdtp_stream *s,
345 struct snd_pcm_substream *pcm,
346 unsigned int frames)
65845f29
TS
347{
348 unsigned int ptr;
349
4b7da117
TS
350 ptr = s->pcm_buffer_pointer + frames;
351 if (ptr >= pcm->runtime->buffer_size)
352 ptr -= pcm->runtime->buffer_size;
353 ACCESS_ONCE(s->pcm_buffer_pointer) = ptr;
354
355 s->pcm_period_pointer += frames;
356 if (s->pcm_period_pointer >= pcm->runtime->period_size) {
357 s->pcm_period_pointer -= pcm->runtime->period_size;
4b7da117
TS
358 tasklet_hi_schedule(&s->period_tasklet);
359 }
360}
361
362static void pcm_period_tasklet(unsigned long data)
363{
364 struct amdtp_stream *s = (void *)data;
365 struct snd_pcm_substream *pcm = ACCESS_ONCE(s->pcm);
366
367 if (pcm)
368 snd_pcm_period_elapsed(pcm);
369}
370
371static int queue_packet(struct amdtp_stream *s,
372 unsigned int header_length,
373 unsigned int payload_length, bool skip)
374{
375 struct fw_iso_packet p = {0};
7b3b0d85
TS
376 int err = 0;
377
378 if (IS_ERR(s->context))
379 goto end;
4b7da117
TS
380
381 p.interrupt = IS_ALIGNED(s->packet_index + 1, INTERRUPT_INTERVAL);
382 p.tag = TAG_CIP;
383 p.header_length = header_length;
384 p.payload_length = (!skip) ? payload_length : 0;
385 p.skip = skip;
386 err = fw_iso_context_queue(s->context, &p, &s->buffer.iso_buffer,
387 s->buffer.packets[s->packet_index].offset);
388 if (err < 0) {
389 dev_err(&s->unit->device, "queueing error: %d\n", err);
390 goto end;
391 }
392
393 if (++s->packet_index >= QUEUE_LENGTH)
394 s->packet_index = 0;
395end:
396 return err;
397}
398
399static inline int queue_out_packet(struct amdtp_stream *s,
400 unsigned int payload_length, bool skip)
401{
402 return queue_packet(s, OUT_PACKET_HEADER_SIZE,
403 payload_length, skip);
404}
405
2b3fc456
TS
406static inline int queue_in_packet(struct amdtp_stream *s)
407{
408 return queue_packet(s, IN_PACKET_HEADER_SIZE,
409 amdtp_stream_get_max_payload(s), false);
410}
411
390a1512 412static int handle_out_packet(struct amdtp_stream *s, unsigned int cycle)
31ef9134
CL
413{
414 __be32 *buffer;
390a1512
TS
415 unsigned int syt;
416 unsigned int data_blocks;
6fc6b9ce 417 unsigned int payload_length;
20e44577 418 unsigned int pcm_frames;
31ef9134 419 struct snd_pcm_substream *pcm;
31ef9134 420
ccccad86 421 buffer = s->buffer.packets[s->packet_index].buffer;
390a1512
TS
422 syt = calculate_syt(s, cycle);
423 data_blocks = calculate_data_blocks(s, syt);
df075fee 424 pcm_frames = s->process_data_blocks(s, buffer + 2, data_blocks, &syt);
20e44577 425
31ef9134 426 buffer[0] = cpu_to_be32(ACCESS_ONCE(s->source_node_id_field) |
9a2820c1 427 (s->data_block_quadlets << CIP_DBS_SHIFT) |
31ef9134 428 s->data_block_counter);
414ba022
TS
429 buffer[1] = cpu_to_be32(CIP_EOH |
430 ((s->fmt << CIP_FMT_SHIFT) & CIP_FMT_MASK) |
431 ((s->fdf << CIP_FDF_SHIFT) & CIP_FDF_MASK) |
432 (syt & CIP_SYT_MASK));
31ef9134
CL
433
434 s->data_block_counter = (s->data_block_counter + data_blocks) & 0xff;
4b7da117 435 payload_length = 8 + data_blocks * 4 * s->data_block_quadlets;
0c95c1d6
TS
436
437 trace_out_packet(s, cycle, buffer, payload_length);
438
a4103bd7
TS
439 if (queue_out_packet(s, payload_length, false) < 0)
440 return -EIO;
31ef9134 441
20e44577
TS
442 pcm = ACCESS_ONCE(s->pcm);
443 if (pcm && pcm_frames > 0)
444 update_pcm_pointers(s, pcm, pcm_frames);
a4103bd7
TS
445
446 /* No need to return the number of handled data blocks. */
447 return 0;
76fb8789
CL
448}
449
6fc6b9ce 450static int handle_in_packet(struct amdtp_stream *s,
d9a16fc9 451 unsigned int payload_quadlets, unsigned int cycle)
2b3fc456 452{
d9a16fc9 453 __be32 *buffer;
2b3fc456 454 u32 cip_header[2];
d9a16fc9 455 unsigned int fmt, fdf, syt;
6fc6b9ce 456 unsigned int data_block_quadlets, data_block_counter, dbc_interval;
d9a16fc9 457 unsigned int data_blocks;
20e44577
TS
458 struct snd_pcm_substream *pcm;
459 unsigned int pcm_frames;
c8bdf49b 460 bool lost;
2b3fc456 461
d9a16fc9 462 buffer = s->buffer.packets[s->packet_index].buffer;
2b3fc456
TS
463 cip_header[0] = be32_to_cpu(buffer[0]);
464 cip_header[1] = be32_to_cpu(buffer[1]);
465
0c95c1d6
TS
466 trace_in_packet(s, cycle, cip_header, payload_quadlets);
467
2b3fc456
TS
468 /*
469 * This module supports 'Two-quadlet CIP header with SYT field'.
77d2a8a4 470 * For convenience, also check FMT field is AM824 or not.
2b3fc456
TS
471 */
472 if (((cip_header[0] & CIP_EOH_MASK) == CIP_EOH) ||
414ba022 473 ((cip_header[1] & CIP_EOH_MASK) != CIP_EOH)) {
2b3fc456
TS
474 dev_info_ratelimited(&s->unit->device,
475 "Invalid CIP header for AMDTP: %08X:%08X\n",
476 cip_header[0], cip_header[1]);
d9a16fc9 477 data_blocks = 0;
20e44577 478 pcm_frames = 0;
2b3fc456
TS
479 goto end;
480 }
481
414ba022
TS
482 /* Check valid protocol or not. */
483 fmt = (cip_header[1] & CIP_FMT_MASK) >> CIP_FMT_SHIFT;
484 if (fmt != s->fmt) {
2a7e1713
TS
485 dev_info_ratelimited(&s->unit->device,
486 "Detect unexpected protocol: %08x %08x\n",
487 cip_header[0], cip_header[1]);
d9a16fc9 488 data_blocks = 0;
2a7e1713
TS
489 pcm_frames = 0;
490 goto end;
414ba022
TS
491 }
492
2b3fc456 493 /* Calculate data blocks */
414ba022 494 fdf = (cip_header[1] & CIP_FDF_MASK) >> CIP_FDF_SHIFT;
2b3fc456 495 if (payload_quadlets < 3 ||
414ba022 496 (fmt == CIP_FMT_AM && fdf == AMDTP_FDF_NO_DATA)) {
d9a16fc9 497 data_blocks = 0;
2b3fc456
TS
498 } else {
499 data_block_quadlets =
9a2820c1 500 (cip_header[0] & CIP_DBS_MASK) >> CIP_DBS_SHIFT;
2b3fc456
TS
501 /* avoid division by zero */
502 if (data_block_quadlets == 0) {
12e0f438 503 dev_err(&s->unit->device,
2b3fc456
TS
504 "Detect invalid value in dbs field: %08X\n",
505 cip_header[0]);
a9007054 506 return -EPROTO;
2b3fc456 507 }
69702239
TS
508 if (s->flags & CIP_WRONG_DBS)
509 data_block_quadlets = s->data_block_quadlets;
2b3fc456 510
d9a16fc9 511 data_blocks = (payload_quadlets - 2) / data_block_quadlets;
2b3fc456
TS
512 }
513
514 /* Check data block counter continuity */
9a2820c1 515 data_block_counter = cip_header[0] & CIP_DBC_MASK;
d9a16fc9 516 if (data_blocks == 0 && (s->flags & CIP_EMPTY_HAS_WRONG_DBC) &&
9d59124c
TS
517 s->data_block_counter != UINT_MAX)
518 data_block_counter = s->data_block_counter;
519
18f5ed36
TS
520 if (((s->flags & CIP_SKIP_DBC_ZERO_CHECK) &&
521 data_block_counter == s->tx_first_dbc) ||
522 s->data_block_counter == UINT_MAX) {
b84b1a27
TS
523 lost = false;
524 } else if (!(s->flags & CIP_DBC_IS_END_EVENT)) {
c8bdf49b 525 lost = data_block_counter != s->data_block_counter;
d9cd0065 526 } else {
d9a16fc9 527 if (data_blocks > 0 && s->tx_dbc_interval > 0)
d9cd0065
TS
528 dbc_interval = s->tx_dbc_interval;
529 else
d9a16fc9 530 dbc_interval = data_blocks;
d9cd0065 531
c8bdf49b 532 lost = data_block_counter !=
d9cd0065
TS
533 ((s->data_block_counter + dbc_interval) & 0xff);
534 }
c8bdf49b
TS
535
536 if (lost) {
12e0f438
TS
537 dev_err(&s->unit->device,
538 "Detect discontinuity of CIP: %02X %02X\n",
539 s->data_block_counter, data_block_counter);
6fc6b9ce 540 return -EIO;
2b3fc456
TS
541 }
542
d9a16fc9
TS
543 syt = be32_to_cpu(buffer[1]) & CIP_SYT_MASK;
544 pcm_frames = s->process_data_blocks(s, buffer + 2, data_blocks, &syt);
2b3fc456 545
c8bdf49b
TS
546 if (s->flags & CIP_DBC_IS_END_EVENT)
547 s->data_block_counter = data_block_counter;
548 else
549 s->data_block_counter =
d9a16fc9 550 (data_block_counter + data_blocks) & 0xff;
2b3fc456
TS
551end:
552 if (queue_in_packet(s) < 0)
6fc6b9ce 553 return -EIO;
2b3fc456 554
20e44577
TS
555 pcm = ACCESS_ONCE(s->pcm);
556 if (pcm && pcm_frames > 0)
557 update_pcm_pointers(s, pcm, pcm_frames);
2b3fc456 558
31ea49ba 559 return 0;
2b3fc456
TS
560}
561
73fc7f08
TS
562/*
563 * In CYCLE_TIMER register of IEEE 1394, 7 bits are used to represent second. On
564 * the other hand, in DMA descriptors of 1394 OHCI, 3 bits are used to represent
565 * it. Thus, via Linux firewire subsystem, we can get the 3 bits for second.
566 */
567static inline u32 compute_cycle_count(u32 tstamp)
568{
569 return (((tstamp >> 13) & 0x07) * 8000) + (tstamp & 0x1fff);
570}
571
572static inline u32 increment_cycle_count(u32 cycle, unsigned int addend)
573{
574 cycle += addend;
575 if (cycle >= 8 * CYCLES_PER_SECOND)
576 cycle -= 8 * CYCLES_PER_SECOND;
577 return cycle;
578}
579
f90e2ded
TS
580static inline u32 decrement_cycle_count(u32 cycle, unsigned int subtrahend)
581{
582 if (cycle < subtrahend)
583 cycle += 8 * CYCLES_PER_SECOND;
584 return cycle - subtrahend;
585}
586
73fc7f08 587static void out_stream_callback(struct fw_iso_context *context, u32 tstamp,
4b7da117
TS
588 size_t header_length, void *header,
589 void *private_data)
31ef9134 590{
be4a2894 591 struct amdtp_stream *s = private_data;
390a1512 592 unsigned int i, packets = header_length / 4;
73fc7f08 593 u32 cycle;
31ef9134 594
a4103bd7
TS
595 if (s->packet_index < 0)
596 return;
597
73fc7f08
TS
598 cycle = compute_cycle_count(tstamp);
599
600 /* Align to actual cycle count for the last packet. */
601 cycle = increment_cycle_count(cycle, QUEUE_LENGTH - packets);
31ef9134 602
ccccad86 603 for (i = 0; i < packets; ++i) {
73fc7f08 604 cycle = increment_cycle_count(cycle, 1);
390a1512 605 if (handle_out_packet(s, cycle) < 0) {
a4103bd7
TS
606 s->packet_index = -1;
607 amdtp_stream_pcm_abort(s);
608 return;
609 }
ccccad86 610 }
a4103bd7 611
13882a82 612 fw_iso_context_queue_flush(s->context);
31ef9134
CL
613}
614
73fc7f08 615static void in_stream_callback(struct fw_iso_context *context, u32 tstamp,
2b3fc456
TS
616 size_t header_length, void *header,
617 void *private_data)
618{
619 struct amdtp_stream *s = private_data;
d9a16fc9 620 unsigned int i, packets;
a2064710 621 unsigned int payload_quadlets, max_payload_quadlets;
d9a16fc9 622 __be32 *headers = header;
f90e2ded 623 u32 cycle;
2b3fc456 624
a4103bd7
TS
625 if (s->packet_index < 0)
626 return;
627
2b3fc456
TS
628 /* The number of packets in buffer */
629 packets = header_length / IN_PACKET_HEADER_SIZE;
630
f90e2ded
TS
631 cycle = compute_cycle_count(tstamp);
632
633 /* Align to actual cycle count for the last packet. */
634 cycle = decrement_cycle_count(cycle, packets);
635
a2064710
TS
636 /* For buffer-over-run prevention. */
637 max_payload_quadlets = amdtp_stream_get_max_payload(s) / 4;
638
d9a16fc9 639 for (i = 0; i < packets; i++) {
f90e2ded 640 cycle = increment_cycle_count(cycle, 1);
2b3fc456
TS
641
642 /* The number of quadlets in this packet */
643 payload_quadlets =
d9a16fc9 644 (be32_to_cpu(headers[i]) >> ISO_DATA_LENGTH_SHIFT) / 4;
a2064710
TS
645 if (payload_quadlets > max_payload_quadlets) {
646 dev_err(&s->unit->device,
647 "Detect jumbo payload: %02x %02x\n",
648 payload_quadlets, max_payload_quadlets);
a2064710
TS
649 break;
650 }
651
d9a16fc9 652 if (handle_in_packet(s, payload_quadlets, cycle) < 0)
6fc6b9ce 653 break;
2b3fc456
TS
654 }
655
dec63cc8 656 /* Queueing error or detecting invalid payload. */
d9a16fc9 657 if (i < packets) {
dec63cc8 658 s->packet_index = -1;
6fc6b9ce 659 amdtp_stream_pcm_abort(s);
7b3b0d85
TS
660 return;
661 }
662
2b3fc456
TS
663 fw_iso_context_queue_flush(s->context);
664}
665
7b3b0d85
TS
666/* this is executed one time */
667static void amdtp_stream_first_callback(struct fw_iso_context *context,
73fc7f08 668 u32 tstamp, size_t header_length,
7b3b0d85
TS
669 void *header, void *private_data)
670{
671 struct amdtp_stream *s = private_data;
672
673 /*
674 * For in-stream, first packet has come.
675 * For out-stream, prepared to transmit first packet
676 */
677 s->callbacked = true;
678 wake_up(&s->callback_wait);
679
680 if (s->direction == AMDTP_IN_STREAM)
681 context->callback.sc = in_stream_callback;
7b3b0d85
TS
682 else
683 context->callback.sc = out_stream_callback;
684
73fc7f08 685 context->callback.sc(context, tstamp, header_length, header, s);
7b3b0d85
TS
686}
687
31ef9134 688/**
be4a2894
TS
689 * amdtp_stream_start - start transferring packets
690 * @s: the AMDTP stream to start
31ef9134
CL
691 * @channel: the isochronous channel on the bus
692 * @speed: firewire speed code
693 *
694 * The stream cannot be started until it has been configured with
be4a2894
TS
695 * amdtp_stream_set_parameters() and it must be started before any PCM or MIDI
696 * device can be started.
31ef9134 697 */
be4a2894 698int amdtp_stream_start(struct amdtp_stream *s, int channel, int speed)
31ef9134
CL
699{
700 static const struct {
701 unsigned int data_block;
702 unsigned int syt_offset;
703 } initial_state[] = {
704 [CIP_SFC_32000] = { 4, 3072 },
705 [CIP_SFC_48000] = { 6, 1024 },
706 [CIP_SFC_96000] = { 12, 1024 },
707 [CIP_SFC_192000] = { 24, 1024 },
708 [CIP_SFC_44100] = { 0, 67 },
709 [CIP_SFC_88200] = { 0, 67 },
710 [CIP_SFC_176400] = { 0, 67 },
711 };
2b3fc456
TS
712 unsigned int header_size;
713 enum dma_data_direction dir;
7ab56645 714 int type, tag, err;
31ef9134
CL
715
716 mutex_lock(&s->mutex);
717
be4a2894 718 if (WARN_ON(amdtp_stream_running(s) ||
4b7da117 719 (s->data_block_quadlets < 1))) {
31ef9134
CL
720 err = -EBADFD;
721 goto err_unlock;
722 }
723
62f00e40 724 if (s->direction == AMDTP_IN_STREAM)
b6bc8123
TS
725 s->data_block_counter = UINT_MAX;
726 else
727 s->data_block_counter = 0;
31ef9134
CL
728 s->data_block_state = initial_state[s->sfc].data_block;
729 s->syt_offset_state = initial_state[s->sfc].syt_offset;
730 s->last_syt_offset = TICKS_PER_CYCLE;
731
2b3fc456
TS
732 /* initialize packet buffer */
733 if (s->direction == AMDTP_IN_STREAM) {
734 dir = DMA_FROM_DEVICE;
735 type = FW_ISO_CONTEXT_RECEIVE;
736 header_size = IN_PACKET_HEADER_SIZE;
2b3fc456
TS
737 } else {
738 dir = DMA_TO_DEVICE;
739 type = FW_ISO_CONTEXT_TRANSMIT;
740 header_size = OUT_PACKET_HEADER_SIZE;
2b3fc456 741 }
31ef9134 742 err = iso_packets_buffer_init(&s->buffer, s->unit, QUEUE_LENGTH,
2b3fc456 743 amdtp_stream_get_max_payload(s), dir);
31ef9134
CL
744 if (err < 0)
745 goto err_unlock;
746
747 s->context = fw_iso_context_create(fw_parent_device(s->unit)->card,
2b3fc456 748 type, channel, speed, header_size,
7b3b0d85 749 amdtp_stream_first_callback, s);
31ef9134
CL
750 if (IS_ERR(s->context)) {
751 err = PTR_ERR(s->context);
752 if (err == -EBUSY)
753 dev_err(&s->unit->device,
be4a2894 754 "no free stream on this controller\n");
31ef9134
CL
755 goto err_buffer;
756 }
757
be4a2894 758 amdtp_stream_update(s);
31ef9134 759
ec00f5e4 760 s->packet_index = 0;
4b7da117 761 do {
2b3fc456
TS
762 if (s->direction == AMDTP_IN_STREAM)
763 err = queue_in_packet(s);
764 else
765 err = queue_out_packet(s, 0, true);
4b7da117
TS
766 if (err < 0)
767 goto err_context;
768 } while (s->packet_index > 0);
31ef9134 769
2b3fc456 770 /* NOTE: TAG1 matches CIP. This just affects in stream. */
7ab56645
TS
771 tag = FW_ISO_CONTEXT_MATCH_TAG1;
772 if (s->flags & CIP_EMPTY_WITH_TAG0)
773 tag |= FW_ISO_CONTEXT_MATCH_TAG0;
774
7b3b0d85 775 s->callbacked = false;
7ab56645 776 err = fw_iso_context_start(s->context, -1, 0, tag);
31ef9134
CL
777 if (err < 0)
778 goto err_context;
779
780 mutex_unlock(&s->mutex);
781
782 return 0;
783
784err_context:
785 fw_iso_context_destroy(s->context);
786 s->context = ERR_PTR(-1);
787err_buffer:
788 iso_packets_buffer_destroy(&s->buffer, s->unit);
789err_unlock:
790 mutex_unlock(&s->mutex);
791
792 return err;
793}
be4a2894 794EXPORT_SYMBOL(amdtp_stream_start);
31ef9134 795
e9148ddd 796/**
be4a2894
TS
797 * amdtp_stream_pcm_pointer - get the PCM buffer position
798 * @s: the AMDTP stream that transports the PCM data
e9148ddd
CL
799 *
800 * Returns the current buffer position, in frames.
801 */
be4a2894 802unsigned long amdtp_stream_pcm_pointer(struct amdtp_stream *s)
e9148ddd 803{
1dba9db0
TS
804 /*
805 * This function is called in software IRQ context of period_tasklet or
806 * process context.
807 *
808 * When the software IRQ context was scheduled by software IRQ context
809 * of IR/IT contexts, queued packets were already handled. Therefore,
810 * no need to flush the queue in buffer anymore.
811 *
812 * When the process context reach here, some packets will be already
813 * queued in the buffer. These packets should be handled immediately
814 * to keep better granularity of PCM pointer.
815 *
816 * Later, the process context will sometimes schedules software IRQ
817 * context of the period_tasklet. Then, no need to flush the queue by
818 * the same reason as described for IR/IT contexts.
819 */
820 if (!in_interrupt() && amdtp_stream_running(s))
92b862c7 821 fw_iso_context_flush_completions(s->context);
e9148ddd
CL
822
823 return ACCESS_ONCE(s->pcm_buffer_pointer);
824}
be4a2894 825EXPORT_SYMBOL(amdtp_stream_pcm_pointer);
e9148ddd 826
31ef9134 827/**
be4a2894
TS
828 * amdtp_stream_update - update the stream after a bus reset
829 * @s: the AMDTP stream
31ef9134 830 */
be4a2894 831void amdtp_stream_update(struct amdtp_stream *s)
31ef9134 832{
9a2820c1 833 /* Precomputing. */
31ef9134 834 ACCESS_ONCE(s->source_node_id_field) =
9a2820c1
TS
835 (fw_parent_device(s->unit)->card->node_id << CIP_SID_SHIFT) &
836 CIP_SID_MASK;
31ef9134 837}
be4a2894 838EXPORT_SYMBOL(amdtp_stream_update);
31ef9134
CL
839
840/**
be4a2894
TS
841 * amdtp_stream_stop - stop sending packets
842 * @s: the AMDTP stream to stop
31ef9134
CL
843 *
844 * All PCM and MIDI devices of the stream must be stopped before the stream
845 * itself can be stopped.
846 */
be4a2894 847void amdtp_stream_stop(struct amdtp_stream *s)
31ef9134
CL
848{
849 mutex_lock(&s->mutex);
850
be4a2894 851 if (!amdtp_stream_running(s)) {
31ef9134
CL
852 mutex_unlock(&s->mutex);
853 return;
854 }
855
76fb8789 856 tasklet_kill(&s->period_tasklet);
31ef9134
CL
857 fw_iso_context_stop(s->context);
858 fw_iso_context_destroy(s->context);
859 s->context = ERR_PTR(-1);
860 iso_packets_buffer_destroy(&s->buffer, s->unit);
861
7b3b0d85
TS
862 s->callbacked = false;
863
31ef9134
CL
864 mutex_unlock(&s->mutex);
865}
be4a2894 866EXPORT_SYMBOL(amdtp_stream_stop);
31ef9134
CL
867
868/**
be4a2894 869 * amdtp_stream_pcm_abort - abort the running PCM device
31ef9134
CL
870 * @s: the AMDTP stream about to be stopped
871 *
872 * If the isochronous stream needs to be stopped asynchronously, call this
873 * function first to stop the PCM device.
874 */
be4a2894 875void amdtp_stream_pcm_abort(struct amdtp_stream *s)
31ef9134
CL
876{
877 struct snd_pcm_substream *pcm;
878
879 pcm = ACCESS_ONCE(s->pcm);
1fb8510c
TI
880 if (pcm)
881 snd_pcm_stop_xrun(pcm);
31ef9134 882}
be4a2894 883EXPORT_SYMBOL(amdtp_stream_pcm_abort);